- Made significant progress in the understanding of Palladium.
- Highlight: Throughout the past year, I am from being a newcomer to being able to work in proficiency. Currently, I often play the role of answering product questions from other Taiwan colleagues.
- Provided technical consultation, guidance, and troubleshooting to all other 5 Taiwan’s teammates in a wide range of areas, including: a. Syntax/standard library (and the ideas behind) of C++ b. Compilation errors and bugs of C++ codes c. Setup and usage instruction of work tools (Perforce, VSCode, Verdi, gdb, shell script, etc.) d. Concepts of data structure and algorithm e. Basic knowledge of logic design and Verilog HDL
- Highlights:
- Ramped up Taiwan team’s technical discipline and skills.
- Initiated the idea of using the Radix Tree data structure to organize probed instances in design hierarchies. It provides excellent performance for adding/querying operations by utilizing contextual information in design hierarchy tree.
- Participated in two major projects: FV 3.0 and CPD SAIF
a. FV 3.0:
- In this project, I was responsible for studying the FSDB writer API and investigating underlying details of intermediate states of FSDB dumping. Became the expert of the FSDB writer API in our team, then ultimately designed and implemented our own efficient hierarchy storage format, FVHDB.
- Highlights:
- Conceived a scalable and extensible architecture to realize encoding/decoding for FVHDB. By leveraging techniques like static determination and compile-time type deduction, FVHDB's conversion mechanism takes a similar advantage as "formal verification", which achieves near-perfect correctness and impressive performance. In addition, the aforementioned accomplishments were achieved along with fast convergence, without much debugging and tuning efforts.
- Designed a concise approach, i.e. interface of FVHDB writer, to bridge and reuse existing codes of FSDB/FVHDB dumping with the new flow of FSDB header generation. That minimized the engineering effort for the transition of project progress from phase 2 to phase 3.
b. CPD SAIF
- In this project, I was primarily in charge of implementing the complete high-level pipeline for generating SAIF files with CPD-uploaded data. This involved integrating SAIF templates from compile-time, data uploaded from compiled probes that were captured to DCC (CPD), calculation results of toggle count and high-state duration, and finally generating SAIF files.
* Highlights:
- Rapidly iterated on implementing different designs of the pipeline to examine impacts of performance without affecting the correctness.
- Played a pivotal role in implementing, debugging, tuning the performance, and driving the final convergence of entire project toward the designated criteria.
- Acted as the tech lead and coordinated the taskforce (I and other 3 members of the Taiwan team) to approach goals of correctness and performance.