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| /* | |
| * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
| * | |
| * This program is free software; you can redistribute it and/or modify | |
| * it under the terms of the GNU General Public License version 2 as | |
| * published by the Free Software Foundation. | |
| */ | |
| /dts-v1/; | |
| #include "am335x-bone.dtsi" | |
| &am33xx_pinmux { | |
| bone_audio_cape_led_pins: pinmux_bone_audio_cape_led_pins { | |
| pinctrl-single,pins = < | |
| 0x48 0x07 /* gpmc_a2.gpio1_18, OUTPUT | MODE7 */ | |
| 0x4c 0x07 /* gpmc_a3.gpio1_19, OUTPUT | MODE7 */ | |
| >; | |
| }; | |
| bone_audio_cape_audio_pins: pinmux_bone_audio_cape_audio_pins { | |
| pinctrl-single,pins = < | |
| 0x190 0x20 /* mcasp0_aclkx.mcasp0_aclkx, INPUT | MODE0 */ | |
| 0x194 0x20 /* mcasp0_fsx.mcasp0_fsx, INPUT | MODE0 */ | |
| 0x19c 0x22 /* mcasp0_ahclkr.mcasp0_axr2, INPUT | MODE2 */ | |
| 0x1ac 0x22 /* mcasp0_ahclkx.mcasp0_axr3, INPUT | MODE2 */ | |
| >; | |
| }; | |
| }; | |
| &ocp { | |
| /* avoid stupid warning */ | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| gpio-leds-cape-audio { | |
| compatible = "gpio-leds"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&bone_audio_cape_led_pins>; | |
| audio-led0 { | |
| label = "audio:green:usr0"; | |
| gpios = <&gpio2 18 0>; | |
| linux,default-trigger = "heartbeat"; | |
| default-state = "off"; | |
| }; | |
| audio-led1 { | |
| label = "audio:green:usr1"; | |
| gpios = <&gpio2 19 0>; | |
| linux,default-trigger = "mmc0"; | |
| default-state = "off"; | |
| }; | |
| }; | |
| }; | |
| &i2c2 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| tlv320aic3x: tlv320aic3x@1b { | |
| compatible = "ti,tlv320aic3x"; | |
| reg = <0x1b>; | |
| status = "okay"; | |
| }; | |
| }; | |
| &mcasp0 { | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <&bone_audio_cape_audio_pins>; | |
| status = "okay"; | |
| op-mode = <0>; /* MCASP_IIS_MODE */ | |
| tdm-slots = <2>; | |
| num-serializer = <16>; | |
| serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
| 0 0 2 1 | |
| 0 0 0 0 | |
| 0 0 0 0 | |
| 0 0 0 0 | |
| >; | |
| tx-num-evt = <1>; | |
| rx-num-evt = <1>; | |
| }; | |
| &ocp { | |
| sound { | |
| compatible = "ti,da830-evm-audio"; | |
| ti,model = "DA830 EVM"; | |
| ti,audio-codec = <&tlv320aic3x>; | |
| ti,mcasp-controller = <&mcasp0>; | |
| ti,codec-clock-rate = <12000000>; | |
| ti,audio-routing = | |
| "Headphone Jack", "HPLOUT", | |
| "Headphone Jack", "HPROUT", | |
| "LINE1L", "Line In", | |
| "LINE1R", "Line In"; | |
| }; | |
| }; |
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| [ 0.000000] Booting Linux on physical CPU 0x0 | |
| [ 0.000000] Initializing cgroup subsys cpuset | |
| [ 0.000000] Initializing cgroup subsys cpu | |
| [ 0.000000] Initializing cgroup subsys cpuacct | |
| [ 0.000000] Linux version 3.14.0-yocto-standard (build@318ddbdb8a8d) (gcc version 4.8.2 (GCC) ) #3 PREEMPT Mon Sep 8 14:38:57 UTC 2014 | |
| [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d | |
| [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache | |
| [ 0.000000] Machine model: TI AM335x BeagleBone | |
| [ 0.000000] cma: CMA: reserved 16 MiB at 8e800000 | |
| [ 0.000000] Memory policy: Data cache writeback | |
| [ 0.000000] On node 0 totalpages: 65280 | |
| [ 0.000000] free_area_init_node: node 0, pgdat c0ab5e14, node_mem_map cfcf2000 | |
| [ 0.000000] Normal zone: 512 pages used for memmap | |
| [ 0.000000] Normal zone: 0 pages reserved | |
| [ 0.000000] Normal zone: 65280 pages, LIFO batch:15 | |
| [ 0.000000] CPU: All CPU(s) started in SVC mode. | |
| [ 0.000000] AM335X ES1.0 (sgx neon ) | |
| [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 | |
| [ 0.000000] pcpu-alloc: [0] 0 | |
| [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 64768 | |
| [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait | |
| [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) | |
| [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) | |
| [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) | |
| [ 0.000000] allocated 524288 bytes of page_cgroup | |
| [ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups | |
| [ 0.000000] Memory: 230056K/261120K available (7495K kernel code, 520K rwdata, 2452K rodata, 488K init, 758K bss, 31064K reserved, 0K highmem) | |
| [ 0.000000] Virtual kernel memory layout: | |
| vector : 0xffff0000 - 0xffff1000 ( 4 kB) | |
| fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) | |
| vmalloc : 0xd0800000 - 0xff000000 ( 744 MB) | |
| lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) | |
| pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) | |
| modules : 0xbf000000 - 0xbfe00000 ( 14 MB) | |
| .text : 0xc0008000 - 0xc09bf184 (9949 kB) | |
| .init : 0xc09c0000 - 0xc0a3a1dc ( 489 kB) | |
| .data : 0xc0a3c000 - 0xc0abe254 ( 521 kB) | |
| .bss : 0xc0abe254 - 0xc0b7bb38 ( 759 kB) | |
| [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 | |
| [ 0.000000] Preemptible hierarchical RCU implementation. | |
| [ 0.000000] NR_IRQS:16 nr_irqs:16 16 | |
| [ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts | |
| [ 0.000000] Total of 128 interrupts on 1 active controller | |
| [ 0.000000] OMAP clockevent source: timer2 at 24000000 Hz | |
| [ 0.000018] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956969942ns | |
| [ 0.000051] OMAP clocksource: timer1 at 24000000 Hz | |
| [ 0.000377] Console: colour dummy device 80x30 | |
| [ 0.000418] Calibrating delay loop... 548.86 BogoMIPS (lpj=2744320) | |
| [ 0.048872] pid_max: default: 32768 minimum: 301 | |
| [ 0.049086] Security Framework initialized | |
| [ 0.049450] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) | |
| [ 0.049475] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) | |
| [ 0.063613] Initializing cgroup subsys debug | |
| [ 0.063659] Initializing cgroup subsys memory | |
| [ 0.063712] Initializing cgroup subsys devices | |
| [ 0.063732] Initializing cgroup subsys freezer | |
| [ 0.063751] Initializing cgroup subsys net_cls | |
| [ 0.063768] Initializing cgroup subsys blkio | |
| [ 0.063863] CPU: Testing write buffer coherency: ok | |
| [ 0.063958] ftrace: allocating 25122 entries in 74 pages | |
| [ 0.194579] Setting up static identity map for 0x806c4bc0 - 0x806c4c18 | |
| [ 0.203876] devtmpfs: initialized | |
| [ 0.207277] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3 | |
| [ 0.222377] omap_hwmod: tptc0 using broken dt data from edma | |
| [ 0.222551] omap_hwmod: tptc1 using broken dt data from edma | |
| [ 0.222708] omap_hwmod: tptc2 using broken dt data from edma | |
| [ 0.228008] omap_hwmod: debugss: _wait_target_disable failed | |
| [ 0.297247] xor: measuring software checksum speed | |
| [ 0.388813] arm4regs : 685.200 MB/sec | |
| [ 0.488809] 8regs : 504.800 MB/sec | |
| [ 0.588812] 32regs : 658.800 MB/sec | |
| [ 0.588828] xor: using function: arm4regs (685.200 MB/sec) | |
| [ 0.588857] pinctrl core: initialized pinctrl subsystem | |
| [ 0.589578] regulator-dummy: no parameters | |
| [ 0.591686] NET: Registered protocol family 16 | |
| [ 0.595103] DMA: preallocated 256 KiB pool for atomic coherent allocations | |
| [ 0.596049] cpuidle: using governor ladder | |
| [ 0.596072] cpuidle: using governor menu | |
| [ 0.605486] platform 49000000.edma: alias fck already exists | |
| [ 0.605527] platform 49000000.edma: alias fck already exists | |
| [ 0.605553] platform 49000000.edma: alias fck already exists | |
| [ 0.606761] OMAP GPIO hardware version 0.1 | |
| [ 0.616548] hw-breakpoint: debug architecture 0x4 unsupported. | |
| [ 0.629152] bio: create slab <bio-0> at 0 | |
| [ 0.799393] raid6: int32x1 89 MB/s | |
| [ 0.968833] raid6: int32x2 107 MB/s | |
| [ 1.138862] raid6: int32x4 90 MB/s | |
| [ 1.309364] raid6: int32x8 92 MB/s | |
| [ 1.309379] raid6: using algorithm int32x2 (107 MB/s) | |
| [ 1.309392] raid6: using intx1 recovery algorithm | |
| [ 1.320944] edma-dma-engine edma-dma-engine.0: TI EDMA DMA engine driver | |
| [ 1.321700] vmmcsd_fixed: 3300 mV | |
| [ 1.324609] SCSI subsystem initialized | |
| [ 1.325115] usbcore: registered new interface driver usbfs | |
| [ 1.325233] usbcore: registered new interface driver hub | |
| [ 1.325578] usbcore: registered new device driver usb | |
| [ 1.326325] omap_i2c 44e0b000.i2c: could not find pctldev for node /pinmux@44e10800/pinmux_i2c0_pins, deferring probe | |
| [ 1.326365] platform 44e0b000.i2c: Driver omap_i2c requests probe deferral | |
| [ 1.328368] cfg80211: Calling CRDA to update world regulatory domain | |
| [ 1.329438] Switched to clocksource timer1 | |
| [ 1.442927] NET: Registered protocol family 2 | |
| [ 1.444085] TCP established hash table entries: 2048 (order: 1, 8192 bytes) | |
| [ 1.444140] TCP bind hash table entries: 2048 (order: 1, 8192 bytes) | |
| [ 1.444184] TCP: Hash tables configured (established 2048 bind 2048) | |
| [ 1.444309] TCP: reno registered | |
| [ 1.444332] UDP hash table entries: 256 (order: 0, 4096 bytes) | |
| [ 1.444363] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) | |
| [ 1.444754] NET: Registered protocol family 1 | |
| [ 1.445404] RPC: Registered named UNIX socket transport module. | |
| [ 1.445425] RPC: Registered udp transport module. | |
| [ 1.445437] RPC: Registered tcp transport module. | |
| [ 1.445449] RPC: Registered tcp NFSv4.1 backchannel transport module. | |
| [ 1.446579] hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available | |
| [ 1.449224] futex hash table entries: 256 (order: -1, 3072 bytes) | |
| [ 1.670883] NFS: Registering the id_resolver key type | |
| [ 1.671014] Key type id_resolver registered | |
| [ 1.671031] Key type id_legacy registered | |
| [ 1.671528] msgmni has been set to 481 | |
| [ 1.674479] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) | |
| [ 1.674507] io scheduler noop registered | |
| [ 1.674521] io scheduler deadline registered | |
| [ 1.675163] io scheduler cfq registered (default) | |
| [ 1.676386] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568 | |
| [ 1.786244] omap_uart 44e09000.serial: no wakeirq for uart0 | |
| [ 1.786885] 44e09000.serial: ttyO0 at MMIO 0x44e09000 (irq = 88, base_baud = 3000000) is a OMAP UART0 | |
| [ 2.469917] console [ttyO0] enabled | |
| [ 2.474775] [drm] Initialized drm 1.1.0 20060810 | |
| [ 2.492602] brd: module loaded | |
| [ 2.497288] mtdoops: mtd device (mtddev=name/number) must be supplied | |
| [ 2.505491] usbcore: registered new interface driver kaweth | |
| [ 2.511414] pegasus: v0.9.3 (2013/04/25), Pegasus/Pegasus II USB Ethernet driver | |
| [ 2.519296] usbcore: registered new interface driver pegasus | |
| [ 2.525359] usbcore: registered new interface driver rtl8150 | |
| [ 2.531449] usbcore: registered new interface driver asix | |
| [ 2.537203] usbcore: registered new interface driver ax88179_178a | |
| [ 2.543720] usbcore: registered new interface driver cdc_ether | |
| [ 2.549956] usbcore: registered new interface driver dm9601 | |
| [ 2.555938] usbcore: registered new interface driver smsc75xx | |
| [ 2.562124] usbcore: registered new interface driver smsc95xx | |
| [ 2.568241] usbcore: registered new interface driver net1080 | |
| [ 2.574299] usbcore: registered new interface driver cdc_subset | |
| [ 2.580635] usbcore: registered new interface driver zaurus | |
| [ 2.586573] usbcore: registered new interface driver MOSCHIP usb-ethernet driver | |
| [ 2.594518] usbcore: registered new interface driver int51x1 | |
| [ 2.600617] usbcore: registered new interface driver cdc_ncm | |
| [ 2.606568] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver | |
| [ 2.613456] ehci-omap: OMAP-EHCI Host Controller driver | |
| [ 2.619246] usbcore: registered new interface driver usb-storage | |
| [ 2.626543] mousedev: PS/2 mouse device common for all mice | |
| [ 2.634321] omap_rtc 44e3e000.rtc: rtc core: registered 44e3e000.rtc as rtc0 | |
| [ 2.641975] 44e3e000.rtc: already running | |
| [ 2.646661] i2c /dev entries driver | |
| [ 2.651730] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec | |
| [ 2.660433] omap_hsmmc 48060000.mmc: vmmc regulator missing | |
| [ 2.666573] platform 48060000.mmc: Driver omap_hsmmc requests probe deferral | |
| [ 2.674637] usbcore: registered new interface driver usbhid | |
| [ 2.680613] usbhid: USB HID core driver | |
| [ 2.685381] oprofile: using arm/armv7 | |
| [ 2.689893] u32 classifier | |
| [ 2.692745] Actions configured | |
| [ 2.696602] TCP: cubic registered | |
| [ 2.701348] NET: Registered protocol family 10 | |
| [ 2.707692] sit: IPv6 over IPv4 tunneling driver | |
| [ 2.713949] NET: Registered protocol family 17 | |
| [ 2.718837] Key type dns_resolver registered | |
| [ 2.724186] ThumbEE CPU extension supported. | |
| [ 2.732199] bio: create slab <bio-1> at 1 | |
| [ 2.738719] Btrfs loaded | |
| [ 2.741667] vmmcsd_fixed: disabling | |
| [ 2.745348] regulator-dummy: disabling | |
| [ 2.754192] DCDC1: at 1800 mV | |
| [ 2.758536] vdd_mpu: 925 <--> 1325 mV at 1100 mV | |
| [ 2.764694] vdd_core: 925 <--> 1150 mV at 1100 mV | |
| [ 2.770836] LDO1: at 1800 mV | |
| [ 2.774977] LDO2: at 3300 mV | |
| [ 2.779143] LDO3: 1800 <--> 3300 mV at 3300 mV | |
| [ 2.785042] LDO4: at 3300 mV | |
| [ 2.788948] tps65217 0-0024: TPS65217 ID 0x7 version 1.0 | |
| [ 2.794639] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz | |
| [ 2.801962] 48060000.mmc supply vmmc_aux not found, using dummy regulator | |
| [ 2.850254] console [netcon0] enabled | |
| [ 2.855227] netconsole: network logging started | |
| [ 2.907116] mmc0: host does not support reading read-only switch. assuming write-enable. | |
| [ 2.918232] mmc0: new high speed SDHC card at address 1234 | |
| [ 2.924063] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6 | |
| [ 2.931259] mmcblk0: mmc0:1234 SA04G 3.63 GiB | |
| [ 2.936464] davinci_mdio 4a101000.mdio: detected phy mask fffffffe | |
| [ 2.944892] libphy: 4a101000.mdio: probed | |
| [ 2.949379] mmcblk0: p1 p2 | |
| [ 2.954017] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver SMSC LAN8710/LAN8720 | |
| [ 2.964656] Detected MACID = d4:94:a1:79:8a:60 | |
| [ 2.971562] omap_rtc 44e3e000.rtc: setting system clock to 2000-01-01 01:05:13 UTC (946688713) | |
| [ 3.004396] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) | |
| [ 3.013190] VFS: Mounted root (ext4 filesystem) readonly on device 179:2. | |
| [ 3.022826] devtmpfs: mounted | |
| [ 3.026914] Freeing unused kernel memory: 488K (c09c0000 - c0a3a000) | |
| [ 3.283822] random: systemd urandom read with 20 bits of entropy available | |
| [ 3.298931] systemd[1]: systemd 211 running in system mode. (-PAM +LIBWRAP -AUDIT -SELINUX +IMA +SYSVINIT -LIBCRYPTSETUP -GCRYPT +ACL +XZ -SECCOMP -APPARMOR) | |
| [ 3.314656] systemd[1]: Detected architecture 'arm'. | |
| [ 3.343029] systemd[1]: Set hostname to <beaglebone>. | |
| [ 3.352893] systemd[1]: Initializing machine ID from random generator. | |
| [ 3.360484] systemd[1]: Installed transient /etc/machine-id file. | |
| [ 3.815721] systemd[1]: Expecting device dev-ttyO0.device... | |
| [ 3.839814] systemd[1]: Starting Forward Password Requests to Wall Directory Watch. | |
| [ 3.848656] systemd[1]: Started Forward Password Requests to Wall Directory Watch. | |
| [ 3.856922] systemd[1]: Starting Remote File Systems. | |
| [ 3.879729] systemd[1]: Reached target Remote File Systems. | |
| [ 3.885911] systemd[1]: Starting Dispatch Password Requests to Console Directory Watch. | |
| [ 3.894901] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. | |
| [ 3.903601] systemd[1]: Starting Paths. | |
| [ 3.919723] systemd[1]: Reached target Paths. | |
| [ 3.924640] systemd[1]: Starting Arbitrary Executable File Formats File System Automount Point. | |
| [ 3.959739] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point. | |
| [ 3.969855] systemd[1]: Starting Swap. | |
| [ 3.989712] systemd[1]: Reached target Swap. | |
| [ 3.994382] systemd[1]: Starting Root Slice. | |
| [ 4.059780] systemd[1]: Created slice Root Slice. | |
| [ 4.064992] systemd[1]: Starting Journal Socket. | |
| [ 4.089756] systemd[1]: Listening on Journal Socket. | |
| [ 4.095333] systemd[1]: Starting udev Kernel Socket. | |
| [ 4.119823] systemd[1]: Listening on udev Kernel Socket. | |
| [ 4.125655] systemd[1]: Starting udev Control Socket. | |
| [ 4.149736] systemd[1]: Listening on udev Control Socket. | |
| [ 4.155597] systemd[1]: Starting Delayed Shutdown Socket. | |
| [ 4.179724] systemd[1]: Listening on Delayed Shutdown Socket. | |
| [ 4.185934] systemd[1]: Starting /dev/initctl Compatibility Named Pipe. | |
| [ 4.209725] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. | |
| [ 4.217208] systemd[1]: Starting Syslog Socket. | |
| [ 4.239720] systemd[1]: Listening on Syslog Socket. | |
| [ 4.245024] systemd[1]: Starting User and Session Slice. | |
| [ 4.269745] systemd[1]: Created slice User and Session Slice. | |
| [ 4.276031] systemd[1]: Starting System Slice. | |
| [ 4.299748] systemd[1]: Created slice System Slice. | |
| [ 4.309213] systemd[1]: Started Set Up Additional Binary Formats. | |
| [ 4.322432] systemd[1]: Started Load Kernel Modules. | |
| [ 4.327919] systemd[1]: Mounted Configuration File System. | |
| [ 4.334035] systemd[1]: Starting udev Coldplug all Devices... | |
| [ 4.364900] systemd[1]: Mounting POSIX Message Queue File System... | |
| [ 4.404481] systemd[1]: Mounted Huge Pages File System. | |
| [ 4.438937] systemd[1]: Starting Create list of required static device nodes for the current kernel... | |
| [ 4.505136] systemd[1]: Mounted FUSE Control File System. | |
| [ 4.530377] systemd[1]: Mounting Debug File System... | |
| [ 4.574463] systemd[1]: Starting Apply Kernel Variables... | |
| [ 4.615003] systemd[1]: Starting File System Check on Root Device... | |
| [ 4.654965] systemd[1]: Mounting Temporary Directory... | |
| [ 4.696185] systemd[1]: Starting system-serial\x2dgetty.slice. | |
| [ 4.735566] systemd[1]: Created slice system-serial\x2dgetty.slice. | |
| [ 4.754957] systemd[1]: Starting Slices. | |
| [ 4.767682] systemd[1]: Reached target Slices. | |
| [ 4.791000] systemd[1]: Mounted Debug File System. | |
| [ 4.801566] systemd[1]: Mounted POSIX Message Queue File System. | |
| [ 4.813189] systemd[1]: Mounted Temporary Directory. | |
| [ 4.848037] systemd[1]: Started Create list of required static device nodes for the current kernel. | |
| [ 4.899747] systemd[1]: Started Apply Kernel Variables. | |
| [ 5.029991] systemd[1]: Started File System Check on Root Device. | |
| [ 5.254365] systemd[1]: Starting Remount Root and Kernel File Systems... | |
| [ 5.295800] systemd[1]: Starting Journal Service... | |
| [ 5.380087] systemd[1]: Started Journal Service. | |
| [ 5.398879] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) | |
| [ 5.760784] systemd-udevd[85]: starting version 211 | |
| [ 6.521258] 47401300.usb-phy supply vcc not found, using dummy regulator | |
| [ 6.608144] 47401b00.usb-phy supply vcc not found, using dummy regulator | |
| [ 6.828730] omap_rng 48310000.rng: OMAP Random Number Generator ver. 20 | |
| [ 7.234097] davinci_evm sound.5: ASoC: CPU DAI (null) not registered | |
| [ 7.328430] davinci_evm sound.5: snd_soc_register_card failed (-517) | |
| [ 7.379768] platform sound.5: Driver davinci_evm requests probe deferral | |
| [ 7.389304] davinci_evm sound.5: ASoC: CODEC (null) not registered | |
| [ 7.436291] davinci_evm sound.5: snd_soc_register_card failed (-517) | |
| [ 7.573870] platform sound.5: Driver davinci_evm requests probe deferral | |
| [ 7.758994] random: nonblocking pool is initialized | |
| [ 10.567352] musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn) | |
| [ 10.567394] musb-hdrc: MHDRC RTL version 2.0 | |
| [ 10.567409] musb-hdrc: setup fifo_mode 4 | |
| [ 10.567437] musb-hdrc: 28/31 max ep, 16384/16384 memory | |
| [ 10.567642] musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver | |
| [ 10.637040] musb-hdrc musb-hdrc.0.auto: new USB bus registered, assigned bus number 1 | |
| [ 10.706757] hub 1-0:1.0: USB hub found | |
| [ 10.731733] hub 1-0:1.0: 1 port detected | |
| [ 10.763844] davinci_evm sound.5: ASoC: CODEC (null) not registered | |
| [ 10.798214] davinci_evm sound.5: snd_soc_register_card failed (-517) | |
| [ 10.818931] musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn) | |
| [ 10.818974] musb-hdrc: MHDRC RTL version 2.0 | |
| [ 10.818990] musb-hdrc: setup fifo_mode 4 | |
| [ 10.819018] musb-hdrc: 28/31 max ep, 16384/16384 memory | |
| [ 10.819229] musb-hdrc musb-hdrc.1.auto: MUSB HDRC host driver | |
| [ 10.853891] platform sound.5: Driver davinci_evm requests probe deferral | |
| [ 10.871727] musb-hdrc musb-hdrc.1.auto: new USB bus registered, assigned bus number 2 | |
| [ 10.935762] hub 2-0:1.0: USB hub found | |
| [ 10.949781] hub 2-0:1.0: 1 port detected | |
| [ 10.967572] davinci_evm sound.5: ASoC: CODEC (null) not registered | |
| [ 11.003686] davinci_evm sound.5: snd_soc_register_card failed (-517) | |
| [ 11.049722] platform sound.5: Driver davinci_evm requests probe deferral | |
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| /* root@beaglebone:~# dtc -I fs /proc/device-tree/ */ | |
| /dts-v1/; | |
| / { | |
| model = "TI AM335x BeagleBone"; | |
| interrupt-parent = <0x1>; | |
| compatible = "ti,am335x-bone", "ti,am33xx"; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| fixedregulator@0 { | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "vmmcsd_fixed"; | |
| compatible = "regulator-fixed"; | |
| }; | |
| leds { | |
| compatible = "gpio-leds"; | |
| pinctrl-0 = <0x3c>; | |
| pinctrl-names = "default"; | |
| led@5 { | |
| default-state = "off"; | |
| linux,default-trigger = "mmc1"; | |
| gpios = <0x3d 0x18 0x0>; | |
| label = "beaglebone:green:usr3"; | |
| }; | |
| led@4 { | |
| default-state = "off"; | |
| linux,default-trigger = "cpu0"; | |
| gpios = <0x3d 0x17 0x0>; | |
| label = "beaglebone:green:usr2"; | |
| }; | |
| led@3 { | |
| default-state = "off"; | |
| linux,default-trigger = "mmc0"; | |
| gpios = <0x3d 0x16 0x0>; | |
| label = "beaglebone:green:mmc0"; | |
| }; | |
| led@2 { | |
| default-state = "off"; | |
| linux,default-trigger = "heartbeat"; | |
| gpios = <0x3d 0x15 0x0>; | |
| label = "beaglebone:green:heartbeat"; | |
| }; | |
| }; | |
| ocp { | |
| ti,hwmods = "l3_main"; | |
| ranges; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| compatible = "simple-bus"; | |
| sound { | |
| ti,audio-routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "LINE1L", "Line In", "LINE1R", "Line In"; | |
| ti,codec-clock-rate = <0xb71b00>; | |
| ti,mcasp-controller = <0x3b>; | |
| ti,audio-codec = <0x3a>; | |
| ti,model = "DA830 EVM"; | |
| compatible = "ti,da830-evm-audio"; | |
| }; | |
| gpio-leds-cape-audio { | |
| pinctrl-0 = <0x38>; | |
| pinctrl-names = "default"; | |
| compatible = "gpio-leds"; | |
| audio-led1 { | |
| default-state = "off"; | |
| linux,default-trigger = "mmc0"; | |
| gpios = <0x39 0x13 0x0>; | |
| label = "audio:green:usr1"; | |
| }; | |
| audio-led0 { | |
| default-state = "off"; | |
| linux,default-trigger = "heartbeat"; | |
| gpios = <0x39 0x12 0x0>; | |
| label = "audio:green:usr0"; | |
| }; | |
| }; | |
| rng@48310000 { | |
| interrupts = <0x6f>; | |
| reg = <0x48310000 0x2000>; | |
| ti,hwmods = "rng"; | |
| compatible = "ti,omap4-rng"; | |
| }; | |
| mcasp@4803C000 { | |
| dma-names = "tx", "rx"; | |
| dmas = <0x2a 0xa 0x2a 0xb>; | |
| status = "disabled"; | |
| interrupts-names = "tx", "rx"; | |
| interrupts = <0x52 0x53>; | |
| reg-names = "mpu", "dat"; | |
| reg = <0x4803c000 0x2000 0x46400000 0x400000>; | |
| ti,hwmods = "mcasp1"; | |
| compatible = "ti,am33xx-mcasp-audio"; | |
| }; | |
| mcasp@48038000 { | |
| phandle = <0x3b>; | |
| linux,phandle = <0x3b>; | |
| rx-num-evt = <0x1>; | |
| tx-num-evt = <0x1>; | |
| serial-dir = <0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| num-serializer = <0x10>; | |
| tdm-slots = <0x2>; | |
| op-mode = <0x0>; | |
| pinctrl-0 = <0x37>; | |
| pinctrl-names = "default"; | |
| dma-names = "tx", "rx"; | |
| dmas = <0x2a 0x8 0x2a 0x9>; | |
| status = "okay"; | |
| interrupts-names = "tx", "rx"; | |
| interrupts = <0x50 0x51>; | |
| reg-names = "mpu", "dat"; | |
| reg = <0x48038000 0x2000 0x46000000 0x400000>; | |
| ti,hwmods = "mcasp0"; | |
| compatible = "ti,am33xx-mcasp-audio"; | |
| }; | |
| aes@53500000 { | |
| status = "okay"; | |
| dma-names = "tx", "rx"; | |
| dmas = <0x2a 0x6 0x2a 0x5>; | |
| interrupts = <0x67>; | |
| reg = <0x53500000 0xa0>; | |
| ti,hwmods = "aes"; | |
| compatible = "ti,omap4-aes"; | |
| }; | |
| sham@53100000 { | |
| status = "okay"; | |
| dma-names = "rx"; | |
| dmas = <0x2a 0x24>; | |
| interrupts = <0x6d>; | |
| reg = <0x53100000 0x200>; | |
| ti,hwmods = "sham"; | |
| compatible = "ti,omap4-sham"; | |
| }; | |
| gpmc@50000000 { | |
| status = "disabled"; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x2>; | |
| gpmc,num-waitpins = <0x2>; | |
| gpmc,num-cs = <0x7>; | |
| interrupts = <0x64>; | |
| reg = <0x50000000 0x2000>; | |
| ti,no-idle-on-init; | |
| ti,hwmods = "gpmc"; | |
| compatible = "ti,am3352-gpmc"; | |
| }; | |
| tscadc@44e0d000 { | |
| status = "disabled"; | |
| ti,hwmods = "adc_tsc"; | |
| interrupts = <0x10>; | |
| interrupt-parent = <0x1>; | |
| reg = <0x44e0d000 0x1000>; | |
| compatible = "ti,am3359-tscadc"; | |
| adc { | |
| compatible = "ti,am3359-adc"; | |
| #io-channel-cells = <0x1>; | |
| }; | |
| tsc { | |
| compatible = "ti,am3359-tsc"; | |
| }; | |
| }; | |
| lcdc@4830e000 { | |
| status = "disabled"; | |
| ti,hwmods = "lcdc"; | |
| interrupts = <0x24>; | |
| interrupt-parent = <0x1>; | |
| reg = <0x4830e000 0x1000>; | |
| compatible = "ti,am33xx-tilcdc"; | |
| }; | |
| elm@48080000 { | |
| status = "disabled"; | |
| ti,hwmods = "elm"; | |
| interrupts = <0x4>; | |
| reg = <0x48080000 0x2000>; | |
| compatible = "ti,am3352-elm"; | |
| }; | |
| wkup_m3@44d00000 { | |
| ti,no-reset-on-init; | |
| ti,hwmods = "wkup_m3"; | |
| reg = <0x44d00000 0x4000 0x44d80000 0x2000>; | |
| compatible = "ti,am3353-wkup-m3"; | |
| }; | |
| ocmcram@40300000 { | |
| ti,hwmods = "ocmcram"; | |
| reg = <0x40300000 0x10000>; | |
| compatible = "ti,am3352-ocmcram"; | |
| }; | |
| ethernet@4a100000 { | |
| pinctrl-1 = <0x33>; | |
| pinctrl-0 = <0x32>; | |
| pinctrl-names = "default", "sleep"; | |
| ranges; | |
| interrupts = <0x28 0x29 0x2a 0x2b>; | |
| interrupt-parent = <0x1>; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| reg = <0x4a100000 0x800 0x4a101200 0x100>; | |
| cpts_clock_shift = <0x1d>; | |
| cpts_clock_mult = <0x80000000>; | |
| active_slave = <0x0>; | |
| slaves = <0x2>; | |
| mac_control = <0x20>; | |
| rx_descs = <0x40>; | |
| no_bd_ram = <0x0>; | |
| bd_ram_size = <0x2000>; | |
| ale_entries = <0x400>; | |
| cpdma_channels = <0x8>; | |
| ti,hwmods = "cpgmac0"; | |
| compatible = "ti,cpsw"; | |
| cpsw-phy-sel@44e10650 { | |
| reg-names = "gmii-sel"; | |
| reg = <0x44e10650 0x4>; | |
| compatible = "ti,am3352-cpsw-phy-sel"; | |
| }; | |
| slave@4a100300 { | |
| phy-mode = "mii"; | |
| phy_id = <0x36 0x1>; | |
| mac-address = [00 00 00 00 00 00]; | |
| }; | |
| slave@4a100200 { | |
| phy-mode = "mii"; | |
| phy_id = <0x36 0x0>; | |
| mac-address = [d4 94 a1 79 8a 60]; | |
| local-mac-address = [d4 94 a1 79 8a 60]; | |
| }; | |
| mdio@4a101000 { | |
| phandle = <0x36>; | |
| linux,phandle = <0x36>; | |
| pinctrl-1 = <0x35>; | |
| pinctrl-0 = <0x34>; | |
| pinctrl-names = "default", "sleep"; | |
| reg = <0x4a101000 0x100>; | |
| bus_freq = <0xf4240>; | |
| ti,hwmods = "davinci_mdio"; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "ti,davinci_mdio"; | |
| }; | |
| }; | |
| epwmss@48304000 { | |
| ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>; | |
| status = "disabled"; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| ti,hwmods = "epwmss2"; | |
| reg = <0x48304000 0x10>; | |
| compatible = "ti,am33xx-pwmss"; | |
| ehrpwm@48304200 { | |
| status = "disabled"; | |
| ti,hwmods = "ehrpwm2"; | |
| reg = <0x48304200 0x80>; | |
| #pwm-cells = <0x3>; | |
| compatible = "ti,am33xx-ehrpwm"; | |
| }; | |
| ecap@48304100 { | |
| status = "disabled"; | |
| ti,hwmods = "ecap2"; | |
| reg = <0x48304100 0x80>; | |
| #pwm-cells = <0x3>; | |
| compatible = "ti,am33xx-ecap"; | |
| }; | |
| }; | |
| epwmss@48302000 { | |
| ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>; | |
| status = "disabled"; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| ti,hwmods = "epwmss1"; | |
| reg = <0x48302000 0x10>; | |
| compatible = "ti,am33xx-pwmss"; | |
| ehrpwm@48302200 { | |
| status = "disabled"; | |
| ti,hwmods = "ehrpwm1"; | |
| reg = <0x48302200 0x80>; | |
| #pwm-cells = <0x3>; | |
| compatible = "ti,am33xx-ehrpwm"; | |
| }; | |
| ecap@48302100 { | |
| status = "disabled"; | |
| ti,hwmods = "ecap1"; | |
| reg = <0x48302100 0x80>; | |
| #pwm-cells = <0x3>; | |
| compatible = "ti,am33xx-ecap"; | |
| }; | |
| }; | |
| epwmss@48300000 { | |
| ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>; | |
| status = "disabled"; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| ti,hwmods = "epwmss0"; | |
| reg = <0x48300000 0x10>; | |
| compatible = "ti,am33xx-pwmss"; | |
| ehrpwm@48300200 { | |
| status = "disabled"; | |
| ti,hwmods = "ehrpwm0"; | |
| reg = <0x48300200 0x80>; | |
| #pwm-cells = <0x3>; | |
| compatible = "ti,am33xx-ehrpwm"; | |
| }; | |
| ecap@48300100 { | |
| status = "disabled"; | |
| ti,hwmods = "ecap0"; | |
| reg = <0x48300100 0x80>; | |
| #pwm-cells = <0x3>; | |
| compatible = "ti,am33xx-ecap"; | |
| }; | |
| }; | |
| usb@47400000 { | |
| status = "okay"; | |
| ti,hwmods = "usb_otg_hs"; | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| ranges; | |
| reg = <0x47400000 0x1000>; | |
| compatible = "ti,am33xx-usb"; | |
| dma-controller@07402000 { | |
| phandle = <0x30>; | |
| linux,phandle = <0x30>; | |
| status = "okay"; | |
| #dma-requests = <0x100>; | |
| #dma-channels = <0x1e>; | |
| #dma-cells = <0x2>; | |
| interrupt-names = "glue"; | |
| interrupts = <0x11>; | |
| reg-names = "glue", "controller", "scheduler", "queuemgr"; | |
| reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000>; | |
| compatible = "ti,am3359-cppi41"; | |
| }; | |
| usb@47401800 { | |
| dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; | |
| dmas = <0x30 0xf 0x0 0x30 0x10 0x0 0x30 0x11 0x0 0x30 0x12 0x0 0x30 0x13 0x0 0x30 0x14 0x0 0x30 0x15 0x0 0x30 0x16 0x0 0x30 0x17 0x0 0x30 0x18 0x0 0x30 0x19 0x0 0x30 0x1a 0x0 0x30 0x1b 0x0 0x30 0x1c 0x0 0x30 0x1d 0x0 0x30 0xf 0x1 0x30 0x10 0x1 0x30 0x11 0x1 0x30 0x12 0x1 0x30 0x13 0x1 0x30 0x14 0x1 0x30 0x15 0x1 0x30 0x16 0x1 0x30 0x17 0x1 0x30 0x18 0x1 0x30 0x19 0x1 0x30 0x1a 0x1 0x30 0x1b 0x1 0x30 0x1c 0x1 0x30 0x1d 0x1>; | |
| phys = <0x31>; | |
| mentor,power = <0x1f4>; | |
| mentor,ram-bits = <0xc>; | |
| mentor,num-eps = <0x10>; | |
| mentor,multipoint = <0x1>; | |
| dr_mode = "host"; | |
| interrupt-names = "mc"; | |
| interrupts = <0x13>; | |
| reg-names = "mc", "control"; | |
| reg = <0x47401c00 0x400 0x47401800 0x200>; | |
| status = "okay"; | |
| compatible = "ti,musb-am33xx"; | |
| }; | |
| usb-phy@47401b00 { | |
| phandle = <0x31>; | |
| linux,phandle = <0x31>; | |
| ti,ctrl_mod = <0x2e>; | |
| status = "okay"; | |
| reg-names = "phy"; | |
| reg = <0x47401b00 0x100>; | |
| compatible = "ti,am335x-usb-phy"; | |
| }; | |
| usb@47401000 { | |
| dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; | |
| dmas = <0x30 0x0 0x0 0x30 0x1 0x0 0x30 0x2 0x0 0x30 0x3 0x0 0x30 0x4 0x0 0x30 0x5 0x0 0x30 0x6 0x0 0x30 0x7 0x0 0x30 0x8 0x0 0x30 0x9 0x0 0x30 0xa 0x0 0x30 0xb 0x0 0x30 0xc 0x0 0x30 0xd 0x0 0x30 0xe 0x0 0x30 0x0 0x1 0x30 0x1 0x1 0x30 0x2 0x1 0x30 0x3 0x1 0x30 0x4 0x1 0x30 0x5 0x1 0x30 0x6 0x1 0x30 0x7 0x1 0x30 0x8 0x1 0x30 0x9 0x1 0x30 0xa 0x1 0x30 0xb 0x1 0x30 0xc 0x1 0x30 0xd 0x1 0x30 0xe 0x1>; | |
| phys = <0x2f>; | |
| mentor,power = <0x1f4>; | |
| mentor,ram-bits = <0xc>; | |
| mentor,num-eps = <0x10>; | |
| mentor,multipoint = <0x1>; | |
| dr_mode = "otg"; | |
| interrupt-names = "mc"; | |
| interrupts = <0x12>; | |
| reg-names = "mc", "control"; | |
| reg = <0x47401400 0x400 0x47401000 0x200>; | |
| status = "okay"; | |
| compatible = "ti,musb-am33xx"; | |
| }; | |
| usb-phy@47401300 { | |
| phandle = <0x2f>; | |
| linux,phandle = <0x2f>; | |
| ti,ctrl_mod = <0x2e>; | |
| status = "okay"; | |
| reg-names = "phy"; | |
| reg = <0x47401300 0x100>; | |
| compatible = "ti,am335x-usb-phy"; | |
| }; | |
| control@44e10000 { | |
| phandle = <0x2e>; | |
| linux,phandle = <0x2e>; | |
| status = "okay"; | |
| reg-names = "phy_ctrl", "wakeup"; | |
| reg = <0x44e10620 0x10 0x44e10648 0x4>; | |
| compatible = "ti,am335x-usb-ctrl-module"; | |
| }; | |
| }; | |
| spi@481a0000 { | |
| status = "disabled"; | |
| dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| dmas = <0x2a 0x2a 0x2a 0x2b 0x2a 0x2c 0x2a 0x2d>; | |
| ti,hwmods = "spi1"; | |
| ti,spi-num-cs = <0x2>; | |
| interrupts = <0x7d>; | |
| reg = <0x481a0000 0x400>; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "ti,omap4-mcspi"; | |
| }; | |
| spi@48030000 { | |
| status = "disabled"; | |
| dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| dmas = <0x2a 0x10 0x2a 0x11 0x2a 0x12 0x2a 0x13>; | |
| ti,hwmods = "spi0"; | |
| ti,spi-num-cs = <0x2>; | |
| interrupts = <0x41>; | |
| reg = <0x48030000 0x400>; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "ti,omap4-mcspi"; | |
| }; | |
| rtc@44e3e000 { | |
| ti,hwmods = "rtc"; | |
| interrupts = <0x4b 0x4c>; | |
| reg = <0x44e3e000 0x1000>; | |
| compatible = "ti,da830-rtc"; | |
| }; | |
| timer@4804a000 { | |
| ti,timer-pwm; | |
| ti,hwmods = "timer7"; | |
| interrupts = <0x5f>; | |
| reg = <0x4804a000 0x400>; | |
| compatible = "ti,am335x-timer"; | |
| }; | |
| timer@48048000 { | |
| ti,timer-pwm; | |
| ti,hwmods = "timer6"; | |
| interrupts = <0x5e>; | |
| reg = <0x48048000 0x400>; | |
| compatible = "ti,am335x-timer"; | |
| }; | |
| timer@48046000 { | |
| ti,timer-pwm; | |
| ti,hwmods = "timer5"; | |
| interrupts = <0x5d>; | |
| reg = <0x48046000 0x400>; | |
| compatible = "ti,am335x-timer"; | |
| }; | |
| timer@48044000 { | |
| ti,timer-pwm; | |
| ti,hwmods = "timer4"; | |
| interrupts = <0x5c>; | |
| reg = <0x48044000 0x400>; | |
| compatible = "ti,am335x-timer"; | |
| }; | |
| timer@48042000 { | |
| ti,hwmods = "timer3"; | |
| interrupts = <0x45>; | |
| reg = <0x48042000 0x400>; | |
| compatible = "ti,am335x-timer"; | |
| }; | |
| timer@48040000 { | |
| status = "disabled"; | |
| ti,hwmods = "timer2"; | |
| interrupts = <0x44>; | |
| reg = <0x48040000 0x400>; | |
| compatible = "ti,am335x-timer"; | |
| }; | |
| timer@44e31000 { | |
| status = "disabled"; | |
| ti,timer-alwon; | |
| ti,hwmods = "timer1"; | |
| interrupts = <0x43>; | |
| reg = <0x44e31000 0x400>; | |
| compatible = "ti,am335x-timer-1ms"; | |
| }; | |
| d_can@481d0000 { | |
| status = "disabled"; | |
| interrupts = <0x37>; | |
| reg = <0x481d0000 0x2000 0x44e10644 0x4>; | |
| ti,hwmods = "d_can1"; | |
| compatible = "bosch,d_can"; | |
| }; | |
| d_can@481cc000 { | |
| status = "disabled"; | |
| interrupts = <0x34>; | |
| reg = <0x481cc000 0x2000 0x44e10644 0x4>; | |
| ti,hwmods = "d_can0"; | |
| compatible = "bosch,d_can"; | |
| }; | |
| wdt@44e35000 { | |
| interrupts = <0x5b>; | |
| reg = <0x44e35000 0x1000>; | |
| ti,hwmods = "wd_timer2"; | |
| compatible = "ti,omap3-wdt"; | |
| }; | |
| spinlock@480ca000 { | |
| ti,hwmods = "spinlock"; | |
| reg = <0x480ca000 0x1000>; | |
| compatible = "ti,omap4-hwspinlock"; | |
| }; | |
| mmc@47810000 { | |
| status = "disabled"; | |
| reg = <0x47810000 0x1000>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x1d>; | |
| ti,needs-special-reset; | |
| ti,hwmods = "mmc3"; | |
| compatible = "ti,omap4-hsmmc"; | |
| }; | |
| mmc@481d8000 { | |
| status = "disabled"; | |
| reg = <0x481d8000 0x1000>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x1c>; | |
| dma-names = "tx", "rx"; | |
| dmas = <0x2a 0x2 0x2a 0x3>; | |
| ti,needs-special-reset; | |
| ti,hwmods = "mmc2"; | |
| compatible = "ti,omap4-hsmmc"; | |
| }; | |
| mmc@48060000 { | |
| vmmc-supply = <0x2d>; | |
| cd-inverted; | |
| cd-gpios = <0x2c 0x6 0x0>; | |
| pinctrl-0 = <0x2b>; | |
| pinctrl-names = "default"; | |
| bus-width = <0x4>; | |
| status = "okay"; | |
| reg = <0x48060000 0x1000>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x40>; | |
| dma-names = "tx", "rx"; | |
| dmas = <0x2a 0x18 0x2a 0x19>; | |
| ti,needs-special-hs-handling; | |
| ti,needs-special-reset; | |
| ti,dual-volt; | |
| ti,hwmods = "mmc1"; | |
| compatible = "ti,omap4-hsmmc"; | |
| }; | |
| i2c@4819c000 { | |
| status = "disabled"; | |
| interrupts = <0x1e>; | |
| reg = <0x4819c000 0x1000>; | |
| ti,hwmods = "i2c3"; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "ti,omap4-i2c"; | |
| tlv320aic3x@1b { | |
| phandle = <0x3a>; | |
| linux,phandle = <0x3a>; | |
| status = "okay"; | |
| reg = <0x1b>; | |
| compatible = "ti,tlv320aic3x-hifi"; | |
| }; | |
| }; | |
| i2c@4802a000 { | |
| status = "disabled"; | |
| interrupts = <0x47>; | |
| reg = <0x4802a000 0x1000>; | |
| ti,hwmods = "i2c2"; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "ti,omap4-i2c"; | |
| }; | |
| i2c@44e0b000 { | |
| clock-frequency = <0x61a80>; | |
| pinctrl-0 = <0x29>; | |
| pinctrl-names = "default"; | |
| status = "okay"; | |
| interrupts = <0x46>; | |
| reg = <0x44e0b000 0x1000>; | |
| ti,hwmods = "i2c1"; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "ti,omap4-i2c"; | |
| tps@24 { | |
| compatible = "ti,tps65217"; | |
| reg = <0x24>; | |
| regulators { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| regulator@6 { | |
| regulator-always-on; | |
| regulator-compatible = "ldo4"; | |
| reg = <0x6>; | |
| }; | |
| regulator@5 { | |
| phandle = <0x2d>; | |
| linux,phandle = <0x2d>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-always-on; | |
| regulator-compatible = "ldo3"; | |
| reg = <0x5>; | |
| }; | |
| regulator@4 { | |
| regulator-always-on; | |
| regulator-compatible = "ldo2"; | |
| reg = <0x4>; | |
| }; | |
| regulator@3 { | |
| regulator-always-on; | |
| regulator-compatible = "ldo1"; | |
| reg = <0x3>; | |
| }; | |
| regulator@2 { | |
| regulator-always-on; | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x118c30>; | |
| regulator-min-microvolt = <0xe1d48>; | |
| regulator-name = "vdd_core"; | |
| regulator-compatible = "dcdc3"; | |
| reg = <0x2>; | |
| }; | |
| regulator@1 { | |
| phandle = <0x2>; | |
| linux,phandle = <0x2>; | |
| regulator-always-on; | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x1437c8>; | |
| regulator-min-microvolt = <0xe1d48>; | |
| regulator-name = "vdd_mpu"; | |
| regulator-compatible = "dcdc2"; | |
| reg = <0x1>; | |
| }; | |
| regulator@0 { | |
| regulator-always-on; | |
| regulator-compatible = "dcdc1"; | |
| reg = <0x0>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| serial@481aa000 { | |
| status = "disabled"; | |
| interrupts = <0x2e>; | |
| reg = <0x481aa000 0x2000>; | |
| clock-frequency = <0x2dc6c00>; | |
| ti,hwmods = "uart6"; | |
| compatible = "ti,omap3-uart"; | |
| }; | |
| serial@481a8000 { | |
| status = "disabled"; | |
| interrupts = <0x2d>; | |
| reg = <0x481a8000 0x2000>; | |
| clock-frequency = <0x2dc6c00>; | |
| ti,hwmods = "uart5"; | |
| compatible = "ti,omap3-uart"; | |
| }; | |
| serial@481a6000 { | |
| status = "disabled"; | |
| interrupts = <0x2c>; | |
| reg = <0x481a6000 0x2000>; | |
| clock-frequency = <0x2dc6c00>; | |
| ti,hwmods = "uart4"; | |
| compatible = "ti,omap3-uart"; | |
| }; | |
| serial@48024000 { | |
| status = "disabled"; | |
| interrupts = <0x4a>; | |
| reg = <0x48024000 0x2000>; | |
| clock-frequency = <0x2dc6c00>; | |
| ti,hwmods = "uart3"; | |
| compatible = "ti,omap3-uart"; | |
| }; | |
| serial@48022000 { | |
| status = "disabled"; | |
| interrupts = <0x49>; | |
| reg = <0x48022000 0x2000>; | |
| clock-frequency = <0x2dc6c00>; | |
| ti,hwmods = "uart2"; | |
| compatible = "ti,omap3-uart"; | |
| }; | |
| serial@44e09000 { | |
| pinctrl-0 = <0x28>; | |
| pinctrl-names = "default"; | |
| status = "okay"; | |
| interrupts = <0x48>; | |
| reg = <0x44e09000 0x2000>; | |
| clock-frequency = <0x2dc6c00>; | |
| ti,hwmods = "uart1"; | |
| compatible = "ti,omap3-uart"; | |
| }; | |
| gpio@481ae000 { | |
| interrupts = <0x3e>; | |
| reg = <0x481ae000 0x1000>; | |
| #interrupt-cells = <0x2>; | |
| interrupt-controller; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| ti,hwmods = "gpio4"; | |
| compatible = "ti,omap4-gpio"; | |
| }; | |
| gpio@481ac000 { | |
| phandle = <0x39>; | |
| linux,phandle = <0x39>; | |
| interrupts = <0x20>; | |
| reg = <0x481ac000 0x1000>; | |
| #interrupt-cells = <0x2>; | |
| interrupt-controller; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| ti,hwmods = "gpio3"; | |
| compatible = "ti,omap4-gpio"; | |
| }; | |
| gpio@4804c000 { | |
| phandle = <0x3d>; | |
| linux,phandle = <0x3d>; | |
| interrupts = <0x62>; | |
| reg = <0x4804c000 0x1000>; | |
| #interrupt-cells = <0x2>; | |
| interrupt-controller; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| ti,hwmods = "gpio2"; | |
| compatible = "ti,omap4-gpio"; | |
| }; | |
| gpio@44e07000 { | |
| phandle = <0x2c>; | |
| linux,phandle = <0x2c>; | |
| interrupts = <0x60>; | |
| reg = <0x44e07000 0x1000>; | |
| #interrupt-cells = <0x2>; | |
| interrupt-controller; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| ti,hwmods = "gpio1"; | |
| compatible = "ti,omap4-gpio"; | |
| }; | |
| edma@49000000 { | |
| phandle = <0x2a>; | |
| linux,phandle = <0x2a>; | |
| ti,edma-slots = <0x100>; | |
| ti,edma-regions = <0x4>; | |
| dma-channels = <0x40>; | |
| #dma-cells = <0x1>; | |
| interrupts = <0xc 0xd 0xe>; | |
| reg = <0x49000000 0x10000 0x44e10f90 0x10>; | |
| ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; | |
| compatible = "ti,edma3"; | |
| }; | |
| interrupt-controller@48200000 { | |
| phandle = <0x1>; | |
| linux,phandle = <0x1>; | |
| reg = <0x48200000 0x1000>; | |
| ti,intc-size = <0x80>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-controller; | |
| compatible = "ti,omap2-intc"; | |
| }; | |
| scrm@44e10000 { | |
| reg = <0x44e10000 0x2000>; | |
| compatible = "ti,am3-scrm"; | |
| clockdomains { | |
| }; | |
| clocks { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| ehrpwm2_tbclk { | |
| clocks = <0x27>; | |
| compatible = "ti,composite-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| ehrpwm2_gate_tbclk { | |
| phandle = <0x27>; | |
| linux,phandle = <0x27>; | |
| reg = <0x664>; | |
| ti,bit-shift = <0x2>; | |
| clocks = <0xc>; | |
| compatible = "ti,composite-no-wait-gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| ehrpwm1_tbclk { | |
| clocks = <0x26>; | |
| compatible = "ti,composite-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| ehrpwm1_gate_tbclk { | |
| phandle = <0x26>; | |
| linux,phandle = <0x26>; | |
| reg = <0x664>; | |
| ti,bit-shift = <0x1>; | |
| clocks = <0xc>; | |
| compatible = "ti,composite-no-wait-gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| ehrpwm0_tbclk { | |
| clocks = <0x25>; | |
| compatible = "ti,composite-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| ehrpwm0_gate_tbclk { | |
| phandle = <0x25>; | |
| linux,phandle = <0x25>; | |
| reg = <0x664>; | |
| ti,bit-shift = <0x0>; | |
| clocks = <0xc>; | |
| compatible = "ti,composite-no-wait-gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| rng_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| aes0_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| sha0_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| smartreflex1_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| smartreflex0_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| mcasp1_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| mcasp0_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dcan1_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dcan0_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| adc_tsc_fck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| sys_clkin_ck { | |
| phandle = <0x4>; | |
| linux,phandle = <0x4>; | |
| reg = <0x40>; | |
| ti,bit-shift = <0x16>; | |
| clocks = <0x21 0x22 0x23 0x24>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| }; | |
| }; | |
| prcm@44e00000 { | |
| reg = <0x44e00000 0x4000>; | |
| compatible = "ti,am3-prcm"; | |
| clockdomains { | |
| clk_24mhz_clkdm { | |
| clocks = <0x12>; | |
| compatible = "ti,clockdomain"; | |
| }; | |
| }; | |
| clocks { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| clkout2_ck { | |
| reg = <0x700>; | |
| ti,bit-shift = <0x7>; | |
| clocks = <0x20>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| trace_clk_div_ck { | |
| ti,index-power-of-two; | |
| reg = <0x414>; | |
| ti,max-div = <0x40>; | |
| ti,bit-shift = <0x18>; | |
| clocks = <0x1f>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| stm_clk_div_ck { | |
| ti,index-power-of-two; | |
| reg = <0x414>; | |
| ti,max-div = <0x40>; | |
| ti,bit-shift = <0x1b>; | |
| clocks = <0x1e>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| trace_pmd_clk_mux_ck { | |
| phandle = <0x1f>; | |
| linux,phandle = <0x1f>; | |
| reg = <0x414>; | |
| ti,bit-shift = <0x14>; | |
| clocks = <0x1c 0x1d>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| stm_pmd_clock_mux_ck { | |
| phandle = <0x1e>; | |
| linux,phandle = <0x1e>; | |
| reg = <0x414>; | |
| ti,bit-shift = <0x16>; | |
| clocks = <0x1c 0x1d>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dbg_clka_ck { | |
| phandle = <0x1d>; | |
| linux,phandle = <0x1d>; | |
| reg = <0x414>; | |
| ti,bit-shift = <0x1e>; | |
| clocks = <0xf>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dbg_sysclk_ck { | |
| phandle = <0x1c>; | |
| linux,phandle = <0x1c>; | |
| reg = <0x414>; | |
| ti,bit-shift = <0x13>; | |
| clocks = <0x4>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| clkout2_div_ck { | |
| phandle = <0x20>; | |
| linux,phandle = <0x20>; | |
| reg = <0x700>; | |
| ti,max-div = <0x8>; | |
| ti,bit-shift = <0x3>; | |
| clocks = <0x1b>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| sysclkout_pre_ck { | |
| phandle = <0x1b>; | |
| linux,phandle = <0x1b>; | |
| reg = <0x700>; | |
| clocks = <0x15 0x10 0x9 0xc 0x1a>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gfx_fck_div_ck { | |
| ti,max-div = <0x2>; | |
| reg = <0x52c>; | |
| clocks = <0x19>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gfx_fclk_clksel_ck { | |
| phandle = <0x19>; | |
| linux,phandle = <0x19>; | |
| reg = <0x52c>; | |
| ti,bit-shift = <0x1>; | |
| clocks = <0xf 0xc>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| mmc_clk { | |
| clock-div = <0x2>; | |
| clock-mult = <0x1>; | |
| clocks = <0xc>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| lcd_gclk { | |
| phandle = <0x1a>; | |
| linux,phandle = <0x1a>; | |
| ti,set-rate-parent; | |
| reg = <0x534>; | |
| clocks = <0x11 0x17 0xc>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gpio3_dbclk { | |
| reg = <0xb4>; | |
| ti,bit-shift = <0x12>; | |
| clocks = <0x12>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gpio2_dbclk { | |
| reg = <0xb0>; | |
| ti,bit-shift = <0x12>; | |
| clocks = <0x12>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gpio1_dbclk { | |
| reg = <0xac>; | |
| ti,bit-shift = <0x12>; | |
| clocks = <0x12>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gpio0_dbclk { | |
| reg = <0x408>; | |
| ti,bit-shift = <0x12>; | |
| clocks = <0x18>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| gpio0_dbclk_mux_ck { | |
| phandle = <0x18>; | |
| linux,phandle = <0x18>; | |
| reg = <0x53c>; | |
| clocks = <0x14 0x15 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| cpsw_cpts_rft_clk { | |
| reg = <0x520>; | |
| clocks = <0x17 0xf>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| cpsw_125mhz_gclk { | |
| clock-div = <0x2>; | |
| clock-mult = <0x1>; | |
| clocks = <0x17>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| sysclk_div_ck { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0xf>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| l4ls_gclk { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x16>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| l4fw_gclk { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x16>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| l3s_gclk { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0x16>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| l4hs_gclk { | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0xf>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| l4_rtc_gclk { | |
| clock-div = <0x2>; | |
| clock-mult = <0x1>; | |
| clocks = <0xf>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| wdt1_fck { | |
| reg = <0x538>; | |
| clocks = <0x14 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| ieee5000_fck { | |
| reg = <0xe4>; | |
| ti,bit-shift = <0x1>; | |
| clocks = <0x16>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_core_m4_div2_ck { | |
| phandle = <0x16>; | |
| linux,phandle = <0x16>; | |
| clock-div = <0x2>; | |
| clock-mult = <0x1>; | |
| clocks = <0xf>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| usbotg_fck { | |
| reg = <0x47c>; | |
| ti,bit-shift = <0x8>; | |
| clocks = <0xb>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer7_fck { | |
| reg = <0x504>; | |
| clocks = <0x13 0x4 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer6_fck { | |
| reg = <0x51c>; | |
| clocks = <0x13 0x4 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer5_fck { | |
| reg = <0x518>; | |
| clocks = <0x13 0x4 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer4_fck { | |
| reg = <0x510>; | |
| clocks = <0x13 0x4 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer3_fck { | |
| reg = <0x50c>; | |
| clocks = <0x13 0x4 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer2_fck { | |
| reg = <0x508>; | |
| clocks = <0x13 0x4 0x12>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| timer1_fck { | |
| reg = <0x528>; | |
| clocks = <0x4 0x12 0x13 0x14 0x15>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| mmu_fck { | |
| reg = <0x914>; | |
| ti,bit-shift = <0x1>; | |
| clocks = <0xf>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| pruss_ocp_gclk { | |
| reg = <0x530>; | |
| clocks = <0x10 0x11>; | |
| compatible = "ti,mux-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| l3_gclk { | |
| phandle = <0x10>; | |
| linux,phandle = <0x10>; | |
| clock-div = <0x1>; | |
| clock-mult = <0x1>; | |
| clocks = <0xf>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| clkdiv32k_ick { | |
| phandle = <0x12>; | |
| linux,phandle = <0x12>; | |
| reg = <0x14c>; | |
| ti,bit-shift = <0x1>; | |
| clocks = <0xe>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| clkdiv32k_ck { | |
| phandle = <0xe>; | |
| linux,phandle = <0xe>; | |
| clock-div = <0x2dc>; | |
| clock-mult = <0x1>; | |
| clocks = <0xd>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| clk_24mhz { | |
| phandle = <0xd>; | |
| linux,phandle = <0xd>; | |
| clock-div = <0x8>; | |
| clock-mult = <0x1>; | |
| clocks = <0xc>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| cefuse_fck { | |
| reg = <0xa20>; | |
| ti,bit-shift = <0x1>; | |
| clocks = <0x4>; | |
| compatible = "ti,gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_per_m2_div4_ck { | |
| clock-div = <0x4>; | |
| clock-mult = <0x1>; | |
| clocks = <0xc>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_per_m2_div4_wkupdm_ck { | |
| clock-div = <0x4>; | |
| clock-mult = <0x1>; | |
| clocks = <0xc>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_per_m2_ck { | |
| phandle = <0xc>; | |
| linux,phandle = <0xc>; | |
| ti,index-starts-at-one; | |
| reg = <0x4ac>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0xb>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_per_ck { | |
| phandle = <0xb>; | |
| linux,phandle = <0xb>; | |
| reg = <0x48c 0x470 0x49c>; | |
| clocks = <0x4 0x4>; | |
| compatible = "ti,am3-dpll-no-gate-j-type-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_disp_m2_ck { | |
| phandle = <0x11>; | |
| linux,phandle = <0x11>; | |
| ti,set-rate-parent; | |
| ti,index-starts-at-one; | |
| reg = <0x4a4>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0xa>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_disp_ck { | |
| phandle = <0xa>; | |
| linux,phandle = <0xa>; | |
| reg = <0x498 0x448 0x454>; | |
| clocks = <0x4 0x4>; | |
| compatible = "ti,am3-dpll-no-gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_ddr_m2_div2_ck { | |
| clock-div = <0x2>; | |
| clock-mult = <0x1>; | |
| clocks = <0x9>; | |
| compatible = "fixed-factor-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_ddr_m2_ck { | |
| phandle = <0x9>; | |
| linux,phandle = <0x9>; | |
| ti,index-starts-at-one; | |
| reg = <0x4a0>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0x8>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_ddr_ck { | |
| phandle = <0x8>; | |
| linux,phandle = <0x8>; | |
| reg = <0x494 0x434 0x440>; | |
| clocks = <0x4 0x4>; | |
| compatible = "ti,am3-dpll-no-gate-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_mpu_m2_ck { | |
| ti,index-starts-at-one; | |
| reg = <0x4a8>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0x7>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_mpu_ck { | |
| phandle = <0x7>; | |
| linux,phandle = <0x7>; | |
| reg = <0x488 0x420 0x42c>; | |
| clocks = <0x4 0x4>; | |
| compatible = "ti,am3-dpll-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_core_m6_ck { | |
| ti,index-starts-at-one; | |
| reg = <0x4d8>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0x6>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_core_m5_ck { | |
| phandle = <0x17>; | |
| linux,phandle = <0x17>; | |
| ti,index-starts-at-one; | |
| reg = <0x484>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0x6>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_core_m4_ck { | |
| phandle = <0xf>; | |
| linux,phandle = <0xf>; | |
| ti,index-starts-at-one; | |
| reg = <0x480>; | |
| ti,max-div = <0x1f>; | |
| clocks = <0x6>; | |
| compatible = "ti,divider-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_core_x2_ck { | |
| phandle = <0x6>; | |
| linux,phandle = <0x6>; | |
| clocks = <0x5>; | |
| compatible = "ti,am3-dpll-x2-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| dpll_core_ck { | |
| phandle = <0x5>; | |
| linux,phandle = <0x5>; | |
| reg = <0x490 0x45c 0x468>; | |
| clocks = <0x4 0x4>; | |
| compatible = "ti,am3-dpll-core-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| tclkin_ck { | |
| phandle = <0x13>; | |
| linux,phandle = <0x13>; | |
| clock-frequency = <0xb71b00>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| virt_26000000_ck { | |
| phandle = <0x24>; | |
| linux,phandle = <0x24>; | |
| clock-frequency = <0x18cba80>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| virt_25000000_ck { | |
| phandle = <0x23>; | |
| linux,phandle = <0x23>; | |
| clock-frequency = <0x17d7840>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| virt_24000000_ck { | |
| phandle = <0x22>; | |
| linux,phandle = <0x22>; | |
| clock-frequency = <0x16e3600>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| virt_19200000_ck { | |
| phandle = <0x21>; | |
| linux,phandle = <0x21>; | |
| clock-frequency = <0x124f800>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| clk_rc32k_ck { | |
| phandle = <0x14>; | |
| linux,phandle = <0x14>; | |
| clock-frequency = <0x7d00>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| clk_32768_ck { | |
| phandle = <0x15>; | |
| linux,phandle = <0x15>; | |
| clock-frequency = <0x8000>; | |
| compatible = "fixed-clock"; | |
| #clock-cells = <0x0>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| pinmux@44e10800 { | |
| pinctrl-0 = <0x3>; | |
| pinctrl-names = "default"; | |
| pinctrl-single,function-mask = <0x7f>; | |
| pinctrl-single,register-width = <0x20>; | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| reg = <0x44e10800 0x238>; | |
| compatible = "pinctrl-single"; | |
| pinmux_bone_audio_cape_audio_pins { | |
| phandle = <0x37>; | |
| linux,phandle = <0x37>; | |
| pinctrl-single,pins = <0x190 0x20 0x194 0x20 0x19c 0x22 0x1ac 0x22>; | |
| }; | |
| pinmux_bone_audio_cape_led_pins { | |
| phandle = <0x38>; | |
| linux,phandle = <0x38>; | |
| pinctrl-single,pins = <0x48 0x7 0x4c 0x7>; | |
| }; | |
| pinmux_emmc_pins { | |
| pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31>; | |
| }; | |
| pinmux_mmc1_pins { | |
| phandle = <0x2b>; | |
| linux,phandle = <0x2b>; | |
| pinctrl-single,pins = <0x160 0x2f>; | |
| }; | |
| davinci_mdio_sleep { | |
| phandle = <0x35>; | |
| linux,phandle = <0x35>; | |
| pinctrl-single,pins = <0x148 0x27 0x14c 0x27>; | |
| }; | |
| davinci_mdio_default { | |
| phandle = <0x34>; | |
| linux,phandle = <0x34>; | |
| pinctrl-single,pins = <0x148 0x70 0x14c 0x10>; | |
| }; | |
| cpsw_sleep { | |
| phandle = <0x33>; | |
| linux,phandle = <0x33>; | |
| pinctrl-single,pins = <0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 0x13c 0x27 0x140 0x27>; | |
| }; | |
| cpsw_default { | |
| phandle = <0x32>; | |
| linux,phandle = <0x32>; | |
| pinctrl-single,pins = <0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30>; | |
| }; | |
| pinmux_clkout2_pin { | |
| phandle = <0x3>; | |
| linux,phandle = <0x3>; | |
| pinctrl-single,pins = <0x1b4 0x3>; | |
| }; | |
| pinmux_uart0_pins { | |
| phandle = <0x28>; | |
| linux,phandle = <0x28>; | |
| pinctrl-single,pins = <0x170 0x30 0x174 0x0>; | |
| }; | |
| pinmux_i2c0_pins { | |
| phandle = <0x29>; | |
| linux,phandle = <0x29>; | |
| pinctrl-single,pins = <0x188 0x30 0x18c 0x30>; | |
| }; | |
| user_leds_s0 { | |
| phandle = <0x3c>; | |
| linux,phandle = <0x3c>; | |
| pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17>; | |
| }; | |
| }; | |
| soc { | |
| compatible = "ti,omap-infra"; | |
| mpu { | |
| ti,hwmods = "mpu"; | |
| compatible = "ti,omap3-mpu"; | |
| }; | |
| }; | |
| pmu { | |
| interrupts = <0x3>; | |
| compatible = "arm,cortex-a8-pmu"; | |
| }; | |
| cpus { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| cpu@0 { | |
| cpu0-supply = <0x2>; | |
| clock-latency = <0x493e0>; | |
| voltage-tolerance = <0x2>; | |
| operating-points = <0xafc80 0x139b88 0x927c0 0x12b128 0x7a120 0x112a88 0x43238 0x112a88>; | |
| reg = <0x0>; | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a8"; | |
| }; | |
| }; | |
| memory { | |
| reg = <0x80000000 0x10000000>; | |
| device_type = "memory"; | |
| }; | |
| aliases { | |
| ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300"; | |
| ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200"; | |
| phy1 = "/ocp/usb@47400000/usb-phy@47401b00"; | |
| phy0 = "/ocp/usb@47400000/usb-phy@47401300"; | |
| usb1 = "/ocp/usb@47400000/usb@47401800"; | |
| usb0 = "/ocp/usb@47400000/usb@47401000"; | |
| d_can1 = "/ocp/d_can@481d0000"; | |
| d_can0 = "/ocp/d_can@481cc000"; | |
| serial5 = "/ocp/serial@481aa000"; | |
| serial4 = "/ocp/serial@481a8000"; | |
| serial3 = "/ocp/serial@481a6000"; | |
| serial2 = "/ocp/serial@48024000"; | |
| serial1 = "/ocp/serial@48022000"; | |
| serial0 = "/ocp/serial@44e09000"; | |
| i2c2 = "/ocp/i2c@4819c000"; | |
| i2c1 = "/ocp/i2c@4802a000"; | |
| i2c0 = "/ocp/i2c@44e0b000"; | |
| }; | |
| chosen { | |
| bootargs = "console=ttyO0,115200n8 root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait"; | |
| }; | |
| }; |
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "ti,am335x-bone", "ti,am33xx"; | |
| interrupt-parent = <0x1>; | |
| model = "TI AM335x BeagleBone"; | |
| chosen { | |
| }; | |
| aliases { | |
| i2c0 = "/ocp/i2c@44e0b000"; | |
| i2c1 = "/ocp/i2c@4802a000"; | |
| i2c2 = "/ocp/i2c@4819c000"; | |
| serial0 = "/ocp/serial@44e09000"; | |
| serial1 = "/ocp/serial@48022000"; | |
| serial2 = "/ocp/serial@48024000"; | |
| serial3 = "/ocp/serial@481a6000"; | |
| serial4 = "/ocp/serial@481a8000"; | |
| serial5 = "/ocp/serial@481aa000"; | |
| d_can0 = "/ocp/d_can@481cc000"; | |
| d_can1 = "/ocp/d_can@481d0000"; | |
| usb0 = "/ocp/usb@47400000/usb@47401000"; | |
| usb1 = "/ocp/usb@47400000/usb@47401800"; | |
| phy0 = "/ocp/usb@47400000/usb-phy@47401300"; | |
| phy1 = "/ocp/usb@47400000/usb-phy@47401b00"; | |
| ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200"; | |
| ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x80000000 0x10000000>; | |
| }; | |
| cpus { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| cpu@0 { | |
| compatible = "arm,cortex-a8"; | |
| device_type = "cpu"; | |
| reg = <0x0>; | |
| operating-points = <0xafc80 0x139b88 0x927c0 0x12b128 0x7a120 0x112a88 0x43238 0x112a88>; | |
| voltage-tolerance = <0x2>; | |
| clock-latency = <0x493e0>; | |
| cpu0-supply = <0x2>; | |
| }; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a8-pmu"; | |
| interrupts = <0x3>; | |
| }; | |
| soc { | |
| compatible = "ti,omap-infra"; | |
| mpu { | |
| compatible = "ti,omap3-mpu"; | |
| ti,hwmods = "mpu"; | |
| }; | |
| }; | |
| pinmux@44e10800 { | |
| compatible = "pinctrl-single"; | |
| reg = <0x44e10800 0x238>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| pinctrl-single,register-width = <0x20>; | |
| pinctrl-single,function-mask = <0x7f>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x3>; | |
| user_leds_s0 { | |
| pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17>; | |
| linux,phandle = <0x3c>; | |
| phandle = <0x3c>; | |
| }; | |
| pinmux_i2c0_pins { | |
| pinctrl-single,pins = <0x188 0x30 0x18c 0x30>; | |
| linux,phandle = <0x29>; | |
| phandle = <0x29>; | |
| }; | |
| pinmux_uart0_pins { | |
| pinctrl-single,pins = <0x170 0x30 0x174 0x0>; | |
| linux,phandle = <0x28>; | |
| phandle = <0x28>; | |
| }; | |
| pinmux_clkout2_pin { | |
| pinctrl-single,pins = <0x1b4 0x3>; | |
| linux,phandle = <0x3>; | |
| phandle = <0x3>; | |
| }; | |
| cpsw_default { | |
| pinctrl-single,pins = <0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30>; | |
| linux,phandle = <0x32>; | |
| phandle = <0x32>; | |
| }; | |
| cpsw_sleep { | |
| pinctrl-single,pins = <0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 0x13c 0x27 0x140 0x27>; | |
| linux,phandle = <0x33>; | |
| phandle = <0x33>; | |
| }; | |
| davinci_mdio_default { | |
| pinctrl-single,pins = <0x148 0x70 0x14c 0x10>; | |
| linux,phandle = <0x34>; | |
| phandle = <0x34>; | |
| }; | |
| davinci_mdio_sleep { | |
| pinctrl-single,pins = <0x148 0x27 0x14c 0x27>; | |
| linux,phandle = <0x35>; | |
| phandle = <0x35>; | |
| }; | |
| pinmux_mmc1_pins { | |
| pinctrl-single,pins = <0x160 0x2f>; | |
| linux,phandle = <0x2b>; | |
| phandle = <0x2b>; | |
| }; | |
| pinmux_emmc_pins { | |
| pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31>; | |
| }; | |
| pinmux_bone_audio_cape_led_pins { | |
| pinctrl-single,pins = <0x48 0x7 0x4c 0x7>; | |
| linux,phandle = <0x38>; | |
| phandle = <0x38>; | |
| }; | |
| pinmux_bone_audio_cape_audio_pins { | |
| pinctrl-single,pins = <0x190 0x20 0x194 0x20 0x19c 0x22 0x1ac 0x22>; | |
| linux,phandle = <0x37>; | |
| phandle = <0x37>; | |
| }; | |
| }; | |
| ocp { | |
| compatible = "simple-bus"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| ti,hwmods = "l3_main"; | |
| prcm@44e00000 { | |
| compatible = "ti,am3-prcm"; | |
| reg = <0x44e00000 0x4000>; | |
| clocks { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clk_32768_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x8000>; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| }; | |
| clk_rc32k_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x7d00>; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| }; | |
| virt_19200000_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x124f800>; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| virt_24000000_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x16e3600>; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| virt_25000000_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x17d7840>; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| virt_26000000_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x18cba80>; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| }; | |
| tclkin_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0xb71b00>; | |
| linux,phandle = <0x13>; | |
| phandle = <0x13>; | |
| }; | |
| dpll_core_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,am3-dpll-core-clock"; | |
| clocks = <0x4 0x4>; | |
| reg = <0x490 0x45c 0x468>; | |
| linux,phandle = <0x5>; | |
| phandle = <0x5>; | |
| }; | |
| dpll_core_x2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,am3-dpll-x2-clock"; | |
| clocks = <0x5>; | |
| linux,phandle = <0x6>; | |
| phandle = <0x6>; | |
| }; | |
| dpll_core_m4_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x6>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x480>; | |
| ti,index-starts-at-one; | |
| linux,phandle = <0xf>; | |
| phandle = <0xf>; | |
| }; | |
| dpll_core_m5_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x6>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x484>; | |
| ti,index-starts-at-one; | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| }; | |
| dpll_core_m6_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x6>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x4d8>; | |
| ti,index-starts-at-one; | |
| }; | |
| dpll_mpu_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,am3-dpll-clock"; | |
| clocks = <0x4 0x4>; | |
| reg = <0x488 0x420 0x42c>; | |
| linux,phandle = <0x7>; | |
| phandle = <0x7>; | |
| }; | |
| dpll_mpu_m2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x7>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x4a8>; | |
| ti,index-starts-at-one; | |
| }; | |
| dpll_ddr_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,am3-dpll-no-gate-clock"; | |
| clocks = <0x4 0x4>; | |
| reg = <0x494 0x434 0x440>; | |
| linux,phandle = <0x8>; | |
| phandle = <0x8>; | |
| }; | |
| dpll_ddr_m2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x8>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x4a0>; | |
| ti,index-starts-at-one; | |
| linux,phandle = <0x9>; | |
| phandle = <0x9>; | |
| }; | |
| dpll_ddr_m2_div2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x9>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x2>; | |
| }; | |
| dpll_disp_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,am3-dpll-no-gate-clock"; | |
| clocks = <0x4 0x4>; | |
| reg = <0x498 0x448 0x454>; | |
| linux,phandle = <0xa>; | |
| phandle = <0xa>; | |
| }; | |
| dpll_disp_m2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0xa>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x4a4>; | |
| ti,index-starts-at-one; | |
| ti,set-rate-parent; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| dpll_per_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,am3-dpll-no-gate-j-type-clock"; | |
| clocks = <0x4 0x4>; | |
| reg = <0x48c 0x470 0x49c>; | |
| linux,phandle = <0xb>; | |
| phandle = <0xb>; | |
| }; | |
| dpll_per_m2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0xb>; | |
| ti,max-div = <0x1f>; | |
| reg = <0x4ac>; | |
| ti,index-starts-at-one; | |
| linux,phandle = <0xc>; | |
| phandle = <0xc>; | |
| }; | |
| dpll_per_m2_div4_wkupdm_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xc>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x4>; | |
| }; | |
| dpll_per_m2_div4_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xc>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x4>; | |
| }; | |
| cefuse_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x4>; | |
| ti,bit-shift = <0x1>; | |
| reg = <0xa20>; | |
| }; | |
| clk_24mhz { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xc>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x8>; | |
| linux,phandle = <0xd>; | |
| phandle = <0xd>; | |
| }; | |
| clkdiv32k_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xd>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x2dc>; | |
| linux,phandle = <0xe>; | |
| phandle = <0xe>; | |
| }; | |
| clkdiv32k_ick { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0xe>; | |
| ti,bit-shift = <0x1>; | |
| reg = <0x14c>; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| l3_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xf>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| }; | |
| pruss_ocp_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x10 0x11>; | |
| reg = <0x530>; | |
| }; | |
| mmu_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0xf>; | |
| ti,bit-shift = <0x1>; | |
| reg = <0x914>; | |
| }; | |
| timer1_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x4 0x12 0x13 0x14 0x15>; | |
| reg = <0x528>; | |
| }; | |
| timer2_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x13 0x4 0x12>; | |
| reg = <0x508>; | |
| }; | |
| timer3_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x13 0x4 0x12>; | |
| reg = <0x50c>; | |
| }; | |
| timer4_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x13 0x4 0x12>; | |
| reg = <0x510>; | |
| }; | |
| timer5_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x13 0x4 0x12>; | |
| reg = <0x518>; | |
| }; | |
| timer6_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x13 0x4 0x12>; | |
| reg = <0x51c>; | |
| }; | |
| timer7_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x13 0x4 0x12>; | |
| reg = <0x504>; | |
| }; | |
| usbotg_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0xb>; | |
| ti,bit-shift = <0x8>; | |
| reg = <0x47c>; | |
| }; | |
| dpll_core_m4_div2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xf>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x2>; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| }; | |
| ieee5000_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x16>; | |
| ti,bit-shift = <0x1>; | |
| reg = <0xe4>; | |
| }; | |
| wdt1_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x14 0x12>; | |
| reg = <0x538>; | |
| }; | |
| l4_rtc_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xf>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x2>; | |
| }; | |
| l4hs_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xf>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| l3s_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x16>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| l4fw_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x16>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| l4ls_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x16>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| sysclk_div_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xf>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| cpsw_125mhz_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x17>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x2>; | |
| }; | |
| cpsw_cpts_rft_clk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x17 0xf>; | |
| reg = <0x520>; | |
| }; | |
| gpio0_dbclk_mux_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x14 0x15 0x12>; | |
| reg = <0x53c>; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| gpio0_dbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x18>; | |
| ti,bit-shift = <0x12>; | |
| reg = <0x408>; | |
| }; | |
| gpio1_dbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x12>; | |
| ti,bit-shift = <0x12>; | |
| reg = <0xac>; | |
| }; | |
| gpio2_dbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x12>; | |
| ti,bit-shift = <0x12>; | |
| reg = <0xb0>; | |
| }; | |
| gpio3_dbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x12>; | |
| ti,bit-shift = <0x12>; | |
| reg = <0xb4>; | |
| }; | |
| lcd_gclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x11 0x17 0xc>; | |
| reg = <0x534>; | |
| ti,set-rate-parent; | |
| linux,phandle = <0x1a>; | |
| phandle = <0x1a>; | |
| }; | |
| mmc_clk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xc>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x2>; | |
| }; | |
| gfx_fclk_clksel_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0xf 0xc>; | |
| ti,bit-shift = <0x1>; | |
| reg = <0x52c>; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| }; | |
| gfx_fck_div_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x19>; | |
| reg = <0x52c>; | |
| ti,max-div = <0x2>; | |
| }; | |
| sysclkout_pre_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x15 0x10 0x9 0xc 0x1a>; | |
| reg = <0x700>; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| clkout2_div_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x1b>; | |
| ti,bit-shift = <0x3>; | |
| ti,max-div = <0x8>; | |
| reg = <0x700>; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| }; | |
| dbg_sysclk_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x4>; | |
| ti,bit-shift = <0x13>; | |
| reg = <0x414>; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| dbg_clka_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0xf>; | |
| ti,bit-shift = <0x1e>; | |
| reg = <0x414>; | |
| linux,phandle = <0x1d>; | |
| phandle = <0x1d>; | |
| }; | |
| stm_pmd_clock_mux_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x1c 0x1d>; | |
| ti,bit-shift = <0x16>; | |
| reg = <0x414>; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| trace_pmd_clk_mux_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x1c 0x1d>; | |
| ti,bit-shift = <0x14>; | |
| reg = <0x414>; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| stm_clk_div_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x1e>; | |
| ti,bit-shift = <0x1b>; | |
| ti,max-div = <0x40>; | |
| reg = <0x414>; | |
| ti,index-power-of-two; | |
| }; | |
| trace_clk_div_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,divider-clock"; | |
| clocks = <0x1f>; | |
| ti,bit-shift = <0x18>; | |
| ti,max-div = <0x40>; | |
| reg = <0x414>; | |
| ti,index-power-of-two; | |
| }; | |
| clkout2_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,gate-clock"; | |
| clocks = <0x20>; | |
| ti,bit-shift = <0x7>; | |
| reg = <0x700>; | |
| }; | |
| }; | |
| clockdomains { | |
| clk_24mhz_clkdm { | |
| compatible = "ti,clockdomain"; | |
| clocks = <0x12>; | |
| }; | |
| }; | |
| }; | |
| scrm@44e10000 { | |
| compatible = "ti,am3-scrm"; | |
| reg = <0x44e10000 0x2000>; | |
| clocks { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| sys_clkin_ck { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,mux-clock"; | |
| clocks = <0x21 0x22 0x23 0x24>; | |
| ti,bit-shift = <0x16>; | |
| reg = <0x40>; | |
| linux,phandle = <0x4>; | |
| phandle = <0x4>; | |
| }; | |
| adc_tsc_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| dcan0_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| dcan1_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| mcasp0_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| mcasp1_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| smartreflex0_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| smartreflex1_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| sha0_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| aes0_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| rng_fck { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0x4>; | |
| clock-mult = <0x1>; | |
| clock-div = <0x1>; | |
| }; | |
| ehrpwm0_gate_tbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,composite-no-wait-gate-clock"; | |
| clocks = <0xc>; | |
| ti,bit-shift = <0x0>; | |
| reg = <0x664>; | |
| linux,phandle = <0x25>; | |
| phandle = <0x25>; | |
| }; | |
| ehrpwm0_tbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,composite-clock"; | |
| clocks = <0x25>; | |
| }; | |
| ehrpwm1_gate_tbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,composite-no-wait-gate-clock"; | |
| clocks = <0xc>; | |
| ti,bit-shift = <0x1>; | |
| reg = <0x664>; | |
| linux,phandle = <0x26>; | |
| phandle = <0x26>; | |
| }; | |
| ehrpwm1_tbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,composite-clock"; | |
| clocks = <0x26>; | |
| }; | |
| ehrpwm2_gate_tbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,composite-no-wait-gate-clock"; | |
| clocks = <0xc>; | |
| ti,bit-shift = <0x2>; | |
| reg = <0x664>; | |
| linux,phandle = <0x27>; | |
| phandle = <0x27>; | |
| }; | |
| ehrpwm2_tbclk { | |
| #clock-cells = <0x0>; | |
| compatible = "ti,composite-clock"; | |
| clocks = <0x27>; | |
| }; | |
| }; | |
| clockdomains { | |
| }; | |
| }; | |
| interrupt-controller@48200000 { | |
| compatible = "ti,omap2-intc"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x1>; | |
| ti,intc-size = <0x80>; | |
| reg = <0x48200000 0x1000>; | |
| linux,phandle = <0x1>; | |
| phandle = <0x1>; | |
| }; | |
| edma@49000000 { | |
| compatible = "ti,edma3"; | |
| ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; | |
| reg = <0x49000000 0x10000 0x44e10f90 0x10>; | |
| interrupts = <0xc 0xd 0xe>; | |
| #dma-cells = <0x1>; | |
| dma-channels = <0x40>; | |
| ti,edma-regions = <0x4>; | |
| ti,edma-slots = <0x100>; | |
| linux,phandle = <0x2a>; | |
| phandle = <0x2a>; | |
| }; | |
| gpio@44e07000 { | |
| compatible = "ti,omap4-gpio"; | |
| ti,hwmods = "gpio1"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| reg = <0x44e07000 0x1000>; | |
| interrupts = <0x60>; | |
| linux,phandle = <0x2c>; | |
| phandle = <0x2c>; | |
| }; | |
| gpio@4804c000 { | |
| compatible = "ti,omap4-gpio"; | |
| ti,hwmods = "gpio2"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| reg = <0x4804c000 0x1000>; | |
| interrupts = <0x62>; | |
| linux,phandle = <0x3d>; | |
| phandle = <0x3d>; | |
| }; | |
| gpio@481ac000 { | |
| compatible = "ti,omap4-gpio"; | |
| ti,hwmods = "gpio3"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| reg = <0x481ac000 0x1000>; | |
| interrupts = <0x20>; | |
| linux,phandle = <0x39>; | |
| phandle = <0x39>; | |
| }; | |
| gpio@481ae000 { | |
| compatible = "ti,omap4-gpio"; | |
| ti,hwmods = "gpio4"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| reg = <0x481ae000 0x1000>; | |
| interrupts = <0x3e>; | |
| }; | |
| serial@44e09000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart1"; | |
| clock-frequency = <0x2dc6c00>; | |
| reg = <0x44e09000 0x2000>; | |
| interrupts = <0x48>; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x28>; | |
| }; | |
| serial@48022000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart2"; | |
| clock-frequency = <0x2dc6c00>; | |
| reg = <0x48022000 0x2000>; | |
| interrupts = <0x49>; | |
| status = "disabled"; | |
| }; | |
| serial@48024000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart3"; | |
| clock-frequency = <0x2dc6c00>; | |
| reg = <0x48024000 0x2000>; | |
| interrupts = <0x4a>; | |
| status = "disabled"; | |
| }; | |
| serial@481a6000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart4"; | |
| clock-frequency = <0x2dc6c00>; | |
| reg = <0x481a6000 0x2000>; | |
| interrupts = <0x2c>; | |
| status = "disabled"; | |
| }; | |
| serial@481a8000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart5"; | |
| clock-frequency = <0x2dc6c00>; | |
| reg = <0x481a8000 0x2000>; | |
| interrupts = <0x2d>; | |
| status = "disabled"; | |
| }; | |
| serial@481aa000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart6"; | |
| clock-frequency = <0x2dc6c00>; | |
| reg = <0x481aa000 0x2000>; | |
| interrupts = <0x2e>; | |
| status = "disabled"; | |
| }; | |
| i2c@44e0b000 { | |
| compatible = "ti,omap4-i2c"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| ti,hwmods = "i2c1"; | |
| reg = <0x44e0b000 0x1000>; | |
| interrupts = <0x46>; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x29>; | |
| clock-frequency = <0x61a80>; | |
| tps@24 { | |
| reg = <0x24>; | |
| compatible = "ti,tps65217"; | |
| regulators { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| regulator@0 { | |
| reg = <0x0>; | |
| regulator-compatible = "dcdc1"; | |
| regulator-always-on; | |
| }; | |
| regulator@1 { | |
| reg = <0x1>; | |
| regulator-compatible = "dcdc2"; | |
| regulator-name = "vdd_mpu"; | |
| regulator-min-microvolt = <0xe1d48>; | |
| regulator-max-microvolt = <0x1437c8>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| linux,phandle = <0x2>; | |
| phandle = <0x2>; | |
| }; | |
| regulator@2 { | |
| reg = <0x2>; | |
| regulator-compatible = "dcdc3"; | |
| regulator-name = "vdd_core"; | |
| regulator-min-microvolt = <0xe1d48>; | |
| regulator-max-microvolt = <0x118c30>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| regulator@3 { | |
| reg = <0x3>; | |
| regulator-compatible = "ldo1"; | |
| regulator-always-on; | |
| }; | |
| regulator@4 { | |
| reg = <0x4>; | |
| regulator-compatible = "ldo2"; | |
| regulator-always-on; | |
| }; | |
| regulator@5 { | |
| reg = <0x5>; | |
| regulator-compatible = "ldo3"; | |
| regulator-always-on; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| linux,phandle = <0x2d>; | |
| phandle = <0x2d>; | |
| }; | |
| regulator@6 { | |
| reg = <0x6>; | |
| regulator-compatible = "ldo4"; | |
| regulator-always-on; | |
| }; | |
| }; | |
| }; | |
| }; | |
| i2c@4802a000 { | |
| compatible = "ti,omap4-i2c"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| ti,hwmods = "i2c2"; | |
| reg = <0x4802a000 0x1000>; | |
| interrupts = <0x47>; | |
| status = "disabled"; | |
| }; | |
| i2c@4819c000 { | |
| compatible = "ti,omap4-i2c"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| ti,hwmods = "i2c3"; | |
| reg = <0x4819c000 0x1000>; | |
| interrupts = <0x1e>; | |
| status = "disabled"; | |
| tlv320aic3x@1b { | |
| compatible = "ti,tlv320aic3x-hifi"; | |
| reg = <0x1b>; | |
| status = "okay"; | |
| linux,phandle = <0x3a>; | |
| phandle = <0x3a>; | |
| }; | |
| }; | |
| mmc@48060000 { | |
| compatible = "ti,omap4-hsmmc"; | |
| ti,hwmods = "mmc1"; | |
| ti,dual-volt; | |
| ti,needs-special-reset; | |
| ti,needs-special-hs-handling; | |
| dmas = <0x2a 0x18 0x2a 0x19>; | |
| dma-names = "tx", "rx"; | |
| interrupts = <0x40>; | |
| interrupt-parent = <0x1>; | |
| reg = <0x48060000 0x1000>; | |
| status = "okay"; | |
| bus-width = <0x4>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x2b>; | |
| cd-gpios = <0x2c 0x6 0x0>; | |
| cd-inverted; | |
| vmmc-supply = <0x2d>; | |
| }; | |
| mmc@481d8000 { | |
| compatible = "ti,omap4-hsmmc"; | |
| ti,hwmods = "mmc2"; | |
| ti,needs-special-reset; | |
| dmas = <0x2a 0x2 0x2a 0x3>; | |
| dma-names = "tx", "rx"; | |
| interrupts = <0x1c>; | |
| interrupt-parent = <0x1>; | |
| reg = <0x481d8000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| mmc@47810000 { | |
| compatible = "ti,omap4-hsmmc"; | |
| ti,hwmods = "mmc3"; | |
| ti,needs-special-reset; | |
| interrupts = <0x1d>; | |
| interrupt-parent = <0x1>; | |
| reg = <0x47810000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| spinlock@480ca000 { | |
| compatible = "ti,omap4-hwspinlock"; | |
| reg = <0x480ca000 0x1000>; | |
| ti,hwmods = "spinlock"; | |
| }; | |
| wdt@44e35000 { | |
| compatible = "ti,omap3-wdt"; | |
| ti,hwmods = "wd_timer2"; | |
| reg = <0x44e35000 0x1000>; | |
| interrupts = <0x5b>; | |
| }; | |
| d_can@481cc000 { | |
| compatible = "bosch,d_can"; | |
| ti,hwmods = "d_can0"; | |
| reg = <0x481cc000 0x2000 0x44e10644 0x4>; | |
| interrupts = <0x34>; | |
| status = "disabled"; | |
| }; | |
| d_can@481d0000 { | |
| compatible = "bosch,d_can"; | |
| ti,hwmods = "d_can1"; | |
| reg = <0x481d0000 0x2000 0x44e10644 0x4>; | |
| interrupts = <0x37>; | |
| status = "disabled"; | |
| }; | |
| timer@44e31000 { | |
| compatible = "ti,am335x-timer-1ms"; | |
| reg = <0x44e31000 0x400>; | |
| interrupts = <0x43>; | |
| ti,hwmods = "timer1"; | |
| ti,timer-alwon; | |
| }; | |
| timer@48040000 { | |
| compatible = "ti,am335x-timer"; | |
| reg = <0x48040000 0x400>; | |
| interrupts = <0x44>; | |
| ti,hwmods = "timer2"; | |
| }; | |
| timer@48042000 { | |
| compatible = "ti,am335x-timer"; | |
| reg = <0x48042000 0x400>; | |
| interrupts = <0x45>; | |
| ti,hwmods = "timer3"; | |
| }; | |
| timer@48044000 { | |
| compatible = "ti,am335x-timer"; | |
| reg = <0x48044000 0x400>; | |
| interrupts = <0x5c>; | |
| ti,hwmods = "timer4"; | |
| ti,timer-pwm; | |
| }; | |
| timer@48046000 { | |
| compatible = "ti,am335x-timer"; | |
| reg = <0x48046000 0x400>; | |
| interrupts = <0x5d>; | |
| ti,hwmods = "timer5"; | |
| ti,timer-pwm; | |
| }; | |
| timer@48048000 { | |
| compatible = "ti,am335x-timer"; | |
| reg = <0x48048000 0x400>; | |
| interrupts = <0x5e>; | |
| ti,hwmods = "timer6"; | |
| ti,timer-pwm; | |
| }; | |
| timer@4804a000 { | |
| compatible = "ti,am335x-timer"; | |
| reg = <0x4804a000 0x400>; | |
| interrupts = <0x5f>; | |
| ti,hwmods = "timer7"; | |
| ti,timer-pwm; | |
| }; | |
| rtc@44e3e000 { | |
| compatible = "ti,da830-rtc"; | |
| reg = <0x44e3e000 0x1000>; | |
| interrupts = <0x4b 0x4c>; | |
| ti,hwmods = "rtc"; | |
| }; | |
| spi@48030000 { | |
| compatible = "ti,omap4-mcspi"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x48030000 0x400>; | |
| interrupts = <0x41>; | |
| ti,spi-num-cs = <0x2>; | |
| ti,hwmods = "spi0"; | |
| dmas = <0x2a 0x10 0x2a 0x11 0x2a 0x12 0x2a 0x13>; | |
| dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| status = "disabled"; | |
| }; | |
| spi@481a0000 { | |
| compatible = "ti,omap4-mcspi"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x481a0000 0x400>; | |
| interrupts = <0x7d>; | |
| ti,spi-num-cs = <0x2>; | |
| ti,hwmods = "spi1"; | |
| dmas = <0x2a 0x2a 0x2a 0x2b 0x2a 0x2c 0x2a 0x2d>; | |
| dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| status = "disabled"; | |
| }; | |
| usb@47400000 { | |
| compatible = "ti,am33xx-usb"; | |
| reg = <0x47400000 0x1000>; | |
| ranges; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ti,hwmods = "usb_otg_hs"; | |
| status = "okay"; | |
| control@44e10000 { | |
| compatible = "ti,am335x-usb-ctrl-module"; | |
| reg = <0x44e10620 0x10 0x44e10648 0x4>; | |
| reg-names = "phy_ctrl", "wakeup"; | |
| status = "okay"; | |
| linux,phandle = <0x2e>; | |
| phandle = <0x2e>; | |
| }; | |
| usb-phy@47401300 { | |
| compatible = "ti,am335x-usb-phy"; | |
| reg = <0x47401300 0x100>; | |
| reg-names = "phy"; | |
| status = "okay"; | |
| ti,ctrl_mod = <0x2e>; | |
| linux,phandle = <0x2f>; | |
| phandle = <0x2f>; | |
| }; | |
| usb@47401000 { | |
| compatible = "ti,musb-am33xx"; | |
| status = "okay"; | |
| reg = <0x47401400 0x400 0x47401000 0x200>; | |
| reg-names = "mc", "control"; | |
| interrupts = <0x12>; | |
| interrupt-names = "mc"; | |
| dr_mode = "otg"; | |
| mentor,multipoint = <0x1>; | |
| mentor,num-eps = <0x10>; | |
| mentor,ram-bits = <0xc>; | |
| mentor,power = <0x1f4>; | |
| phys = <0x2f>; | |
| dmas = <0x30 0x0 0x0 0x30 0x1 0x0 0x30 0x2 0x0 0x30 0x3 0x0 0x30 0x4 0x0 0x30 0x5 0x0 0x30 0x6 0x0 0x30 0x7 0x0 0x30 0x8 0x0 0x30 0x9 0x0 0x30 0xa 0x0 0x30 0xb 0x0 0x30 0xc 0x0 0x30 0xd 0x0 0x30 0xe 0x0 0x30 0x0 0x1 0x30 0x1 0x1 0x30 0x2 0x1 0x30 0x3 0x1 0x30 0x4 0x1 0x30 0x5 0x1 0x30 0x6 0x1 0x30 0x7 0x1 0x30 0x8 0x1 0x30 0x9 0x1 0x30 0xa 0x1 0x30 0xb 0x1 0x30 0xc 0x1 0x30 0xd 0x1 0x30 0xe 0x1>; | |
| dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; | |
| }; | |
| usb-phy@47401b00 { | |
| compatible = "ti,am335x-usb-phy"; | |
| reg = <0x47401b00 0x100>; | |
| reg-names = "phy"; | |
| status = "okay"; | |
| ti,ctrl_mod = <0x2e>; | |
| linux,phandle = <0x31>; | |
| phandle = <0x31>; | |
| }; | |
| usb@47401800 { | |
| compatible = "ti,musb-am33xx"; | |
| status = "okay"; | |
| reg = <0x47401c00 0x400 0x47401800 0x200>; | |
| reg-names = "mc", "control"; | |
| interrupts = <0x13>; | |
| interrupt-names = "mc"; | |
| dr_mode = "host"; | |
| mentor,multipoint = <0x1>; | |
| mentor,num-eps = <0x10>; | |
| mentor,ram-bits = <0xc>; | |
| mentor,power = <0x1f4>; | |
| phys = <0x31>; | |
| dmas = <0x30 0xf 0x0 0x30 0x10 0x0 0x30 0x11 0x0 0x30 0x12 0x0 0x30 0x13 0x0 0x30 0x14 0x0 0x30 0x15 0x0 0x30 0x16 0x0 0x30 0x17 0x0 0x30 0x18 0x0 0x30 0x19 0x0 0x30 0x1a 0x0 0x30 0x1b 0x0 0x30 0x1c 0x0 0x30 0x1d 0x0 0x30 0xf 0x1 0x30 0x10 0x1 0x30 0x11 0x1 0x30 0x12 0x1 0x30 0x13 0x1 0x30 0x14 0x1 0x30 0x15 0x1 0x30 0x16 0x1 0x30 0x17 0x1 0x30 0x18 0x1 0x30 0x19 0x1 0x30 0x1a 0x1 0x30 0x1b 0x1 0x30 0x1c 0x1 0x30 0x1d 0x1>; | |
| dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; | |
| }; | |
| dma-controller@07402000 { | |
| compatible = "ti,am3359-cppi41"; | |
| reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000>; | |
| reg-names = "glue", "controller", "scheduler", "queuemgr"; | |
| interrupts = <0x11>; | |
| interrupt-names = "glue"; | |
| #dma-cells = <0x2>; | |
| #dma-channels = <0x1e>; | |
| #dma-requests = <0x100>; | |
| status = "okay"; | |
| linux,phandle = <0x30>; | |
| phandle = <0x30>; | |
| }; | |
| }; | |
| epwmss@48300000 { | |
| compatible = "ti,am33xx-pwmss"; | |
| reg = <0x48300000 0x10>; | |
| ti,hwmods = "epwmss0"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| status = "disabled"; | |
| ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>; | |
| ecap@48300100 { | |
| compatible = "ti,am33xx-ecap"; | |
| #pwm-cells = <0x3>; | |
| reg = <0x48300100 0x80>; | |
| ti,hwmods = "ecap0"; | |
| status = "disabled"; | |
| }; | |
| ehrpwm@48300200 { | |
| compatible = "ti,am33xx-ehrpwm"; | |
| #pwm-cells = <0x3>; | |
| reg = <0x48300200 0x80>; | |
| ti,hwmods = "ehrpwm0"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| epwmss@48302000 { | |
| compatible = "ti,am33xx-pwmss"; | |
| reg = <0x48302000 0x10>; | |
| ti,hwmods = "epwmss1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| status = "disabled"; | |
| ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>; | |
| ecap@48302100 { | |
| compatible = "ti,am33xx-ecap"; | |
| #pwm-cells = <0x3>; | |
| reg = <0x48302100 0x80>; | |
| ti,hwmods = "ecap1"; | |
| status = "disabled"; | |
| }; | |
| ehrpwm@48302200 { | |
| compatible = "ti,am33xx-ehrpwm"; | |
| #pwm-cells = <0x3>; | |
| reg = <0x48302200 0x80>; | |
| ti,hwmods = "ehrpwm1"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| epwmss@48304000 { | |
| compatible = "ti,am33xx-pwmss"; | |
| reg = <0x48304000 0x10>; | |
| ti,hwmods = "epwmss2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| status = "disabled"; | |
| ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>; | |
| ecap@48304100 { | |
| compatible = "ti,am33xx-ecap"; | |
| #pwm-cells = <0x3>; | |
| reg = <0x48304100 0x80>; | |
| ti,hwmods = "ecap2"; | |
| status = "disabled"; | |
| }; | |
| ehrpwm@48304200 { | |
| compatible = "ti,am33xx-ehrpwm"; | |
| #pwm-cells = <0x3>; | |
| reg = <0x48304200 0x80>; | |
| ti,hwmods = "ehrpwm2"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| ethernet@4a100000 { | |
| compatible = "ti,cpsw"; | |
| ti,hwmods = "cpgmac0"; | |
| cpdma_channels = <0x8>; | |
| ale_entries = <0x400>; | |
| bd_ram_size = <0x2000>; | |
| no_bd_ram = <0x0>; | |
| rx_descs = <0x40>; | |
| mac_control = <0x20>; | |
| slaves = <0x2>; | |
| active_slave = <0x0>; | |
| cpts_clock_mult = <0x80000000>; | |
| cpts_clock_shift = <0x1d>; | |
| reg = <0x4a100000 0x800 0x4a101200 0x100>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x28 0x29 0x2a 0x2b>; | |
| ranges; | |
| pinctrl-names = "default", "sleep"; | |
| pinctrl-0 = <0x32>; | |
| pinctrl-1 = <0x33>; | |
| mdio@4a101000 { | |
| compatible = "ti,davinci_mdio"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| ti,hwmods = "davinci_mdio"; | |
| bus_freq = <0xf4240>; | |
| reg = <0x4a101000 0x100>; | |
| pinctrl-names = "default", "sleep"; | |
| pinctrl-0 = <0x34>; | |
| pinctrl-1 = <0x35>; | |
| linux,phandle = <0x36>; | |
| phandle = <0x36>; | |
| }; | |
| slave@4a100200 { | |
| mac-address = [00 00 00 00 00 00]; | |
| phy_id = <0x36 0x0>; | |
| phy-mode = "mii"; | |
| }; | |
| slave@4a100300 { | |
| mac-address = [00 00 00 00 00 00]; | |
| phy_id = <0x36 0x1>; | |
| phy-mode = "mii"; | |
| }; | |
| cpsw-phy-sel@44e10650 { | |
| compatible = "ti,am3352-cpsw-phy-sel"; | |
| reg = <0x44e10650 0x4>; | |
| reg-names = "gmii-sel"; | |
| }; | |
| }; | |
| ocmcram@40300000 { | |
| compatible = "ti,am3352-ocmcram"; | |
| reg = <0x40300000 0x10000>; | |
| ti,hwmods = "ocmcram"; | |
| }; | |
| wkup_m3@44d00000 { | |
| compatible = "ti,am3353-wkup-m3"; | |
| reg = <0x44d00000 0x4000 0x44d80000 0x2000>; | |
| ti,hwmods = "wkup_m3"; | |
| ti,no-reset-on-init; | |
| }; | |
| elm@48080000 { | |
| compatible = "ti,am3352-elm"; | |
| reg = <0x48080000 0x2000>; | |
| interrupts = <0x4>; | |
| ti,hwmods = "elm"; | |
| status = "disabled"; | |
| }; | |
| lcdc@4830e000 { | |
| compatible = "ti,am33xx-tilcdc"; | |
| reg = <0x4830e000 0x1000>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x24>; | |
| ti,hwmods = "lcdc"; | |
| status = "disabled"; | |
| }; | |
| tscadc@44e0d000 { | |
| compatible = "ti,am3359-tscadc"; | |
| reg = <0x44e0d000 0x1000>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x10>; | |
| ti,hwmods = "adc_tsc"; | |
| status = "disabled"; | |
| tsc { | |
| compatible = "ti,am3359-tsc"; | |
| }; | |
| adc { | |
| #io-channel-cells = <0x1>; | |
| compatible = "ti,am3359-adc"; | |
| }; | |
| }; | |
| gpmc@50000000 { | |
| compatible = "ti,am3352-gpmc"; | |
| ti,hwmods = "gpmc"; | |
| ti,no-idle-on-init; | |
| reg = <0x50000000 0x2000>; | |
| interrupts = <0x64>; | |
| gpmc,num-cs = <0x7>; | |
| gpmc,num-waitpins = <0x2>; | |
| #address-cells = <0x2>; | |
| #size-cells = <0x1>; | |
| status = "disabled"; | |
| }; | |
| sham@53100000 { | |
| compatible = "ti,omap4-sham"; | |
| ti,hwmods = "sham"; | |
| reg = <0x53100000 0x200>; | |
| interrupts = <0x6d>; | |
| dmas = <0x2a 0x24>; | |
| dma-names = "rx"; | |
| status = "okay"; | |
| }; | |
| aes@53500000 { | |
| compatible = "ti,omap4-aes"; | |
| ti,hwmods = "aes"; | |
| reg = <0x53500000 0xa0>; | |
| interrupts = <0x67>; | |
| dmas = <0x2a 0x6 0x2a 0x5>; | |
| dma-names = "tx", "rx"; | |
| status = "okay"; | |
| }; | |
| mcasp@48038000 { | |
| compatible = "ti,am33xx-mcasp-audio"; | |
| ti,hwmods = "mcasp0"; | |
| reg = <0x48038000 0x2000 0x46000000 0x400000>; | |
| reg-names = "mpu", "dat"; | |
| interrupts = <0x50 0x51>; | |
| interrupts-names = "tx", "rx"; | |
| status = "okay"; | |
| dmas = <0x2a 0x8 0x2a 0x9>; | |
| dma-names = "tx", "rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x37>; | |
| op-mode = <0x0>; | |
| tdm-slots = <0x2>; | |
| num-serializer = <0x10>; | |
| serial-dir = <0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| tx-num-evt = <0x1>; | |
| rx-num-evt = <0x1>; | |
| linux,phandle = <0x3b>; | |
| phandle = <0x3b>; | |
| }; | |
| mcasp@4803C000 { | |
| compatible = "ti,am33xx-mcasp-audio"; | |
| ti,hwmods = "mcasp1"; | |
| reg = <0x4803c000 0x2000 0x46400000 0x400000>; | |
| reg-names = "mpu", "dat"; | |
| interrupts = <0x52 0x53>; | |
| interrupts-names = "tx", "rx"; | |
| status = "disabled"; | |
| dmas = <0x2a 0xa 0x2a 0xb>; | |
| dma-names = "tx", "rx"; | |
| }; | |
| rng@48310000 { | |
| compatible = "ti,omap4-rng"; | |
| ti,hwmods = "rng"; | |
| reg = <0x48310000 0x2000>; | |
| interrupts = <0x6f>; | |
| }; | |
| gpio-leds-cape-audio { | |
| compatible = "gpio-leds"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x38>; | |
| audio-led0 { | |
| label = "audio:green:usr0"; | |
| gpios = <0x39 0x12 0x0>; | |
| linux,default-trigger = "heartbeat"; | |
| default-state = "off"; | |
| }; | |
| audio-led1 { | |
| label = "audio:green:usr1"; | |
| gpios = <0x39 0x13 0x0>; | |
| linux,default-trigger = "mmc0"; | |
| default-state = "off"; | |
| }; | |
| }; | |
| sound { | |
| compatible = "ti,da830-evm-audio"; | |
| ti,model = "DA830 EVM"; | |
| ti,audio-codec = <0x3a>; | |
| ti,mcasp-controller = <0x3b>; | |
| ti,codec-clock-rate = <0xb71b00>; | |
| ti,audio-routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "LINE1L", "Line In", "LINE1R", "Line In"; | |
| }; | |
| }; | |
| leds { | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x3c>; | |
| compatible = "gpio-leds"; | |
| led@2 { | |
| label = "beaglebone:green:heartbeat"; | |
| gpios = <0x3d 0x15 0x0>; | |
| linux,default-trigger = "heartbeat"; | |
| default-state = "off"; | |
| }; | |
| led@3 { | |
| label = "beaglebone:green:mmc0"; | |
| gpios = <0x3d 0x16 0x0>; | |
| linux,default-trigger = "mmc0"; | |
| default-state = "off"; | |
| }; | |
| led@4 { | |
| label = "beaglebone:green:usr2"; | |
| gpios = <0x3d 0x17 0x0>; | |
| linux,default-trigger = "cpu0"; | |
| default-state = "off"; | |
| }; | |
| led@5 { | |
| label = "beaglebone:green:usr3"; | |
| gpios = <0x3d 0x18 0x0>; | |
| linux,default-trigger = "mmc1"; | |
| default-state = "off"; | |
| }; | |
| }; | |
| fixedregulator@0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vmmcsd_fixed"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| }; | |
| }; |
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