gistfile1.patch

diff --git a/src/dft/src/Dft.cpp b/src/dft/src/Dft.cpp
index 426a90260..f2770de0a 100644
--- a/src/dft/src/Dft.cpp
+++ b/src/dft/src/Dft.cpp
@@ -122,8 +122,22 @@ void Dft::preview_dft(bool verbose)
   }
   logger_->report("");

-  // Go to original state because preview_dft should not modify anything
-  scan_replace_->rollbackScanReplace();
+
+  // TEST CASE
+  odb::dbChip* chip = db_->getChip();
+  odb::dbBlock* block = chip->getBlock();
+  odb::dbInst* inst = block->findInst("ff1");
+
+  odb::dbITerm* q = inst->findITerm("Q");
+  odb::dbNet* q_net = q->getNet();
+  odb::dbBTerm* scan_out = odb::dbBTerm::create(q_net, "scan_out");
+  scan_out->setIoType(odb::dbIoType::OUTPUT);
+  scan_out->connect(q_net);
+
+  // Prints the fanout: I expect output1 and scan_out
+  for (odb::dbBTerm* bterm: q_net->getBTerms()) {
+    std::cout << "BTERM " << bterm->getName() << std::endl;
+  }
 }

 void Dft::insert_dft()
diff --git a/src/dft/test/one_cell_sky130.tcl b/src/dft/test/one_cell_sky130.tcl
index 88a06124d..087742b11 100644
--- a/src/dft/test/one_cell_sky130.tcl
+++ b/src/dft/test/one_cell_sky130.tcl
@@ -9,13 +9,7 @@ link_design one_cell

 create_clock -name main_clock -period 2.0000 -waveform {0.0000 1.0000} [get_ports {clock}]

-set_dft_config -max_length 10
-
-report_instance ff1
 preview_dft -verbose
-report_instance ff1
-insert_dft
-report_instance ff1

 set verilog_file [make_result_file one_cell_sky130.v]
 write_verilog $verilog_file