Created
October 1, 2019 02:28
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Rainbow fading RGB LED in Verilog
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module rainbow ( | |
input clk, | |
output red, | |
output grn, | |
output blu, | |
); | |
reg [26:0] counter; | |
wire [11:0] t; | |
wire [11:0] cmp; | |
assign t[0:11] = counter[0:11]; | |
assign cmp[0:11] = counter[12:23]; | |
wire [2:0] step; | |
assign step[0:2] = counter[24:26]; | |
reg [2:0] amask; | |
reg [2:0] bmask; | |
wire [2:0] mask; | |
assign mask = (t > cmp) ? amask : bmask; | |
assign red = mask[0]; | |
assign grn = mask[1]; | |
assign blu = mask[2]; | |
always @(*) begin | |
case (step) | |
0: amask <= 3'b100; | |
1: amask <= 3'b110; | |
2: amask <= 3'b010; | |
3: amask <= 3'b011; | |
4: amask <= 3'b001; | |
5: amask <= 3'b101; | |
default: amask <= 3'b000; | |
endcase | |
end | |
always @(*) begin | |
case (step) | |
0: bmask <= 3'b110; | |
1: bmask <= 3'b010; | |
2: bmask <= 3'b011; | |
3: bmask <= 3'b001; | |
4: bmask <= 3'b101; | |
5: bmask <= 3'b100; | |
default: bmask <= 3'b111; | |
endcase | |
end | |
always @(posedge clk) begin | |
counter <= (step > 5) ? 0 : (counter + 1); | |
end | |
endmodule |
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