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@gmlewis
Created March 4, 2019 13:14
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VCoupling.cpp for Luis
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See VCoupling.h for the primary calling header
#include "VCoupling.h"
#include "VCoupling__Syms.h"
//--------------------
// STATIC VARIABLES
//--------------------
VL_CTOR_IMP(VCoupling) {
VCoupling__Syms* __restrict vlSymsp = __VlSymsp = new VCoupling__Syms(this, name());
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Reset internal values
// Reset structure values
_ctor_var_reset();
}
void VCoupling::__Vconfigure(VCoupling__Syms* vlSymsp, bool first) {
if (0 && first) {} // Prevent unused
this->__VlSymsp = vlSymsp;
}
VCoupling::~VCoupling() {
delete __VlSymsp; __VlSymsp=NULL;
}
//--------------------
void VCoupling::eval() {
VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VCoupling::eval\n"); );
VCoupling__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
#ifdef VL_DEBUG
// Debug assertions
_eval_debug_assertions();
#endif // VL_DEBUG
// Initialize
if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp);
// Evaluate till stable
int __VclockLoop = 0;
QData __Vchange = 1;
do {
VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
_eval(vlSymsp);
if (VL_UNLIKELY(++__VclockLoop > 100)) {
// About to fail, so enable debug to see what's not settling.
// Note you must run make with OPT=-DVL_DEBUG for debug prints.
int __Vsaved_debug = Verilated::debug();
Verilated::debug(1);
__Vchange = _change_request(vlSymsp);
Verilated::debug(__Vsaved_debug);
VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge");
} else {
__Vchange = _change_request(vlSymsp);
}
} while (VL_UNLIKELY(__Vchange));
}
void VCoupling::_eval_initial_loop(VCoupling__Syms* __restrict vlSymsp) {
vlSymsp->__Vm_didInit = true;
_eval_initial(vlSymsp);
// Evaluate till stable
int __VclockLoop = 0;
QData __Vchange = 1;
do {
_eval_settle(vlSymsp);
_eval(vlSymsp);
if (VL_UNLIKELY(++__VclockLoop > 100)) {
// About to fail, so enable debug to see what's not settling.
// Note you must run make with OPT=-DVL_DEBUG for debug prints.
int __Vsaved_debug = Verilated::debug();
Verilated::debug(1);
__Vchange = _change_request(vlSymsp);
Verilated::debug(__Vsaved_debug);
VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge");
} else {
__Vchange = _change_request(vlSymsp);
}
} while (VL_UNLIKELY(__Vchange));
}
//--------------------
// Internal Methods
VL_INLINE_OPT void VCoupling::_sequent__TOP__1(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_sequent__TOP__1\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
// ALWAYS at Coupling.v:53
vlTOPp->Coupling__DOT__reg_ = ((IData)(vlTOPp->reset)
| (IData)(vlTOPp->Coupling__DOT___T_0));
vlTOPp->Coupling__DOT___T_0 = (1U & (~ (IData)(vlTOPp->Coupling__DOT__reg_)));
vlTOPp->a_ready = vlTOPp->Coupling__DOT__reg_;
}
void VCoupling::_settle__TOP__2(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_settle__TOP__2\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->Coupling__DOT___T_0 = (1U & (~ (IData)(vlTOPp->Coupling__DOT__reg_)));
vlTOPp->a_ready = vlTOPp->Coupling__DOT__reg_;
vlTOPp->b = (((IData)(vlTOPp->Coupling__DOT__reg_)
& (IData)(vlTOPp->a_valid)) ? (IData)(vlTOPp->a_payload)
: 7U);
}
VL_INLINE_OPT void VCoupling::_combo__TOP__3(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_combo__TOP__3\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->b = (((IData)(vlTOPp->Coupling__DOT__reg_)
& (IData)(vlTOPp->a_valid)) ? (IData)(vlTOPp->a_payload)
: 7U);
}
void VCoupling::_eval(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_eval\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
if (((IData)(vlTOPp->clock) & (~ (IData)(vlTOPp->__Vclklast__TOP__clock)))) {
vlTOPp->_sequent__TOP__1(vlSymsp);
}
vlTOPp->_combo__TOP__3(vlSymsp);
// Final
vlTOPp->__Vclklast__TOP__clock = vlTOPp->clock;
}
void VCoupling::_eval_initial(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_eval_initial\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->__Vclklast__TOP__clock = vlTOPp->clock;
}
void VCoupling::final() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::final\n"); );
// Variables
VCoupling__Syms* __restrict vlSymsp = this->__VlSymsp;
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
}
void VCoupling::_eval_settle(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_eval_settle\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->_settle__TOP__2(vlSymsp);
}
VL_INLINE_OPT QData VCoupling::_change_request(VCoupling__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_change_request\n"); );
VCoupling* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
// Change detection
QData __req = false; // Logically a bool
return __req;
}
#ifdef VL_DEBUG
void VCoupling::_eval_debug_assertions() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_eval_debug_assertions\n"); );
// Body
if (VL_UNLIKELY((a_valid & 0xfeU))) {
Verilated::overWidthError("a_valid");}
if (VL_UNLIKELY((reset & 0xfeU))) {
Verilated::overWidthError("reset");}
if (VL_UNLIKELY((clock & 0xfeU))) {
Verilated::overWidthError("clock");}
}
#endif // VL_DEBUG
void VCoupling::_ctor_var_reset() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VCoupling::_ctor_var_reset\n"); );
// Body
a_payload = VL_RAND_RESET_I(8);
a_ready = VL_RAND_RESET_I(1);
a_valid = VL_RAND_RESET_I(1);
reset = VL_RAND_RESET_I(1);
b = VL_RAND_RESET_I(8);
clock = VL_RAND_RESET_I(1);
Coupling__DOT__reg_ = VL_RAND_RESET_I(1);
Coupling__DOT___T_0 = VL_RAND_RESET_I(1);
}
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