login1.stampede(120)$ ifort -free -I/work/02681/ankitg/installs/perfexpert_install/include -g -L /work/02681/ankitg/installs/perfexpert_install/binutils/lib -lbfd driver.f -L/work/02681/ankitg/installs/perfexpert_install/lib -L/work/02681/ankitg/installs/libelf/lib -Wl,-rpath=/work/02681/ankitg/installs/libelf/lib -lmrt -lstdc++ -ldl -rdynamic -lelf -lbfd -lz -c -L/opt/apps/gcc/4.7.1/lib64/ -liberty -c
driver.f(2): error #5082: Syntax error, found '**' when expecting one of: ( % [ : . = =>
c **********************************************************************
--^
driver.f(3): error #5082: Syntax error, found '*' when expecting one of: ( % [ : . = =>
c * *
--^
driver.f(4): error #5082: Syntax error, found '*' when expecting one of: ( % [ : . = =>
c * copyright, 1993, the regents of the university of california. *
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package nlp.lm; | |
import java.io.*; | |
import java.util.*; | |
/** | |
* @author Ray Mooney | |
* A simple bigram language model that uses simple fixed-weight interpolation | |
* with a unigram model for smoothing. | |
*/ |
Compilation Final Step
gcc main.o collision.o finalsave.o init.o parameters.o relaxstats.o postcollision.o poststream.o stream.o -L/work/01174/ashay/apps/binutils/lib -L/work/02681/ankitg/installs/perfexpert_install/lib -L/work/02681/ankitg/installs/libelf/lib -Wl,-rpath=/work/02681/ankitg/installs/libelf/lib -lmrt -lstdc++ -ldl -rdynamic -lelf -lbfd -liberty -lz -lmrt -fopenmp
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SUBROUTINE source(it,jt,kt,isct,nm,Src,Srcx,Sigs,Flux,Pflux) | |
IMPLICIT NONE | |
INTEGER :: it, jt, kt, isct, nm | |
DOUBLE PRECISION, DIMENSION(it,jt,kt) :: Srcx | |
DOUBLE PRECISION, DIMENSION(it,jt,kt,isct + 1) :: Sigs | |
DOUBLE PRECISION, DIMENSION(it,jt,kt,nm) :: Flux | |
DOUBLE PRECISION, DIMENSION(it,jt,kt,nm) :: Src | |
DOUBLE PRECISION, DIMENSION(it,jt,kt) :: Pflux | |
INTEGER :: i, j, k | |
IF (isct .EQ. 0) THEN |
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Current Address: 1168214317572 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317576 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317580 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317584 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317588 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317592 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317596 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317600 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: 1168214317604 Cache Line: 18253348712 Fixed Cache Line: 18253348712 RD for fixed cache line: 0 | |
Current Address: |
All addresses map to set 0 of the cache.
1168214315068
1168214319164
1168214323260
1168214327356
1168214331452
1168214335548
1168214339644
HW_PRE_REQ.DL1_MISS Hardware Prefetch requests that miss the L1D cache. A request is being counted each time it access the cache & miss it including if a block is applicable or if hit the Fill Buffer for example.(This accounts for both L1 streamer and IP-based (IPP) HW prefetchers. )
L1D.REPLACEMENT Counts the number of lines brought into the L1 data cache.
L1D.ALLOCATED_IN_M Counts the number of allocations of modified L1D cache lines.
L1D.EVICTION Counts the number of modified lines evicted from the L1 data cache due to replacement.
L1D.ALL_M_REPLACEMENT Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line replacement
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#include <cassert> | |
#include <map> | |
#include <vector> | |
#include "avl_tree.h" | |
// creates a bit mask with bits between a and b from the right as 1. | |
// example: b = 4, a = 2 => 0000001100 | |
#define BIT_MASK(a, b) (size_t)(((size_t) -1 >> ((sizeof(size_t)*8) \ | |
- (b))) & ~((1U << (a)) - 1)) |
--------------------------------------------------------------------------------
| |
:
| perf::PERF_COUNT_HW_CACHE_L1D |
| L1 data cache |
| :READ |
| read access |
| :WRITE |