NRF pong

gistfile1.txt

setStates { RF_CH: 4 }
setStates { RF_PWR: 3 }
setStates { RF_DR_LOW: false, RF_DR_HIGH: false }
setStates { EN_CRC: true, CRCO: 1 }
setStates { ARC: 15, ARD: 15 }
Set CE low.
blocked for 130µs.
Set CE low.
blocked for 130µs.
execCommand FLUSH_TX 0
execCommand [ 'W_REGISTER', 5 ] [ 4 ]
execCommand FLUSH_RX 0
execCommand [ 'R_REGISTER', 6 ] 1
setStates { PWR_UP: true,
  PRIM_RX: false,
  EN_RXADDR: 0,
  RX_DR: true,
  TX_DS: true,
  MAX_RT: true,
  EN_DPL: true,
  EN_ACK_PAY: true,
  EN_DYN_ACK: true }
 - exec read: <Buffer 0e 07>
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 07>
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0f>
execCommand [ 'R_REGISTER', 4 ] 1
 - exec read: <Buffer 0e ff>
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0f>
execCommand [ 'W_REGISTER', 0 ] [ 14 ]
blocked for 130µs.
execCommand [ 'W_REGISTER', 2 ] [ 0 ]
execCommand [ 'R_REGISTER', 7 ] 1
 - exec read: <Buffer 0e 0e>
execCommand [ 'W_REGISTER', 7 ] [ 126 ]
execCommand [ 'R_REGISTER', 29 ] 1
 - exec read: <Buffer 0e 07>
SPI device:	 /dev/spidev0.0
CE GPIO:	 24
IRQ GPIO:	 25
setStates { AW: 3,
  PRIM_RX: true,
  RX_ADDR_P1: <Buffer f0 f0 f0 f0 e1>,
  ERX_P1: true,
  ENAA_P1: true,
  DPL_P1: true }
setStates { AW: 3,
  RX_ADDR_P0: <Buffer f0 f0 f0 f0 d2>,
  ERX_P0: true,
  ENAA_P0: true,
  DPL_P0: true }
PONG back
3
execCommand [ 'R_REGISTER', 7 ] 1
_checkStatus, irq = false checking = false
 - exec read: <Buffer 0e 0e>
execCommand [ 'R_REGISTER', 23 ] 1
 - exec read: <Buffer 0e 11>
gotStates { RX_DR: 0,
  TX_DS: 0,
  MAX_RT: 0,
  RX_P_NO: 7,
  STATUS: <Buffer 0e>,
  TX_FULL: 0 } null
STATUS:		 0xe RX_DR=0 TX_DS=0 MAX_RT=0 RX_P_NO=7 TX_FULL=0
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0e>
execCommand [ 'W_REGISTER', 0 ] [ 15 ]
blocked for 130µs.
execCommand [ 'R_REGISTER', 1 ] 1
 - exec read: <Buffer 0e 3f>
execCommand [ 'R_REGISTER', 2 ] 1
 - exec read: <Buffer 0e 00>
execCommand [ 'W_REGISTER', 2 ] [ 2 ]
execCommand [ 'R_REGISTER', 3 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'W_REGISTER', 11 ] <Buffer f0 f0 f0 f0 e1>
execCommand [ 'R_REGISTER', 28 ] 1
 - exec read: <Buffer 0e 03>
Set CE true.
blocked for 130µs.
ready
setStates {}
execCommand [ 'R_REGISTER', 1 ] 1
_checkStatus, irq = false checking = true
 - exec read: <Buffer 0e 3f>
execCommand [ 'R_REGISTER', 2 ] 1
 - exec read: <Buffer 0e 02>
execCommand [ 'W_REGISTER', 2 ] [ 3 ]
execCommand [ 'R_REGISTER', 3 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'W_REGISTER', 10 ] <Buffer f0 f0 f0 f0 d2>
execCommand [ 'R_REGISTER', 28 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'R_REGISTER', 7 ] 1
 - exec read: <Buffer 0e 0e>
gotStates { RX_P_NO: 7, TX_DS: 0, MAX_RT: 0, RX_DR: 0 } null
execCommand [ 'R_REGISTER', 10 ] 5
 - exec read: <Buffer 0e d2 f0 f0 f0 f0>
execCommand [ 'R_REGISTER', 11 ] 5
 - exec read: <Buffer 0e e1 f0 f0 f0 f0>
execCommand [ 'R_REGISTER', 12 ] 1
 - exec read: <Buffer 0e c3>
execCommand [ 'R_REGISTER', 13 ] 1
 - exec read: <Buffer 0e c4>
execCommand [ 'R_REGISTER', 14 ] 1
 - exec read: <Buffer 0e c5>
execCommand [ 'R_REGISTER', 15 ] 1
 - exec read: <Buffer 0e c6>
execCommand [ 'R_REGISTER', 16 ] 5
 - exec read: <Buffer 0e 00 e7 e7 e7 e7>
gotStates { RX_ADDR_P0: <Buffer f0 f0 f0 f0 d2>,
  RX_ADDR_P1: <Buffer f0 f0 f0 f0 e1>,
  RX_ADDR_P2: <Buffer c3>,
  RX_ADDR_P3: <Buffer c4>,
  RX_ADDR_P4: <Buffer c5>,
  RX_ADDR_P5: <Buffer c6>,
  TX_ADDR: <Buffer e7 e7 e7 e7 00> } null
RX_ADDR_P0–1:	 0xf0f0f0f0d2 0xf0f0f0f0e1
RX_ADDR_P2–5:	 0xc3 0xc4 0xc5 0xc6
TX_ADDR:	 0xe7e7e7e700
execCommand [ 'W_ACK_PAYLOAD', 1 ] <Buffer 61 62 63>
execCommand [ 'R_REGISTER', 17 ] 1
Set CE true.
blocked for 10µs.
Set CE false.
blocked for 4µs.
 - exec read: <Buffer 0e 00>
execCommand [ 'R_REGISTER', 18 ] 1
 - exec read: <Buffer 0e 00>
execCommand [ 'R_REGISTER', 19 ] 1
 - exec read: <Buffer 0e 00>
execCommand [ 'R_REGISTER', 20 ] 1
 - exec read: <Buffer 0e 00>
execCommand [ 'R_REGISTER', 21 ] 1
 - exec read: <Buffer 0e 00>
execCommand [ 'R_REGISTER', 22 ] 1
 - exec read: <Buffer 0e 00>
gotStates { RX_PW_P0: 0,
  RX_PW_P1: 0,
  RX_PW_P2: 0,
  RX_PW_P3: 0,
  RX_PW_P4: 0,
  RX_PW_P5: 0 } null
RX_PW_P0–5:	 0x0 0x0 0x0 0x0 0x0 0x0
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0f>
execCommand [ 'R_REGISTER', 1 ] 1
 - exec read: <Buffer 0e 3f>
execCommand [ 'R_REGISTER', 2 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'R_REGISTER', 5 ] 1
 - exec read: <Buffer 0e 04>
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 07>
execCommand [ 'R_REGISTER', 28 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'R_REGISTER', 29 ] 1
 - exec read: <Buffer 0e 07>
gotStates { CONFIG: <Buffer 0f>,
  EN_AA: <Buffer 3f>,
  EN_RXADDR: <Buffer 03>,
  RF_CH: 4,
  RF_SETUP: <Buffer 07>,
  DYNPD: <Buffer 03>,
  FEATURE: <Buffer 07> } null
EN_AA:		 0x3f
EN_RXADDR:	 0x03
RF_CH:		 0x4
RF_SETUP:	 0x07
CONFIG:		 0x0f
DYNPD/FEATURE:	 0x03 0x07
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0f>
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 07>
gotStates { EN_CRC: 1, CRCO: 1, RF_DR_LOW: 0, RF_DR_HIGH: 0, RF_PWR: 3 } null
setStates { RF_DR_LOW: true }
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 07>
execCommand [ 'W_REGISTER', 6 ] [ 39 ]
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 27>
gotStates { RF_DR_LOW: 1 } null
setStates { RF_DR_LOW: false }
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 27>
execCommand [ 'W_REGISTER', 6 ] [ 7 ]
Data Rate:	 1Mbps
Model:		 nRF24L01+
CRC Length:	 16 bits
PA Power:	 PA_MAX