NRF Ping

gistfile1.txt

setStates { RF_CH: 4 }
setStates { RF_PWR: 3 }
setStates { RF_DR_LOW: false, RF_DR_HIGH: false }
setStates { EN_CRC: true, CRCO: 1 }
setStates { ARC: 15, ARD: 15 }
Set CE low.
blocked for 130µs.
Set CE low.
blocked for 130µs.
execCommand FLUSH_TX 0
execCommand [ 'W_REGISTER', 5 ] [ 4 ]
execCommand FLUSH_RX 0
execCommand [ 'R_REGISTER', 6 ] 1
setStates { PWR_UP: true,
  PRIM_RX: false,
  EN_RXADDR: 0,
  RX_DR: true,
  TX_DS: true,
  MAX_RT: true,
  EN_DPL: true,
  EN_ACK_PAY: true,
  EN_DYN_ACK: true }
 - exec read: <Buffer 0e 07>
execCommand [ 'R_REGISTER', 6 ] 1
 - exec read: <Buffer 0e 07>
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0e>
execCommand [ 'R_REGISTER', 4 ] 1
 - exec read: <Buffer 0e ff>
execCommand [ 'R_REGISTER', 0 ] 1
 - exec read: <Buffer 0e 0e>
execCommand [ 'W_REGISTER', 2 ] [ 0 ]
execCommand [ 'R_REGISTER', 7 ] 1
 - exec read: <Buffer 0e 0e>
execCommand [ 'W_REGISTER', 7 ] [ 126 ]
execCommand [ 'R_REGISTER', 29 ] 1
 - exec read: <Buffer 0e 07>
SPI device:	 /dev/spidev0.0
CE GPIO:	 24
IRQ GPIO:	 25
setStates { AW: 3,
  RX_ADDR_P0: <Buffer f0 f0 f0 f0 e1>,
  ERX_P0: true,
  ENAA_P0: true,
  DPL_P0: true }
setStates { AW: 3,
  PRIM_RX: true,
  RX_ADDR_P1: <Buffer f0 f0 f0 f0 d2>,
  ERX_P1: true,
  ENAA_P1: true,
  DPL_P1: true }
PING out
execCommand [ 'R_REGISTER', 7 ] 1
_checkStatus, irq = false checking = false
 - exec read: <Buffer 0e 0e>
execCommand [ 'R_REGISTER', 23 ] 1
 - exec read: <Buffer 0e 11>
gotStates { RX_DR: 0,
  TX_DS: 0,
  MAX_RT: 0,
  RX_P_NO: 7,
  STATUS: <Buffer 0e>,
  TX_FULL: 0 } null
STATUS:		 0xe RX_DR=0 TX_DS=0 MAX_RT=0 RX_P_NO=7 TX_FULL=0
execCommand [ 'R_REGISTER', 1 ] 1
 - exec read: <Buffer 0e 3f>
execCommand [ 'R_REGISTER', 2 ] 1
 - exec read: <Buffer 0e 00>
execCommand [ 'W_REGISTER', 2 ] [ 1 ]
execCommand [ 'R_REGISTER', 3 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'W_REGISTER', 10 ] <Buffer f0 f0 f0 f0 e1>
execCommand [ 'R_REGISTER', 28 ] 1
 - exec read: <Buffer 0e 03>
execCommand [ 'R_REGISTER', 0 ] 1
Piping out 0
Piping out 1
Set CE low.
setStates { TX_ADDR: <Buffer f0 f0 f0 f0 e1>,
  PRIM_RX: false,
  RX_ADDR_P0: <Buffer f0 f0 f0 f0 e1> }