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@hajgato
Created August 11, 2014 15:06
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SSE3-AVX test
fill.c:
#define N 10000
#define NTIMES 100000
double a[N] __attribute__ ((aligned (16)));
double b[N] __attribute__ ((aligned (16)));
double c[N] __attribute__ ((aligned (16)));
double r[N] __attribute__ ((aligned (16)));
double x[];
float _Complex d[100];
float _Complex e[100];
int i, times;
main() {
// AVX
for (i=0; i<128000; i++)
{
a[i] = i / 2;
}
// SSE2
for (times = 0; times < NTIMES; times++)
{
for (i = 0; i < N; ++i)
r[i] = (a[i] + b[i]) * c[i];
}
// SSE3
for (i=0;i<100;i++)
{
d[i] *= e[i];
}
return 0;
}
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.mavx.interlagos.12.1, please wait... icc(12.1) -mavx
MMX: 0
SSE: 124
MMXExt: 0
Enh 3DNow: 0
SSE2: 0
SSE3: 0
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 49
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.msse3.interlagos.12.1, please wait... icc(12.1) -msse3
MMX: 26
SSE: 140
MMXExt: 0
Enh 3DNow: 0
SSE2: 6
SSE3: 6
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 18
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.msse3.interlagos.13.1, please wait... icc(13.1) -msse3
MMX: 26
SSE: 22
MMXExt: 0
Enh 3DNow: 0
SSE2: 6
SSE3: 6
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 0
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.msse3.magnycourse.13.1, please wait... icc(13.1) -msse3
MMX: 26
SSE: 22
MMXExt: 0
Enh 3DNow: 0
SSE2: 6
SSE3: 6
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 0
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.xHOST.interlagos.12.1, please wait... icc(12.1) -xHOST
MMX: 26
SSE: 140
MMXExt: 0
Enh 3DNow: 0
SSE2: 6
SSE3: 6
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 18
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.xHOST.interlagos.13.1, please wait... icc(13.1) -xHOST
MMX: 0
SSE: 6
MMXExt: 0
Enh 3DNow: 0
SSE2: 0
SSE3: 0
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 45
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Disassembling fill.xHOST.magnycourse.13.1, please wait... icc(13.1) -xHOST
MMX: 26
SSE: 22
MMXExt: 0
Enh 3DNow: 0
SSE2: 6
SSE3: 6
SSSE3: 0
SSE4A: 0
SSE4.1: 0
SSE4.2: 0
AES: 0
AVX: 0
FMA: 0
FMA4: 0
This binary was found to contain the cpuid instruction.
This could mean that the application checks if an opcode is
supported before executing it, meaning it may work even if
these instructions are not supported on the host.
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