Meraki MX84 with GPL coreboot build

bootlog.txt

coreboot-3c79d63-dirty-Liteon_GRM1001_MFG_v4.0.0 Sat Dec  3 09:22:43 UTC 2022 starting...
POST: 0x41
POST: 0x42
Setting up static southbridge registers... done.
Disabling Watchdog timer... done.
RTC Failure detected.  Resetting Date to 12/03/2022
RTC Init
RTC: Clear requested zeroing cmos
POST: 0x46
POST: 0x47
Starting the Intel FSP (early_init)
Configure Default UPD Data
PcdEnableIQAT 1
PcdEnableLan 1
PcdEnableLan 1
PcdEnableLan 1
PcdEnableLan 1
PcdEnableUsb20 1
PcdEnableSata2 1
PcdEnableSata3 1
find_current_mrc_cache_local: No valid fast boot cache found.
FSP MRC cache not present.
CpuType: AVN
Stepping: 2
BECREG = E0000001
Smbus BAR = 0000EFA0
GpioBar = 00000500
PmcBar = FED03000
Buffer size before add 2263, after adjust 2268.
MRC Parameters not valid. Status is 80000002
Mrc policy was found successfully


coreboot-3c79d63-dirty-Liteon_GRM1001_MFG_v4.0.0 Sat Dec  3 09:22:43 UTC 2022 starting...
POST: 0x41
POST: 0x42
Setting up static southbridge registers... done.
Disabling Watchdog timer... done.
RTC Init
POST: 0x46
POST: 0x47
Starting the Intel FSP (early_init)
Configure Default UPD Data
PcdEnableIQAT 1
PcdEnableLan 1
PcdEnableLan 1
PcdEnableLan 1
PcdEnableLan 1
PcdEnableUsb20 1
PcdEnableSata2 1
PcdEnableSata3 1
find_current_mrc_cache_local: No valid fast boot cache found.
FSP MRC cache not present.
CpuType: AVN
Stepping: 2
BECREG = E0000001
Smbus BAR = 0000EFA0
GpioBar = 00000500
PmcBar = FED03000
Buffer size before add 2263, after adjust 2268.
MRC Parameters not valid. Status is 80000002
Mrc policy was found successfully
Memory Discovered Notify invoked ...
Memory Discovered Notify completed ...
Detected 2 CPU threads
FSP HOB is located at 0x7FE20000
FSP is waiting for NOTIFY
POST: 0x48
romstage_main_continue status: 0  hob_list_ptr: 7fe20000
FSP Status: 0x0
POST: 0x4b
POST: 0x4c
POST: 0x4d
CBMEM region 7fde0000-7fdfffff (cbmem_check_toc)
ERROR: CBMEM was not initialized yet.
POST: 0x4e
POST: 0x4f
Trying CBFS ramstage loader.
CBFS: loading stage fallback/ramstage @ 0x100000 (262192 bytes), entry @ 0x100000
POST: 0x80
POST: 0x39
coreboot-3c79d63-dirty-Liteon_GRM1001_MFG_v4.0.0 Sat Dec  3 09:22:43 UTC 2022 booting...
POST: 0x40
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 488 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 489 exit 0
POST: 0x72
Enumerating buses...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/1f0e] enabled
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/1f10] enabled
PCI: Static device PCI: 00:02.0 not found, disabling it.
PCI: 00:03.0 subordinate bus PCI Express
PCI: 00:03.0 [8086/1f12] enabled
PCI: Static device PCI: 00:04.0 not found, disabling it.
PCI: 00:0b.0 [8086/1f18] enabled
PCI: 00:0e.0 [8086/1f14] enabled
PCI: 00:0f.0 [8086/1f16] enabled
PCI: 00:13.0 [8086/1f15] enabled
PCI: 00:14.0 [8086/1f40] enabled
PCI: 00:14.1 [8086/1f40] enabled
PCI: 00:14.2 [8086/1f40] enabled
PCI: 00:14.3 [8086/1f40] enabled
PCI: 00:16.0 [8086/1f2c] enabled
PCI: 00:17.0 [8086/1f22] enabled
PCI: 00:18.0 [8086/1f32] enabled
PCI: 00:1f.0 [8086/1f38] enabled
PCI: 00:1f.3 [8086/1f3c] enabled
POST: 0x25
PCI: pci_scan_bus for bus 01
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
PCI: pci_scan_bus for bus 02
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
PCI: pci_scan_bus returning with max=002
POST: 0x55
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 46871 exit 0
POST: 0x73
Allocating resources...
Reading resources...
APIC: 00 missing read_resources
SMM memory location: 0x80000000  SMM memory size: 0x0
Subtracting 0M for SMM
Available memory above 4GB: 2048M
Adding PCIe config bar base=0xe0000000 size=0x10000000
Done reading resources.
Setting resources...
SMM memory location: 0x80000000  SMM memory size: 0x0
Subtracting 0M for SMM
Available memory above 4GB: 2048M
Adding PCIe config bar base=0xe0000000 size=0x10000000
PCI: 00:01.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:01.0 10 <- [0x00dff00000 - 0x00dff1ffff] size 0x00020000 gran 0x11 mem64
PCI: 00:03.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:03.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:03.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:03.0 10 <- [0x00dff20000 - 0x00dff3ffff] size 0x00020000 gran 0x11 mem64
PCI: 00:0b.0 18 <- [0x00dff40000 - 0x00dff5ffff] size 0x00020000 gran 0x11 mem64
PCI: 00:0b.0 20 <- [0x00dffe0000 - 0x00dffe3fff] size 0x00004000 gran 0x0e mem64
PCI: 00:13.0 10 <- [0x00dfff5000 - 0x00dfff53ff] size 0x00000400 gran 0x0a mem64
PCI: 00:14.0 10 <- [0x00dff60000 - 0x00dff7ffff] size 0x00020000 gran 0x11 mem64
PCI: 00:14.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
PCI: 00:14.0 20 <- [0x00dffe4000 - 0x00dffe7fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.1 10 <- [0x00dff80000 - 0x00dff9ffff] size 0x00020000 gran 0x11 mem64
PCI: 00:14.1 18 <- [0x0000001020 - 0x000000103f] size 0x00000020 gran 0x05 io
PCI: 00:14.1 20 <- [0x00dffe8000 - 0x00dffebfff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.2 10 <- [0x00dffa0000 - 0x00dffbffff] size 0x00020000 gran 0x11 mem64
PCI: 00:14.2 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:14.2 20 <- [0x00dffec000 - 0x00dffeffff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 10 <- [0x00dffc0000 - 0x00dffdffff] size 0x00020000 gran 0x11 mem64
PCI: 00:14.3 18 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:14.3 20 <- [0x00dfff0000 - 0x00dfff3fff] size 0x00004000 gran 0x0e mem64
PCI: 00:16.0 10 <- [0x00dfff5400 - 0x00dfff57ff] size 0x00000400 gran 0x0a mem
PCI: 00:17.0 10 <- [0x00000010c0 - 0x00000010c7] size 0x00000008 gran 0x03 io
PCI: 00:17.0 14 <- [0x00000010e0 - 0x00000010e3] size 0x00000004 gran 0x02 io
PCI: 00:17.0 18 <- [0x00000010c8 - 0x00000010cf] size 0x00000008 gran 0x03 io
PCI: 00:17.0 1c <- [0x00000010e4 - 0x00000010e7] size 0x00000004 gran 0x02 io
PCI: 00:17.0 20 <- [0x0000001080 - 0x000000109f] size 0x00000020 gran 0x05 io
PCI: 00:17.0 24 <- [0x00dfff4000 - 0x00dfff47ff] size 0x00000800 gran 0x0b mem
PCI: 00:18.0 10 <- [0x00000010d0 - 0x00000010d7] size 0x00000008 gran 0x03 io
PCI: 00:18.0 14 <- [0x00000010e8 - 0x00000010eb] size 0x00000004 gran 0x02 io
PCI: 00:18.0 18 <- [0x00000010d8 - 0x00000010df] size 0x00000008 gran 0x03 io
PCI: 00:18.0 1c <- [0x00000010ec - 0x00000010ef] size 0x00000004 gran 0x02 io
PCI: 00:18.0 20 <- [0x00000010a0 - 0x00000010bf] size 0x00000020 gran 0x05 io
PCI: 00:18.0 24 <- [0x00dfff4800 - 0x00dfff4fff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00dfff5800 - 0x00dfff581f] size 0x00000020 gran 0x05 mem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 144294 exit 0
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 0000/0000
PCI: 00:00.0 cmd <- 07
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 02
PCI: 00:03.0 bridge ctrl <- 0003
PCI: 00:03.0 cmd <- 02
PCI: 00:0b.0 subsystem <- 0000/0000
PCI: 00:0b.0 cmd <- 102
PCI: 00:0e.0 subsystem <- 0000/0000
PCI: 00:0e.0 cmd <- 00
PCI: 00:0f.0 cmd <- 04
PCI: 00:13.0 subsystem <- 0000/0000
PCI: 00:13.0 cmd <- 106
PCI: 00:14.0 subsystem <- 0000/0000
PCI: 00:14.0 cmd <- 107
PCI: 00:14.1 subsystem <- 0000/0000
PCI: 00:14.1 cmd <- 103
PCI: 00:14.2 subsystem <- 0000/0000
PCI: 00:14.2 cmd <- 103
PCI: 00:14.3 subsystem <- 0000/0000
PCI: 00:14.3 cmd <- 103
PCI: 00:16.0 subsystem <- 0000/0000
PCI: 00:16.0 cmd <- 102
PCI: 00:17.0 subsystem <- 0000/0000
PCI: 00:17.0 cmd <- 103
PCI: 00:18.0 subsystem <- 0000/0000
PCI: 00:18.0 cmd <- 103
PCI: 00:1f.0 subsystem <- 0000/0000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.3 subsystem <- 0000/0000
PCI: 00:1f.3 cmd <- 103
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 39962 exit 0
POST: 0x75
Initializing devices...
Root Device init
Root Device init 729 usecs
POST: 0x75
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor Intel device 406d8
CPU: family 06, model 4d, stepping 08
POST: 0x60
Enabling cache
CPU: Intel(R) Atom(TM) CPU  C2358  @ 1.74GHz.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local apic... apic_id: 0x00 done.
POST: 0x9b
Disabling VMX
CPU: 0 has 2 cores, 1 threads per core
CPU: 0 has core 2
Initializing CPU #1
CPU: vendor Intel device 406d8
CPU #0 initialized
Waiting for 1 CPUS to stop
CPU: family 06, model 4d, stepping 08
POST: 0x60
Enabling cache
CPU: Intel(R) Atom(TM) CPU  C2358  @ 1.74GHz.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local apic... apic_id: 0x02 done.
POST: 0x9b
Disabling VMX
CPU #1 initialized
All AP CPUs stopped (1155 loops)
CPU_CLUSTER: 0 init 45194 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init
PCI: 00:00.0 init 770 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:0b.0 init
PCI: 00:0b.0 init 770 usecs
POST: 0x75
PCI: 00:0e.0 init
PCI: 00:0e.0 init 770 usecs
POST: 0x75
PCI: 00:0f.0 init
PCI: 00:0f.0 init 769 usecs
POST: 0x75
PCI: 00:13.0 init
PCI: 00:13.0 init 770 usecs
POST: 0x75
PCI: 00:14.0 init
PCI: 00:14.0 init 770 usecs
POST: 0x75
PCI: 00:14.1 init
PCI: 00:14.1 init 770 usecs
POST: 0x75
PCI: 00:14.2 init
PCI: 00:14.2 init 770 usecs
POST: 0x75
PCI: 00:14.3 init
PCI: 00:14.3 init 770 usecs
POST: 0x75
PCI: 00:16.0 init
PCI: 00:16.0 init 770 usecs
POST: 0x75
PCI: 00:17.0 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: DFFF4000
PCI: 00:17.0 init 3648 usecs
POST: 0x75
PCI: 00:18.0 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: DFFF4800
PCI: 00:18.0 init 3648 usecs
POST: 0x75
PCI: 00:1f.0 init
soc: lpc_init
Southbridge APIC ID = 2
PCI_CFG IRQ: Write PCI config space IRQ assignments
Warning: PCI Device 24 does not have an IRQ entry, skipping it
Warning: PCI Device 15 does not have an IRQ entry, skipping it
PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
NMI sources disabled.
PCI: 00:1f.0 init 13301 usecs
POST: 0x75
Devices initialized
BS: BS_DEV_INIT times (us): entry 0 run 105711 exit 0
CBMEM region 7fde0000-7fdfffff (cbmem_locate_table)
CBMEM region 7fde0000-7fdfffff (cbmem_check_toc)
CBMEM region 7fde0000-7fdfffff (cbmem_initialize_empty)
Adding CBMEM entry as no. 1
Moving GDT to 7fde0200...ok
POST: 0x76
Finalize devices...
DOMAIN: 0000 final
FspNotify(EnumInitPhaseAfterPciEnumeration)
FSP Post PCI Enumeration ...
Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)
Devices finalized
BS: BS_POST_DEVICE times (us): entry 8827 run 8606 exit 0
POST: 0x77
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 488 exit 0

=== FSP HOB Data Structure ===
FSP Hoblistptr: 0x7fe20000
HOB 0x7fe20000 is an EFI_HOB_TYPE_HANDOFF (type 0x1)
HOB 0x7fe20038 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe20158 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe204f0 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20508 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20518 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20878 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe20920 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20938 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20988 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe209a0 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20b18 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20b30 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20b78 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20b88 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20b98 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20bb0 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe20bc0 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
HOB 0x7fe20bf0 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
HOB 0x7fe20c20 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
HOB 0x7fe20c50 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
HOB 0x7fe20c80 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
HOB 0x7fe20cb0 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe21660 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe238e0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe23910 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe23940 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe23970 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe27988 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe29c20 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29c50 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
HOB 0x7fe29e00 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29e30 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29e60 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29e90 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe29ea8 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29ed8 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29f08 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29f38 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29f68 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29f98 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe29fc8 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe29fd8 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a008 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a038 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a068 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe2a470 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a4a0 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
HOB 0x7fe2a5b0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a5e0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a610 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
HOB 0x7fe2a640 is an EFI_HOB_TYPE_END_OF_HOB_LIST (type 0xffff)
=== End of FSP HOB Data Structure ===

Memory Configure Data Hob at 7fe279a0 (size = 0x2298).
Adding CBMEM entry as no. 2
Copy FSP MRC DATA to HOB (source addr 7fe279a0, dest addr 7fde0400, 8864 bytes)
Updating fast boot cache data.
find_current_mrc_cache_local: No valid fast boot cache found.
SF: Detected MX25L12805D with page size 1000, total 1000000
Need to erase the MRC cache region of 65536 bytes at fff50000
SF: Successfully erased 65536 bytes @ 0xf50000
Write MRC cache update to flash at fff50000
POST: 0x79
POST: 0x9c
Adding CBMEM entry as no. 3
ACPI: Writing ACPI tables at 7fde2800.
ACPI:    * FACS
ACPI:    * DSDT
Adding CBMEM entry as no. 4
Adding CBMEM entry as no. 5
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 2 core(s) each.
Turbo is available but hidden
PSS: 2100MHz power 8 control 0x1500 status 0x1500
PSS: 1800MHz power 0 control 0x1200 status 0x1200
PSS: 1600MHz power 0 control 0x1000 status 0x1000
PSS: 1400MHz power 0 control 0xe00 status 0xe00
PSS: 2100MHz power 8 control 0x1500 status 0x1500
PSS: 1800MHz power 0 control 0x1200 status 0x1200
PSS: 1600MHz power 0 control 0x1000 status 0x1000
PSS: 1400MHz power 0 control 0xe00 status 0xe00
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * MADT
ACPI: added table 4/32, length now 52
current = 7fde4fe0
ACPI:    * HPET
ACPI: added table 5/32, length now 56
ACPI: done.
ACPI tables: 10272 bytes.
Adding CBMEM entry as no. 6
smbios_write_tables: 7fdee000
Root Device (Intel Mohon Peak CRB)
CPU_CLUSTER: 0 (Intel Rangeley Northbridge)
APIC: 00 (Socket rPGA989 CPU)
APIC: acac (unknown)
DOMAIN: 0000 (Intel Rangeley Northbridge)
PCI: 00:00.0 (Intel Rangeley Northbridge)
PCI: 00:01.0 (Intel Rangeley Northbridge)
PCI: 00:02.0 (Intel Rangeley Northbridge)
PCI: 00:03.0 (Intel Rangeley Northbridge)
PCI: 00:04.0 (Intel Rangeley Northbridge)
PCI: 00:0b.0 (Intel Rangeley Southbridge)
PCI: 00:0e.0 (Intel Rangeley Southbridge)
PCI: 00:13.0 (Intel Rangeley Southbridge)
PCI: 00:14.0 (Intel Rangeley Southbridge)
PCI: 00:14.1 (Intel Rangeley Southbridge)
PCI: 00:14.2 (Intel Rangeley Southbridge)
PCI: 00:14.3 (Intel Rangeley Southbridge)
PCI: 00:16.0 (Intel Rangeley Southbridge)
PCI: 00:17.0 (Intel Rangeley Southbridge)
PCI: 00:18.0 (Intel Rangeley Southbridge)
PCI: 00:1f.0 (Intel Rangeley Southbridge)
PCI: 00:1f.3 (Intel Rangeley Southbridge)
PCI: 00:0f.0 (unknown)
APIC: 02 (unknown)
SMBIOS tables: 360 bytes.
POST: 0x9e
POST: 0x9d
Adding CBMEM entry as no. 7
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 97ff
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0x7fdee800
rom_table_end = 0x7fdee800
... aligned to 0x7fdf0000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000007fddffff: RAM
 4. 000000007fde0000-000000007fdfffff: CONFIGURATION TABLES
 5. 00000000e0000000-00000000efffffff: RESERVED
 6. 00000000fee00000-00000000fee00fff: RESERVED
 7. 0000000100000000-000000017fffffff: RAM
Wrote coreboot table at: 7fdee800, 0x1b4 bytes, checksum ca3b
coreboot table: 460 bytes.
FREE SPACE  0. 7fdf6800 00009800
GDT         1. 7fde0200 00000200
MRC DATA    2. 7fde0400 00002400
ACPI        3. 7fde2800 0000b400
ACPI GNVS   4. 7fdedc00 00000200
GNVS PTR    5. 7fdede00 00000200
SMBIOS      6. 7fdee000 00000800
COREBOOT    7. 7fdee800 00008000
FspNotify(EnumInitPhaseReadyToBoot)
FSP Header Version: 1
FSP Revision: 1.64
FSP Ready To Boot ...
Detected 2 CPU threads
============= PEIM FSP is Completed =============

Returned from FspNotify(EnumInitPhaseReadyToBoot)
BS: BS_WRITE_TABLES times (us): entry 333638 run 136559 exit 0
POST: 0x7a
CBFS: located payload @ ffe15d78, 20861 bytes.
Loading segment from rom address 0xffe15d78
  code (compression=1)
  New segment dstaddr 0x100000 memsize 0x11de80 srcaddr 0xffe15dcc filesize 0x50fb
  (cleaned up) New segment addr 0x100000 size 0x11de80 offset 0xffe15dcc filesize 0x50fb
Loading segment from rom address 0xffe15d94
  data (compression=1)
  New segment dstaddr 0x21de80 memsize 0x48 srcaddr 0xffe1aec7 filesize 0x2e
  (cleaned up) New segment addr 0x21de80 size 0x48 offset 0xffe1aec7 filesize 0x2e
Loading segment from rom address 0xffe15db0
  Entry Point 0x00100000
Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000011de80 filesz: 0x00000000000050fb
Post relocation: addr: 0x000000007fc82000 memsz: 0x000000000011de80 filesz: 0x00000000000050fb
using LZMA
Clearing Segment: addr: 0x000000007fc8ddb4 memsz: 0x00000000001120cc
dest 7fc82000, end 7fd9fe80, bouncebuffer 7fc82000
move suffix around: from 7fcc2030, to 140030, amount: dde50
Loading Segment: addr: 0x000000000021de80 memsz: 0x0000000000000048 filesz: 0x000000000000002e
Post relocation: addr: 0x000000000021de80 memsz: 0x0000000000000048 filesz: 0x000000000000002e
using LZMA
dest 0021de80, end 0021dec8, bouncebuffer 7fc82000
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 56162 exit 0
POST: 0x7b
TCO Watchdog disabled
Jumping to boot code at 00100000
POST: 0xf8
miles lives!
Trying bootkernel 1...
Meraki-build (bootkernel) is T-202215M-g33fff5bf-jdizzle
Using itb config config@1 (main config)
Description: Linux kernel
Found Linux version 3.18.24 (jdizzle@x) #3 SMP Fri Apr 29 11:47:35 PDT 2016 relocatable bzImage.
Loading kernel... ok
Jumping to entry point...