Last active
June 19, 2024 09:09
-
-
Save hansemro/0a3e30c9035564ae459622529e3c92d4 to your computer and use it in GitHub Desktop.
[openXC7] RAMB36E1 INIT test
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# clk_p_i | |
set_property LOC AD12 [get_ports {clk_p_i}] | |
set_property IOSTANDARD LVDS [get_ports {clk_p_i}] | |
# clk_n_i | |
set_property LOC AD11 [get_ports {clk_n_i}] | |
set_property IOSTANDARD LVDS [get_ports {clk_n_i}] | |
# rst_i | |
set_property LOC G12 [get_ports {rst_i}] | |
set_property IOSTANDARD LVCMOS25 [get_ports {rst_i}] | |
# led[0] | |
set_property LOC AB8 [get_ports {q_o[0]}] | |
set_property IOSTANDARD LVCMOS15 [get_ports {q_o[0]}] | |
# led[1] | |
set_property LOC AA8 [get_ports {q_o[1]}] | |
set_property IOSTANDARD LVCMOS15 [get_ports {q_o[1]}] | |
# led[2] | |
set_property LOC AC9 [get_ports {q_o[2]}] | |
set_property IOSTANDARD LVCMOS15 [get_ports {q_o[2]}] | |
# led[3] | |
set_property LOC AB9 [get_ports {q_o[3]}] | |
set_property IOSTANDARD LVCMOS15 [get_ports {q_o[3]}] | |
# led[4] | |
set_property LOC AE26 [get_ports {q_o[4]}] | |
set_property IOSTANDARD LVCMOS25 [get_ports {q_o[4]}] | |
# led[5] | |
set_property LOC G19 [get_ports {q_o[5]}] | |
set_property IOSTANDARD LVCMOS25 [get_ports {q_o[5]}] | |
# led[6] | |
set_property LOC E18 [get_ports {q_o[6]}] | |
set_property IOSTANDARD LVCMOS25 [get_ports {q_o[6]}] | |
# led[7] | |
set_property LOC F16 [get_ports {q_o[7]}] | |
set_property IOSTANDARD LVCMOS25 [get_ports {q_o[7]}] |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
PROJECT = top | |
TOP = top | |
TOP_VERILOG = top.v | |
ADDITIONAL_SOURCES = | |
# Target Platform | |
FAMILY = kintex7 | |
PART = xc7k325tffg900-2 | |
BOARD = kc705 | |
XDC ?= kc705.xdc | |
CHIPDB ?= ./chipdb | |
#JTAG_LINK ?= | |
include ./openXC7.mk |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
NEXTPNR_XILINX_DIR ?= /snap/openxc7/current/opt/nextpnr-xilinx | |
NEXTPNR_XILINX_PYTHON_DIR ?= ${NEXTPNR_XILINX_DIR}/python | |
PRJXRAY_DB_DIR ?= ${NEXTPNR_XILINX_DIR}/external/prjxray-db | |
DBPART = $(shell echo ${PART} | sed -e 's/-[0-9]//g') | |
SPEEDGRADE = $(shell echo ${PART} | sed -e 's/.*\-\([0-9]\)/\1/g') | |
CHIPDB ?= ../chipdb/ | |
PYPY3 ?= pypy3 | |
TOP ?= ${PROJECT} | |
TOP_MODULE ?= ${TOP} | |
PNR_DEBUG ?= # --verbose --debug | |
BOARD ?= UNKNOWN | |
JTAG_LINK ?= --board ${BOARD} | |
XDC ?= ${PROJECT}.xdc | |
.PHONY: all | |
all: ${PROJECT}.bit | |
.PHONY: program | |
program: ${PROJECT}.bit | |
openFPGALoader ${JTAG_LINK} --bitstream $< | |
${PROJECT}.json: ${TOP}.v ${ADDITIONAL_SOURCES} | |
yosys ${YOSYS_OPTS} -p "synth_xilinx -flatten -abc9 ${SYNTH_OPTS} -arch xc7 -top ${TOP_MODULE}; write_json ${PROJECT}.json" $< ${ADDITIONAL_SOURCES} | |
# The chip database only needs to be generated once | |
# that is why we don't clean it with make clean | |
${CHIPDB}/${DBPART}.bin: | |
${PYPY3} ${NEXTPNR_XILINX_PYTHON_DIR}/bbaexport.py --device ${PART} --bba ${DBPART}.bba | |
mkdir -p $(CHIPDB) && bbasm -l ${DBPART}.bba ${CHIPDB}/${DBPART}.bin | |
rm -f ${DBPART}.bba | |
${PROJECT}.pack.json: ${PROJECT}.json ${CHIPDB}/${DBPART}.bin ${XDC} | |
nextpnr-xilinx --chipdb ${CHIPDB}/${DBPART}.bin --xdc ${XDC} --json ${PROJECT}.json --pack-only --write $@ ${PNR_ARGS} ${PNR_DEBUG} | |
${PROJECT}.place.json: ${PROJECT}.pack.json | |
nextpnr-xilinx --chipdb ${CHIPDB}/${DBPART}.bin --xdc ${XDC} --no-pack --no-route --json $^ --write $@ ${PNR_ARGS} ${PNR_DEBUG} | |
${PROJECT}.fasm: ${PROJECT}.place.json | |
nextpnr-xilinx --chipdb ${CHIPDB}/${DBPART}.bin --xdc ${XDC} --no-pack --no-place --json $^ --fasm $@ --write ${PROJECT}.route.json ${PNR_ARGS} ${PNR_DEBUG} | |
${PROJECT}.frames: ${PROJECT}.fasm | |
fasm2frames --part ${PART} --db-root ${PRJXRAY_DB_DIR}/${FAMILY} $< > $@ | |
${PROJECT}.bit: ${PROJECT}.frames | |
xc7frames2bit --part_file ${PRJXRAY_DB_DIR}/${FAMILY}/${PART}/part.yaml --part_name ${PART} --frm_file $< --output_file $@ | |
.PHONY: clean | |
clean: | |
@rm -f *.bit | |
@rm -f *.frames | |
@rm -f *.fasm | |
@rm -f *.json | |
.PHONY: pnrclean | |
pnrclean: | |
rm *.fasm *.frames *.bit |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
CLBLM_R_X53Y298.SLICEM_X0.CFF.ZINI | |
CLBLM_R_X53Y298.SLICEM_X0.CFF.ZRST | |
CLBLM_R_X53Y298.SLICEM_X0.CFFMUX.CX | |
CLBLM_R_X53Y298.SLICEM_X0.FFSYNC | |
CLBLM_R_X53Y298.SLICEM_X0.NOCLKINV | |
CLBLM_R_X53Y298.SLICEL_X1.NOCLKINV | |
CLBLL_L_X20Y218.SLICEL_X0.NOCLKINV | |
CLBLL_L_X20Y218.SLICEL_X1.DFF.ZINI | |
CLBLL_L_X20Y218.SLICEL_X1.DFF.ZRST | |
CLBLL_L_X20Y218.SLICEL_X1.DFFMUX.DX | |
CLBLL_L_X20Y218.SLICEL_X1.FFSYNC | |
CLBLL_L_X20Y218.SLICEL_X1.NOCLKINV | |
CLBLM_R_X33Y211.SLICEM_X0.CFF.ZINI | |
CLBLM_R_X33Y211.SLICEM_X0.CFF.ZRST | |
CLBLM_R_X33Y211.SLICEM_X0.CFFMUX.CX | |
CLBLM_R_X33Y211.SLICEM_X0.FFSYNC | |
CLBLM_R_X33Y211.SLICEM_X0.NOCLKINV | |
CLBLM_R_X33Y211.SLICEL_X1.NOCLKINV | |
CLBLM_R_X85Y98.SLICEL_X1.BOUTMUX.B5Q | |
CLBLM_R_X85Y98.SLICEM_X0.NOCLKINV | |
CLBLM_R_X85Y98.SLICEL_X1.B5FF.ZINI | |
CLBLM_R_X85Y98.SLICEL_X1.B5FF.ZRST | |
CLBLM_R_X85Y98.SLICEL_X1.B5FFMUX.IN_B | |
CLBLM_R_X85Y98.SLICEL_X1.FFSYNC | |
CLBLM_R_X85Y98.SLICEL_X1.NOCLKINV | |
CLBLL_L_X76Y97.SLICEL_X0.DFF.ZINI | |
CLBLL_L_X76Y97.SLICEL_X0.DFF.ZRST | |
CLBLL_L_X76Y97.SLICEL_X0.DFFMUX.DX | |
CLBLL_L_X76Y97.SLICEL_X0.FFSYNC | |
CLBLL_L_X76Y97.SLICEL_X0.NOCLKINV | |
CLBLL_L_X76Y97.SLICEL_X1.NOCLKINV | |
CLBLL_L_X88Y97.SLICEL_X0.BOUTMUX.B5Q | |
CLBLL_L_X88Y97.SLICEL_X0.B5FF.ZINI | |
CLBLL_L_X88Y97.SLICEL_X0.B5FF.ZRST | |
CLBLL_L_X88Y97.SLICEL_X0.B5FFMUX.IN_B | |
CLBLL_L_X88Y97.SLICEL_X0.FFSYNC | |
CLBLL_L_X88Y97.SLICEL_X0.NOCLKINV | |
CLBLL_L_X88Y97.SLICEL_X1.NOCLKINV | |
CLBLM_R_X85Y93.SLICEM_X0.BFF.ZINI | |
CLBLM_R_X85Y93.SLICEM_X0.BFF.ZRST | |
CLBLM_R_X85Y93.SLICEM_X0.BFFMUX.BX | |
CLBLM_R_X85Y93.SLICEM_X0.FFSYNC | |
CLBLM_R_X85Y93.SLICEM_X0.NOCLKINV | |
CLBLM_R_X85Y93.SLICEL_X1.NOCLKINV | |
CLBLM_R_X67Y57.SLICEL_X1.BOUTMUX.B5Q | |
CLBLM_R_X67Y57.SLICEM_X0.NOCLKINV | |
CLBLM_R_X67Y57.SLICEL_X1.B5FF.ZINI | |
CLBLM_R_X67Y57.SLICEL_X1.B5FF.ZRST | |
CLBLM_R_X67Y57.SLICEL_X1.B5FFMUX.IN_B | |
CLBLM_R_X67Y57.SLICEL_X1.FFSYNC | |
CLBLM_R_X67Y57.SLICEL_X1.NOCLKINV | |
RIOB18_X95Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL12_SSTL135_SSTL15.IN_ONLY | |
RIOB18_X95Y75.IOB_Y1.PULLTYPE.NONE | |
RIOB18_X95Y75.IOB_Y0.LVDS_SSTL12_SSTL135_SSTL15.IN_DIFF | |
RIOB18_X95Y75.IOB_Y0.LVDS.IN_USE | |
RIOB18_X95Y75.IOB_Y0.LVDS.IN_ONLY | |
RIOB18_X95Y75.IOB_Y0.PULLTYPE.NONE | |
RIOB18_X95Y95.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 | |
RIOB18_X95Y95.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW | |
RIOB18_X95Y95.IOB_Y1.PULLTYPE.NONE | |
RIOB18_X95Y95.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 | |
RIOB18_X95Y95.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW | |
RIOB18_X95Y95.IOB_Y0.PULLTYPE.NONE | |
RIOB18_X95Y93.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 | |
RIOB18_X95Y93.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW | |
RIOB18_X95Y93.IOB_Y1.PULLTYPE.NONE | |
RIOB18_X95Y93.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 | |
RIOB18_X95Y93.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW | |
RIOB18_X95Y93.IOB_Y0.PULLTYPE.NONE | |
LIOB33_SING_X0Y50.IOB_Y0.LVCMOS25.DRIVE.I12 | |
LIOB33_SING_X0Y50.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW | |
LIOB33_SING_X0Y50.IOB_Y0.PULLTYPE.NONE | |
LIOB33_SING_X0Y299.IOB_Y1.LVCMOS25.DRIVE.I12 | |
LIOB33_SING_X0Y299.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW | |
LIOB33_SING_X0Y299.IOB_Y1.PULLTYPE.NONE | |
LIOB33_SING_X0Y250.IOB_Y0.LVCMOS25.DRIVE.I12 | |
LIOB33_SING_X0Y250.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW | |
LIOB33_SING_X0Y250.IOB_Y0.PULLTYPE.NONE | |
LIOB33_SING_X0Y300.IOB_Y0.LVCMOS25.DRIVE.I12 | |
LIOB33_SING_X0Y300.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW | |
LIOB33_SING_X0Y300.IOB_Y0.PULLTYPE.NONE | |
HCLK_IOI_X235Y78.ONLY_DIFF_IN_USE | |
BRAM_L_X80Y340.BRAM_FIFO36_CLKARDCLKL.BRAM_CLK0_3 | |
INT_R_X81Y343.GCLK_B0_WEST.GCLK_B0 | |
HCLK_R_X196Y338.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 | |
CLK_BUFG_REBUF_X121Y325.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT | |
CLK_BUFG_REBUF_X121Y298.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT | |
BRAM_L_X74Y100.BRAM_FIFO36_CLKARDCLKU.BRAM_CLK1_3 | |
BRAM_L_X74Y100.BRAM_FIFO36_CLKARDCLKL.BRAM_CLK0_3 | |
HCLK_R_X182Y130.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK0 | |
CLK_HROW_BOT_R_X121Y130.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 | |
CLK_HROW_BOT_R_X121Y130.BUFHCE.BUFHCE_X1Y0.IN_USE | |
CLK_HROW_BOT_R_X121Y130.BUFHCE.BUFHCE_X1Y0.ZINV_CE | |
CLK_HROW_BOT_R_X121Y130.CLK_HROW_CK_MUX_OUT_R0.CLK_HROW_R_CK_GCLK4 | |
CLBLM_R_X53Y298.CLBLM_M_CLK.CLBLM_CLK1 | |
CLK_HROW_TOP_R_X121Y338.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 | |
INT_R_X53Y298.CLK1.GCLK_B0_EAST | |
INT_R_X53Y298.GCLK_B0_EAST.GCLK_B0 | |
HCLK_R_X129Y286.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 | |
CLK_HROW_TOP_R_X121Y286.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 | |
INT_L_X74Y103.CLK_L0.GCLK_L_B0 | |
CLK_HROW_TOP_R_X121Y286.BUFHCE.BUFHCE_X1Y0.IN_USE | |
CLK_HROW_TOP_R_X121Y286.BUFHCE.BUFHCE_X1Y0.ZINV_CE | |
HCLK_R_X215Y78.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 | |
INT_R_X85Y93.CLK1.GCLK_B0_EAST | |
HCLK_R_X162Y78.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK0 | |
CLK_HROW_BOT_R_X121Y78.CLK_HROW_CK_MUX_OUT_R0.CLK_HROW_R_CK_GCLK4 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_CK_GCLK4.CLK_BUFG_BUFGCTRL4_O | |
INT_R_X85Y98.GCLK_B0_EAST.GCLK_B0 | |
HCLK_R_X187Y78.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 | |
INT_L_X20Y218.CLK_L0.GCLK_L_B0 | |
CLK_BUFG_REBUF_X121Y142.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP | |
INT_R_X67Y57.GCLK_B0_EAST.GCLK_B0 | |
INT_L_X80Y343.CLK_L0.GCLK_L_B0 | |
CLBLM_R_X85Y93.CLBLM_M_CLK.CLBLM_CLK1 | |
INT_L_X76Y97.CLK_L1.GCLK_L_B0 | |
HCLK_R_X83Y234.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK0 | |
CLBLL_L_X20Y218.CLBLL_L_CLK.CLBLL_CLK0 | |
INT_R_X77Y97.GCLK_B0_WEST.GCLK_B0 | |
BRAM_L_X80Y340.BRAM_FIFO36_CLKARDCLKU.BRAM_CLK1_3 | |
CLBLM_R_X85Y98.CLBLM_L_CLK.CLBLM_CLK0 | |
CLBLL_L_X76Y97.CLBLL_LL_CLK.CLBLL_CLK1 | |
CLK_HROW_BOT_R_X121Y78.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 | |
INT_R_X85Y98.CLK0.GCLK_B0_EAST | |
INT_L_X74Y103.CLK_L1.GCLK_L_B0 | |
CLK_HROW_BOT_R_X121Y78.BUFHCE.BUFHCE_X1Y0.IN_USE | |
CLK_HROW_BOT_R_X121Y78.BUFHCE.BUFHCE_X1Y0.ZINV_CE | |
INT_L_X80Y343.CLK_L1.GCLK_L_B0 | |
CLK_BUFG_REBUF_X121Y169.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP | |
CLK_BUFG_REBUF_X121Y194.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP | |
CLK_BUFG_REBUF_X121Y117.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP | |
INT_R_X21Y218.GCLK_B0_WEST.GCLK_B0 | |
HCLK_R_X206Y78.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 | |
CLK_BUFG_REBUF_X121Y273.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT | |
INT_L_X88Y97.CLK_L1.GCLK_L_B0 | |
CLBLL_L_X88Y97.CLBLL_LL_CLK.CLBLL_CLK1 | |
INT_R_X33Y211.CLK1.GCLK_B0_EAST | |
INT_R_X85Y93.GCLK_B0_EAST.GCLK_B0 | |
INT_R_X67Y57.CLK0.GCLK_B0_EAST | |
CLK_HROW_TOP_R_X121Y234.BUFHCE.BUFHCE_X0Y0.IN_USE | |
CLK_HROW_TOP_R_X121Y234.BUFHCE.BUFHCE_X0Y0.ZINV_CE | |
CLK_BUFG_REBUF_X121Y90.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP | |
CLBLM_R_X67Y57.CLBLM_L_CLK.CLBLM_CLK0 | |
CLK_HROW_TOP_R_X121Y338.BUFHCE.BUFHCE_X1Y0.IN_USE | |
CLK_HROW_TOP_R_X121Y338.BUFHCE.BUFHCE_X1Y0.ZINV_CE | |
CLK_BUFG_REBUF_X121Y221.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT | |
CLK_HROW_TOP_R_X121Y338.CLK_HROW_CK_MUX_OUT_R0.CLK_HROW_R_CK_GCLK4 | |
CLK_HROW_TOP_R_X121Y234.CLK_HROW_CK_MUX_OUT_L0.CLK_HROW_R_CK_GCLK4 | |
CLK_HROW_TOP_R_X121Y234.CLK_HROW_CK_BUFHCLK_L0.CLK_HROW_CK_HCLK_OUT_L0 | |
INT_R_X89Y97.GCLK_B0_WEST.GCLK_B0 | |
CLK_HROW_TOP_R_X121Y286.CLK_HROW_CK_MUX_OUT_R0.CLK_HROW_R_CK_GCLK4 | |
INT_R_X33Y211.GCLK_B0_EAST.GCLK_B0 | |
INT_R_X75Y103.GCLK_B0_WEST.GCLK_B0 | |
CLBLM_R_X33Y211.CLBLM_M_CLK.CLBLM_CLK1 | |
HCLK_R_X56Y234.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK0 | |
CLK_BUFG_REBUF_X121Y246.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT | |
CLBLM_R_X85Y98.CLBLM_L_BX.CLBLM_BYP5 | |
INT_R_X85Y98.BYP5.BYP_ALT5 | |
INT_L_X84Y98.ER1BEG1.EE2END0 | |
INT_R_X85Y98.BYP_ALT5.ER1END1 | |
BRAM_INT_INTERFACE_L_X74Y100.INT_INTERFACE_LOGIC_OUTS_L8.INT_INTERFACE_LOGIC_OUTS_L_B8 | |
INT_L_X82Y98.EE2BEG0.EE4END0 | |
INT_L_X74Y98.EE4BEG0.SS2END0 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B8_0.BRAM_FIFO36_DOADOL0 | |
INT_L_X78Y98.EE4BEG0.EE4END0 | |
INT_L_X74Y100.SS2BEG0.LOGIC_OUTS_L8 | |
RIOI_X95Y95.RIOI_O1.RIOI_OLOGIC1_OQ | |
RIOI_X95Y95.IOI_OLOGIC1_D1.IOI_IMUX34_0 | |
INT_R_X95Y95.IMUX34.BYP_BOUNCE0 | |
INT_R_X95Y95.BYP_ALT0.WR1END0 | |
CLBLM_R_X85Y98.CLBLM_LOGIC_OUTS17.CLBLM_L_BMUX | |
INT_R_X95Y95.BYP_BOUNCE0.BYP_ALT0 | |
INT_R_X91Y94.EE4BEG3.EE4END3 | |
RIOI_X95Y95.OLOGIC_Y1.OMUX.D1 | |
RIOI_X95Y95.OLOGIC_Y1.OQUSED | |
RIOI_X95Y95.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF | |
INT_R_X95Y94.ER1BEG_S0.EE4END3 | |
INT_R_X87Y94.EE4BEG3.SE6END3 | |
INT_R_X85Y98.SE6BEG3.LOGIC_OUTS17 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B15_2.BRAM_FIFO36_DOADOU0 | |
BRAM_INT_INTERFACE_L_X74Y102.INT_INTERFACE_LOGIC_OUTS_L15.INT_INTERFACE_LOGIC_OUTS_L_B15 | |
INT_L_X74Y102.SE6BEG3.LOGIC_OUTS_L15 | |
INT_L_X76Y98.SL1BEG3.SE6END3 | |
INT_L_X76Y97.BYP_ALT6.SL1END3 | |
INT_L_X76Y97.BYP_L6.BYP_ALT6 | |
CLBLL_L_X76Y97.CLBLL_LL_DX.CLBLL_BYP6 | |
CLBLL_L_X76Y97.CLBLL_LOGIC_OUTS7.CLBLL_LL_DQ | |
INT_L_X76Y97.SS2BEG3.LOGIC_OUTS_L7 | |
INT_R_X95Y95.BYP_ALT6.WR1END3 | |
RIOI_X95Y95.RIOI_O0.RIOI_OLOGIC0_OQ | |
RIOI_X95Y95.OLOGIC_Y0.OMUX.D1 | |
RIOI_X95Y95.OLOGIC_Y0.OQUSED | |
RIOI_X95Y95.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF | |
INT_L_X92Y95.EE4BEG3.LH0 | |
INT_L_X80Y95.LH12.EE4END3 | |
RIOI_X95Y95.IOI_OLOGIC0_D1.IOI_IMUX34_1 | |
INT_R_X95Y96.IMUX34.BYP_BOUNCE_N3_6 | |
INT_R_X95Y95.ER1BEG3.WW4END3 | |
INT_R_X95Y95.BYP_BOUNCE6.BYP_ALT6 | |
INT_L_X76Y95.EE4BEG3.SS2END3 | |
CLBLM_R_X85Y93.CLBLM_M_BX.CLBLM_BYP4 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B13_0.BRAM_FIFO36_DOADOL1 | |
INT_R_X85Y93.BYP4.BYP_ALT4 | |
INT_R_X85Y93.BYP_ALT4.SE2END1 | |
INT_L_X74Y100.SS6BEG1.LOGIC_OUTS_L13 | |
INT_L_X84Y94.SE2BEG1.EE2END1 | |
INT_L_X82Y94.EE2BEG1.EE4END1 | |
INT_L_X78Y94.EE4BEG1.EE4END1 | |
BRAM_INT_INTERFACE_L_X74Y100.INT_INTERFACE_LOGIC_OUTS_L13.INT_INTERFACE_LOGIC_OUTS_L_B13 | |
INT_L_X74Y94.EE4BEG1.SS6END1 | |
INT_R_X89Y93.EE4BEG1.EE4END1 | |
INT_R_X93Y93.EE2BEG1.EE4END1 | |
INT_R_X95Y93.IMUX34.EE2END1 | |
RIOI_TBYTESRC_X95Y93.RIOI_O1.RIOI_OLOGIC1_OQ | |
INT_R_X85Y93.EE4BEG1.LOGIC_OUTS5 | |
RIOI_TBYTESRC_X95Y93.OLOGIC_Y1.OMUX.D1 | |
RIOI_TBYTESRC_X95Y93.OLOGIC_Y1.OQUSED | |
RIOI_TBYTESRC_X95Y93.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF | |
CLBLM_R_X85Y93.CLBLM_LOGIC_OUTS5.CLBLM_M_BQ | |
RIOI_TBYTESRC_X95Y93.IOI_OLOGIC1_D1.IOI_IMUX34_0 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B8_3.BRAM_FIFO36_DOADOU1 | |
BRAM_INT_INTERFACE_L_X74Y103.INT_INTERFACE_LOGIC_OUTS_L8.INT_INTERFACE_LOGIC_OUTS_L_B8 | |
CLBLL_L_X88Y97.CLBLL_LL_BX.CLBLL_BYP4 | |
INT_L_X88Y97.BYP_BOUNCE1.BYP_ALT1 | |
INT_L_X86Y97.EE2BEG0.EE4END0 | |
INT_L_X88Y97.BYP_L4.BYP_ALT4 | |
INT_L_X88Y97.BYP_ALT1.EE2END0 | |
INT_L_X88Y97.BYP_ALT4.BYP_BOUNCE1 | |
INT_L_X82Y97.EE4BEG0.EE4END0 | |
INT_L_X74Y97.EE4BEG0.SS6END0 | |
INT_L_X78Y97.EE4BEG0.EE4END0 | |
INT_L_X74Y103.SS6BEG0.LOGIC_OUTS_L8 | |
INT_R_X95Y94.IMUX34.WR1END1 | |
INT_L_X90Y93.EE4BEG3.SE6END3 | |
INT_R_X95Y94.ER1BEG1.ER1END0 | |
RIOI_TBYTESRC_X95Y93.OLOGIC_Y0.OMUX.D1 | |
RIOI_TBYTESRC_X95Y93.OLOGIC_Y0.OQUSED | |
RIOI_TBYTESRC_X95Y93.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF | |
INT_L_X94Y93.ER1BEG_S0.EE4END3 | |
RIOI_TBYTESRC_X95Y93.IOI_OLOGIC0_D1.IOI_IMUX34_1 | |
RIOI_TBYTESRC_X95Y93.RIOI_O0.RIOI_OLOGIC0_OQ | |
INT_L_X88Y97.SE6BEG3.LOGIC_OUTS_L21 | |
CLBLL_L_X88Y97.CLBLL_LOGIC_OUTS21.CLBLL_LL_BMUX | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B10_0.BRAM_FIFO36_DOADOL2 | |
INT_L_X74Y100.WW4BEG2.LOGIC_OUTS_L10 | |
INT_L_X68Y96.SS6BEG1.SW6END1 | |
INT_R_X67Y57.BYP5.BYP_ALT5 | |
CLBLM_R_X67Y57.CLBLM_L_BX.CLBLM_BYP5 | |
INT_L_X68Y66.SS6BEG1.SS6END1 | |
BRAM_INT_INTERFACE_L_X74Y100.INT_INTERFACE_LOGIC_OUTS_L10.INT_INTERFACE_LOGIC_OUTS_L_B10 | |
INT_L_X70Y100.SW6BEG1.WW4END2 | |
INT_L_X68Y78.SS6BEG1.SS6END1 | |
INT_R_X67Y57.BYP_ALT5.SW2END1 | |
INT_L_X68Y72.SS6BEG1.SS6END1 | |
INT_L_X68Y84.SS6BEG1.SS6END1 | |
INT_L_X68Y58.SW2BEG1.SS2END1 | |
INT_L_X68Y60.SS2BEG1.SS6END1 | |
INT_L_X68Y90.SS6BEG1.SS6END1 | |
CLBLM_R_X67Y57.CLBLM_LOGIC_OUTS17.CLBLM_L_BMUX | |
INT_R_X55Y51.LH0.LH12 | |
INT_R_X67Y51.LH0.SS6END3 | |
INT_R_X43Y51.LH0.LH12 | |
INT_R_X7Y51.LH0.LH12 | |
INT_L_X4Y51.WW4BEG3.LH0 | |
INT_R_X19Y51.LH0.LH12 | |
LIOI3_SING_X0Y50.OLOGIC_Y0.OMUX.D1 | |
LIOI3_SING_X0Y50.OLOGIC_Y0.OQUSED | |
LIOI3_SING_X0Y50.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF | |
LIOI3_SING_X0Y50.LIOI_O0.LIOI_OLOGIC0_OQ | |
INT_L_X0Y50.IMUX_L34.EL1END1 | |
INT_R_X67Y57.SS6BEG3.LOGIC_OUTS17 | |
INT_L_X0Y50.WL1BEG1.SE2END2 | |
INT_L_X0Y51.SW2BEG2.WW4END3 | |
INT_R_X31Y51.LH0.LH12 | |
BRAM_INT_INTERFACE_L_X74Y103.INT_INTERFACE_LOGIC_OUTS_L13.INT_INTERFACE_LOGIC_OUTS_L_B13 | |
INT_L_X74Y103.NW6BEG1.LOGIC_OUTS_L13 | |
INT_L_X72Y107.NW6BEG1.NW6END1 | |
INT_L_X70Y111.NW6BEG1.NW6END1 | |
INT_L_X50Y151.NW6BEG1.NW6END1 | |
INT_L_X34Y191.NN6BEG1.NN6END1 | |
INT_L_X48Y155.NW6BEG1.NW6END1 | |
INT_L_X42Y167.WW4BEG1.NW6END1 | |
CLBLM_R_X33Y211.CLBLM_M_CX.CLBLM_BYP3 | |
INT_L_X54Y143.NW6BEG1.NW6END1 | |
INT_R_X33Y210.NL1BEG0.NW2END1 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B13_3.BRAM_FIFO36_DOADOU2 | |
INT_L_X34Y209.NW2BEG1.NN6END1 | |
INT_L_X34Y197.NN6BEG1.NN6END1 | |
INT_R_X33Y211.NL1BEG_N3.NL1END0 | |
INT_L_X52Y147.NW6BEG1.NW6END1 | |
INT_L_X66Y119.NW6BEG1.NW6END1 | |
INT_R_X33Y211.BYP3.BYP_ALT3 | |
INT_L_X34Y179.NN6BEG1.NN6END1 | |
INT_L_X34Y173.NN6BEG1.NN6END1 | |
INT_L_X34Y167.NN6BEG1.WW4END1 | |
INT_R_X33Y211.BYP_ALT3.NL1BEG_N3 | |
INT_L_X38Y167.WW4BEG1.WW4END1 | |
INT_L_X44Y163.NW6BEG1.NW6END1 | |
INT_L_X56Y139.NW6BEG1.NW6END1 | |
INT_L_X46Y159.NW6BEG1.NW6END1 | |
INT_L_X58Y135.NW6BEG1.NW6END1 | |
INT_L_X62Y127.NW6BEG1.NW6END1 | |
INT_L_X68Y115.NW6BEG1.NW6END1 | |
INT_L_X34Y185.NN6BEG1.NN6END1 | |
INT_L_X60Y131.NW6BEG1.NW6END1 | |
INT_L_X34Y203.NN6BEG1.NN6END1 | |
INT_L_X64Y123.NW6BEG1.NW6END1 | |
CLBLM_R_X33Y211.CLBLM_LOGIC_OUTS6.CLBLM_M_CQ | |
INT_R_X33Y211.NW6BEG2.LOGIC_OUTS6 | |
INT_R_X13Y257.NW6BEG2.NW6END2 | |
INT_R_X1Y299.WW2BEG1.NN2END2 | |
INT_R_X1Y297.NN2BEG2.NN2END2 | |
LIOI3_SING_X0Y299.OLOGIC_Y1.OMUX.D1 | |
LIOI3_SING_X0Y299.OLOGIC_Y1.OQUSED | |
LIOI3_SING_X0Y299.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF | |
INT_R_X1Y295.NN2BEG2.NN6END2 | |
LIOI3_SING_X0Y299.LIOI_O0.LIOI_OLOGIC0_OQ | |
INT_R_X1Y289.NN6BEG2.NN6END2 | |
INT_R_X27Y229.NW6BEG2.NW6END2 | |
INT_R_X31Y215.NW6BEG2.NW6END2 | |
INT_R_X11Y261.NW6BEG2.NW6END2 | |
INT_R_X29Y219.NN6BEG2.NW6END2 | |
INT_R_X1Y271.NN6BEG2.NN6END2 | |
INT_R_X15Y253.NW6BEG2.NW6END2 | |
INT_L_X0Y299.IMUX_L34.EE2END1 | |
INT_R_X23Y237.NW6BEG2.NW6END2 | |
INT_R_X1Y265.NN6BEG2.WW4END2 | |
INT_R_X9Y265.WW4BEG2.NW6END2 | |
INT_R_X29Y225.NW6BEG2.NN6END2 | |
INT_R_X1Y277.NN6BEG2.NN6END2 | |
INT_R_X5Y265.WW4BEG2.WW4END2 | |
INT_R_X17Y249.NW6BEG2.NW6END2 | |
INT_R_X19Y245.NW6BEG2.NW6END2 | |
INT_R_X21Y241.NW6BEG2.NW6END2 | |
INT_R_X1Y283.NN6BEG2.NN6END2 | |
INT_R_X25Y233.NW6BEG2.NW6END2 | |
INT_L_X72Y104.LVB_L0.NW6END3 | |
INT_L_X72Y116.LVB_L0.LVB_L12 | |
INT_L_X40Y218.WW4BEG2.WW4END2 | |
INT_L_X64Y218.WW4BEG2.WW4END2 | |
INT_L_X72Y140.LVB_L0.LVB_L12 | |
INT_L_X22Y218.WR1BEG3.WW2END1 | |
INT_L_X72Y128.LVB_L0.LVB_L12 | |
INT_L_X74Y100.NW6BEG3.LOGIC_OUTS_L15 | |
INT_L_X20Y218.BYP_ALT7.WR1END_S1_0 | |
INT_L_X72Y152.LVB_L0.LVB_L12 | |
INT_L_X36Y218.WW4BEG2.WW4END2 | |
INT_L_X44Y218.WW4BEG2.WW4END2 | |
INT_L_X20Y218.BYP_L7.BYP_ALT7 | |
INT_L_X32Y218.WW4BEG2.WW4END2 | |
CLBLL_L_X20Y218.CLBLL_L_DX.CLBLL_BYP7 | |
INT_L_X68Y218.WW4BEG2.WW4END2 | |
INT_L_X72Y188.LVB_L0.LVB_L12 | |
INT_L_X28Y218.WW4BEG2.WW4END2 | |
INT_L_X48Y218.WW4BEG2.WW4END2 | |
INT_L_X52Y218.WW4BEG2.WW4END2 | |
INT_L_X56Y218.WW4BEG2.WW4END2 | |
INT_L_X60Y218.WW4BEG2.WW4END2 | |
INT_R_X21Y218.WR1BEG_S0.WR1END3 | |
INT_L_X72Y212.NN6BEG2.LVB_L12 | |
BRAM_INT_INTERFACE_L_X74Y100.INT_INTERFACE_LOGIC_OUTS_L15.INT_INTERFACE_LOGIC_OUTS_L_B15 | |
INT_L_X72Y218.WW4BEG2.NN6END2 | |
INT_L_X72Y200.LVB_L0.LVB_L12 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B15_0.BRAM_FIFO36_DOADOL3 | |
INT_L_X72Y176.LVB_L0.LVB_L12 | |
INT_L_X24Y218.WW2BEG1.WW4END2 | |
INT_L_X72Y164.LVB_L0.LVB_L12 | |
INT_L_X18Y222.LVB_L0.NW6END3 | |
INT_L_X18Y234.LVB_L0.LVB_L12 | |
INT_L_X18Y246.NW6BEG2.LVB_L12 | |
INT_L_X16Y250.WW4BEG2.NW6END2 | |
INT_L_X12Y250.WW4BEG2.WW4END2 | |
CLBLL_L_X20Y218.CLBLL_LOGIC_OUTS3.CLBLL_L_DQ | |
LIOI3_SING_X0Y250.LIOI_O0.LIOI_OLOGIC0_OQ | |
INT_L_X0Y250.WL1BEG0.WW4END2 | |
LIOI3_SING_X0Y250.OLOGIC_Y0.OMUX.D1 | |
LIOI3_SING_X0Y250.OLOGIC_Y0.OQUSED | |
LIOI3_SING_X0Y250.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF | |
INT_L_X20Y218.NW6BEG3.LOGIC_OUTS_L3 | |
INT_L_X0Y250.IMUX_L34.BYP_BOUNCE0 | |
INT_L_X0Y250.BYP_BOUNCE0.BYP_ALT0 | |
INT_L_X0Y250.BYP_ALT0.EL1END0 | |
INT_L_X4Y250.WW4BEG2.WW4END2 | |
INT_L_X8Y250.WW4BEG2.WW4END2 | |
BRAM_L_X74Y100.BRAM_LOGIC_OUTS_B10_3.BRAM_FIFO36_DOADOU3 | |
BRAM_INT_INTERFACE_L_X74Y103.INT_INTERFACE_LOGIC_OUTS_L10.INT_INTERFACE_LOGIC_OUTS_L_B10 | |
INT_L_X72Y107.NW6BEG2.NW6END2 | |
INT_L_X66Y119.NW6BEG2.NW6END2 | |
INT_L_X54Y133.NN6BEG2.NN6END2 | |
INT_L_X54Y139.NN6BEG2.NN6END2 | |
INT_L_X54Y145.NN6BEG2.NN6END2 | |
INT_L_X54Y163.NN6BEG2.NN6END2 | |
INT_L_X54Y169.NN6BEG2.NN6END2 | |
INT_L_X54Y289.NN6BEG2.NN6END2 | |
INT_L_X54Y295.NN2BEG2.NN6END2 | |
INT_L_X54Y271.NN6BEG2.NN6END2 | |
INT_L_X54Y298.WR1BEG3.NR1END2 | |
INT_L_X54Y235.NN6BEG2.NN6END2 | |
CLBLM_R_X53Y298.CLBLM_M_CX.CLBLM_BYP3 | |
INT_L_X70Y111.NW6BEG2.NW6END2 | |
INT_L_X60Y123.WW4BEG2.WW4END2 | |
INT_R_X53Y298.BYP_ALT3.WR1END3 | |
INT_L_X54Y265.NN6BEG2.NN6END2 | |
INT_L_X54Y277.NN6BEG2.NN6END2 | |
INT_L_X64Y123.WW4BEG2.NW6END2 | |
INT_L_X54Y229.NN6BEG2.NN6END2 | |
INT_R_X53Y298.BYP3.BYP_ALT3 | |
INT_L_X54Y187.NN6BEG2.NN6END2 | |
INT_L_X54Y259.NN6BEG2.NN6END2 | |
INT_L_X54Y151.NN6BEG2.NN6END2 | |
INT_L_X54Y157.NN6BEG2.NN6END2 | |
INT_L_X54Y175.NN6BEG2.NN6END2 | |
INT_L_X54Y253.NN6BEG2.NN6END2 | |
INT_L_X68Y115.NW6BEG2.NW6END2 | |
INT_L_X54Y217.NN6BEG2.NN6END2 | |
INT_L_X54Y247.NN6BEG2.NN6END2 | |
INT_L_X74Y103.NW6BEG2.LOGIC_OUTS_L10 | |
INT_L_X54Y297.NR1BEG2.NN2END2 | |
INT_L_X54Y241.NN6BEG2.NN6END2 | |
INT_L_X54Y283.NN6BEG2.NN6END2 | |
INT_L_X54Y223.NN6BEG2.NN6END2 | |
INT_L_X54Y205.NN6BEG2.NN6END2 | |
INT_L_X56Y123.NW6BEG2.WW4END2 | |
INT_L_X54Y211.NN6BEG2.NN6END2 | |
INT_L_X54Y127.NN6BEG2.NW6END2 | |
INT_L_X54Y181.NN6BEG2.NN6END2 | |
INT_L_X54Y199.NN6BEG2.NN6END2 | |
INT_L_X54Y193.NN6BEG2.NN6END2 | |
CLBLM_R_X53Y298.CLBLM_LOGIC_OUTS6.CLBLM_M_CQ | |
INT_R_X53Y298.NN2BEG2.LOGIC_OUTS6 | |
INT_R_X53Y300.WW4BEG2.NN2END2 | |
INT_R_X49Y300.WW4BEG2.WW4END2 | |
INT_R_X45Y300.WW4BEG2.WW4END2 | |
INT_R_X41Y300.WW4BEG2.WW4END2 | |
INT_R_X37Y300.WW4BEG2.WW4END2 | |
INT_R_X33Y300.WW4BEG2.WW4END2 | |
LIOI3_SING_X0Y300.OLOGIC_Y0.OMUX.D1 | |
LIOI3_SING_X0Y300.OLOGIC_Y0.OQUSED | |
LIOI3_SING_X0Y300.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF | |
INT_R_X21Y300.WW4BEG2.WW4END2 | |
LIOI3_SING_X0Y300.LIOI_O0.LIOI_OLOGIC0_OQ | |
INT_L_X0Y300.IMUX_L34.EE2END1 | |
INT_R_X1Y300.WW2BEG1.WW4END2 | |
INT_R_X5Y300.WW4BEG2.WW4END2 | |
INT_R_X29Y300.WW4BEG2.WW4END2 | |
INT_R_X25Y300.WW4BEG2.WW4END2 | |
INT_R_X17Y300.WW4BEG2.WW4END2 | |
INT_R_X9Y300.WW4BEG2.WW4END2 | |
INT_R_X13Y300.WW4BEG2.WW4END2 | |
RIOI_X95Y75.ILOGIC_Y0.ZINV_D | |
RIOI_X95Y75.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O | |
CLK_HROW_BOT_R_X121Y78.CLK_HROW_BOT_R_CK_BUFG_CASCO28.CLK_HROW_CK_IN_R12 | |
CLK_HROW_BOT_R_X121Y182.CLK_HROW_BOT_R_CK_BUFG_CASCO28.CLK_HROW_BOT_R_CK_BUFG_CASCIN28 | |
RIOI_X95Y75.RIOI_ILOGIC0_D.RIOI_I0 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_BOT_R_CK_MUXED28 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 | |
CLK_HROW_BOT_R_X121Y130.CLK_HROW_BOT_R_CK_BUFG_CASCO28.CLK_HROW_BOT_R_CK_BUFG_CASCIN28 | |
CLK_HROW_BOT_R_X121Y182.BUFHCE.BUFHCE_X0Y2.IN_USE | |
CLK_HROW_BOT_R_X121Y182.BUFHCE.BUFHCE_X0Y2.ZINV_CE | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_CK_GCLK14.CLK_BUFG_BUFGCTRL14_O | |
INT_R_X49Y197.GCLK_B5_EAST.GCLK_B5 | |
HCLK_R_X119Y182.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK2 | |
CLK_HROW_BOT_R_X121Y182.CLK_HROW_CK_BUFHCLK_L2.CLK_HROW_CK_HCLK_OUT_L2 | |
INT_R_X49Y197.IMUX28.GFAN1 | |
CLK_HROW_BOT_R_X121Y182.CLK_HROW_CK_MUX_OUT_L2.CLK_HROW_R_CK_GCLK14 | |
HCLK_CMT_L_X228Y78.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO0 | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y14.IN_USE | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE1_INVERTED | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE0 | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S0 | |
RIOI_X95Y75.RIOI_I0.RIOI_IBUF0 | |
INT_R_X49Y197.GFAN1.GCLK_B5_EAST | |
CLK_BUFG_REBUF_X121Y194.CLK_BUFG_REBUF_R_CK_GCLK14_BOT.CLK_BUFG_REBUF_R_CK_GCLK14_TOP | |
INT_L_X80Y342.IMUX_L46.GFAN1 | |
INT_L_X80Y342.IMUX_L30.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU6.BRAM_IMUX30_2 | |
INT_L_X80Y342.IMUX_L14.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU5.BRAM_IMUX14_2 | |
INT_L_X80Y342.FAN_ALT1.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU4.BRAM_FAN1_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL6.BRAM_IMUX38_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL4.BRAM_IMUX6_2 | |
INT_L_X80Y342.IMUX_L38.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU7.BRAM_IMUX46_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU6.BRAM_IMUX30_2 | |
INT_L_X74Y102.BYP_ALT6.GFAN1 | |
INT_L_X74Y102.BYP_L6.BYP_ALT6 | |
INT_L_X74Y102.IMUX_L6.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL4.BRAM_IMUX6_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAU0.BRAM_IMUX8_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAL0.BRAM_IMUX16_2 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU12.BRAM_IMUX13_3 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU12.BRAM_IMUX_ADDRARDADDRU12 | |
INT_L_X74Y102.FAN_ALT1.GFAN1 | |
INT_L_X80Y343.IMUX_L21.GFAN1 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL12.BRAM_IMUX21_3 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL12.BRAM_IMUX_ADDRARDADDRL12 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL12.BRAM_ADDRARDADDRL12 | |
INT_L_X80Y341.IMUX_L14.GFAN1 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU11.BRAM_IMUX14_1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL11.BRAM_IMUX_ADDRARDADDRL11 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL11.BRAM_ADDRARDADDRL11 | |
INT_L_X80Y342.IMUX_L12.GFAN1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU10.BRAM_IMUX_ADDRARDADDRU10 | |
INT_L_X80Y342.GFAN1.GND_WIRE | |
INT_L_X80Y342.IMUX_L20.GFAN1 | |
INT_L_X74Y102.FAN_L1.FAN_ALT1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL10.BRAM_IMUX_ADDRARDADDRL10 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL10.BRAM_ADDRARDADDRL10 | |
INT_L_X80Y343.IMUX_L11.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU9.BRAM_ADDRARDADDRU9 | |
INT_L_X80Y343.IMUX_L19.GFAN0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL9.BRAM_IMUX19_3 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL9.BRAM_IMUX_ADDRARDADDRL9 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL9.BRAM_ADDRARDADDRL9 | |
INT_L_X80Y342.IMUX_L25.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAU3.BRAM_IMUX25_2 | |
INT_L_X80Y342.IMUX_L33.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU8.BRAM_ADDRARDADDRU8 | |
INT_L_X80Y341.IMUX_L20.GFAN1 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL8.BRAM_IMUX20_1 | |
INT_L_X80Y342.IMUX_L16.GFAN0 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL8.BRAM_IMUX_ADDRARDADDRL8 | |
INT_L_X80Y342.IMUX_L6.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL8.BRAM_ADDRARDADDRL8 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU8.BRAM_IMUX12_1 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAU2.BRAM_IMUX9_2 | |
INT_L_X80Y342.IMUX_L17.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAL2.BRAM_IMUX17_2 | |
INT_L_X80Y343.IMUX_L9.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU7.BRAM_IMUX46_2 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU7.BRAM_IMUX9_3 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU7.BRAM_IMUX_ADDRARDADDRU7 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL7.BRAM_IMUX17_3 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU9.BRAM_IMUX11_3 | |
INT_L_X80Y342.IMUX_L24.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAU1.BRAM_IMUX24_2 | |
INT_L_X80Y342.GFAN0.GND_WIRE | |
INT_L_X80Y342.IMUX_L32.GFAN0 | |
INT_L_X74Y102.IMUX_L38.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAL1.BRAM_IMUX32_2 | |
INT_L_X80Y341.IMUX_L13.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU4.BRAM_ADDRARDADDRU4 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU7.BRAM_ADDRARDADDRU7 | |
INT_L_X80Y341.IMUX_L21.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU11.BRAM_ADDRARDADDRU11 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL4.BRAM_IMUX21_1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL4.BRAM_ADDRARDADDRL4 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL7.BRAM_IMUX_ADDRARDADDRL7 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU3.BRAM_IMUX10_3 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU3.BRAM_IMUX_ADDRARDADDRU3 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU3.BRAM_ADDRARDADDRU3 | |
INT_L_X80Y343.GFAN0.GND_WIRE | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL11.BRAM_IMUX22_1 | |
INT_L_X80Y343.IMUX_L18.GFAN0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL3.BRAM_IMUX18_3 | |
INT_L_X80Y341.IMUX_L11.GFAN0 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU2.BRAM_IMUX_ADDRARDADDRU2 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL2.BRAM_IMUX19_1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL2.BRAM_IMUX_ADDRARDADDRL2 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL2.BRAM_ADDRARDADDRL2 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL3.BRAM_IMUX_ADDRARDADDRL3 | |
INT_L_X74Y102.IMUX_L32.GFAN0 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU9.BRAM_IMUX_ADDRARDADDRU9 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU4.BRAM_ADDRARDADDRU4 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL4.BRAM_ADDRARDADDRL4 | |
INT_L_X74Y103.IMUX_L10.GFAN0 | |
INT_L_X74Y103.GFAN0.GND_WIRE | |
INT_L_X74Y103.IMUX_L18.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL3.BRAM_ADDRARDADDRL3 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU2.BRAM_IMUX11_1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU2.BRAM_IMUX_ADDRARDADDRU2 | |
INT_L_X74Y101.IMUX_L11.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAL3.BRAM_IMUX33_2 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL10.BRAM_IMUX20_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU12.BRAM_ADDRARDADDRU12 | |
INT_L_X80Y341.GFAN0.GND_WIRE | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL7.BRAM_IMUX_ADDRARDADDRL7 | |
INT_L_X80Y343.IMUX_L13.GFAN1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU1.BRAM_IMUX10_1 | |
INT_L_X80Y341.IMUX_L9.GFAN0 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL1.BRAM_IMUX18_1 | |
INT_L_X80Y341.IMUX_L12.GFAN1 | |
INT_L_X80Y341.IMUX_L18.GFAN0 | |
INT_L_X74Y101.IMUX_L9.GFAN0 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU4.BRAM_IMUX13_1 | |
INT_L_X74Y102.IMUX_L46.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAL1.BRAM_IMUX32_2 | |
INT_L_X74Y102.IMUX_L22.GFAN1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU0.BRAM_IMUX9_1 | |
INT_L_X74Y102.IMUX_L16.GFAN0 | |
INT_L_X74Y102.IMUX_L14.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL5.BRAM_IMUX22_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU0.BRAM_ADDRARDADDRU0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU4.BRAM_IMUX13_1 | |
INT_L_X74Y103.IMUX_L21.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU3.BRAM_ADDRARDADDRU3 | |
INT_L_X74Y101.GFAN0.GND_WIRE | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL4.BRAM_IMUX21_1 | |
INT_L_X74Y102.IMUX_L20.GFAN1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU13.BRAM_IMUX_ADDRARDADDRU13 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL4.BRAM_IMUX_ADDRARDADDRL4 | |
INT_L_X80Y341.IMUX_L19.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU1.BRAM_ADDRARDADDRU1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU9.BRAM_IMUX_ADDRARDADDRU9 | |
INT_L_X74Y101.GFAN1.GND_WIRE | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL13.BRAM_IMUX_ADDRARDADDRL13 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL13.BRAM_IMUX23_1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL13.BRAM_IMUX_ADDRARDADDRL13 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL13.BRAM_ADDRARDADDRL13 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU7.BRAM_ADDRARDADDRU7 | |
INT_L_X74Y103.IMUX_L11.GFAN0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU10.BRAM_IMUX12_2 | |
INT_L_X74Y101.IMUX_L17.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL0.BRAM_ADDRARDADDRL0 | |
INT_R_X85Y93.GFAN0.GND_WIRE | |
INT_L_X74Y102.GFAN1.GND_WIRE | |
INT_L_X88Y97.GFAN0.GND_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU12.BRAM_ADDRARDADDRU12 | |
INT_L_X74Y101.IMUX_L23.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL1.BRAM_ADDRARDADDRL1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL0.BRAM_IMUX17_1 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL10.BRAM_IMUX20_2 | |
INT_R_X67Y57.GFAN0.GND_WIRE | |
INT_L_X74Y101.IMUX_L18.GFAN0 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL8.BRAM_IMUX_ADDRARDADDRL8 | |
INT_L_X80Y341.IMUX_L22.GFAN1 | |
INT_R_X67Y57.CTRL0.GFAN0 | |
INT_L_X80Y343.IMUX_L14.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL7.BRAM_BYP6_2 | |
INT_L_X74Y102.IMUX_L33.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL3.BRAM_ADDRARDADDRL3 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL0.BRAM_IMUX17_1 | |
INT_L_X80Y343.IMUX_L17.GFAN0 | |
INT_L_X74Y101.IMUX_L15.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU10.BRAM_ADDRARDADDRU10 | |
CLBLL_L_X88Y97.CLBLL_LL_SR.CLBLL_CTRL1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU13.BRAM_ADDRARDADDRU13 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU4.BRAM_IMUX_ADDRARDADDRU4 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL12.BRAM_ADDRARDADDRL12 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL13.BRAM_IMUX23_1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU8.BRAM_IMUX_ADDRARDADDRU8 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL5.BRAM_IMUX22_2 | |
INT_L_X74Y101.IMUX_L21.GFAN1 | |
INT_R_X85Y98.CTRL0.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL8.BRAM_ADDRARDADDRL8 | |
INT_L_X74Y101.IMUX_L12.GFAN1 | |
INT_R_X85Y98.GFAN0.GND_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL7.BRAM_BYP6_2 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL1.BRAM_IMUX_ADDRARDADDRL1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL3.BRAM_IMUX_ADDRARDADDRL3 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL0.BRAM_IMUX_ADDRARDADDRL0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU13.BRAM_ADDRARDADDRU13 | |
INT_L_X74Y103.GFAN1.GND_WIRE | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU13.BRAM_IMUX15_1 | |
INT_L_X74Y103.IMUX_L17.GFAN0 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL11.BRAM_IMUX22_1 | |
INT_L_X74Y103.IMUX_L14.GFAN1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU11.BRAM_IMUX_ADDRARDADDRU11 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU1.BRAM_IMUX_ADDRARDADDRU1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU14.BRAM_IMUX_ADDRARDADDRU14 | |
INT_L_X80Y341.IMUX_L10.GFAN0 | |
CLBLL_L_X76Y97.CLBLL_LL_SR.CLBLL_CTRL1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL2.BRAM_IMUX_ADDRARDADDRL2 | |
INT_L_X80Y342.IMUX_L9.GFAN0 | |
CLBLM_R_X85Y93.CLBLM_M_SR.CLBLM_CTRL1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL6.BRAM_IMUX38_2 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU0.BRAM_IMUX_ADDRARDADDRU0 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU5.BRAM_IMUX14_2 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU14.BRAM_IMUX14_3 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAL2.BRAM_IMUX17_2 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU7.BRAM_IMUX9_3 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU1.BRAM_IMUX10_1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL7.BRAM_ADDRARDADDRL7 | |
INT_L_X20Y218.CTRL_L0.GFAN0 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL4.BRAM_IMUX_ADDRARDADDRL4 | |
INT_L_X74Y101.IMUX_L19.GFAN0 | |
INT_R_X33Y211.GFAN0.GND_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU2.BRAM_ADDRARDADDRU2 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU3.BRAM_IMUX_ADDRARDADDRU3 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEAL3.BRAM_IMUX33_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAU2.BRAM_IMUX9_2 | |
INT_L_X80Y343.IMUX_L10.GFAN0 | |
INT_L_X76Y97.CTRL_L1.GFAN0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL14.BRAM_IMUX22_3 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL1.BRAM_IMUX_ADDRARDADDRL1 | |
INT_L_X80Y342.IMUX_L22.GFAN1 | |
INT_L_X80Y343.IMUX_L22.GFAN1 | |
INT_L_X74Y101.IMUX_L10.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL14.BRAM_ADDRARDADDRL14 | |
CLBLM_R_X53Y298.CLBLM_M_SR.CLBLM_CTRL1 | |
CLBLM_R_X33Y211.CLBLM_M_SR.CLBLM_CTRL1 | |
INT_R_X33Y211.CTRL1.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL1.BRAM_ADDRARDADDRL1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL2.BRAM_IMUX19_1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU3.BRAM_IMUX10_3 | |
INT_L_X88Y97.CTRL_L1.GFAN0 | |
INT_L_X74Y102.GFAN0.GND_WIRE | |
INT_R_X85Y93.CTRL1.GFAN0 | |
INT_L_X74Y102.IMUX_L30.GFAN1 | |
INT_R_X53Y298.GFAN0.GND_WIRE | |
INT_L_X80Y343.GFAN1.GND_WIRE | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL14.BRAM_IMUX_ADDRARDADDRL14 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL14.BRAM_IMUX22_3 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU2.BRAM_IMUX11_1 | |
INT_L_X74Y103.IMUX_L22.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU14.BRAM_ADDRARDADDRU14 | |
CLBLM_R_X85Y98.CLBLM_L_SR.CLBLM_CTRL0 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAU1.BRAM_IMUX24_2 | |
INT_L_X74Y102.IMUX_L24.GFAN0 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL10.BRAM_IMUX_ADDRARDADDRL10 | |
INT_L_X80Y342.FAN_L1.FAN_ALT1 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL7.BRAM_ADDRARDADDRL7 | |
INT_L_X74Y101.IMUX_L22.GFAN1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU1.BRAM_IMUX_ADDRARDADDRU1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL7.BRAM_IMUX17_3 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL11.BRAM_ADDRARDADDRL11 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU4.BRAM_FAN1_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL2.BRAM_ADDRARDADDRL2 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU7.BRAM_IMUX_ADDRARDADDRU7 | |
INT_L_X74Y101.IMUX_L13.GFAN1 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAL0.BRAM_IMUX16_2 | |
INT_L_X74Y103.IMUX_L9.GFAN0 | |
INT_L_X74Y102.IMUX_L17.GFAN0 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL8.BRAM_IMUX20_1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU12.BRAM_IMUX13_3 | |
INT_L_X74Y101.IMUX_L20.GFAN1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL13.BRAM_ADDRARDADDRL13 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU8.BRAM_ADDRARDADDRU8 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU8.BRAM_IMUX12_1 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL1.BRAM_IMUX18_1 | |
INT_L_X80Y341.IMUX_L17.GFAN0 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAU3.BRAM_IMUX25_2 | |
INT_L_X74Y102.IMUX_L25.GFAN0 | |
CLBLM_R_X67Y57.CLBLM_L_SR.CLBLM_CTRL0 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL9.BRAM_ADDRARDADDRL9 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL9.BRAM_IMUX_ADDRARDADDRL9 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL9.BRAM_IMUX19_3 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU14.BRAM_ADDRARDADDRU14 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU9.BRAM_ADDRARDADDRU9 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU9.BRAM_IMUX11_3 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU2.BRAM_ADDRARDADDRU2 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU11.BRAM_IMUX_ADDRARDADDRU11 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU10.BRAM_ADDRARDADDRU10 | |
INT_L_X80Y342.IMUX_L8.GFAN0 | |
INT_L_X74Y103.IMUX_L19.GFAN0 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU10.BRAM_IMUX_ADDRARDADDRU10 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU10.BRAM_IMUX12_2 | |
INT_L_X74Y103.IMUX_L13.GFAN1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU14.BRAM_IMUX_ADDRARDADDRU14 | |
INT_L_X74Y102.IMUX_L12.GFAN1 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU4.BRAM_IMUX_ADDRARDADDRU4 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL11.BRAM_IMUX_ADDRARDADDRL11 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU11.BRAM_ADDRARDADDRU11 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL10.BRAM_ADDRARDADDRL10 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU11.BRAM_IMUX14_1 | |
INT_L_X74Y101.IMUX_L14.GFAN1 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL12.BRAM_IMUX_ADDRARDADDRL12 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL12.BRAM_IMUX21_3 | |
INT_L_X76Y97.GFAN0.GND_WIRE | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU13.BRAM_IMUX_ADDRARDADDRU13 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU12.BRAM_IMUX_ADDRARDADDRU12 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU8.BRAM_IMUX_ADDRARDADDRU8 | |
CLBLL_L_X20Y218.CLBLL_L_SR.CLBLL_CTRL0 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEAU0.BRAM_IMUX8_2 | |
INT_R_X53Y298.CTRL1.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL14.BRAM_ADDRARDADDRL14 | |
INT_L_X80Y342.BYP_L6.BYP_ALT6 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL14.BRAM_IMUX_ADDRARDADDRL14 | |
INT_L_X74Y102.IMUX_L8.GFAN0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU14.BRAM_IMUX14_3 | |
INT_L_X80Y341.IMUX_L23.GFAN1 | |
INT_L_X80Y341.GFAN1.GND_WIRE | |
INT_L_X80Y342.BYP_ALT6.GFAN1 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU13.BRAM_IMUX15_1 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL0.BRAM_ADDRARDADDRL0 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL0.BRAM_IMUX_ADDRARDADDRL0 | |
INT_L_X74Y102.IMUX_L9.GFAN0 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU0.BRAM_ADDRARDADDRU0 | |
INT_L_X80Y341.IMUX_L15.GFAN1 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL3.BRAM_IMUX18_3 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU0.BRAM_IMUX_ADDRARDADDRU0 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU0.BRAM_IMUX9_1 | |
INT_L_X20Y218.GFAN0.GND_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU1.BRAM_ADDRARDADDRU1 | |
INT_L_X80Y343.IMUX_L39.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRBWRADDRL15.BRAM_IMUX_ADDRBWRADDRL15 | |
INT_L_X80Y343.IMUX_L31.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL15.BRAM_IMUX31_3 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL15.BRAM_IMUX_ADDRARDADDRL15 | |
INT_L_X74Y103.IMUX_L39.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRBWRADDRL15.BRAM_IMUX39_3 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRBWRADDRL15.BRAM_IMUX_ADDRBWRADDRL15 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL15.BRAM_IMUX31_3 | |
INT_L_X80Y342.FAN_ALT5.VCC_WIRE | |
INT_L_X80Y342.FAN_L5.FAN_ALT5 | |
INT_L_X80Y342.IMUX_L5.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL0.BRAM_IMUX5_2 | |
INT_L_X80Y344.CTRL_L1.BYP_BOUNCE4 | |
INT_L_X80Y344.BYP_ALT4.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTREGARSTREGL.BRAM_CTRL0_4 | |
INT_L_X80Y343.CTRL_L1.BYP_BOUNCE4 | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTRAMARSTRAMU.BRAM_CTRL1_3 | |
INT_L_X80Y343.CTRL_L0.BYP_BOUNCE4 | |
INT_L_X80Y342.IMUX_L10.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTREGBU.BRAM_CTRL1_0 | |
INT_L_X80Y344.CTRL_L0.BYP_BOUNCE4 | |
INT_L_X80Y340.CTRL_L0.BYP_BOUNCE4 | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTREGBL.BRAM_CTRL0_0 | |
INT_L_X80Y341.CTRL_L1.BYP_BOUNCE4 | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTRAMARSTRAMLRST.BRAM_CTRL0_3 | |
INT_L_X80Y341.CTRL_L0.BYP_BOUNCE4 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU6.BRAM_IMUX8_3 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU6.BRAM_ADDRARDADDRU6 | |
INT_L_X80Y343.IMUX_L16.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL6.BRAM_IMUX16_3 | |
INT_L_X74Y103.IMUX_L31.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL6.BRAM_IMUX_ADDRARDADDRL6 | |
INT_L_X80Y343.IMUX_L12.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU5.BRAM_IMUX_ADDRARDADDRU5 | |
INT_L_X80Y343.IMUX_L20.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_ENBWRENU.BRAM_IMUX26_2 | |
INT_R_X85Y93.FAN7.FAN_ALT7 | |
BRAM_L_X74Y100.BRAM_FIFO36_REGCEBU.BRAM_IMUX27_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_ENBWRENL.BRAM_IMUX34_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTREGBL.BRAM_CTRL0_0 | |
INT_L_X80Y340.CTRL_L1.BYP_BOUNCE4 | |
INT_L_X74Y102.IMUX_L35.VCC_WIRE | |
CLBLL_L_X20Y218.CLBLL_L_CE.CLBLL_FAN6 | |
INT_L_X74Y102.IMUX_L45.VCC_WIRE | |
INT_L_X74Y101.FAN_ALT5.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTREGARSTREGL.BRAM_CTRL0_4 | |
BRAM_L_X74Y100.BRAM_FIFO36_CLKBWRCLKU.BRAM_CLK1_1 | |
INT_L_X74Y102.BYP_L3.BYP_ALT3 | |
BRAM_L_X74Y100.BRAM_FIFO36_REGCEBL.BRAM_IMUX35_2 | |
INT_L_X74Y101.CLK_L0.FAN_BOUNCE5 | |
INT_L_X80Y342.IMUX_L21.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_CLKBWRCLKL.BRAM_CLK0_1 | |
INT_L_X74Y103.IMUX_L12.VCC_WIRE | |
INT_L_X74Y102.IMUX_L13.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU1.BRAM_IMUX13_2 | |
INT_L_X74Y102.IMUX_L21.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU2.BRAM_IMUX29_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRU5.BRAM_ADDRARDADDRU5 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU6.BRAM_IMUX8_3 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL1.BRAM_IMUX21_2 | |
INT_L_X74Y102.IMUX_L19.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_REGCEAREGCEL.BRAM_IMUX19_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTRAMARSTRAMLRST.BRAM_CTRL0_3 | |
INT_L_X80Y342.IMUX_L45.VCC_WIRE | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_R_BUFGCTRL4_CE1.CLK_BUFG_IMUX16_1 | |
INT_R_X49Y197.IMUX8.VCC_WIRE | |
INT_R_X49Y197.IMUX12.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU0.BRAM_FAN5_2 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_R_BUFGCTRL4_IGNORE0.CLK_BUFG_IMUX12_1 | |
INT_R_X49Y197.IMUX0.VCC_WIRE | |
INT_L_X74Y102.IMUX_L18.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTREGARSTREGU.BRAM_CTRL1_4 | |
INT_L_X80Y344.BYP_BOUNCE4.BYP_ALT4 | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTRAMBU.BRAM_CTRL1_1 | |
INT_L_X88Y97.FAN_L7.FAN_ALT7 | |
INT_L_X74Y102.BYP_ALT3.VCC_WIRE | |
CLBLM_R_X67Y57.CLBLM_L_CE.CLBLM_FAN6 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL6.BRAM_ADDRARDADDRL6 | |
INT_L_X76Y97.FAN_ALT7.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_REGCEAREGCEU.BRAM_IMUX11_2 | |
INT_R_X85Y93.FAN_ALT7.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU2.BRAM_IMUX29_2 | |
CLBLM_R_X85Y93.CLBLM_M_CE.CLBLM_FAN7 | |
INT_L_X80Y341.FAN_ALT5.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL3.BRAM_BYP3_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL2.BRAM_IMUX37_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_ENBWRENU.BRAM_IMUX26_2 | |
INT_L_X74Y101.CTRL_L0.BYP_BOUNCE4 | |
INT_L_X80Y341.BYP_ALT4.VCC_WIRE | |
INT_L_X74Y101.BYP_BOUNCE4.BYP_ALT4 | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTREGARSTREGU.BRAM_CTRL1_4 | |
INT_L_X80Y342.IMUX_L27.VCC_WIRE | |
INT_L_X20Y218.FAN_L6.FAN_ALT6 | |
INT_L_X80Y340.BYP_BOUNCE4.BYP_ALT4 | |
INT_L_X88Y97.FAN_ALT7.VCC_WIRE | |
INT_R_X49Y197.IMUX4.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTREGBU.BRAM_CTRL1_0 | |
BRAM_L_X80Y340.BRAM_FIFO36_RSTRAMBL.BRAM_CTRL0_1 | |
INT_L_X74Y102.IMUX_L26.VCC_WIRE | |
CLBLM_R_X85Y98.CLBLM_L_CE.CLBLM_FAN6 | |
CLBLL_L_X88Y97.CLBLL_LL_CE.CLBLL_FAN7 | |
BRAM_L_X80Y340.BRAM_FIFO36_ENARDENU.BRAM_IMUX10_2 | |
CLBLL_L_X76Y97.CLBLL_LL_CE.CLBLL_FAN7 | |
BRAM_L_X80Y340.BRAM_FIFO36_ENBWRENL.BRAM_IMUX34_2 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRBWRADDRL15.BRAM_IMUX39_3 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_R_BUFGCTRL4_S1.CLK_BUFG_IMUX0_1 | |
INT_R_X49Y197.IMUX20.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU0.BRAM_FAN5_2 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_R_BUFGCTRL4_S0.CLK_BUFG_IMUX4_1 | |
INT_L_X74Y103.CTRL_L0.BYP_BOUNCE4 | |
INT_L_X74Y103.BYP_ALT4.VCC_WIRE | |
INT_L_X74Y102.IMUX_L11.VCC_WIRE | |
INT_L_X80Y343.BYP_BOUNCE4.BYP_ALT4 | |
INT_R_X53Y298.FAN_ALT7.VCC_WIRE | |
INT_L_X76Y97.FAN_L7.FAN_ALT7 | |
INT_L_X80Y343.IMUX_L8.VCC_WIRE | |
CLBLM_R_X33Y211.CLBLM_M_CE.CLBLM_FAN7 | |
INT_L_X74Y102.IMUX_L10.VCC_WIRE | |
INT_L_X80Y342.BYP_ALT3.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEU3.BRAM_IMUX45_2 | |
INT_L_X74Y104.CTRL_L1.BYP_BOUNCE4 | |
INT_L_X20Y218.FAN_ALT6.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRU5.BRAM_IMUX12_3 | |
INT_R_X49Y197.IMUX16.VCC_WIRE | |
INT_R_X85Y98.FAN_ALT6.VCC_WIRE | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_R_BUFGCTRL4_IGNORE1.CLK_BUFG_IMUX8_1 | |
INT_L_X74Y102.IMUX_L5.VCC_WIRE | |
INT_L_X80Y342.IMUX_L11.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL5.BRAM_IMUX20_3 | |
INT_L_X74Y102.IMUX_L37.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTRAMARSTRAMU.BRAM_CTRL1_3 | |
INT_R_X67Y57.FAN_ALT6.VCC_WIRE | |
INT_R_X33Y211.FAN7.FAN_ALT7 | |
INT_R_X33Y211.FAN_ALT7.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL5.BRAM_ADDRARDADDRL5 | |
INT_R_X53Y298.FAN7.FAN_ALT7 | |
INT_L_X80Y342.IMUX_L34.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL5.BRAM_IMUX_ADDRARDADDRL5 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL6.BRAM_ADDRARDADDRL6 | |
INT_L_X74Y102.IMUX_L34.VCC_WIRE | |
INT_L_X74Y104.BYP_BOUNCE4.BYP_ALT4 | |
CLBLM_R_X53Y298.CLBLM_M_CE.CLBLM_FAN7 | |
INT_L_X74Y101.FAN_BOUNCE5.FAN_ALT5 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU6.BRAM_IMUX_ADDRARDADDRU6 | |
INT_R_X85Y98.FAN6.FAN_ALT6 | |
INT_L_X80Y343.BYP_ALT4.VCC_WIRE | |
INT_L_X80Y342.IMUX_L26.VCC_WIRE | |
INT_L_X80Y342.IMUX_L19.VCC_WIRE | |
INT_R_X67Y57.FAN6.FAN_ALT6 | |
INT_L_X74Y100.CTRL_L1.BYP_BOUNCE4 | |
INT_L_X74Y103.IMUX_L20.VCC_WIRE | |
INT_L_X80Y340.BYP_ALT4.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU5.BRAM_ADDRARDADDRU5 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRL6.BRAM_IMUX_ADDRARDADDRL6 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRL6.BRAM_IMUX16_3 | |
INT_L_X74Y103.IMUX_L16.VCC_WIRE | |
INT_L_X74Y101.CLK_L1.FAN_BOUNCE5 | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL0.BRAM_IMUX5_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRU6.BRAM_ADDRARDADDRU6 | |
INT_L_X80Y341.BYP_BOUNCE4.BYP_ALT4 | |
BRAM_L_X74Y100.BRAM_FIFO36_REGCEAREGCEL.BRAM_IMUX19_2 | |
INT_L_X74Y103.IMUX_L8.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTRAMBL.BRAM_CTRL0_1 | |
INT_L_X74Y101.BYP_ALT4.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_RSTRAMBU.BRAM_CTRL1_1 | |
CLK_BUFG_BOT_R_X121Y204.CLK_BUFG_R_BUFGCTRL4_CE0.CLK_BUFG_IMUX20_1 | |
INT_L_X74Y101.CTRL_L1.BYP_BOUNCE4 | |
INT_L_X74Y100.CTRL_L0.BYP_BOUNCE4 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRL5.BRAM_IMUX_ADDRARDADDRL5 | |
INT_L_X74Y100.BYP_BOUNCE4.BYP_ALT4 | |
BRAM_L_X74Y100.BRAM_FIFO36_ENARDENU.BRAM_IMUX10_2 | |
INT_L_X74Y103.BYP_BOUNCE4.BYP_ALT4 | |
INT_L_X74Y100.BYP_ALT4.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_ENARDENL.BRAM_IMUX18_2 | |
INT_L_X74Y103.CTRL_L1.BYP_BOUNCE4 | |
INT_L_X74Y104.CTRL_L0.BYP_BOUNCE4 | |
INT_L_X74Y104.BYP_ALT4.VCC_WIRE | |
INT_L_X80Y342.IMUX_L29.VCC_WIRE | |
INT_L_X80Y341.CLK_L1.FAN_BOUNCE5 | |
INT_L_X74Y102.FAN_ALT5.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_REGCEAREGCEU.BRAM_IMUX11_2 | |
BRAM_L_X74Y100.BRAM_FIFO36_ADDRARDADDRL15.BRAM_IMUX_ADDRARDADDRL15 | |
BRAM_L_X74Y100.BRAM_IMUX_ADDRARDADDRU5.BRAM_IMUX12_3 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL1.BRAM_IMUX21_2 | |
BRAM_L_X74Y100.BRAM_ADDRARDADDRU5.BRAM_IMUX_ADDRARDADDRU5 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU1.BRAM_IMUX13_2 | |
INT_L_X74Y102.IMUX_L29.VCC_WIRE | |
INT_L_X80Y342.IMUX_L13.VCC_WIRE | |
INT_L_X74Y102.IMUX_L27.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_CLKBWRCLKL.BRAM_CLK0_1 | |
INT_L_X80Y341.CLK_L0.FAN_BOUNCE5 | |
BRAM_L_X80Y340.BRAM_FIFO36_ENARDENL.BRAM_IMUX18_2 | |
INT_L_X80Y341.FAN_BOUNCE5.FAN_ALT5 | |
BRAM_L_X80Y340.BRAM_ADDRARDADDRU6.BRAM_IMUX_ADDRARDADDRU6 | |
BRAM_L_X80Y340.BRAM_FIFO36_CLKBWRCLKU.BRAM_CLK1_1 | |
INT_L_X80Y342.BYP_L3.BYP_ALT3 | |
INT_L_X74Y102.FAN_L5.FAN_ALT5 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEU3.BRAM_IMUX45_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_REGCEBL.BRAM_IMUX35_2 | |
INT_L_X80Y342.IMUX_L35.VCC_WIRE | |
INT_L_X80Y342.IMUX_L18.VCC_WIRE | |
BRAM_L_X80Y340.BRAM_FIFO36_REGCEBU.BRAM_IMUX27_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_WEBWEL2.BRAM_IMUX37_2 | |
INT_L_X80Y342.IMUX_L37.VCC_WIRE | |
BRAM_L_X74Y100.BRAM_FIFO36_WEBWEL3.BRAM_BYP3_2 | |
BRAM_L_X80Y340.BRAM_FIFO36_ADDRARDADDRL5.BRAM_ADDRARDADDRL5 | |
BRAM_L_X80Y340.BRAM_IMUX_ADDRARDADDRL5.BRAM_IMUX20_3 | |
BRAM_L_X80Y340.RAMB18_Y0.IN_USE | |
BRAM_L_X80Y340.RAMB18_Y0.READ_WIDTH_A_18 | |
BRAM_L_X80Y340.RAMB18_Y0.ZINV_ENARDEN | |
BRAM_L_X80Y340.RAMB18_Y0.ZINV_CLKARDCLK | |
BRAM_L_X80Y340.RAMB18_Y0.ZINIT_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y0.ZINIT_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y0.ZSRVAL_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y0.ZSRVAL_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y0.INIT_00[255:0] = 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
BRAM_L_X80Y340.RAMB18_Y1.IN_USE | |
BRAM_L_X80Y340.RAMB18_Y1.READ_WIDTH_A_18 | |
BRAM_L_X80Y340.RAMB18_Y1.ZINV_ENARDEN | |
BRAM_L_X80Y340.RAMB18_Y1.ZINV_CLKARDCLK | |
BRAM_L_X80Y340.RAMB18_Y1.ZINIT_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y1.ZINIT_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y1.ZSRVAL_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y1.ZSRVAL_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X80Y340.RAMB18_Y1.INIT_00[255:0] = 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
BRAM_L_X74Y100.RAMB18_Y0.IN_USE | |
BRAM_L_X74Y100.RAMB18_Y0.READ_WIDTH_A_18 | |
BRAM_L_X74Y100.RAMB18_Y0.ZINV_ENARDEN | |
BRAM_L_X74Y100.RAMB18_Y0.ZINV_CLKARDCLK | |
BRAM_L_X74Y100.RAMB18_Y0.ZINIT_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y0.ZINIT_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y0.ZSRVAL_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y0.ZSRVAL_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y0.INIT_00[255:0] = 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
BRAM_L_X74Y100.RAMB18_Y1.IN_USE | |
BRAM_L_X74Y100.RAMB18_Y1.READ_WIDTH_A_18 | |
BRAM_L_X74Y100.RAMB18_Y1.ZINV_ENARDEN | |
BRAM_L_X74Y100.RAMB18_Y1.ZINV_CLKARDCLK | |
BRAM_L_X74Y100.RAMB18_Y1.ZINIT_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y1.ZINIT_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y1.ZSRVAL_A[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y1.ZSRVAL_B[17:0] = 18'b111111111111111111 | |
BRAM_L_X74Y100.RAMB18_Y1.INIT_00[255:0] = 256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y4.IN_USE | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y4.IS_IGNORE1_INVERTED | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_CE0 | |
CLK_BUFG_BOT_R_X121Y204.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_S0 | |
CLK_HROW_TOP_R_X121Y338.CLK_HROW_R_CK_GCLK4_ACTIVE | |
HCLK_R_X196Y338.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
CLK_HROW_TOP_R_X121Y286.CLK_HROW_R_CK_GCLK4_ACTIVE | |
HCLK_R_X129Y286.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
HCLK_R_X56Y234.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
HCLK_R_X83Y234.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
CLK_HROW_TOP_R_X121Y234.CLK_HROW_R_CK_GCLK4_ACTIVE | |
HCLK_R_X119Y182.ENABLE_BUFFER.HCLK_CK_BUFHCLK2 | |
CLK_HROW_BOT_R_X121Y182.CLK_HROW_R_CK_GCLK14_ACTIVE | |
CLK_HROW_BOT_R_X121Y130.CLK_HROW_R_CK_GCLK4_ACTIVE | |
HCLK_R_X182Y130.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
CLK_HROW_BOT_R_X121Y78.CLK_HROW_R_CK_GCLK4_ACTIVE | |
CLK_HROW_BOT_R_X121Y78.CLK_HROW_CK_IN_R12_ACTIVE | |
HCLK_R_X162Y78.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
HCLK_R_X187Y78.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
HCLK_R_X206Y78.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
HCLK_R_X215Y78.ENABLE_BUFFER.HCLK_CK_BUFHCLK0 | |
HCLK_CMT_L_X228Y78.HCLK_CMT_CCIO0_ACTIVE | |
HCLK_CMT_L_X228Y78.HCLK_CMT_CCIO0_USED | |
CLK_BUFG_REBUF_X121Y350.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y350.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y350.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y350.GCLK4_ENABLE_BELOW | |
HCLK_CMT_X8Y338.HCLK_CMT_CK_BUFHCLK0_USED | |
CLK_BUFG_REBUF_X121Y325.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y325.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y325.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y325.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y298.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y298.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y298.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y298.GCLK4_ENABLE_BELOW | |
HCLK_CMT_X8Y286.HCLK_CMT_CK_BUFHCLK0_USED | |
CLK_BUFG_REBUF_X121Y273.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y273.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y273.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y273.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y246.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y246.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y246.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y246.GCLK4_ENABLE_BELOW | |
HCLK_CMT_X8Y234.HCLK_CMT_CK_BUFHCLK0_USED | |
CLK_BUFG_REBUF_X121Y221.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y221.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y221.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y221.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y194.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y194.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y194.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y194.GCLK4_ENABLE_BELOW | |
HCLK_CMT_X8Y182.HCLK_CMT_CK_BUFHCLK2_USED | |
CLK_BUFG_REBUF_X121Y169.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y169.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y169.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y169.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y142.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y142.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y142.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y142.GCLK4_ENABLE_BELOW | |
HCLK_CMT_X8Y130.HCLK_CMT_CK_BUFHCLK0_USED | |
HCLK_CMT_L_X228Y130.HCLK_CMT_CK_BUFHCLK0_USED | |
CLK_BUFG_REBUF_X121Y117.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y117.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y117.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y117.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y90.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y90.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y90.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y90.GCLK4_ENABLE_BELOW | |
HCLK_CMT_X8Y78.HCLK_CMT_CK_BUFHCLK0_USED | |
HCLK_CMT_L_X228Y78.HCLK_CMT_CK_BUFHCLK0_USED | |
CLK_BUFG_REBUF_X121Y65.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y65.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y65.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y65.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y38.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y38.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y38.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y38.GCLK4_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y13.GCLK14_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y13.GCLK14_ENABLE_BELOW | |
CLK_BUFG_REBUF_X121Y13.GCLK4_ENABLE_ABOVE | |
CLK_BUFG_REBUF_X121Y13.GCLK4_ENABLE_BELOW | |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
// Copyright (c) 2024 Hansem Ro <hansemro@outlook.com> | |
// SPDX-License-Identifier: MIT | |
// BRAM INIT Parameter Test | |
`default_nettype none | |
// comment DIFF_CLK define to use single-ended clock | |
`define DIFF_CLK | |
// uncomment one of the TEST_* comments to instantiate the BRAM for testing | |
`define TEST_RAMB36E1 | |
module top ( | |
`ifdef DIFF_CLK | |
input wire clk_p_i, | |
input wire clk_n_i, | |
`else | |
input wire clk_i, | |
`endif | |
output reg [7:0] q_o | |
); | |
////parameter [255:0] INIT = 256'h0123456789ABCDEFFEDCBA98765432100123456789ABCDEFFEDCBA9876543210; | |
parameter [255:0] INIT = 256'b00000001; | |
wire clk; | |
wire clk_ibufg; | |
`ifdef DIFF_CLK | |
IBUFDS ibuf_inst (.I(clk_p_i), .IB(clk_n_i), .O(clk_ibufg)); | |
BUFG bufg_inst (.I(clk_ibufg), .O(clk)); | |
`else | |
BUFG bufg_inst (.I(clk_i), .O(clk)); | |
`endif | |
wire [63:0] dout; | |
always @(posedge clk) | |
q_o <= dout[7:0]; | |
// Instantiate BRAM | |
`ifdef TEST_RAMB36E1 | |
`ifdef YOSYS | |
(* keep *) | |
`elsif VIVADO | |
(* KEEP, DONT_TOUCH *) | |
`endif | |
RAMB36E1 #( | |
.READ_WIDTH_A(36), | |
.RAM_MODE("TDP"), | |
.WRITE_MODE_A("WRITE_FIRST"), | |
.INIT_00(256'h0100000000) | |
) ramb36e1_inst ( | |
.CLKARDCLK(clk), | |
.ENARDEN(1'b1), | |
.ADDRARDADDR({9'b0,2'b11,5'b0}), | |
.DOADO(dout[31:0]), | |
.WEA(4'b0) | |
); | |
`ifdef YOSYS | |
(* keep *) | |
`elsif VIVADO | |
(* KEEP, DONT_TOUCH *) | |
`endif | |
RAMB36E1 #( | |
.READ_WIDTH_A(36), | |
.RAM_MODE("TDP"), | |
.WRITE_MODE_A("WRITE_FIRST"), | |
.INIT_00(INIT) | |
) ramb36e1_inst_1 ( | |
.CLKARDCLK(clk), | |
.ENARDEN(1'b1), | |
.ADDRARDADDR({9'b0,2'b11,5'b0}), | |
.DOADO(dout[63:32]), | |
.WEA(4'b0) | |
); | |
`endif | |
endmodule |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment