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PML phys_map_pt __attribute__((aligned(PAGE_SIZE))); | |
void paging_init(void) | |
{ | |
/* Get the current PML and store it */ | |
boot_pt = (PML *) arm64_get_kernel_page_table(); | |
/* Bootstrap the first 1GB */ | |
uintptr_t virt = PHYS_BASE; | |
unsigned int indices[arm64_max_paging_levels]; | |
addr_to_indices(virt, indices); | |
// Create two mappings of 512GB(1TB) | |
auto page_table_flags = ARM64_MMU_INNER_SHAREABLE | ARM64_MMU_TABLE | ARM64_MMU_VALID | | |
ARM64_MMU_AF | MMU_PTR_ATTR_NORMAL_MEMORY; | |
unsigned long page_table = ((unsigned long) &phys_map_pt) - KERNEL_VIRTUAL_BASE; | |
boot_pt->entries[indices[arm64_paging_levels - 1]] = page_table | page_table_flags; | |
for (unsigned int i = 0; i < 512; i++) | |
{ | |
phys_map_pt.entries[i] = (i << HUGE1GB_SHIFT) | ARM64_MMU_INNER_SHAREABLE | | |
ARM64_MMU_BLOCK | ARM64_MMU_VALID | ARM64_MMU_AF | | |
MMU_PTR_ATTR_NORMAL_MEMORY; | |
} | |
} |
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