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August 14, 2021 20:46
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tinymembench v0.4.9 (simple benchmark for memory throughput and latency) | |
========================================================================== | |
== Memory bandwidth tests == | |
== == | |
== Note 1: 1MB = 1000000 bytes == | |
== Note 2: Results for 'copy' tests show how many bytes can be == | |
== copied per second (adding together read and writen == | |
== bytes would have provided twice higher numbers) == | |
== Note 3: 2-pass copy means that we are using a small temporary buffer == | |
== to first fetch data into it, and only then write it to the == | |
== destination (source -> L1 cache, L1 cache -> destination) == | |
== Note 4: If sample standard deviation exceeds 0.1%, it is shown in == | |
== brackets == | |
========================================================================== | |
C copy backwards : 4628.3 MB/s (2.0%) | |
C copy backwards (32 byte blocks) : 4588.6 MB/s (12.4%) | |
C copy backwards (64 byte blocks) : 4674.7 MB/s (17.5%) | |
C copy : 4817.1 MB/s (4.5%) | |
C copy prefetched (32 bytes step) : 4729.4 MB/s (1.5%) | |
C copy prefetched (64 bytes step) : 4740.4 MB/s (13.5%) | |
C 2-pass copy : 4590.2 MB/s (3.0%) | |
C 2-pass copy prefetched (32 bytes step) : 4660.3 MB/s (2.0%) | |
C 2-pass copy prefetched (64 bytes step) : 4689.9 MB/s (1.6%) | |
C fill : 7090.9 MB/s (3.2%) | |
C fill (shuffle within 16 byte blocks) : 7115.9 MB/s (3.2%) | |
C fill (shuffle within 32 byte blocks) : 7078.4 MB/s (2.3%) | |
C fill (shuffle within 64 byte blocks) : 7096.4 MB/s (2.7%) | |
--- | |
standard memcpy : 6801.5 MB/s (1.7%) | |
standard memset : 15873.8 MB/s (3.1%) | |
--- | |
MOVSB copy : 5644.8 MB/s (1.8%) | |
MOVSD copy : 5648.2 MB/s (1.4%) | |
SSE2 copy : 4808.1 MB/s (2.0%) | |
SSE2 nontemporal copy : 6954.6 MB/s (3.9%) | |
SSE2 copy prefetched (32 bytes step) : 4708.3 MB/s (1.6%) | |
SSE2 copy prefetched (64 bytes step) : 4741.1 MB/s (2.6%) | |
SSE2 nontemporal copy prefetched (32 bytes step) : 6723.5 MB/s (0.6%) | |
SSE2 nontemporal copy prefetched (64 bytes step) : 6790.8 MB/s (1.3%) | |
SSE2 2-pass copy : 4664.4 MB/s (4.2%) | |
SSE2 2-pass copy prefetched (32 bytes step) : 4704.4 MB/s (1.7%) | |
SSE2 2-pass copy prefetched (64 bytes step) : 4701.7 MB/s (2.2%) | |
SSE2 2-pass nontemporal copy : 3783.3 MB/s (1.1%) | |
SSE2 fill : 7161.2 MB/s (3.2%) | |
SSE2 nontemporal fill : 16447.8 MB/s (1.6%) | |
========================================================================== | |
== Framebuffer read tests. == | |
== == | |
== Many ARM devices use a part of the system memory as the framebuffer, == | |
== typically mapped as uncached but with write-combining enabled. == | |
== Writes to such framebuffers are quite fast, but reads are much == | |
== slower and very sensitive to the alignment and the selection of == | |
== CPU instructions which are used for accessing memory. == | |
== == | |
== Many x86 systems allocate the framebuffer in the GPU memory, == | |
== accessible for the CPU via a relatively slow PCI-E bus. Moreover, == | |
== PCI-E is asymmetric and handles reads a lot worse than writes. == | |
== == | |
== If uncached framebuffer reads are reasonably fast (at least 100 MB/s == | |
== or preferably >300 MB/s), then using the shadow framebuffer layer == | |
== is not necessary in Xorg DDX drivers, resulting in a nice overall == | |
== performance improvement. For example, the xf86-video-fbturbo DDX == | |
== uses this trick. == | |
========================================================================== | |
MOVSD copy (from framebuffer) : 207.2 MB/s (0.7%) | |
MOVSD 2-pass copy (from framebuffer) : 202.7 MB/s (0.3%) | |
SSE2 copy (from framebuffer) : 110.9 MB/s (0.2%) | |
SSE2 2-pass copy (from framebuffer) : 111.0 MB/s (0.2%) | |
========================================================================== | |
== Memory latency test == | |
== == | |
== Average time is measured for random memory accesses in the buffers == | |
== of different sizes. The larger is the buffer, the more significant == | |
== are relative contributions of TLB, L1/L2 cache misses and SDRAM == | |
== accesses. For extremely large buffer sizes we are expecting to see == | |
== page table walk with several requests to SDRAM for almost every == | |
== memory access (though 64MiB is not nearly large enough to experience == | |
== this effect to its fullest). == | |
== == | |
== Note 1: All the numbers are representing extra time, which needs to == | |
== be added to L1 cache latency. The cycle timings for L1 cache == | |
== latency can be usually found in the processor documentation. == | |
== Note 2: Dual random read means that we are simultaneously performing == | |
== two independent memory accesses at a time. In the case if == | |
== the memory subsystem can't handle multiple outstanding == | |
== requests, dual random read has the same timings as two == | |
== single reads performed one after another. == | |
========================================================================== | |
block size : single random read / dual random read, [MADV_NOHUGEPAGE] | |
1024 : 0.0 ns / 0.0 ns | |
2048 : 0.0 ns / 0.0 ns | |
4096 : 0.0 ns / 0.0 ns | |
8192 : 0.0 ns / 0.0 ns | |
16384 : 0.0 ns / 0.0 ns | |
32768 : 0.0 ns / 0.0 ns | |
65536 : 1.0 ns / 1.5 ns | |
131072 : 1.6 ns / 1.9 ns | |
262144 : 1.9 ns / 2.1 ns | |
524288 : 7.2 ns / 9.5 ns | |
1048576 : 9.9 ns / 11.8 ns | |
2097152 : 11.4 ns / 12.6 ns | |
4194304 : 13.3 ns / 13.9 ns | |
8388608 : 63.5 ns / 91.8 ns | |
16777216 : 106.6 ns / 128.6 ns | |
33554432 : 121.9 ns / 142.0 ns | |
67108864 : 142.6 ns / 149.7 ns | |
block size : single random read / dual random read, [MADV_HUGEPAGE] | |
1024 : 0.0 ns / 0.0 ns | |
2048 : 0.0 ns / 0.0 ns | |
4096 : 0.0 ns / 0.0 ns | |
8192 : 0.0 ns / 0.0 ns | |
16384 : 0.0 ns / 0.0 ns | |
32768 : 0.0 ns / 0.0 ns | |
65536 : 1.0 ns / 1.5 ns | |
131072 : 1.6 ns / 1.9 ns | |
262144 : 1.9 ns / 2.1 ns | |
524288 : 6.0 ns / 8.2 ns | |
1048576 : 8.1 ns / 9.9 ns | |
2097152 : 9.2 ns / 10.4 ns | |
4194304 : 10.0 ns / 11.0 ns | |
8388608 : 58.7 ns / 86.1 ns | |
16777216 : 98.9 ns / 107.7 ns | |
33554432 : 109.9 ns / 121.1 ns | |
67108864 : 124.4 ns / 132.8 ns |
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