The RISC-V specification is a very long technical document (hundreds of pages) that describes many "architectural parameters" — settings like how many memory-protection regions a chip supports, or how wide its registers are. Right now, people manually read through the spec and write these parameters into a structured file (YAML) by hand. This is slow and easy to get wrong. The goal of this project is to use AI (large language models) to read the spec text automatically and pull out these parameters correctly, so the manual work becomes much faster.
