Makefile for building objects for each source file. It takes too long too get it working when you start from scratch

Makefile

CC=clang
LIB=
INCLUDES=-Iinclude/
FLAGS=-Wall -Werror -pedantic
SOURCES=$(wildcard src/*.c)
#OBJECTS=$(SOURCES:.c=.o) # This way works too
OBJECTS=$(patsubst %.c, %.o, $(SOURCES))
EXE=executable_name.out

all: $(EXE) clean

$(EXE): $(OBJECTS)
	$(CC) $(INCLUDES) -o $@ $^

%.o: %.c
	$(CC) -c $< $(FLAGS) $(LIB) $(INCLUDES) -o $@

clean:
	rm -rf src/*.o