Instruction Decoder / For Fenestra6502

INST22Q.jed


CUPL(WM)        5.0a  Serial# 60008009
Device          g22v10  Library DLIB-h-40-1
Created         Thu Oct 15 01:38:14 2020
Name            INST22Q
Partno          Fenestra6502
Revision        01
Date            20/10/10
Designer        Katunori Takesita
Company         
Assembly        
Location        
*QP24 
*QF5892 
*G0 
*F0 
*L00000 11111111111111111111111111111110
*L00032 11111111111111111111111111111111
*L00064 11111111111111111111111110111111
*L00096 11111111111111111111111111111111
*L00128 11110000000000000000000000000000
*L00416 00000000000000000000000011111111
*L00448 11111111111111111111111111111111
*L00480 11111101111111111111111111111111
*L00512 11111111111110011111111111111111
*L00544 11111111111111111101111111100000
*L00896 00000000000000000000000000001111
*L00928 11111111111111111111111111111111
*L00960 11111111110111111111111111111111
*L00992 11111111111111110101111111111111
*L01024 11111111111111111111111111011101
*L01472 00000000000000000000000011111111
*L01504 11111111111111111111111111111111
*L01536 11111111101110111011101110110111
*L01568 11111011011111110000000000000000
*L02144 00000000000011111111111111111111
*L02176 11111111111111111111111111111011
*L02208 10111011101110110111101110110111
*L02240 11110000000000000000000000000000
*L02880 00000000000000000000000011111111
*L02912 11111111111111111111111111111111
*L02944 11110111111111111111111111111111
*L02976 11111111111111110000000000000000
*L03648 00001111111111111111111111111111
*L03680 11111111111111110111111111111111
*L03712 11111111111111111111111111110000
*L05792 00000000000000001101010000111101
*L05824 01010100011001100101011011100110
*L05856 01010111001101110100011100100110
*L05888 0001
*C5F84
*5463

INST22Q.PLD

Name        INST22Q;
PartNo      Fenestra6502;
Revision    01;
Date        20/10/10;
Designer    Katunori Takesita;
Company     ;
Assembly    ;
Location    ;
Device      G22V10;

/* INPUTS */
Pin 1 = CLK;
Pin [2..9] = [D0..7];
Pin 10 = SYNC;
Pin 11 = RWB;
Pin 13 = BE;
Pin 14 = RD;
Pin 15 = WR;
Pin 16 = !RESET;

/* OUTPUTS */
Pin 17 = CLK3;
Pin 18 = CLK2;
Pin 19 = DU;
Pin 20 = !CTEN;
Pin 21 = !OE;
Pin 22 = !WE;
Pin 23 = E;

E = !CLK;
CLK2 = CLK;
CLK3 = CLK;
/* DU.CK = CLK; */
/* CTEN.CK = CLK; */

/* D-FF AsyncReset & Sync Preset */
DU.AR = RESET;
CTEN.AR = RESET;
DU.SP = 'b'0;
CTEN.SP = 'b'0;

/* JSR $20 00100000 */
/* RTS $60 01100000 */

$DEFINE JSR (!D7 & !D6 & D5 & !D4 & !D3 & !D2 & !D1 & !D0)
$DEFINE RTS (!D7 &  D6 & D5 & !D4 & !D3 & !D2 & !D1 & !D0)


DU.D = !(SYNC & JSR);
CTEN.D = SYNC & (JSR # RTS);
OE = ((BE & E & RWB) # (BE & RD));
WE = ((BE & E & !RWB) # (!BE & WR));

INST22Q.sim

%SIGNAL
PIN  13 =  BE 
PIN   1 =  CLK 
PIN  18 =  CLK2 
PIN  17 =  CLK3 
PIN  20 = !CTEN 
PIN   2 =  D0 
PIN   3 =  D1 
PIN   4 =  D2 
PIN   5 =  D3 
PIN   6 =  D4 
PIN   7 =  D5 
PIN   8 =  D6 
PIN   9 =  D7 
PIN  19 =  DU 
PIN  23 =  E 
PIN  21 = !OE 
PIN  14 =  RD 
PIN  16 = !RESET 
PIN  11 =  RWB 
PIN  10 =  SYNC 
PIN  22 = !WE 
PIN  15 =  WR 
%END

%FIELD
%END

%EQUATION
CLK2 =>
    CLK

CLK3 =>
    CLK

CTEN.d  =>
    !D0 & !D1 & !D2 & !D3 & !D4 & D5 & !D7 & SYNC

CTEN.ar DU.ar  =>
    !RESET

CTEN.sp DU.sp  =>
    0 

DU.d  =>
    !D0 & !D1 & !D2 & !D3 & !D4 & D5 & !D6 & !D7 & SYNC

DU.ar  =>
    
DU.sp  =>
    
E =>
    !CLK

OE =>
    BE & E & RWB
  # BE & RD

WE =>
    BE & E & !RWB
  # !BE & WR

CLK2.oe  =>
    1 

CLK3.oe  =>
    1 

CTEN.oe  =>
    1 

DU.oe  =>
    1 

E.oe  =>
    1 

OE.oe  =>
    1 

RD.oe  =>
    0 

RESET.oe  =>
    0 

WE.oe  =>
    1 

WR.oe  =>
    0 

%END