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Last active January 18, 2021 19:27
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Software-Progress.md

Progress on the software side :

  • At first, we tried to use an experimental version of LLVM/Clang (the epi one) which offers vector intrinsics.

  • Issue is that it is going to change heavily, and probably try to adhere to an official standard for risc-v vector intrinsic link - Example of C API for Vector integer arithmetic operations link.

  • Interestingly, the RISC-V GNU/GCC toolchain has a branch focusing on developing riscv intrinsic. This branch respects the api agreed on above, and is going to be merged upstream soon when the risc-v vector extension spec v1.0 is released. link. I have pulled that branch and tried to write some programs -> it works well !

  • Very important question : we have previously decided to use LLVM/Clang over GNU/GCC, it might be interesting to take a step back and move back to pure GNU/GCC

    • Issues that pushed us to go to LLVM/Clang before :
      • Vector intrinsics design : already being implemented into RISC-V GNU/GCC, no need to develop them from scratch ourselves. Can be called in C code directly.
      • Adding custom instructions : You've mentioned that you'd like to add custom instructions in RISC-V for us to be able to handle additional operations, like working with posits/bfloat16. I managed to implement a custom RISC-V instruction into the RISC-V GNU/GCC toolchain. Can be called using inline assembly. Link
      • Using LLVM/Clang for cross-compilation requires us to have the RISC-V GNU/GCC binutils/C library installed. Rather than using LLVM/Clang + RISC-V GNU/GCC, we can just use RISC-V GNU/GCC on its own.

  • Concerning the benchmarks we have talked about (matrix multiplication, convolution, linear regression), if you agree with us moving back to pure RISC-V GNU/GCC, we can re-write those benchmarks in C using vector intrinsics -> no one offers support for auto-vectorization, we need to get our hands dirty !

  • Concerning gem5 model, currently considering using gem5-SALAM. gem5-SALAM (System Architecture for LLVM-based Accelerator Modeling), is a system architecture designed to enable LLVM-based modeling and simulation of custom hardware accelerators in gem5. Still haven't been able to test it yet, but it seems to be an interesting alternative which would avoid us having to do everything manually. Link

Meeting Decisions :

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