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@hulous
Last active January 12, 2022 20:58
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My standard c and cpp makefile template

My Makefile Template

Description

My standard cpp makefile template

MYAPP is the main application class. MYLIB is the main application lib tool class SYSLIB is the target compilation lib tool class. DEPS_FOLDER is the folder which contains MYAPP, MYLIB and SYSLIB.

Commands

make launch compilation process and build a MYAPP binary. make run execute the binary build with make clean delete the objects files (.o) cleanup delete the objects files (.o) AND binary.

## MAKEFILE FOR C PROJECT
MYAPP = application
HEADERS = $(MYAPP).h
OBJECTS = $(MYAPP).o
default: $(MYAPP)
%.o: %.c $(HEADERS)
gcc -c $< -o $@
$(MYAPP): $(OBJECTS)
gcc $(OBJECTS) -o $@
run: clean $(MYAPP)
./$(MYAPP)
clean:
-rm -f $(OBJECTS)
-rm -f $(MYAPP)
## MAKEFILE FOR CPP PROJECT
CC=g++
CFLAGS=-I.
MYAPP = application
MYLIB = applicationLib
SYSLIB = systemLib
DEPS_FOLDER = lib
DEPS = $(DEPS_FOLDER)/$(MYAPP).hpp $(DEPS_FOLDER)/$(MYLIB).hpp $(DEPS_FOLDER)/$(SYSLIB).hpp
OBJ = main.o $(DEPS_FOLDER)/$(MYLIB).o $(DEPS_FOLDER)/$(MYAPP).o $(DEPS_FOLDER)/$(SYSLIB).o
RM := rm -rf
%.o: %.cpp $(DEPS)
$(CC) -c -o $@ $< $(CFLAGS)
$(MYAPP): $(OBJ)
g++ -o $@ $^ $(CFLAGS)
run:
./$(MYAPP)
clean:
-$(RM) $(OBJ)
-@echo ' '
cleanup:
-$(RM) $(OBJ) $(MYAPP)
-@echo ' '
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