AVR Assembly Template

template.asm

.INCLUDE "m8def.inc"

;====================================================================
;
; AVR assembly template
;
; Author:	Muhannad Ajjan (contact@isword.me)
; Created:	Tue Dec 8 2015
; Processor:	ATmega8
; Frequency:	1 MHz
; Compiler:	AVRA
; Indent:	Tabs (tab size = 8)
;
;====================================================================
; TODO
;====================================================================
;
;  1. replace foo with bar
;  2. replace magic numbers with constants
;  3. watch nyan cat in 4k for 10 hours
;
;====================================================================
; PINOUT
;====================================================================
;
;	OUTPUTS:
;	========
;
;	PORTB	7 segment cathodes
;
;	PC2	SIPO clock
;	PC3	SIPO data
;
;	INPUTS:
;	=======
;
;	PD2	Right switch 
;	PD3	Left switch
;	PD4:7	Binary values
;
;====================================================================
; DATA SEGMENT
;====================================================================

;==================================
; VARIABLES
;==================================

.DSEG

	; debouncing counter
	deb_counter:
		.byte	1

	; debouncing status (either 0x00 or 0xff)
	deb_status:
		.byte	1
	
;====================================================================
; RESET and INTERRUPT VECTORS
;====================================================================

.CSEG

	; Reset Vector
.org 0x000
	rjmp	Reset
	
	; Interrupt 0 (right switch)
.org 0x001
	rjmp	INT_0
	
	; Interrupt 1 (nyan swtich)
.org 0x002
	rjmp	INT_1
	
	; Timer/Counter2 Overflow (say nyan)
.org 0x004
	rjmp	Timer_2
	
	; Timer/Counter1 Overflow (debounce)
.org 0x008
	rjmp	Timer_1
	
	; Timer/Counter0 Overflow (do something cool)
.org 0x009
	rjmp	Timer_0
	

.org 0x013
	; Code starts at 0x013
	
;====================================================================
; DEFINITIONS
;====================================================================

	segment_codes:
	    .db	0x3F, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7F, 0x67, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x71

	.equ	segment_count = 4

	.equ	timer0_val	= 0x00
	.equ	timer1_vall	= 0x00
	.equ	timer1_valh	= 0xF0
	.equ	timer2_val	= 0x00

	.equ	timer0_pres	= 0x02	; clk/8
	.equ	timer1_pres	= 0x01	; no pres
	.equ	timer2_pres	= 0x05	; clk/1024

	.equ	def_deb_counter	= 0x00
	.equ	def_deb_status	= 0x00

	.equ	default_digit	= 0x3F

;====================================================================
; SETUP CODE
;====================================================================

Reset:
	; reset SP
	ldi	r16, low(RAMEND)
	out	spl, r16
	ldi	r16, high(RAMEND)
	out	spl, r16

;==================================
; VARIABLES INIT
;==================================

	; assign initial value to "deb_counter"
	ldi	zl, low(deb_counter)
	ldi	zh, high(deb_counter)
	ldi	r16, def_deb_counter
	st	z, r16

	; assign initial value to "deb_status"
	ldi	zl, low(deb_status)
	ldi	zh, high(deb_status)
	ldi	r16, def_deb_status
	st	z, r16
	
;==================================
; SETUP TIMERS & INTERRUPTS
;==================================
	
	sei ; enable interrupts

	; Timer 0 setup (8-bit)
	in	r16, timsk
	ori	r16, 0x01	; enable overflow
	out	timsk, r16

	ldi	r16, timer0_val
	out	tcnt0, r16

	ldi	r16, timer0_pres; prescaler
	out	tccr0, r16


	; Timer 1 setup (16-bit)
	in	r16, timsk
	ori	r16, 0x40	; enable overflow
	andi	r16, 0xc7	; disable compare match
	out	timsk, r16

	ldi	r16, timer1_vall
	out	tcnt1l, r16
	ldi	r16, timer1_valh
	out	tcnt1h, r16

	ldi	r16, 0x00
	out	tccr1a, r16
	ldi	r16, timer1_pres
	out	tccr1b, r16


	; Timer 2 setup (8-bit)
	in	r16, timsk
	ori	r16, 0x40	; enable overflow
	andi	r16, 0x7F	; disable output compare
	out	timsk, r16

	ldi	r16, timer2_val
	out	tcnt2, r16

	ldi	r16, timer2_pres; normal mode, prescaler
	out	tccr2, r16


	; Interrupt 0 & 1 setup
	in	r16, mcucr
	andi	r16, 0xF0	; both low level sensetive
	out	mcucr, r16

	in 	r16, gicr
	ori	r16, 0xC0	; enable interrupts 0 and 1
	out	gicr, r16

;==================================
; PIN DIRECTIONS
;==================================

	; == OUTPUT ==
	; PORTB
	ldi	r16, 0xff
	out	ddrb, r16

	; PC2:3
	in	r16, ddrc
	ori	r16, 0x0c
	out	ddrc, r16

	; == INPUT ==
	; PD2:3, PD4:7
	in	r16, ddrd
	andi	r16, 0xf3	; PD2:3
	andi	r16, 0x0f	; PD4:7
	out	ddrd, r16

;==================================
; MAIN LOOP
;==================================

Loop:
	rjmp	Loop

;====================================================================
; Functions
;====================================================================

Clock_SIPO:
	push	r16

	; +ve edge C2
	in	r16, portc
	andi	r16, 0xFB
	out	portc, r16

	nop

	ori	r16, 0x04
	out	portc, r16

	pop	r16

	ret

;====================================================================
; ISR's
;====================================================================


;==================================
; TIMERS
;==================================

Timer_0: ; do something cool
	push	r16
	push	r17
	in	r16, sreg
	push	r16

	; trigger pd0
	ldi	r17, 0x01
	in	r16, portd
	eor	r16, r17
	out	portd, r16

	pop	r16
	out	sreg, r16
	pop	r17
	pop	r16

	reti
	
Timer_1: ; debounce
	

	reti

Timer_2: ; say nyan
	

	reti

;==================================
; Interrupts
;==================================

INT_0:
	

	reti

INT_1:

	

	reti