Makefile automation script, makes making makefiles a breeze

Makefile

cpps = $(wildcard *.cpp */*.cpp)
objs = $(cpps:.cpp=.o)
deps = $(cpps:.cpp=.d)
CPPFLAGS = -I include/ -g -std=c++11 -Wall -Wextra -pedantic -Werror
 
all: executable
 
%.d: %.cpp %.o Makefile
        g++ $(CPPFLAGS) -MM -MT $(<:.cpp=.o) $< -o $@
 
ifneq ($(MAKECMDGOALS), clean)
-include $(deps)
endif
 
executable: $(deps)
        echo $(deps)
        g++ $(CPPFLAGS) -o executable $(objs)