secure_boot_hash_and_verify.S

# root_of_trust.S
.global reset_vector
  reset_vector:
  # ( all but hart 0 stall and wait for an interrupt. # Hart 0 proceeds, and will wake other harts if it boots. )
  csrr a0, mhartid
  bne a0, zero, .other_hart

  # Prepare a C execution environment
  la sp, m_stack_ptr

  # ( init DRAM with a boot image )
  # [redacted; system-specific]

  # ( Hash the bootloader binary in DRAM and compare
  # the hash against an expected constnat )
  call rot_hash_and_verify # returns a boolean in a0
  beq a0, zero, .bad_hash_panic

  # ( At this point, the bootloader measurement is correct,
  so transfer control to its entry point in DRAM )
  la ra, bootloader_ptr
  jalr ra

.bad_hash_panic:
  j .bad_hash_panic # stop until the system is reset
  # --- unreachable

.other_hart:
  # Harts will wake up at the bootloader entry point in DRAM
  la t0, .bootloader_ptr
  csrw mtvec, t0
  # Enable inter processor interrupts to wake up one day
  csrsi mie, 8
  csrsi mstatus, 8
  # Wait for an IPI from core 0
.wait_on_ipi:
  wfi
  j .wait_on_ipi
  # --- unreachable