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imrehg/vab-600-i2c.patch

Created December 20, 2014 08:43
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VIA VAB-600 Springboard patch to enable the board and i2c for the upstream kernel
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vab-600-i2c.patch
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b8c5cd3..3dd7c79 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -460,7 +460,8 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
wm8505-ref.dtb \
wm8650-mid.dtb \
wm8750-apc8750.dtb \
- wm8850-w70v2.dtb
+ wm8850-w70v2.dtb \
+ wm8950-vab600.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-parallella.dtb \
zynq-zc702.dtb \
diff --git a/arch/arm/boot/dts/wm8950-vab600.dts b/arch/arm/boot/dts/wm8950-vab600.dts
new file mode 100644
index 0000000..d7fc614
--- /dev/null
+++ b/arch/arm/boot/dts/wm8950-vab600.dts
@@ -0,0 +1,29 @@
+/*
+ * wm8950-vab600.dts
+ * - Device tree file for VIA VAB-600 Springboard
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+/include/ "wm8950.dtsi"
+
+/ {
+ model = "VIA VAB-600 Springboard";
+ compatible = "via,vab600", "wm,wm8950";
+
+ framebuffer {
+ compatible = "simple-framebuffer";
+ reg = <0x35200000 (1280 * 1024 * 2)>; /* Register is at top of memtotal, here 850Mb (850 << 20) */
+ width = <1280>;
+ height = <1024>;
+ stride = <(1280 * 2)>;
+ format = "r5g6b5";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/wm8950.dtsi b/arch/arm/boot/dts/wm8950.dtsi
new file mode 100644
index 0000000..c3f53c0
--- /dev/null
+++ b/arch/arm/boot/dts/wm8950.dtsi
@@ -0,0 +1,389 @@
+/*
+ * wm8950.dtsi - Device tree file for Wondermedia WM8950 SoC
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "wm,wm8950";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x0>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ i2c0 = &i2c_0;
+ i2c1 = &i2c_1;
+ i2c2 = &i2c_2;
+ i2c3 = &i2c_3;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+ interrupt-parent = <&intc0>;
+
+ intc0: interrupt-controller@d8140000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ reg = <0xd8140000 0x10000>;
+ #interrupt-cells = <1>;
+ };
+
+ /* Secondary IC cascaded to intc0 */
+ intc1: interrupt-controller@d8150000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xD8150000 0x10000>;
+ interrupts = <56 57 58 59 60 61 62 63>;
+ };
+
+ pinctrl: pinctrl@d8110000 {
+ compatible = "wm,wm8850-pinctrl","wm,prizm-pinctrl";
+ reg = <0xd8110000 0x10000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ref24: ref24M {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ };
+
+ plla: plla {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x200>;
+ };
+
+ pllb: pllb {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x204>;
+ };
+
+ pllc: pllc {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x208>;
+ };
+
+ plld: plld {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x20c>;
+ };
+
+ plle: plle {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x210>;
+ };
+
+ pllf: pllf {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x214>;
+ };
+
+ pllg: pllg {
+ #clock-cells = <0>;
+ compatible = "wm,wm8850-pll-clock";
+ clocks = <&ref24>;
+ reg = <0x218>;
+ };
+
+ clkarm: arm {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&plla>;
+ divisor-reg = <0x300>;
+ };
+
+ clkahb: ahb {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x304>;
+ };
+
+ clkapb: apb {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x320>;
+ };
+
+ clkddr: ddr {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&plld>;
+ divisor-reg = <0x310>;
+ };
+
+ clkuart0: uart0 {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&ref24>;
+ enable-reg = <0x254>;
+ enable-bit = <24>;
+ };
+
+ clkuart1: uart1 {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&ref24>;
+ enable-reg = <0x254>;
+ enable-bit = <25>;
+ };
+
+ clkuart2: uart2 {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&ref24>;
+ enable-reg = <0x254>;
+ enable-bit = <26>;
+ };
+
+ clkuart3: uart3 {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&ref24>;
+ enable-reg = <0x254>;
+ enable-bit = <27>;
+ };
+
+ clkpwm: pwm {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x350>;
+ enable-reg = <0x250>;
+ enable-bit = <17>;
+ };
+
+ clksdhc: sdhc {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x330>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x250>;
+ enable-bit = <0>;
+ };
+
+ clksf: sf {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x314>;
+ enable-reg = <0x254>;
+ enable-bit = <23>;
+ };
+
+ clki2c0: i2c0clk {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x3A0>;
+ enable-reg = <0x250>;
+ enable-bit = <8>;
+ };
+
+ clki2c1: i2c1clk {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x3A4>;
+ enable-reg = <0x250>;
+ enable-bit = <9>;
+ };
+
+ clki2c2: i2c2clk {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x3A8>;
+ enable-reg = <0x250>;
+ enable-bit = <10>;
+ };
+
+ clki2c3: i2c3clk {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x3AC>;
+ enable-reg = <0x250>;
+ enable-bit = <11>;
+ };
+ };
+ };
+
+ fb: fb@d8051700 {
+ compatible = "wm,wm8505-fb";
+ reg = <0xd8051700 0x200>;
+ };
+
+ ge_rops@d8050400 {
+ compatible = "wm,prizm-ge-rops";
+ reg = <0xd8050400 0x100>;
+ };
+
+ sf@d8002000 {
+ compatible = "wm,wm8505-sf";
+ reg = <0xd8002000 0x400>;
+ clocks = <&clksf>;
+ };
+
+ pwm: pwm@d8220000 {
+ #pwm-cells = <3>;
+ compatible = "via,vt8500-pwm";
+ reg = <0xd8220000 0x100>;
+ clocks = <&clkpwm>;
+ };
+
+ timer@d8130100 {
+ compatible = "via,vt8500-timer";
+ reg = <0xd8130100 0x28>;
+ interrupts = <36>;
+ };
+
+ ehci@d8007900 {
+ compatible = "via,vt8500-ehci";
+ reg = <0xd8007900 0x200>;
+ interrupts = <26>;
+ };
+
+ uhci@d8007b00 {
+ compatible = "platform-uhci";
+ reg = <0xd8007b00 0x200>;
+ interrupts = <26>;
+ };
+
+ uhci@d8008d00 {
+ compatible = "platform-uhci";
+ reg = <0xd8008d00 0x200>;
+ interrupts = <26>;
+ };
+
+ uart0: serial@d8200000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8200000 0x1040>;
+ interrupts = <32>;
+ clocks = <&clkuart0>;
+ status = "disabled";
+ };
+
+ uart1: serial@d82b0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82b0000 0x1040>;
+ interrupts = <33>;
+ clocks = <&clkuart1>;
+ status = "disabled";
+ };
+
+ uart2: serial@d8210000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8210000 0x1040>;
+ interrupts = <47>;
+ clocks = <&clkuart2>;
+ status = "disabled";
+ };
+
+ uart3: serial@d82c0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82c0000 0x1040>;
+ interrupts = <50>;
+ clocks = <&clkuart3>;
+ status = "disabled";
+ };
+
+ rtc@d8100000 {
+ compatible = "via,vt8500-rtc";
+ reg = <0xd8100000 0x10000>;
+ interrupts = <48>;
+ };
+
+ sdhc@d800a000 {
+ compatible = "wm,wm8505-sdhc";
+ reg = <0xd800a000 0x1000>;
+ interrupts = <20 21>;
+ clocks = <&clksdhc>;
+ bus-width = <4>;
+ sdon-inverted;
+ };
+
+ ethernet@d8004000 {
+ compatible = "via,vt8500-rhine";
+ reg = <0xd8004000 0x100>;
+ interrupts = <10>;
+ };
+
+ i2c_0: i2c@d8280000 {
+ compatible = "wm,wm8505-i2c";
+ reg = <0xd8280000 0x1000>;
+ interrupts = <19>;
+ clocks = <&clki2c0>;
+ clock-frequency = <400000>;
+ };
+
+ i2c_1: i2c@d8320000 {
+ compatible = "wm,wm8505-i2c";
+ reg = <0xd8320000 0x1000>;
+ interrupts = <18>;
+ clocks = <&clki2c1>;
+ clock-frequency = <400000>;
+ };
+
+ i2c_2: i2c@d83a0000 {
+ compatible = "wm,wm8505-i2c";
+ reg = <0xd83A0000 0x1000>;
+ interrupts = <7>;
+ clocks = <&clki2c2>;
+ clock-frequency = <400000>;
+ };
+
+ i2c_3: i2c@d83b0000 {
+ compatible = "wm,wm8505-i2c";
+ reg = <0xd83B0000 0x1000>;
+ interrupts = <15>;
+ clocks = <&clki2c3>;
+ clock-frequency = <400000>;
+ };
+ };
+};
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
index aaaa24f..0a555e0 100644
--- a/arch/arm/mach-vt8500/Kconfig
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -27,3 +27,10 @@ config ARCH_WM8850
select ARCH_VT8500
help
Support for WonderMedia WM8850 System-on-Chip.
+
+config ARCH_WM8950
+ bool "WonderMedia WM8950"
+ depends on ARCH_MULTI_V7
+ select ARCH_VT8500
+ help
+ Support for WonderMedia WM8950 System-on-Chip.
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