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# *************************************************************************** | |
# * (c) 2020 Jose I Romero <jose.cyborg@gmail.com> * | |
# * * | |
# * This file is part of the FreeCAD CAx development system. * | |
# * * | |
# * This program is free software; you can redistribute it and/or modify * | |
# * it under the terms of the GNU Lesser General Public License (LGPL) * | |
# * as published by the Free Software Foundation; either version 2 of * | |
# * the License, or (at your option) any later version. * | |
# * for detail see the LICENCE text file. * |
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#!/usr/bin/env python3 | |
from xml.etree import ElementTree | |
import re | |
from os.path import splitext | |
def fold_id(identifier): | |
return re.sub('\W|^(?=\d)','_', identifier) | |
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2018-01-01: 00:00:01.99 | POWERED | CAP NOT FULL | ||
---|---|---|---|---|
2018-01-01: 00:00:06.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:12.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:18.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:24.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:30.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:36.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:42.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:48.99 | POWERED | CAP FULL | ||
2018-01-01: 00:00:54.99 | POWERED | CAP FULL |
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# Must be readable and writable by apache | |
WSGISocketPrefix ${APACHE_RUN_DIR} | |
#NOTE: all urs below will need to be adjusted if | |
#settings.FORUM_SCRIPT_ALIAS !='' (e.g. = 'forum/') | |
#this allows "rooting" forum at [http://example.com/forum], if you like | |
<VirtualHost *:80> | |
ServerAdmin osqa@localhost | |
DocumentRoot /home/osqa/osqa | |
ServerName qa.percipia.com |
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LDmicro0.1 | |
MICRO=Microchip PIC16F887 40-PDIP | |
CYCLE=20000 | |
CRYSTAL=20000000 | |
BAUD=2400 | |
COMPILED=Z:\home\cyborgar\projects\washing-machine\compiled-ld\ladder.hex | |
IO LIST | |
XDOOR_LOCKED at 19 | |
XLEVEL_FULL at 22 |
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LDmicro export text | |
for 'Microchip PIC16F887 40-PDIP', 20.000000 MHz crystal, 20.0 ms cycle time | |
LADDER DIAGRAM: | |
|| || | |
|| ; All inputs are complementary in this PLC. so invert them. || | |
1 || || | |
|| || |
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=== modified file 'common/common.cpp' | |
--- common/common.cpp 2014-12-23 13:01:59 +0000 | |
+++ common/common.cpp 2015-01-05 06:56:25 +0000 | |
@@ -305,6 +305,46 @@ | |
return cfg; | |
} | |
+wxString GetKicadLockFilePath() | |
+{ | |
+ wxFileName lockpath; |