quadSineOsc

#include <msp430g2553.h>
#define A1  BIT1
/*
 * main.c
 */



unsigned char wave[256]={

		0,2,3,5,6,8,9,11,13,14,16,17,19,20,22,23,25,27,28,30,31,33,34,36,37,39,41,42,44,45,47,48,50,51,53,54,56,57,59,60,62,63,65,67,68,70,71,73,74,76,77,79,80,81,83,84,86,87,89,90,92,93,95,96,98,99,100,102,103,105,106,108,109,110,112,113,115,116,117,119,120,122,123,124,126,127,128,130,131,132,134,135,136,138,139,140,142,143,144,146,147,148,149,151,152,153,154,156,157,158,159,161,162,163,164,165,167,168,169,170,171,172,174,175,176,177,178,179,180,181,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,208,209,210,211,212,213,214,215,215,216,217,218,219,220,220,221,222,223,223,224,225,226,226,227,228,228,229,230,231,231,232,232,233,234,234,235,236,236,237,237,238,238,239,240,240,241,241,242,242,243,243,244,244,244,245,245,246,246,247,247,247,248,248,248,249,249,249,250,250,250,251,251,251,252,252,252,252,252,253,253,253,253,253,254,254,254,254,254,254,254,255,255,255,255,255,255,255,255,255,255

};











const unsigned int steps=512;	//sets the number of pwm steps

volatile unsigned long increment=1023;	//sets the initial increment for the accumulator
volatile unsigned long accumulator = 0;
volatile unsigned int n = 0;
volatile unsigned char adccnt = 0;
void ADC_init(void);

int main(void) {
    WDTCTL = WDTPW | WDTHOLD;	// Stop watchdog timer

	BCSCTL1 = CALBC1_16MHZ;						// Configure DCO for highest frequency
	DCOCTL = CALDCO_16MHZ;

//Configure the pins for the first PWM Channel (timer A1.1)

			//	set output to 0
	P2DIR |= BIT1;	//	set pin 2.1 to output
	P2SEL |= BIT1;	//  set pin 2.1 to Timer A1 CCR1 output

//Configure the pins for the second PWM Channel (timer A1.2)

	P2DIR |= BIT4;	//	set pin 2.4 to output
	P2SEL |= BIT4;	//  set pin 2.4 to Timer A1 CCR2 output

	

	//	Configure timer A1 for dual PWM

	TA1CCR0 = steps;	//sets timer A1 to count to the value of steps
	TA1CCR1 = 1;	//set the duty cycles
	TA1CCR2 = 1;

	TA1CTL = TASSEL_2 + ID_0 + MC_3;	//	SMLCLK, divide by 1, up/down mode

	TA1CCTL1 = OUTMOD_2;
	TA1CCTL2 = OUTMOD_2;


	//	Configure timer A0 to trigger the DDS interrupt every 16 clock ticks

	TA0CCTL0 = OUTMOD_2 + CCIE;
	TA0CCR0 = 16;
	TA0CTL = TASSEL_2 + ID_0 + MC_1;


ADC_init();

__enable_interrupt();

for (;;) {

}

}




#pragma vector = TIMER0_A0_VECTOR
__interrupt void counter_isr (void)
{
	if (adccnt ==0)		//Read the "shift" pot every 256 cycles
	{
	    ADC10CTL0 |= ADC10SC;   // start a new conversion
	    while ((ADC10CTL1 & ADC10BUSY) == 0x01);   // wait for conversion to end
	    increment=ADC10MEM;

	}
	adccnt++;
	accumulator+= increment;
	if (accumulator > 2097151 )		//reset the accumulator to limit it to 21 bits
	{	accumulator = 0;	}


	// 	Sine wave lookup routine

	if (accumulator >> 11 != n){

	n = accumulator >> 11;

	if (n < 256)						// quadrant 1
		{	TA1CCR1 = 256 + wave [n];
			TA1CCR2 = 256 - wave [255 - n];
		}


	if ((n > 255) && (n < 512))			//	quadrant 2
		{	TA1CCR1 = 256 + wave [511 - n];
			TA1CCR2 = 256 + wave [n - 256];
		}


	if ((n > 511) && (n < 768))			//	quadrant 3
		{	TA1CCR1 = 256 - wave [n - 512];
			TA1CCR2 = 256 + wave [767 - n];
		}


	if (n > 767)						//	quadrant 4
		{	TA1CCR1 = 256 - wave [1023 - n];
			TA1CCR2 = 256 - wave [n - 768];
		}

	}
//TA0CCR0 = 64;
}






void ADC_init(void) {
            // Use Vcc/Vss for Up/Low Refs, 16 x ADC10CLKs, turn on ADC
    ADC10CTL0 = SREF_0 + ADC10SHT_2 + ADC10ON;
            // A1 input, use ADC10CLK div 1, single channel mode
    ADC10CTL1 =  INCH_1 + SHS_0 + ADC10SSEL_0 + ADC10DIV_0 + CONSEQ_0;
    ADC10AE0 = A1;      // Enable ADC input on P1.1

    ADC10CTL0 |= ENC;     // Enable conversions.
} // ADC_init