Skip to content

Instantly share code, notes, and snippets.

@jacobly0

jacobly0/chip.diff

Created November 18, 2023 20:08
Show Gist options
  • Save jacobly0/89bbd9a495beec45ae9fbbfb3520430c to your computer and use it in GitHub Desktop.
Save jacobly0/89bbd9a495beec45ae9fbbfb3520430c to your computer and use it in GitHub Desktop.
Download ZIP
Raw
chip.diff
diff --git a/ATSAMD51J19A.zig b/ATSAMD51J19A.zig
index c8646ea..e9079a4 100644
--- a/ATSAMD51J19A.zig
+++ b/ATSAMD51J19A.zig
@@ -625,14 +625,14 @@ pub const types = struct {
}),
reserved12: [1]u8,
/// Scaler n
- SCALER: mmio.Mmio(packed struct(u8) {
+ SCALER: [2]mmio.Mmio(packed struct(u8) {
/// Scaler Value
VALUE: u6,
padding: u2,
}),
- reserved16: [3]u8,
+ reserved16: [2]u8,
/// Comparator Control n
- COMPCTRL: mmio.Mmio(packed struct(u32) {
+ COMPCTRL: [2]mmio.Mmio(packed struct(u32) {
reserved1: u1,
/// Enable
ENABLE: u1,
@@ -687,7 +687,7 @@ pub const types = struct {
},
padding: u2,
}),
- reserved32: [12]u8,
+ reserved32: [8]u8,
/// Synchronization Busy
SYNCBUSY: mmio.Mmio(packed struct(u32) {
/// Software Reset Synchronization Busy
@@ -1358,34 +1358,33 @@ pub const types = struct {
}),
reserved12: [2]u8,
/// Keyword n
- KEYWORD: mmio.Mmio(packed struct(u32) {
+ KEYWORD: [8]mmio.Mmio(packed struct(u32) {
/// Key Word Value
KEYWORD: u32,
}),
- reserved56: [40]u8,
+ reserved56: [12]u8,
/// Indata
INDATA: mmio.Mmio(packed struct(u32) {
/// Data Value
INDATA: u32,
}),
/// Initialisation Vector n
- INTVECTV: mmio.Mmio(packed struct(u32) {
+ INTVECTV: [4]mmio.Mmio(packed struct(u32) {
/// Initialization Vector Value
INTVECTV: u32,
}),
- reserved92: [28]u8,
+ reserved92: [16]u8,
/// Hash key n
- HASHKEY: mmio.Mmio(packed struct(u32) {
+ HASHKEY: [4]mmio.Mmio(packed struct(u32) {
/// Hash Key Value
HASHKEY: u32,
}),
- reserved108: [12]u8,
/// Galois Hash n
- GHASH: mmio.Mmio(packed struct(u32) {
+ GHASH: [4]mmio.Mmio(packed struct(u32) {
/// Galois Hash Value
GHASH: u32,
}),
- reserved128: [16]u8,
+ reserved128: [4]u8,
/// Cipher Length
CIPLEN: mmio.Mmio(packed struct(u32) {
/// Cipher Length
@@ -1526,7 +1525,7 @@ pub const types = struct {
}),
reserved4: [3]u8,
/// SEQ Control x
- SEQCTRL: mmio.Mmio(packed struct(u8) {
+ SEQCTRL: [2]mmio.Mmio(packed struct(u8) {
/// Sequential Selection
SEQSEL: packed union {
raw: u4,
@@ -1534,9 +1533,9 @@ pub const types = struct {
},
padding: u4,
}),
- reserved8: [3]u8,
+ reserved8: [2]u8,
/// LUT Control x
- LUTCTRL: mmio.Mmio(packed struct(u32) {
+ LUTCTRL: [4]mmio.Mmio(packed struct(u32) {
reserved1: u1,
/// LUT Enable
ENABLE: packed union {
@@ -1953,7 +1952,7 @@ pub const types = struct {
padding: u26,
}),
/// DAC n Control
- DACCTRL: mmio.Mmio(packed struct(u16) {
+ DACCTRL: [2]mmio.Mmio(packed struct(u16) {
/// Left Adjusted Data
LEFTADJ: u1,
/// Enable DAC0
@@ -1982,19 +1981,16 @@ pub const types = struct {
value: DAC_DACCTRL__OSR,
},
}),
- reserved16: [2]u8,
/// DAC n Data
- DATA: mmio.Mmio(packed struct(u16) {
+ DATA: [2]mmio.Mmio(packed struct(u16) {
/// DAC0 Data
DATA: u16,
}),
- reserved20: [2]u8,
/// DAC n Data Buffer
- DATABUF: mmio.Mmio(packed struct(u16) {
+ DATABUF: [2]mmio.Mmio(packed struct(u16) {
/// DAC0 Data Buffer
DATABUF: u16,
}),
- reserved24: [2]u8,
/// Debug Control
DBGCTRL: mmio.Mmio(packed struct(u8) {
/// Debug Run
@@ -2003,7 +1999,7 @@ pub const types = struct {
}),
reserved28: [3]u8,
/// Filter Result
- RESULT: mmio.Mmio(packed struct(u16) {
+ RESULT: [2]mmio.Mmio(packed struct(u16) {
/// Filter Result
RESULT: u16,
}),
@@ -3028,11 +3024,10 @@ pub const types = struct {
DATA: u32,
}),
/// Debug Communication Channel n
- DCC: mmio.Mmio(packed struct(u32) {
+ DCC: [2]mmio.Mmio(packed struct(u32) {
/// Data
DATA: u32,
}),
- reserved24: [4]u8,
/// Device Identification
DID: mmio.Mmio(packed struct(u32) {
/// Device Select
@@ -3073,11 +3068,11 @@ pub const types = struct {
}),
reserved240: [208]u8,
/// Device Configuration
- DCFG: mmio.Mmio(packed struct(u32) {
+ DCFG: [2]mmio.Mmio(packed struct(u32) {
/// Device Configuration
DCFG: u32,
}),
- reserved4096: [3852]u8,
+ reserved4096: [3848]u8,
/// CoreSight ROM Table Entry 0
ENTRY0: mmio.Mmio(packed struct(u32) {
/// Entry Present
@@ -3481,7 +3476,7 @@ pub const types = struct {
padding: u16,
}),
/// External Interrupt Sense Configuration
- CONFIG: mmio.Mmio(packed struct(u32) {
+ CONFIG: [2]mmio.Mmio(packed struct(u32) {
/// Input Sense Configuration 0
SENSE0: packed union {
raw: u3,
@@ -3539,7 +3534,7 @@ pub const types = struct {
/// Filter Enable 7
FILTEN7: u1,
}),
- reserved48: [16]u8,
+ reserved48: [12]u8,
/// Debouncer Enable
DEBOUNCEN: mmio.Mmio(packed struct(u32) {
/// Debouncer Enable
@@ -3851,7 +3846,7 @@ pub const types = struct {
}),
reserved288: [256]u8,
/// User Multiplexer n
- USER: mmio.Mmio(packed struct(u32) {
+ USER: [67]mmio.Mmio(packed struct(u32) {
/// Channel Event Selection
CHANNEL: u6,
padding: u26,
@@ -4032,7 +4027,7 @@ pub const types = struct {
}),
reserved32: [24]u8,
/// Generic Clock Generator Control
- GENCTRL: mmio.Mmio(packed struct(u32) {
+ GENCTRL: [12]mmio.Mmio(packed struct(u32) {
/// Source Select
SRC: packed union {
raw: u4,
@@ -4058,9 +4053,9 @@ pub const types = struct {
/// Division Factor
DIV: u16,
}),
- reserved128: [92]u8,
+ reserved128: [48]u8,
/// Peripheral Clock Control
- PCHCTRL: mmio.Mmio(packed struct(u32) {
+ PCHCTRL: [48]mmio.Mmio(packed struct(u32) {
/// Generic Clock Generator
GEN: packed union {
raw: u4,
@@ -4315,7 +4310,7 @@ pub const types = struct {
HASA: u25,
}),
/// User Initial Hash Value n
- UIHVAL: mmio.Mmio(packed struct(u32) {
+ UIHVAL: [8]mmio.Mmio(packed struct(u32) {
/// Initial Hash Value
VAL: u32,
}),
@@ -4629,7 +4624,7 @@ pub const types = struct {
}),
reserved4: [3]u8,
/// Clock Unit n Control
- CLKCTRL: mmio.Mmio(packed struct(u32) {
+ CLKCTRL: [2]mmio.Mmio(packed struct(u32) {
/// Slot Size
SLOTSIZE: packed union {
raw: u2,
@@ -4679,7 +4674,6 @@ pub const types = struct {
MCKOUTDIV: u6,
padding: u2,
}),
- reserved12: [4]u8,
/// Interrupt Enable Clear
INTENCLR: mmio.Mmio(packed struct(u16) {
/// Receive Ready 0 Interrupt Enable
@@ -5492,11 +5486,10 @@ pub const types = struct {
RUNLOCK: u32,
}),
/// Page Buffer Load Data x
- PBLDATA: mmio.Mmio(packed struct(u32) {
+ PBLDATA: [2]mmio.Mmio(packed struct(u32) {
/// Page Buffer Data
DATA: u32,
}),
- reserved36: [4]u8,
/// ECC Error Status Register
ECCERR: mmio.Mmio(packed struct(u32) {
/// Error Address
@@ -6205,7 +6198,7 @@ pub const types = struct {
padding: u4,
}),
/// External Multipurpose Crystal Oscillator Control
- XOSCCTRL: mmio.Mmio(packed struct(u32) {
+ XOSCCTRL: [2]mmio.Mmio(packed struct(u32) {
reserved1: u1,
/// Oscillator Enable
ENABLE: u1,
@@ -6241,7 +6234,6 @@ pub const types = struct {
},
padding: u4,
}),
- reserved28: [4]u8,
/// DFLL48M Control A
DFLLCTRLA: mmio.Mmio(packed struct(u8) {
reserved1: u1,
@@ -7263,14 +7255,14 @@ pub const types = struct {
padding: u16,
}),
/// Channel n Compare Value
- CC: mmio.Mmio(packed struct(u32) {
+ CC: [2]mmio.Mmio(packed struct(u32) {
/// Channel Compare Value
CC: u16,
padding: u16,
}),
- reserved48: [12]u8,
+ reserved48: [8]u8,
/// Channel Compare Buffer Value
- CCBUF: mmio.Mmio(packed struct(u32) {
+ CCBUF: [2]mmio.Mmio(packed struct(u32) {
/// Channel Compare Buffer Value
CCBUF: u16,
padding: u16,
@@ -7611,7 +7603,7 @@ pub const types = struct {
PORTEI3: u1,
}),
/// Peripheral Multiplexing
- PMUX: mmio.Mmio(packed struct(u8) {
+ PMUX: [16]mmio.Mmio(packed struct(u8) {
/// Peripheral Multiplexing for Even-Numbered Pin
PMUXE: packed union {
raw: u4,
@@ -7623,9 +7615,8 @@ pub const types = struct {
value: PORT_PMUX__PMUXO,
},
}),
- reserved64: [15]u8,
/// Pin Configuration
- PINCFG: mmio.Mmio(packed struct(u8) {
+ PINCFG: [32]mmio.Mmio(packed struct(u8) {
/// Peripheral Multiplexer Enable
PMUXEN: u1,
/// Input Enable
@@ -7637,7 +7628,7 @@ pub const types = struct {
DRVSTR: u1,
padding: u1,
}),
- padding: [63]u8,
+ padding: [32]u8,
};
/// Port Module
@@ -8610,17 +8601,17 @@ pub const types = struct {
}),
reserved32: [4]u8,
/// MODE0 Compare n Value
- COMP: mmio.Mmio(packed struct(u32) {
+ COMP: [2]mmio.Mmio(packed struct(u32) {
/// Compare Value
COMP: u32,
}),
- reserved64: [28]u8,
+ reserved64: [24]u8,
/// General Purpose
- GP: mmio.Mmio(packed struct(u32) {
+ GP: [4]mmio.Mmio(packed struct(u32) {
/// General Purpose
GP: u32,
}),
- reserved96: [28]u8,
+ reserved96: [16]u8,
/// Tamper Control
TAMPCTRL: mmio.Mmio(packed struct(u32) {
/// Tamper Input 0 Action
@@ -8695,7 +8686,7 @@ pub const types = struct {
}),
reserved128: [20]u8,
/// Backup
- BKUP: mmio.Mmio(packed struct(u32) {
+ BKUP: [8]mmio.Mmio(packed struct(u32) {
/// Backup
BKUP: u32,
}),
@@ -8946,17 +8937,17 @@ pub const types = struct {
}),
reserved32: [2]u8,
/// MODE1 Compare n Value
- COMP: mmio.Mmio(packed struct(u16) {
+ COMP: [4]mmio.Mmio(packed struct(u16) {
/// Compare Value
COMP: u16,
}),
- reserved64: [30]u8,
+ reserved64: [24]u8,
/// General Purpose
- GP: mmio.Mmio(packed struct(u32) {
+ GP: [4]mmio.Mmio(packed struct(u32) {
/// General Purpose
GP: u32,
}),
- reserved96: [28]u8,
+ reserved96: [16]u8,
/// Tamper Control
TAMPCTRL: mmio.Mmio(packed struct(u32) {
/// Tamper Input 0 Action
@@ -9032,7 +9023,7 @@ pub const types = struct {
}),
reserved128: [20]u8,
/// Backup
- BKUP: mmio.Mmio(packed struct(u32) {
+ BKUP: [8]mmio.Mmio(packed struct(u32) {
/// Backup
BKUP: u32,
}),
@@ -9334,11 +9325,11 @@ pub const types = struct {
}),
reserved64: [19]u8,
/// General Purpose
- GP: mmio.Mmio(packed struct(u32) {
+ GP: [4]mmio.Mmio(packed struct(u32) {
/// General Purpose
GP: u32,
}),
- reserved96: [28]u8,
+ reserved96: [16]u8,
/// Tamper Control
TAMPCTRL: mmio.Mmio(packed struct(u32) {
/// Tamper Input 0 Action
@@ -9426,7 +9417,7 @@ pub const types = struct {
}),
reserved128: [20]u8,
/// Backup
- BKUP: mmio.Mmio(packed struct(u32) {
+ BKUP: [8]mmio.Mmio(packed struct(u32) {
/// Backup
BKUP: u32,
}),
@@ -10811,11 +10802,10 @@ pub const types = struct {
padding: u2,
}),
/// Response
- RR: mmio.Mmio(packed struct(u32) {
+ RR: [4]mmio.Mmio(packed struct(u32) {
/// Command Response
CMDRESP: u32,
}),
- reserved32: [12]u8,
/// Buffer Data Port
BDPR: mmio.Mmio(packed struct(u32) {
/// Buffer Data
@@ -11708,13 +11698,13 @@ pub const types = struct {
}),
reserved88: [3]u8,
/// ADMA System Address
- ASAR: mmio.Mmio(packed struct(u32) {
+ ASAR: [1]mmio.Mmio(packed struct(u32) {
/// ADMA System Address
ADMASA: u32,
}),
reserved96: [4]u8,
/// Preset Value n
- PVR: mmio.Mmio(packed struct(u16) {
+ PVR: [8]mmio.Mmio(packed struct(u16) {
/// SDCLK Frequency Select Value for Initialization
SDCLKFSEL: u10,
/// Clock Generator Select Value for Initialization
@@ -11729,7 +11719,7 @@ pub const types = struct {
value: SDHC_PVR__DRVSEL,
},
}),
- reserved252: [154]u8,
+ reserved252: [140]u8,
/// Slot Interrupt Status
SISR: mmio.Mmio(packed struct(u16) {
/// Interrupt Signal for Each SDHC Slot
@@ -14112,18 +14102,18 @@ pub const types = struct {
PER: u8,
}),
/// COUNT8 Compare and Capture
- CC: mmio.Mmio(packed struct(u8) {
+ CC: [2]mmio.Mmio(packed struct(u8) {
/// Counter/Compare Value
CC: u8,
}),
- reserved47: [18]u8,
+ reserved47: [17]u8,
/// COUNT8 Period Buffer
PERBUF: mmio.Mmio(packed struct(u8) {
/// Period Buffer Value
PERBUF: u8,
}),
/// COUNT8 Compare and Capture Buffer
- CCBUF: mmio.Mmio(packed struct(u8) {
+ CCBUF: [2]mmio.Mmio(packed struct(u8) {
/// Counter/Compare Buffer Value
CCBUF: u8,
}),
@@ -14337,13 +14327,13 @@ pub const types = struct {
}),
reserved28: [6]u8,
/// COUNT16 Compare and Capture
- CC: mmio.Mmio(packed struct(u16) {
+ CC: [2]mmio.Mmio(packed struct(u16) {
/// Counter/Compare Value
CC: u16,
}),
- reserved48: [18]u8,
+ reserved48: [16]u8,
/// COUNT16 Compare and Capture Buffer
- CCBUF: mmio.Mmio(packed struct(u16) {
+ CCBUF: [2]mmio.Mmio(packed struct(u16) {
/// Counter/Compare Buffer Value
CCBUF: u16,
}),
@@ -14557,13 +14547,13 @@ pub const types = struct {
}),
reserved28: [4]u8,
/// COUNT32 Compare and Capture
- CC: mmio.Mmio(packed struct(u32) {
+ CC: [2]mmio.Mmio(packed struct(u32) {
/// Counter/Compare Value
CC: u32,
}),
- reserved48: [16]u8,
+ reserved48: [12]u8,
/// COUNT32 Compare and Capture Buffer
- CCBUF: mmio.Mmio(packed struct(u32) {
+ CCBUF: [2]mmio.Mmio(packed struct(u32) {
/// Counter/Compare Buffer Value
CCBUF: u32,
}),
@@ -15485,14 +15475,14 @@ pub const types = struct {
padding: u8,
}),
/// Compare and Capture
- CC: mmio.Mmio(packed struct(u32) {
+ CC: [6]mmio.Mmio(packed struct(u32) {
/// Dithering Cycle Number
DITHER: u4,
/// Channel Compare/Capture Value
CC: u20,
padding: u8,
}),
- reserved100: [28]u8,
+ reserved100: [8]u8,
/// Pattern Buffer
PATTBUF: mmio.Mmio(packed struct(u16) {
/// Pattern Generator 0 Output Enable Buffer
@@ -15538,7 +15528,7 @@ pub const types = struct {
padding: u8,
}),
/// Compare and Capture Buffer
- CCBUF: mmio.Mmio(packed struct(u32) {
+ CCBUF: [6]mmio.Mmio(packed struct(u32) {
/// Channel Compare/Capture Buffer Value
CCBUF: u4,
/// Dithering Buffer Cycle Number
@@ -17123,11 +17113,11 @@ pub const types = struct {
/// Instrumentation Trace Macrocell
pub const ITM = extern struct {
/// ITM Stimulus Port Registers
- PORT: mmio.Mmio(packed struct(u32) {
+ PORT: [32]mmio.Mmio(packed struct(u32) {
PORT: u8,
padding: u24,
}),
- reserved3584: [3580]u8,
+ reserved3584: [3456]u8,
/// ITM Trace Enable Register
TER: u32,
reserved3648: [60]u8,
@@ -17361,42 +17351,42 @@ pub const types = struct {
/// Nested Vectored Interrupt Controller
pub const NVIC = extern struct {
/// Interrupt Set Enable Register
- ISER: mmio.Mmio(packed struct(u32) {
+ ISER: [5]mmio.Mmio(packed struct(u32) {
/// Interrupt set enable bits
SETENA: u32,
}),
- reserved128: [124]u8,
+ reserved128: [108]u8,
/// Interrupt Clear Enable Register
- ICER: mmio.Mmio(packed struct(u32) {
+ ICER: [5]mmio.Mmio(packed struct(u32) {
/// Interrupt clear-enable bits
CLRENA: u32,
}),
- reserved256: [124]u8,
+ reserved256: [108]u8,
/// Interrupt Set Pending Register
- ISPR: mmio.Mmio(packed struct(u32) {
+ ISPR: [5]mmio.Mmio(packed struct(u32) {
/// Interrupt set-pending bits
SETPEND: u32,
}),
- reserved384: [124]u8,
+ reserved384: [108]u8,
/// Interrupt Clear Pending Register
- ICPR: mmio.Mmio(packed struct(u32) {
+ ICPR: [5]mmio.Mmio(packed struct(u32) {
/// Interrupt clear-pending bits
CLRPEND: u32,
}),
- reserved512: [124]u8,
+ reserved512: [108]u8,
/// Interrupt Active Bit Register
- IABR: mmio.Mmio(packed struct(u32) {
+ IABR: [5]mmio.Mmio(packed struct(u32) {
/// Interrupt active bits
ACTIVE: u32,
}),
- reserved768: [252]u8,
+ reserved768: [236]u8,
/// Interrupt Priority Register n
- IP: mmio.Mmio(packed struct(u8) {
+ IP: [35]mmio.Mmio(packed struct(u8) {
/// Priority of interrupt n
PRI0: u3,
padding: u5,
}),
- reserved3584: [2815]u8,
+ reserved3584: [2781]u8,
/// Software Trigger Interrupt Register
STIR: mmio.Mmio(packed struct(u32) {
/// Interrupt ID to trigger
@@ -17891,18 +17881,16 @@ pub const types = struct {
IMPDEF: u32,
}),
/// Processor Feature Register
- PFR: u32,
- reserved3396: [4]u8,
+ PFR: [2]u32,
/// Debug Feature Register
DFR: u32,
/// Auxiliary Feature Register
ADR: u32,
/// Memory Model Feature Register
- MMFR: u32,
- reserved3420: [12]u8,
+ MMFR: [4]u32,
/// Instruction Set Attributes Register
- ISAR: u32,
- reserved3460: [36]u8,
+ ISAR: [5]u32,
+ reserved3460: [20]u8,
/// Coprocessor Access Control Register
CPACR: mmio.Mmio(packed struct(u32) {
reserved20: u20,
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment