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@jamesmunns
Created April 2, 2020 08:55
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Q&A session 2020-04-01

Misc notes:

    HAL - Hardware Abstraction Layer
^ Written by humans

Lowest: PAC - Peripheral Access Crate ^ Generated by svd2rust Register interface

52 byte structure * BTR 12 byte offset, 4 byte register * defaults to 0x0000_0000 * Subfields * BRP 00..=09 * TS1 16..=19 * TS2 20..=22 * SJW 24..=25 * LBKM 30 * SILM 31

0x40001000 - CAN1 0x40002000 - CAN2 0x40003000 - CAN3

read - read only access write - access that will OVERWRITE modify - read + write access

Task1: Read the value of brp

use stm32f4; // PAC

// in main

// Peripherals
let periph = stm32f4::take().unwrap();

// Take my CAN item - destructure
let can = periph.CAN1;

// TODO: I might need a deref here
// BTR register - 32 bits
let btr = can.btr;

// Gain access to the btr register
let _ = btr.read().bits(); // would give me the
                           // WHOLE 32 bit reg

// Just read brp
let brp_val: u16 = btr.read().brp().bits();
// 0bXXXX_XXX?_????_????

Task2: Modify the value of brp

use stm32f4; // PAC

// in main

// Peripherals
let periph = stm32f4::take().unwrap();

// Take my CAN item - destructure
let can = periph.CAN1;

// TODO: I might need a deref here
// BTR register - 32 bits
let btr = can.btr;

btr.modify(|r, w| {
    if r.brp().bits() >= 12 {
        unsafe {
            w.brp().bits(11u16);
        }
    }

    unsafe {
        w
            .brp().bits(11)
            .lbkm().enabled();
    }
});
// WRONG!
btr.write(|w| unsafe { w.brp.bits(11) });
btr.write(|w| w.lbkm().enabled());

// Right!
btr.write(|w| unsafe { 
    w.brp.bits(11)
     .lbkm().enabled()
});

unsafe fn foo() {
    btr.write(|w| { 
        w.brp.bits(11)
         .lbkm().enabled()
    });
}

Peter's next steps

  • Clone the stm32f3xx hal
  • patch your application to use your local copy
  • Implement the InputPin trait for PA1<Output<OpenDrain>> - Take inspiration from the stm32f0 hal crate!
    • Read from the datasheet, what makes sense
    • Ask for help in matrix :)
  • Make sure that works for you! (should work)
  • Submit a PR to the stm32f3xx-hal with your changes!
  • Once merged and released, you can update your dependency
# In your application
[patch.crates-io]
stm32f3xx-hal = { path = "../stm32f3xx-hal" }

Testing

  1. Non-Host Testing - General
    • Just test code
    • Make it not a no_std crate in some testing cases
  2. Non-Host Testing - HAL based
    • dht11 good example
    • embedded-hal-mock
  3. Host Testing/HIL
    • examples/ - if youre writing a library or hal
    • utest - run on uC, results over semihosting
    • avatar-rs - remote control of your uC
   byte 0 wr       byte 1 wr        rd/wr   ....................
[register id] [ register sub id ] [ data 0 ] [ data 1 ] ... [ data N ]
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