microarchitectures.txt

# Noteworthy CPU Features
SSE      128-bit vector instructions (e.g. addps http://www.felixcloutier.com/x86/ADDPS.html)
SSE4.1   Makes SSE good
SSE4.2   Makes SSE do strings and CRC32
AVX      Makes SSE 256-bit (e.g. vaddps)
AVX2     Adds features to AVX
AVX-512  Makes SSE 512-bit
SHA      Makes SSE do SHA1 and SHA256
FMA      Fused multiply–add
CLMUL    Carry-less multiplication https://goo.gl/ritKJX
TSX      Transactional memory instructions for threads http://www.intel.com/software/tsx

# Intel CPU Line
2003 P6 M           SSE SSE2
2004 prescott       SSE3 SSSE3 (-march=prescott)
2006 core           X64 SSE4.1 (only on 45nm variety) (-march=core2)
2008 nehalem        SSE4.2 VT-x VT-d (-march=nehalem)
2010 westmere       CLMUL AES (-march=westmere)
2012 sandybridge    AVX TXT (-march=sandybridge)
2012 ivybridge      F16C MOVBE (-march=ivybridge)
2013 haswell        AVX2 TSX BMI2 FMA (-march=haswell)
2014 broadwell      RDSEED ADCX PREFETCHW (-march=broadwell - works on trusty gcc4.9)
2015 skylake        SGX ADX MPX AVX-512[xeon-only] (-march=skylake / -march=skylake-avx512 - needs gcc7)
2018 cannonlake     AVX-512 SHA (-march=cannonlake - needs clang5)

# Intel Low Power CPU Line
2013 silvermont     SSE4.1 SSE4.2 VT-x (-march=silvermont)
2016 goldmont       SHA (-march=goldmont - needs clang5)

# AMD CPU Line
2003 k8             SSE SSE2 (-march=k8)
2005 k8 (Venus)     SSE3 (-march=k8-sse3)
2008 barcelona      SSE4a?! (-march=barcelona)
2011 bulldozer      SSE4.1 SSE4.2 CLMUL AVX AES FMA4?! (-march=bdver1)
2011 piledriver     FMA (-march=bdver2)
2015 excavator      AVX2 BMI2 MOVBE (-march=bdver4)

# Google Compute Engine Supported CPUs
# https://cloud.google.com/compute/docs/cpu-platforms
2012 sandybridge 2.6gHz -march=sandybridge
2012 ivybridge   2.5gHz -march=ivybridge
2013 haswell     2.3gHz -march=haswell
2014 broadwell   2.2gHz -march=broadwell
2015 skylake     2.0gHz -march=skylake-avx512