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jboone/gist:5326952

Last active December 15, 2015 21:39
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Altera Quartus II barf. Not sure which pins to move where...
Raw
gistfile1.txt
Error (169015): Cannot place pin mem_dqs[3] to location AE18
Error (169223): Can't place VREF pin Y17 (VREFGROUP_B4_N2) for pin mem_dqs[3] of type bi-directional with SSTL-18 Class I I/O standard at location AE18
Error (169224): Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 4 when the VREF pin Y17 (VREFGROUP_B4_N2) is used on device EP4CE30F29C8 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
Info (169220): Location AE16 (pad PAD_221): Pin mem_a[15] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AH19 (pad PAD_225): Pin mem_dm[3] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF18 (pad PAD_227): Pin mem_a[2] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AC17 (pad PAD_231): Pin mem_a[14] of type output uses SSTL-18 Class I I/O standard
Info (169225): Following 6 pins have the same output enable group -2: 6 pins require VREF pin and 6 pins could be output
Info (169220): Location AB16 (pad PAD_220): Pin mem_dq[39] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AE17 (pad PAD_222): Pin mem_dq[36] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG18 (pad PAD_223): Pin mem_dq[32] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH18 (pad PAD_224): Pin mem_dq[33] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AD17 (pad PAD_226): Pin mem_dq[31] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG21 (pad PAD_230): Pin mem_dq[26] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169222): Following 12 location(s) shared the same VCCIO and ground pair, and 10 pin(s) are placed
Info (169220): Location AB16 (pad PAD_220): Pin mem_dq[39] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AE16 (pad PAD_221): Pin mem_a[15] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AE17 (pad PAD_222): Pin mem_dq[36] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG18 (pad PAD_223): Pin mem_dq[32] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH18 (pad PAD_224): Pin mem_dq[33] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH19 (pad PAD_225): Pin mem_dm[3] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AD17 (pad PAD_226): Pin mem_dq[31] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF18 (pad PAD_227): Pin mem_a[2] of type output uses SSTL-18 Class I I/O standard
Info (169221): Location AE18 (pad PAD_228): unused (but has pin assignment of mem_dqs[3])
Info (169221): Location Y17 (pad PAD_229): unused
Info (169220): Location AG21 (pad PAD_230): Pin mem_dq[26] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AC17 (pad PAD_231): Pin mem_a[14] of type output uses SSTL-18 Class I I/O standard
Error (169015): Cannot place pin mem_dqs[4] to location AF17
Error (169223): Can't place VREF pin AA15 (VREFGROUP_B4_N3) for pin mem_dqs[4] of type bi-directional with SSTL-18 Class I I/O standard at location AF17
Error (169224): Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 4 when the VREF pin AA15 (VREFGROUP_B4_N3) is used on device EP4CE30F29C8 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
Info (169220): Location AE16 (pad PAD_221): Pin mem_a[15] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AH19 (pad PAD_225): Pin mem_dm[3] of type output uses SSTL-18 Class I I/O standard
Info (169225): Following 8 pins have the same output enable group -2: 8 pins require VREF pin and 8 pins could be output
Info (169220): Location AF15 (pad PAD_214): Pin mem_dq[38] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG17 (pad PAD_215): Pin mem_dq[34] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH17 (pad PAD_216): Pin mem_dq[35] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF16 (pad PAD_218): Pin mem_dq[37] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AB16 (pad PAD_220): Pin mem_dq[39] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AE17 (pad PAD_222): Pin mem_dq[36] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG18 (pad PAD_223): Pin mem_dq[32] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH18 (pad PAD_224): Pin mem_dq[33] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169222): Following 12 location(s) shared the same VCCIO and ground pair, and 10 pin(s) are placed
Info (169220): Location AF15 (pad PAD_214): Pin mem_dq[38] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG17 (pad PAD_215): Pin mem_dq[34] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH17 (pad PAD_216): Pin mem_dq[35] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169221): Location W16 (pad PAD_217): unused
Info (169220): Location AF16 (pad PAD_218): Pin mem_dq[37] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169221): Location AF17 (pad PAD_219): unused (but has pin assignment of mem_dqs[4])
Info (169220): Location AB16 (pad PAD_220): Pin mem_dq[39] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AE16 (pad PAD_221): Pin mem_a[15] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AE17 (pad PAD_222): Pin mem_dq[36] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AG18 (pad PAD_223): Pin mem_dq[32] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH18 (pad PAD_224): Pin mem_dq[33] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH19 (pad PAD_225): Pin mem_dm[3] of type output uses SSTL-18 Class I I/O standard
Error (169015): Cannot place pin mem_dqs[5] to location AF11
Error (169223): Can't place VREF pin AB11 (VREFGROUP_B3_N1) for pin mem_dqs[5] of type bi-directional with SSTL-18 Class I I/O standard at location AF11
Error (169224): Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 3 when the VREF pin AB11 (VREFGROUP_B3_N1) is used on device EP4CE30F29C8 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
Info (169220): Location AH10 (pad PAD_182): Pin mem_a[13] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AH12 (pad PAD_184): Pin mem_ba[1] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF8 (pad PAD_185): Pin mem_dm[5] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF12 (pad PAD_186): Pin mem_odt[0] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF13 (pad PAD_188): Pin mem_s_n[0] of type output uses SSTL-18 Class I I/O standard
Info (169225): Following 5 pins have the same output enable group -2: 5 pins require VREF pin and 5 pins could be output
Info (169220): Location AH8 (pad PAD_180): Pin mem_dq[48] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF7 (pad PAD_181): Pin mem_dq[55] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF9 (pad PAD_183): Pin mem_dq[52] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AE9 (pad PAD_187): Pin mem_dq[46] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF10 (pad PAD_189): Pin mem_dq[47] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169222): Following 12 location(s) shared the same VCCIO and ground pair, and 10 pin(s) are placed
Info (169221): Location AE10 (pad PAD_179): unused (but has pin assignment of mem_dqs[6])
Info (169220): Location AH8 (pad PAD_180): Pin mem_dq[48] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF7 (pad PAD_181): Pin mem_dq[55] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH10 (pad PAD_182): Pin mem_a[13] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF9 (pad PAD_183): Pin mem_dq[52] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH12 (pad PAD_184): Pin mem_ba[1] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF8 (pad PAD_185): Pin mem_dm[5] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF12 (pad PAD_186): Pin mem_odt[0] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AE9 (pad PAD_187): Pin mem_dq[46] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF13 (pad PAD_188): Pin mem_s_n[0] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF10 (pad PAD_189): Pin mem_dq[47] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169221): Location AF11 (pad PAD_190): unused (but has pin assignment of mem_dqs[5])
Error (169015): Cannot place pin mem_dqs[6] to location AE10
Error (169223): Can't place VREF pin AB11 (VREFGROUP_B3_N1) for pin mem_dqs[6] of type bi-directional with SSTL-18 Class I I/O standard at location AE10
Error (169224): Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 3 when the VREF pin AB11 (VREFGROUP_B3_N1) is used on device EP4CE30F29C8 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
Info (169220): Location AH10 (pad PAD_182): Pin mem_a[13] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AH12 (pad PAD_184): Pin mem_ba[1] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF8 (pad PAD_185): Pin mem_dm[5] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF12 (pad PAD_186): Pin mem_odt[0] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF13 (pad PAD_188): Pin mem_s_n[0] of type output uses SSTL-18 Class I I/O standard
Info (169225): Following 5 pins have the same output enable group -2: 5 pins require VREF pin and 5 pins could be output
Info (169220): Location AH8 (pad PAD_180): Pin mem_dq[48] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF7 (pad PAD_181): Pin mem_dq[55] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF9 (pad PAD_183): Pin mem_dq[52] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AE9 (pad PAD_187): Pin mem_dq[46] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF10 (pad PAD_189): Pin mem_dq[47] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169222): Following 12 location(s) shared the same VCCIO and ground pair, and 10 pin(s) are placed
Info (169221): Location AB11 (pad PAD_178): unused
Info (169221): Location AE10 (pad PAD_179): unused (but has pin assignment of mem_dqs[6])
Info (169220): Location AH8 (pad PAD_180): Pin mem_dq[48] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF7 (pad PAD_181): Pin mem_dq[55] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH10 (pad PAD_182): Pin mem_a[13] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF9 (pad PAD_183): Pin mem_dq[52] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AH12 (pad PAD_184): Pin mem_ba[1] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF8 (pad PAD_185): Pin mem_dm[5] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF12 (pad PAD_186): Pin mem_odt[0] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AE9 (pad PAD_187): Pin mem_dq[46] of type bi-directional uses SSTL-18 Class I I/O standard
Info (169220): Location AF13 (pad PAD_188): Pin mem_s_n[0] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF10 (pad PAD_189): Pin mem_dq[47] of type bi-directional uses SSTL-18 Class I I/O standard
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