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Jared Boone jboone

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jboone / gist:2728082
Created May 18, 2012 23:20
First hacked-up attempt at high-speed USB bulk transfers to LPC43xx microcontroller
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <libusb.h>
bool read_file_to_buffer(const char* const filename, uint8_t* const buffer, uint32_t buffer_size) {
memset(buffer, 0x69, buffer_size);
FILE* f = fopen(filename, "rb");
if( f == NULL ) {
@jboone
jboone / lsusb -v of Jellybean
Created May 18, 2012 23:46
First hacked-up attempt at high-speed USB bulk transfers to LPC43xx microcontroller
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <libusb.h>
bool read_file_to_buffer(const char* const filename, uint8_t* const buffer, uint32_t buffer_size) {
memset(buffer, 0x69, buffer_size);
FILE* f = fopen(filename, "rb");
if( f == NULL ) {
@jboone
jboone / kicad-boost-polygon-sort-adaptor.patch
Created May 21, 2012 16:51
KiCAD and wxWidgets patches to build on Mac OS X and add my hacked-in "magnify" touchpad support
=== modified file 'include/boost/polygon/polygon.hpp'
--- include/boost/polygon/polygon.hpp 2012-05-16 01:42:04 +0000
+++ include/boost/polygon/polygon.hpp 2012-05-21 06:11:22 +0000
@@ -23,6 +23,7 @@
#include "transform.hpp"
#include "detail/transform_detail.hpp"
+#include "detail/polygon_sort_adaptor.hpp"
//interval
@jboone
jboone / bit_band_peripheral.c
Created June 5, 2012 18:43
LPC43xx code for configuring Si5351 and internal clock tree.
volatile uint_fast8_t* peripheral_bitband_address(volatile void* const address, const uint_fast8_t bit_number) {
const uint32_t bit_band_base = 0x42000000;
const uint32_t byte_offset = (uint32_t)address - 0x40000000;
const uint32_t bit_word_offset = (byte_offset * 32) + (bit_number * 4);
const uint32_t bit_word_address = bit_band_base + bit_word_offset;
return (volatile uint_fast8_t*)bit_word_address;
}
void peripheral_bitband_set(volatile void* const peripheral_address, const uint_fast8_t bit_number) {
volatile uint_fast8_t* const bitband_address = peripheral_bitband_address(peripheral_address, bit_number);
@jboone
jboone / sgpio.c
Created October 10, 2012 20:17
SGPIO Source Code
void sgpio_irqhandler() {
SGPIO_CLR_STATUS_1 = 0xFFFFFFFF;
uint32_t* const p32 = &usb_bulk_buffer[buffer_offset];
volatile const uint32_t* const sgpio_reg_ss_base = SGPIO_PORT_BASE + 0x100;
p32[7] = SGPIO_REG_SS(SGPIO_SLICE_A);
p32[6] = SGPIO_REG_SS(SGPIO_SLICE_I);
p32[5] = SGPIO_REG_SS(SGPIO_SLICE_E);
p32[4] = SGPIO_REG_SS(SGPIO_SLICE_J);
@jboone
jboone / gist:5326952
Last active December 15, 2015 21:39
Altera Quartus II barf. Not sure which pins to move where...
Error (169015): Cannot place pin mem_dqs[3] to location AE18
Error (169223): Can't place VREF pin Y17 (VREFGROUP_B4_N2) for pin mem_dqs[3] of type bi-directional with SSTL-18 Class I I/O standard at location AE18
Error (169224): Too many output and bidirectional pins per VCCIO and ground pair in I/O bank 4 when the VREF pin Y17 (VREFGROUP_B4_N2) is used on device EP4CE30F29C8 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
Info (169220): Location AE16 (pad PAD_221): Pin mem_a[15] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AH19 (pad PAD_225): Pin mem_dm[3] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AF18 (pad PAD_227): Pin mem_a[2] of type output uses SSTL-18 Class I I/O standard
Info (169220): Location AC17 (pad PAD_231): Pin mem_a[14] of type output uses SSTL-18 Class I I/O standard
Info (169225): Followin
@jboone
jboone / gist:5570497
Created May 13, 2013 18:50
Arduino sketch to manipulate Noritake Graphic DMA parallel interface.
const int pin_led = 13;
const int pin_wr = 8;
const int pin_rdy = 9;
void write_byte(const uint8_t c) {
while( (PINB & 2) == 0 );
PORTB &= 0xfe; // /WR=0
PORTD = c;
PORTB |= 0x01; // /WR=1
@jboone
jboone / gist:5881987
Last active December 19, 2015 02:19
LPC43xx code for GPIO pin interrupts, ripped from the quadrature encoder code of my HackRF spectrum analyzer. (I should clean up that code and post it someday...)
// Pin configuration.
scu_pinmux(SCU_SD_CD, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_SD_DAT3, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
SCU_PINTSEL0 =
(1 << 13) | // GPIO1[6]
(6 << 8) |
(1 << 5) | // GPIO1[5]
(5 << 0)
;
@jboone
jboone / gist:6050693
Created July 22, 2013 01:13
Pings from host on PHY0, captured from RXD when RX_DV valid.
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555555555dffffffffffff4d491ab88400806000108000604000104d491ab884000c8a10200000000000000c8a1030000000000000000000000000000000000000036d3177
555555555
@jboone
jboone / gist:6262845
Created August 18, 2013 17:27
My BeagleBone audio cape is now showing up in the Linux kernel's dmesg output, under control of bone-capemgr. W00t!
[ 1.609911] bone-capemgr bone_capemgr.9: Baseboard: 'A335BNLT,0A5A,1613BBBK3540'
[ 1.617713] bone-capemgr bone_capemgr.9: compatible-baseboard=ti,beaglebone-black
[ 1.656793] bone-capemgr bone_capemgr.9: slot #0: No cape found
[ 1.693899] bone-capemgr bone_capemgr.9: slot #1: No cape found
[ 1.731008] bone-capemgr bone_capemgr.9: slot #2: No cape found
[ 1.761297] bone-capemgr bone_capemgr.9: slot #3: 'Howler Audio Cape,0000,ShareBrained,HOWLER-20130530'
[ 1.771303] bone-capemgr bone_capemgr.9: slot #4: specific override
[ 1.777909] bone-capemgr bone_capemgr.9: bone: Using override eeprom data at slot 4
[ 1.785945] bone-capemgr bone_capemgr.9: slot #4: 'Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G'
[ 1.796083] bone-capemgr bone_capemgr.9: slot #5: specific override