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6502 address decoding PLC
Name JCODEC;
Partno JCODEC;
Revision 01;
Date 01/17/2020;
Designer John O'Connell;
Company ;
Location USA;
Assembly None;
Device p22v10;
/****************************************************************/
/* */
/* This is an address decoder for 6502 microprocessors */
/* This device will provide Enable and select signals */
/* for RAM, ROM and up to 4 I/O devices such as 65C22 */
/* */
/****************************************************************/
/*
* Inputs: Clock, R/W, and address lines from 65C02
*/
Pin 1 = PHI2;
Pin 2 = RW;
Pin 3 = A15;
Pin 4 = A14;
Pin 5 = A13;
Pin 6 = A12;
Pin 7 = A11;
Pin 8 = A10;
Pin 9 = A9;
Pin 10 = A8;
Pin 11 = A7;
Pin 13 = A6;
Pin 14 = A5;
Pin 15 = A4;
/*
* Outputs
* 22V10 output logic macrocell available input terms
* Pin Terms
* 14 8
* 15 10
* 16 12
* 17 14
* 18 16
* 19 16
* 20 14
* 21 12
* 22 10
* 23 8
*/
Pin 16 = RAM; /* RAM CS, active low */
Pin 17 = CS1; /* VIA #1 CS, active low */
Pin 18 = CS2; /* VIA #2 CS, active low */
Pin 19 = CS3; /* VIA #3 CS, active low */
Pin 20 = CS4; /* VIA #4 CS, active low */
Pin 21 = ROM; /* ROM CS, active low */
Pin 22 = OE; /* ROM and RAM, active low to enable output to data bus */
Pin 23 = WE; /* ROM and RAM, active low to write to the chip from data bus */
/*
* Logic: Outputs drive active low CS pins on RAM, ROM, and VIA chips
*
* Memory Map
*
* 0x0000 - 0x7FFF 32768 Bytes RAM
* 0x8000 - 0x800F 16 Bytes VIA 1
* 0x8010 - 0x801F 16 Bytes VIA 2
* 0x8020 - 0x802F 16 Bytes VIA 3
* 0x8030 - 0x803F 16 Bytes VIA 4
* 0x8040 - 0xFFFF 32704 Bytes ROM
*/
OE = !(PHI2 & RW);
WE = !(PHI2 & !RW);
RAM = A15;
CS1 = ! (A15 & !A14 & !A13 & !A12 & !A11 & !A10 & !A9 & !A8 & !A7 & !A6 & !A5 & !A4 );
CS2 = ! (A15 & !A14 & !A13 & !A12 & !A11 & !A10 & !A9 & !A8 & !A7 & !A6 & !A5 & A4 );
CS3 = ! (A15 & !A14 & !A13 & !A12 & !A11 & !A10 & !A9 & !A8 & !A7 & !A6 & A5 & !A4 );
CS4 = ! (A15 & !A14 & !A13 & !A12 & !A11 & !A10 & !A9 & !A8 & !A7 & !A6 & A5 & A4 );
ROM = ! (A15 & ( A14 # A13 # A12 # A11 # A10 # A9 # A8 # A7 # A6 ));
Name JCODEC;
PartNo JCODEC;
Date 01/17/2020;
Revision 01;
Designer John O'Connell;
Company ;
Assembly None;
Location USA;
Device p22v10;
ORDER: PHI2, RW, A15, A14, A13, A12, A11, A10, A9, A8, A7, A6, A5, A4, WE, OE, RAM, CS1, CS2, CS3, CS4, ROM;
VECTORS:
00000000000000********
10000000000000********
00000000000000********
01000000000000********
11000000000000********
01000000000000********
01011111111111********
01100000000000********
01100000000001********
01100000000010********
01100000000011********
01100000000100********
01111111111111********
CSIM(WM): CUPL Simulation Program
Version 5.0a Serial#
Copyright (c) 1983, 1998 Logical Devices, Inc.
CREATED Sat Jan 18 16:01:33 2020
LISTING FOR SIMULATION FILE: JCODEC.si
1: Name JCODEC;
2: PartNo JCODEC;
3: Date 01/17/2020;
4: Revision 01;
5: Designer John O'Connell;
6: Company ;
7: Assembly None;
8: Location USA;
9: Device p22v10;
10:
11:
12: ORDER: PHI2, RW, A15, A14, A13, A12, A11, A10, A9, A8, A7, A6, A5, A4, WE, OE, RAM, CS1, CS2, CS3, CS4, ROM;
13:
14:
===============================
P
H AAAAAA RCCCCR
IR111111AAAAAAWOASSSSO
2W543210987654EEM1234M
===============================
0001: 00000000000000HHLHHHHH
0002: 10000000000000LHLHHHHH
0003: 00000000000000HHLHHHHH
0004: 01000000000000HHLHHHHH
0005: 11000000000000HLLHHHHH
0006: 01000000000000HHLHHHHH
0007: 01011111111111HHLHHHHH
0008: 01100000000000HHHLHHHH
0009: 01100000000001HHHHLHHH
0010: 01100000000010HHHHHLHH
0011: 01100000000011HHHHHHLH
0012: 01100000000100HHHHHHHL
0013: 01111111111111HHHHHHHL
const char ADDR[] = {22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52}; // A15..A0
const char DATA[] = {39, 41, 43, 45, 47, 49, 51, 53}; // D7..D0
#define CLOCK 2
#define RW 3
#define WE 23
#define OE 25
#define ROM 27
#define CS4 29
#define CS3 31
#define CS2 33
#define CS1 35
#define RAM 37
void setAddress(word address) {
for ( int i=15; i >= 0; i-- ) {
digitalWrite(ADDR[i], address & 1);
address = address >> 1;
}
}
void checkPrint(word address) {
bool wri_EN = digitalRead(WE);
bool out_EN = digitalRead(OE);
bool rom_CS = digitalRead(ROM);
bool ram_CS = digitalRead(RAM);;
bool va1_CS = digitalRead(CS1);
bool va2_CS = digitalRead(CS2);
bool va3_CS = digitalRead(CS3);
bool va4_CS = digitalRead(CS4);
char output[128];
sprintf(output, " Address %04x - OE:%c WE:%c RAM:%c CS1:%c CS2:%c CS3:%c CS4:%c ROM:%c",
address,
out_EN ? '+' : '-',
wri_EN ? '+' : '-',
ram_CS ? '+' : '-',
va1_CS ? '+' : '-',
va2_CS ? '+' : '-',
va3_CS ? '+' : '-',
va4_CS ? '+' : '-',
rom_CS ? '+' : '-');
Serial.println(output);
}
void setup() {
//Pin modes
for( int i = 0; i < 16; i++ ) {
pinMode(ADDR[i], OUTPUT);
}
for( int i = 0; i < 8; i++ ) {
pinMode(DATA[i], INPUT);
}
for(int i=0; i<16; i++) {
digitalWrite(ADDR[i], LOW);
}
pinMode(CLOCK,OUTPUT);
pinMode(RW,OUTPUT);
digitalWrite(CLOCK, LOW);
digitalWrite(RW, HIGH);
pinMode(WE,INPUT);
pinMode(OE,INPUT);
pinMode(ROM,INPUT);
pinMode(CS4,INPUT);
pinMode(CS3,INPUT);
pinMode(CS2,INPUT);
pinMode(CS1,INPUT);
pinMode(RAM,INPUT);
Serial.begin(57600);
Serial.println("Read RAM 0x0000");
setAddress(0x0000);
digitalWrite(RW, HIGH);
digitalWrite(CLOCK, HIGH);
checkPrint(0x0000);
Serial.println("Write RAM 0x0101");
setAddress(0x0101);
digitalWrite(RW, LOW);
checkPrint(0x0101);
Serial.println("Top of RAM");
setAddress(0x7FFF);
digitalWrite(RW, HIGH);
checkPrint(0x7FFF);
Serial.println("Interface #1");
setAddress(0x8000);
checkPrint(0x8000);
Serial.println("Interface #2");
setAddress(0x8010);
checkPrint(0x8010);
Serial.println("Interface #3");
setAddress(0x8020);
checkPrint(0x8020);
Serial.println("Interface #4");
setAddress(0x8030);
checkPrint(0x8030);
Serial.println("Bottom of ROM");
setAddress(0x8040);
checkPrint(0x8040);
Serial.println("Top of ROM");
setAddress(0xFFFF);
checkPrint(0xFFFF);
}
void loop() {
}
@jco2641
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jco2641 commented Jan 18, 2020

Simulation

@jco2641
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jco2641 commented Jan 19, 2020

TestOut

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