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spps_t.v

`timescale 1ns/1ns 

// `include "spps.v" 

module spps_tb;  
    reg clk; 
    reg rst_n; 
    reg en; 
    reg si; 
    reg load; 
    reg [7:0] pi; 
    wire [7:0] po; 
    wire so; 
    reg flag; //reg sign; 
    
    initial 
        begin   
            flag=1'b1;   
            #400;   
            flag=1'b0;
        end 
    
    initial 
        begin   
            en = 1'b0;   
            si = 1'b0;   
            #10;   // 4'b1010 锟斤拷锟斤拷si为1010锟斤拷锟脚猴拷为锟较凤拷锟斤拷锟斤拷
            si = 1'b1;   
            #20;   
            si = 1'b0;
            si = 1'b1;   
            #20;   
            si = 1'b0;
            si = 1'b1;   
            #20;   
            si = 1'b0;
            #20;   
            si = 1'b1;   
            #20;   
            en = 1'b1;    //锟斤拷en锟脚号达拷时锟斤拷为1锟斤拷锟斤拷时锟斤拷锟斤拷po   
            si = 1'b0;   
            #20;   
            en = 1'b0;   
            si = 1'bx; 
        end

    initial 
        begin      
            load = 1'b0;   
            pi = 8'hxxxxxxxx;   
            #400;   
            load <= 1'b1;   
            pi <= 8'b11001100;  
            #20;   
            load <= 1'b0;   
            pi <= 8'hxxxxxxxx;   
            #90   load<=1'b1;   
            pi<=8'hxxxxxxxx; 
        end 

    initial 
        clk = 1'b0; 
        always #10 clk = ~clk;  
    
    initial 
        begin   
            rst_n = 1'b0;   
            #5; 
            rst_n = 1'b1; 
        end 

//    initial 
//        begin   
//            $fsdbDumpfile("spps.fsdb");   
//            $fsdbDumpvars(0, spps_tb);   
//            #100;   
//            $finish; 
//        end 

    spps spps_0 (.clk(clk), .rst_n(rst_n), .en(en), .si(si), .po(po), .flag(flag), .load(load), .pi(pi), .so(so), .sign(sign) );
    
endmodule