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| DragonPy - Dragon 32 emulator in Python None | |
| ------------------------------------------------------------------------------- | |
| set log level to: 5 | |
| /home/jens/workspace/DragonPy/cpu6809.py --verbosity=5 | |
| Verbosity log level: Level 5 | |
| logfile log level: INFO | |
| DragonPy_CLI.py --verbosity=5 | |
| Verbosity log level: Level 5 | |
| logfile log level: INFO | |
| cpu6809.py --bus 42823 --rom d32.rom --verbosity=5 | |
| Verbosity log level: Level 5 | |
| logfile log level: INFO | |
| Use bus port: 42823 | |
| init 16384 Bytes ROM (0x8000 - 0xc000) | |
| Read 16383Bytes from d32.rom into ROM 0x8000-0xbfff | |
| init 32768 Bytes RAM (0x0 - 0x8000) | |
| $b3b4 CPU reset: | |
| set cc.F=1: FIRQ interrupt masked | |
| set cc.I=1: IRQ interrupt masked | |
| set PC to $b3b4 | |
| ------------------------------------------------------------------------------- | |
| $b3b4 read pc byte: $31 from $b3b4 | |
| $b3b4 LEAY INDEXED instruction_LEA_register | $b3b4: $b3b4-$b3b9 - RESET interrupt service routine (CoCo $a027) Loads Y with $b39b and JMPs $8000 | |
| $b3b5 read pc byte: $8c from $b3b5 | |
| $b3b6 addressing 'indexed' with postbyte: $8c == 10001100 | |
| $b3b6 read pc byte: $e4 from $b3b6 | |
| $b3b7 indexed addressing mode ea=$b39b | $b39b: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b3b7 get 'indexed' byte: ea = $b39b m = $10 | |
| $b39b instruction_LEA_register kwargs: ea=$b39b m=$10 opcode=$31 operand=<Y (8-Bit):0> | |
| $b3b7 LEA Y: Set Y to $b39b | $b39b: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| ------------------------------------------------------------------------------- | |
| $b3b7 read pc byte: $7e from $b3b7 | |
| $b3b7 JMP EXTENDED instruction_JMP | $b3b7: $b3b4-$b3b9 - RESET interrupt service routine (CoCo $a027) Loads Y with $b39b and JMPs $8000 | |
| $b3b8 read pc word: $8000 from $b3b8 | |
| $b3ba addressing 'extended indirect' ea: $8000 | $8000: $8000-$8002 - Hardware Initialisation (JMP $bb40; D64 JMP $bb3c) | |
| $b3ba get 'extended' word: ea = $8000 m = $7ebb | |
| $8000 instruction_JMP kwargs: ea=$8000 m=$7ebb opcode=$7e | |
| $b3ba JMP to $8000 | $8000: $8000-$8002 - Hardware Initialisation (JMP $bb40; D64 JMP $bb3c) | |
| ------------------------------------------------------------------------------- | |
| $8000 read pc byte: $7e from $8000 | |
| $8000 JMP EXTENDED instruction_JMP | $8000: $8000-$8002 - Hardware Initialisation (JMP $bb40; D64 JMP $bb3c) | |
| $8001 read pc word: $bb40 from $8001 | |
| $8003 addressing 'extended indirect' ea: $bb40 | $bb40: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $8003 get 'extended' word: ea = $bb40 m = $cc00 | |
| $8003 JMP to $bb40 | $bb40: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb40 read pc byte: $cc from $bb40 | |
| $bb40 LDD IMMEDIATE instruction_LD16 | $bb40: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb41 read pc word: $0034 from $bb41 | |
| $bb41 addressing 'immediate word' value: $34 | |
| $bb41 *** last op code 126 count: 1 - new op code: $cc (LDD -> instruction_LD16) | |
| $bb43 LD16 set D to $34 | $34: $33-$34 - Ptr to next item in current DATA statement | |
| ------------------------------------------------------------------------------- | |
| $bb43 read pc byte: $8e from $bb43 | |
| $bb43 LDX IMMEDIATE instruction_LD16 | $bb43: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb44 read pc word: $ff00 from $bb44 | |
| $bb44 addressing 'immediate word' value: $ff00 | |
| $bb44 instruction_LD16 kwargs: ea=$bb44 m=$ff00 opcode=$8e operand=<X (8-Bit):0> | |
| $bb46 LD16 set X to $ff00 | $ff00: $ff00 - PIA 0 A side Data reg. PA7 i/p Comparator input PA6 i/p Keyboard Matrix Ent Clr Brk N/c N/c N/c N/c Shift PA5 i/p Keyboard Matrix X Y Z Up Dwn Lft Rgt Space i/p CoCo - Keyboard 8 9 : ; , - . / PA4 i/p Keyboard Matrix P Q R S T U V W i/p CoCo - Keyboard 0 1 2 3 4 5 6 7 PA3 i/p Keyboard Matrix H I J K L M N O i/p CoCo - Keyboard X Y Z Up Dwn Lft Rgt Space PA2 i/p Keyboard Matrix @ A B C D E F G i/p CoCo - Keyboard P Q R S T U V W PA1 i/p Keyboard Matrix 8 9 : ; , - . / i/p CoCo - Keyboard H I J K L M N O i/p Left Joystick Button PA0 i/p Keyboard Matrix 0 1 2 3 4 5 6 7 i/p CoCo - Keyboard @ A B C D E F G i/p Right Joystick Button | |
| ------------------------------------------------------------------------------- | |
| $bb46 read pc byte: $a7 from $bb46 | |
| $bb46 STA INDEXED instruction_ST8 | $bb46: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb47 read pc byte: $01 from $bb47 | |
| $bb48 addressing 'indexed' with postbyte: $1 == 00000001 | |
| **** bus read $ff01 | |
| Periphery.read_byte (cycle: 0x28) from: $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| *** TODO: PIA 0 A side control register | |
| PIA call at $ff01 pia_0_A_control returned $b3 | $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| $bb48 get 'indexed' byte: ea = $ff01 m = $b3 | |
| $ff01 instruction_ST8 kwargs: ea=$ff01 m=$b3 opcode=$a7 operand=<A (8-Bit):0> | |
| $bb48 ST8 store value $0 from A at $ff01 | $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| **** bus write $ff01 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff01 the value $0 | |
| $bb48 read pc byte: $a7 from $bb48 | |
| *** TODO: PIA write byte $0 to $ff01 | $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| $bb48 STA INDEXED instruction_ST8 | $bb48: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb49 read pc byte: $03 from $bb49 | |
| $bb4a addressing 'indexed' with postbyte: $3 == 00000011 | |
| **** bus read $ff03 | |
| Periphery.read_byte (cycle: 0x30) from: $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| *** TODO: PIA 0 B side control register | |
| PIA call at $ff03 pia_0_B_control returned $35 | $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| $bb4a get 'indexed' byte: ea = $ff03 m = $35 | |
| $bb4a ST8 store value $0 from A at $ff03 | $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| **** bus write $ff03 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff03 the value $0 | |
| $bb4a read pc byte: $a7 from $bb4a | |
| *** TODO: PIA write byte $0 to $ff03 | $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| $bb4a STA INDEXED instruction_ST8 | $bb4a: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb4b read pc byte: $84 from $bb4b | |
| $bb4c addressing 'indexed' with postbyte: $84 == 10000100 | |
| $bb4c indexed addressing mode ea=$ff00 | $ff00: $ff00 - PIA 0 A side Data reg. PA7 i/p Comparator input PA6 i/p Keyboard Matrix Ent Clr Brk N/c N/c N/c N/c Shift PA5 i/p Keyboard Matrix X Y Z Up Dwn Lft Rgt Space i/p CoCo - Keyboard 8 9 : ; , - . / PA4 i/p Keyboard Matrix P Q R S T U V W i/p CoCo - Keyboard 0 1 2 3 4 5 6 7 PA3 i/p Keyboard Matrix H I J K L M N O i/p CoCo - Keyboard X Y Z Up Dwn Lft Rgt Space PA2 i/p Keyboard Matrix @ A B C D E F G i/p CoCo - Keyboard P Q R S T U V W PA1 i/p Keyboard Matrix 8 9 : ; , - . / i/p CoCo - Keyboard H I J K L M N O i/p Left Joystick Button PA0 i/p Keyboard Matrix 0 1 2 3 4 5 6 7 i/p CoCo - Keyboard @ A B C D E F G i/p Right Joystick Button | |
| **** bus read $ff00 | |
| Periphery.read_byte (cycle: 0x39) from: $ff00: $ff00 - PIA 0 A side Data reg. PA7 i/p Comparator input PA6 i/p Keyboard Matrix Ent Clr Brk N/c N/c N/c N/c Shift PA5 i/p Keyboard Matrix X Y Z Up Dwn Lft Rgt Space i/p CoCo - Keyboard 8 9 : ; , - . / PA4 i/p Keyboard Matrix P Q R S T U V W i/p CoCo - Keyboard 0 1 2 3 4 5 6 7 PA3 i/p Keyboard Matrix H I J K L M N O i/p CoCo - Keyboard X Y Z Up Dwn Lft Rgt Space PA2 i/p Keyboard Matrix @ A B C D E F G i/p CoCo - Keyboard P Q R S T U V W PA1 i/p Keyboard Matrix 8 9 : ; , - . / i/p CoCo - Keyboard H I J K L M N O i/p Left Joystick Button PA0 i/p Keyboard Matrix 0 1 2 3 4 5 6 7 i/p CoCo - Keyboard @ A B C D E F G i/p Right Joystick Button | |
| *** TODO: PIA 0 A side data register | |
| PIA call at $ff00 pia_0_A_data returned $0 | $ff00: $ff00 - PIA 0 A side Data reg. PA7 i/p Comparator input PA6 i/p Keyboard Matrix Ent Clr Brk N/c N/c N/c N/c Shift PA5 i/p Keyboard Matrix X Y Z Up Dwn Lft Rgt Space i/p CoCo - Keyboard 8 9 : ; , - . / PA4 i/p Keyboard Matrix P Q R S T U V W i/p CoCo - Keyboard 0 1 2 3 4 5 6 7 PA3 i/p Keyboard Matrix H I J K L M N O i/p CoCo - Keyboard X Y Z Up Dwn Lft Rgt Space PA2 i/p Keyboard Matrix @ A B C D E F G i/p CoCo - Keyboard P Q R S T U V W PA1 i/p Keyboard Matrix 8 9 : ; , - . / i/p CoCo - Keyboard H I J K L M N O i/p Left Joystick Button PA0 i/p Keyboard Matrix 0 1 2 3 4 5 6 7 i/p CoCo - Keyboard @ A B C D E F G i/p Right Joystick Button | |
| $bb4c get 'indexed' byte: ea = $ff00 m = $0 | |
| $bb4c ST8 store value $0 from A at $ff00 | $ff00: $ff00 - PIA 0 A side Data reg. PA7 i/p Comparator input PA6 i/p Keyboard Matrix Ent Clr Brk N/c N/c N/c N/c Shift PA5 i/p Keyboard Matrix X Y Z Up Dwn Lft Rgt Space i/p CoCo - Keyboard 8 9 : ; , - . / PA4 i/p Keyboard Matrix P Q R S T U V W i/p CoCo - Keyboard 0 1 2 3 4 5 6 7 PA3 i/p Keyboard Matrix H I J K L M N O i/p CoCo - Keyboard X Y Z Up Dwn Lft Rgt Space PA2 i/p Keyboard Matrix @ A B C D E F G i/p CoCo - Keyboard P Q R S T U V W PA1 i/p Keyboard Matrix 8 9 : ; , - . / i/p CoCo - Keyboard H I J K L M N O i/p Left Joystick Button PA0 i/p Keyboard Matrix 0 1 2 3 4 5 6 7 i/p CoCo - Keyboard @ A B C D E F G i/p Right Joystick Button | |
| **** bus write $ff00 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff00 the value $0 | |
| $bb4c read pc byte: $43 from $bb4c | |
| *** TODO: PIA write byte $0 to $ff00 | $ff00: $ff00 - PIA 0 A side Data reg. PA7 i/p Comparator input PA6 i/p Keyboard Matrix Ent Clr Brk N/c N/c N/c N/c Shift PA5 i/p Keyboard Matrix X Y Z Up Dwn Lft Rgt Space i/p CoCo - Keyboard 8 9 : ; , - . / PA4 i/p Keyboard Matrix P Q R S T U V W i/p CoCo - Keyboard 0 1 2 3 4 5 6 7 PA3 i/p Keyboard Matrix H I J K L M N O i/p CoCo - Keyboard X Y Z Up Dwn Lft Rgt Space PA2 i/p Keyboard Matrix @ A B C D E F G i/p CoCo - Keyboard P Q R S T U V W PA1 i/p Keyboard Matrix 8 9 : ; , - . / i/p CoCo - Keyboard H I J K L M N O i/p Left Joystick Button PA0 i/p Keyboard Matrix 0 1 2 3 4 5 6 7 i/p CoCo - Keyboard @ A B C D E F G i/p Right Joystick Button | |
| $bb4c COMA INHERENT instruction_COM_register | $bb4c: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb4c *** last op code 167 count: 2 - new op code: $43 (COMA -> instruction_COM_register) | |
| **** A value $-1 is negative | |
| **** Value A (8-bit) wrap around to $ff | |
| $bb4d COM A from $0 to $-1 | $-1: UNKNOWN | |
| ------------------------------------------------------------------------------- | |
| $bb4d read pc byte: $a7 from $bb4d | |
| $bb4d STA INDEXED instruction_ST8 | $bb4d: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb4e read pc byte: $02 from $bb4e | |
| $bb4f addressing 'indexed' with postbyte: $2 == 00000010 | |
| **** bus read $ff02 | |
| Periphery.read_byte (cycle: 0x44) from: $ff02: $ff02 - PIA 0 B side Data reg. PB7 o/p Keyboard Matrix 7 / G O W Space Shift o/p Printer Out bit 7 PB6 o/p Keyboard Matrix 6 . F N V Right N/c o/p Printer Out bit 6 PB5 o/p Keyboard Matrix 5 - E M U Left N/c o/p Printer Out bit 5 PB4 o/p Keyboard Matrix 4 , D L T Down N/c o/p Printer Out bit 4 PB3 o/p Keyboard Matrix 3 ; C K S Up N/c o/p Printer Out bit 3 PB2 o/p Keyboard Matrix 2 : B J R Z Break o/p Printer Out bit 2 PB1 o/p Keyboard Matrix 1 9 A I Q Y Clear o/p Printer Out bit 1 PB0 o/p Keyboard Matrix 0 8 @ H P X Enter o/p Printer Out bit 0 | |
| *** TODO: PIA 0 B side data register | |
| PIA call at $ff02 pia_0_B_data returned $0 | $ff02: $ff02 - PIA 0 B side Data reg. PB7 o/p Keyboard Matrix 7 / G O W Space Shift o/p Printer Out bit 7 PB6 o/p Keyboard Matrix 6 . F N V Right N/c o/p Printer Out bit 6 PB5 o/p Keyboard Matrix 5 - E M U Left N/c o/p Printer Out bit 5 PB4 o/p Keyboard Matrix 4 , D L T Down N/c o/p Printer Out bit 4 PB3 o/p Keyboard Matrix 3 ; C K S Up N/c o/p Printer Out bit 3 PB2 o/p Keyboard Matrix 2 : B J R Z Break o/p Printer Out bit 2 PB1 o/p Keyboard Matrix 1 9 A I Q Y Clear o/p Printer Out bit 1 PB0 o/p Keyboard Matrix 0 8 @ H P X Enter o/p Printer Out bit 0 | |
| $bb4f get 'indexed' byte: ea = $ff02 m = $0 | |
| $ff02 instruction_ST8 kwargs: ea=$ff02 m=$0 opcode=$a7 operand=<A (8-Bit):255> | |
| $bb4f ST8 store value $ff from A at $ff02 | $ff02: $ff02 - PIA 0 B side Data reg. PB7 o/p Keyboard Matrix 7 / G O W Space Shift o/p Printer Out bit 7 PB6 o/p Keyboard Matrix 6 . F N V Right N/c o/p Printer Out bit 6 PB5 o/p Keyboard Matrix 5 - E M U Left N/c o/p Printer Out bit 5 PB4 o/p Keyboard Matrix 4 , D L T Down N/c o/p Printer Out bit 4 PB3 o/p Keyboard Matrix 3 ; C K S Up N/c o/p Printer Out bit 3 PB2 o/p Keyboard Matrix 2 : B J R Z Break o/p Printer Out bit 2 PB1 o/p Keyboard Matrix 1 9 A I Q Y Clear o/p Printer Out bit 1 PB0 o/p Keyboard Matrix 0 8 @ H P X Enter o/p Printer Out bit 0 | |
| **** bus write $ff02 | |
| *** write to periphery at $ff02 the value $ff | |
| *** TODO: PIA write byte $ff to $ff02 | $ff02: $ff02 - PIA 0 B side Data reg. PB7 o/p Keyboard Matrix 7 / G O W Space Shift o/p Printer Out bit 7 PB6 o/p Keyboard Matrix 6 . F N V Right N/c o/p Printer Out bit 6 PB5 o/p Keyboard Matrix 5 - E M U Left N/c o/p Printer Out bit 5 PB4 o/p Keyboard Matrix 4 , D L T Down N/c o/p Printer Out bit 4 PB3 o/p Keyboard Matrix 3 ; C K S Up N/c o/p Printer Out bit 3 PB2 o/p Keyboard Matrix 2 : B J R Z Break o/p Printer Out bit 2 PB1 o/p Keyboard Matrix 1 9 A I Q Y Clear o/p Printer Out bit 1 PB0 o/p Keyboard Matrix 0 8 @ H P X Enter o/p Printer Out bit 0 | |
| ------------------------------------------------------------------------------- | |
| $bb4f read pc byte: $e7 from $bb4f | |
| $bb4f STB INDEXED instruction_ST8 | $bb4f: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb50 read pc byte: $01 from $bb50 | |
| $bb51 addressing 'indexed' with postbyte: $1 == 00000001 | |
| **** bus read $ff01 | |
| Periphery.read_byte (cycle: 0x4c) from: $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| *** TODO: PIA 0 A side control register | |
| PIA call at $ff01 pia_0_A_control returned $b3 | $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| $bb51 get 'indexed' byte: ea = $ff01 m = $b3 | |
| $ff01 instruction_ST8 kwargs: ea=$ff01 m=$b3 opcode=$e7 operand=<B (8-Bit):52> | |
| $bb51 ST8 store value $34 from B at $ff01 | $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| **** bus write $ff01 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff01 the value $34 | |
| $bb51 read pc byte: $e7 from $bb51 | |
| *** TODO: PIA write byte $34 to $ff01 | $ff01: $ff01 - PIA 0 A side Control reg. CA1 i/p Horiz Sync Interrupt from VDG (15625Hz; CoCo 15750Hz) CA2 o/p Analogue Mux channel select line A Selects Joystick Axis (0 x-axis, 1 y-axis) | |
| $bb51 STB INDEXED instruction_ST8 | $bb51: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb52 read pc byte: $03 from $bb52 | |
| $bb53 addressing 'indexed' with postbyte: $3 == 00000011 | |
| **** bus read $ff03 | |
| Periphery.read_byte (cycle: 0x54) from: $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| *** TODO: PIA 0 B side control register | |
| PIA call at $ff03 pia_0_B_control returned $35 | $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| $bb53 get 'indexed' byte: ea = $ff03 m = $35 | |
| $bb53 ST8 store value $34 from B at $ff03 | $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| **** bus write $ff03 | |
| *** write to periphery at $ff03 the value $34 | |
| *** TODO: PIA write byte $34 to $ff03 | $ff03: $ff03 - PIA 0 B side Control reg. CB1 i/p Field Sync Interrupt from VDG (50Hz; CoCo 60Hz) CB2 o/p Analogue Mux channel select line B Selects Joystick (0 right, 1 left) | |
| ------------------------------------------------------------------------------- | |
| $bb53 read pc byte: $8e from $bb53 | |
| $bb53 LDX IMMEDIATE instruction_LD16 | $bb53: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb54 read pc word: $ff20 from $bb54 | |
| $bb54 addressing 'immediate word' value: $ff20 | |
| $bb54 *** last op code 231 count: 1 - new op code: $8e (LDX -> instruction_LD16) | |
| $bb56 LD16 set X to $ff20 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| ------------------------------------------------------------------------------- | |
| $bb56 read pc byte: $6f from $bb56 | |
| $bb56 CLR INDEXED instruction_CLR | $bb56: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb57 read pc byte: $01 from $bb57 | |
| $bb58 addressing 'indexed' with postbyte: $1 == 00000001 | |
| **** bus read $ff21 | |
| Periphery.read_byte (cycle: 0x62) from: $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| *** TODO: PIA 1 A side control register | |
| PIA call at $ff21 pia_1_A_control returned $34 | $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| $bb58 get 'indexed' byte: ea = $ff21 m = $34 | |
| $ff21 instruction_CLR kwargs: ea=$ff21 m=$34 opcode=$6f | |
| **** bus write $ff21 | |
| *** write to periphery at $ff21 the value $0 | |
| *** TODO: PIA write byte $0 to $ff21 | $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| ------------------------------------------------------------------------------- | |
| $bb58 read pc byte: $6f from $bb58 | |
| $bb58 CLR INDEXED instruction_CLR | $bb58: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb59 read pc byte: $03 from $bb59 | |
| $bb5a addressing 'indexed' with postbyte: $3 == 00000011 | |
| **** bus read $ff23 | |
| Periphery.read_byte (cycle: 0x6c) from: $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| *** TODO: PIA 1 B side control register | |
| PIA call at $ff23 pia_1_B_control returned $37 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| $bb5a get 'indexed' byte: ea = $ff23 m = $37 | |
| **** bus write $ff23 | |
| *** write to periphery at $ff23 the value $0 | |
| *** TODO: PIA write byte $0 to $ff23 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| ------------------------------------------------------------------------------- | |
| $bb5a read pc byte: $4a from $bb5a | |
| $bb5a DECA INHERENT instruction_DEC_register | $bb5a: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb5a *** last op code 111 count: 1 - new op code: $4a (DECA -> instruction_DEC_register) | |
| $bb5b DEC A value $ff -1 = $fe | |
| ------------------------------------------------------------------------------- | |
| $bb5b read pc byte: $a7 from $bb5b | |
| $bb5b STA INDEXED instruction_ST8 | $bb5b: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb5c read pc byte: $84 from $bb5c | |
| $bb5d addressing 'indexed' with postbyte: $84 == 10000100 | |
| $bb5d indexed addressing mode ea=$ff20 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| **** bus read $ff20 | |
| Periphery.read_byte (cycle: 0x7a) from: $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| *** TODO: PIA 1 A side data register | |
| PIA call at $ff20 pia_1_A_data returned $1 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| $bb5d get 'indexed' byte: ea = $ff20 m = $1 | |
| $ff20 instruction_ST8 kwargs: ea=$ff20 m=$1 opcode=$a7 operand=<A (8-Bit):254> | |
| $bb5d ST8 store value $fe from A at $ff20 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| **** bus write $ff20 | |
| *** write to periphery at $ff20 the value $fe | |
| *** TODO: PIA write byte $fe to $ff20 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| ------------------------------------------------------------------------------- | |
| $bb5d read pc byte: $86 from $bb5d | |
| $bb5d LDA IMMEDIATE instruction_LD8 | $bb5d: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb5e read pc byte: $f8 from $bb5e | |
| $bb5e addressing 'immediate byte' value: $f8 | |
| $bb5e instruction_LD8 kwargs: ea=$bb5e m=$f8 opcode=$86 operand=<A (8-Bit):254> | |
| $bb5f LD8 A = $f8 | $bb5e: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb5f read pc byte: $a7 from $bb5f | |
| $bb5f STA INDEXED instruction_ST8 | $bb5f: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb60 read pc byte: $02 from $bb60 | |
| $bb61 addressing 'indexed' with postbyte: $2 == 00000010 | |
| **** bus read $ff22 | |
| Periphery.read_byte (cycle: 0x86) from: $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| *** TODO: PIA 1 B side data register | |
| PIA call at $ff22 pia_1_B_data returned $34 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| $bb61 get 'indexed' byte: ea = $ff22 m = $34 | |
| $ff22 instruction_ST8 kwargs: ea=$ff22 m=$34 opcode=$a7 operand=<A (8-Bit):248> | |
| $bb61 ST8 store value $f8 from A at $ff22 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| **** bus write $ff22 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff22 the value $f8 | |
| $bb61 read pc byte: $e7 from $bb61 | |
| *** TODO: PIA write byte $f8 to $ff22 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| $bb61 STB INDEXED instruction_ST8 | $bb61: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb62 read pc byte: $01 from $bb62 | |
| $bb63 addressing 'indexed' with postbyte: $1 == 00000001 | |
| **** bus read $ff21 | |
| Periphery.read_byte (cycle: 0x8e) from: $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| *** TODO: PIA 1 A side control register | |
| PIA call at $ff21 pia_1_A_control returned $34 | $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| $bb63 get 'indexed' byte: ea = $ff21 m = $34 | |
| $ff21 instruction_ST8 kwargs: ea=$ff21 m=$34 opcode=$e7 operand=<B (8-Bit):52> | |
| $bb63 ST8 store value $34 from B at $ff21 | $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| **** bus write $ff21 | |
| ------------------------------------------------------------------------------- | |
| $bb63 read pc byte: $e7 from $bb63 | |
| $bb63 STB INDEXED instruction_ST8 | $bb63: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb64 read pc byte: $03 from $bb64 | |
| $bb65 addressing 'indexed' with postbyte: $3 == 00000011 | |
| **** bus read $ff23 | |
| *** write to periphery at $ff21 the value $34 | |
| *** TODO: PIA write byte $34 to $ff21 | $ff21: $ff21 - PIA 1 A side Control reg. CA1 i/p Printer Acknowledge i/p CoCo - CD RS232 Carrier Detect input CA2 o/p Cassette Relay Motor control | |
| Periphery.read_byte (cycle: 0x96) from: $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| *** TODO: PIA 1 B side control register | |
| PIA call at $ff23 pia_1_B_control returned $37 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| $bb65 get 'indexed' byte: ea = $ff23 m = $37 | |
| $bb65 ST8 store value $34 from B at $ff23 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| **** bus write $ff23 | |
| ------------------------------------------------------------------------------- | |
| $bb65 read pc byte: $6f from $bb65 | |
| $bb65 CLR INDEXED instruction_CLR | $bb65: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb66 read pc byte: $84 from $bb66 | |
| $bb67 addressing 'indexed' with postbyte: $84 == 10000100 | |
| $bb67 indexed addressing mode ea=$ff20 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| **** bus read $ff20 | |
| *** write to periphery at $ff23 the value $34 | |
| *** TODO: PIA write byte $34 to $ff23 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| Periphery.read_byte (cycle: 0x9f) from: $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| *** TODO: PIA 1 A side data register | |
| PIA call at $ff20 pia_1_A_data returned $1 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| $bb67 get 'indexed' byte: ea = $ff20 m = $1 | |
| $ff20 *** last op code 231 count: 1 - new op code: $6f (CLR -> instruction_CLR) | |
| **** bus write $ff20 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff20 the value $0 | |
| $bb67 read pc byte: $6f from $bb67 | |
| *** TODO: PIA write byte $0 to $ff20 | $ff20: $ff20 - PIA 1 A side Data reg. PA7 o/p DAC bit 5 PA6 o/p DAC bit 4 PA5 o/p DAC bit 3 PA4 o/p DAC bit 2 PA3 o/p DAC bit 1 PA2 o/p DAC bit 0 PA1 o/p Printer Strobe - Active High (i.e. Lo-Hi-Lo to print) o/p CoCo - RS232 Tx o/p PA0 i/p Cassette waveform single bit input | |
| $bb67 CLR INDEXED instruction_CLR | $bb67: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb68 read pc byte: $02 from $bb68 | |
| $bb69 addressing 'indexed' with postbyte: $2 == 00000010 | |
| **** bus read $ff22 | |
| Periphery.read_byte (cycle: 0xa9) from: $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| *** TODO: PIA 1 B side data register | |
| PIA call at $ff22 pia_1_B_data returned $34 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| $bb69 get 'indexed' byte: ea = $ff22 m = $34 | |
| **** bus write $ff22 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ff22 the value $0 | |
| $bb69 read pc byte: $a6 from $bb69 | |
| *** TODO: PIA write byte $0 to $ff22 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| $bb69 LDA INDEXED instruction_LD8 | $bb69: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb6a read pc byte: $02 from $bb6a | |
| $bb6b addressing 'indexed' with postbyte: $2 == 00000010 | |
| **** bus read $ff22 | |
| Periphery.read_byte (cycle: 0xb3) from: $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| *** TODO: PIA 1 B side data register | |
| PIA call at $ff22 pia_1_B_data returned $34 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| $bb6b get 'indexed' byte: ea = $ff22 m = $34 | |
| $ff22 *** last op code 111 count: 1 - new op code: $a6 (LDA -> instruction_LD8) | |
| $bb6b LD8 A = $34 | $ff22: $ff22 - PIA 1 B side Data reg. PB7 o/p *A/G VDG control line PB6 o/p GM2 VDG control line PB5 o/p GM1 VDG control line PB4 o/p GM0 or *INT/EXT VDG control line PB3 o/p CSS VDG control line PB2 i/p D32 - RAM size (0 8 x 32K bit; 1 16 x 16K bit) {6} o/p D64 - ROM select (1 32K mode; 0 64K mode) PB1 i/p Sample audio source o/p Single bit sound output PB0 i/p Printer Busy - Active High i/p CoCo - RS232 Rx input | |
| ------------------------------------------------------------------------------- | |
| $bb6b read pc byte: $8e from $bb6b | |
| $bb6b LDX IMMEDIATE instruction_LD16 | $bb6b: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb6c read pc word: $ffc0 from $bb6c | |
| $bb6c addressing 'immediate word' value: $ffc0 | |
| $bb6c instruction_LD16 kwargs: ea=$bb6c m=$ffc0 opcode=$8e operand=<X (8-Bit):65312> | |
| $bb6e LD16 set X to $ffc0 | $ffc0: $ffc0-$ffc1 - SAM VDG Reg V0 | |
| ------------------------------------------------------------------------------- | |
| $bb6e read pc byte: $c6 from $bb6e | |
| $bb6e LDB IMMEDIATE instruction_LD8 | $bb6e: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb6f read pc byte: $10 from $bb6f | |
| $bb6f addressing 'immediate byte' value: $10 | |
| $bb6f instruction_LD8 kwargs: ea=$bb6f m=$10 opcode=$c6 operand=<B (8-Bit):52> | |
| $bb70 LD8 B = $10 | $bb6f: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0xc6) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):16> | |
| $bb73 DEC B value $10 -1 = $f | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0xd9) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):15> | |
| $bb73 DEC B value $f -1 = $e | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0xec) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):14> | |
| $bb73 DEC B value $e -1 = $d | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0xff) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):13> | |
| $bb73 DEC B value $d -1 = $c | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x112) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):12> | |
| $bb73 DEC B value $c -1 = $b | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x125) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):11> | |
| $bb73 DEC B value $b -1 = $a | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x138) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):10> | |
| $bb73 DEC B value $a -1 = $9 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x14b) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):9> | |
| $bb73 DEC B value $9 -1 = $8 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x15e) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):8> | |
| $bb73 DEC B value $8 -1 = $7 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x171) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):7> | |
| $bb73 DEC B value $7 -1 = $6 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x184) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):6> | |
| $bb73 DEC B value $6 -1 = $5 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x197) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):5> | |
| $bb73 DEC B value $5 -1 = $4 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x1aa) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):4> | |
| $bb73 DEC B value $4 -1 = $3 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x1bd) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):3> | |
| $bb73 DEC B value $3 -1 = $2 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x1d0) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| *** write to periphery at $ffc2 the value $34 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| ------------------------------------------------------------------------------- | |
| $bb72 read pc byte: $5a from $bb72 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):2> | |
| $bb73 DEC B value $2 -1 = $1 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE branch to $bb70, because Z==0 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb70 read pc byte: $a7 from $bb70 | |
| $bb70 STA INDEXED instruction_ST8 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb71 read pc byte: $81 from $bb71 | |
| $bb72 addressing 'indexed' with postbyte: $81 == 10000001 | |
| $bb72 indexed addressing mode ea=$ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus read $ffc2 | |
| Periphery.read_byte (cycle: 0x1e3) from: $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| TODO: SAM call at $ffc2 | |
| SAM call at $ffc2 returned $7e | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 get 'indexed' byte: ea = $ffc2 m = $7e | |
| $ffc2 instruction_ST8 kwargs: ea=$ffc2 m=$7e opcode=$a7 operand=<A (8-Bit):52> | |
| $bb72 ST8 store value $34 from A at $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| **** bus write $ffc2 | |
| ------------------------------------------------------------------------------- | |
| *** write to periphery at $ffc2 the value $34 | |
| $bb72 read pc byte: $5a from $bb72 | |
| *** TODO: SAM write byte $34 to $ffc2 | $ffc2: $ffc2-$ffc3 - SAM VDG Reg V1 | |
| $bb72 DECB INHERENT instruction_DEC_register | $bb72: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb72 instruction_DEC_register kwargs: opcode=$5a operand=<B (8-Bit):1> | |
| $bb73 DEC B value $1 -1 = $0 | |
| ------------------------------------------------------------------------------- | |
| $bb73 read pc byte: $26 from $bb73 | |
| $bb73 BNE RELATIVE instruction_BNE | $bb73: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb74 read pc byte: $fb from $bb74 | |
| $bb75 addressing 'relative' ea = $bb75 + -5 = $bb70 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb75 get 'relative' byte: ea = $bb70 m = $a7 | |
| $bb70 instruction_BNE kwargs: ea=$bb70 m=$a7 opcode=$26 | |
| $bb75 BNE: don't branch to $bb70, because Z==1 | $bb70: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb75 read pc byte: $f7 from $bb75 | |
| $bb75 STB EXTENDED instruction_ST8 | $bb75: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb76 read pc word: $ffc9 from $bb76 | |
| $bb78 addressing 'extended indirect' ea: $ffc9 | $ffc9: $ffc8-$ffc9 - SAM Display Offset bit F1 | |
| **** bus read $ffca | |
| Periphery.read_byte (cycle: 0x1f5) from: $ffca: $ffca-$ffcb - SAM Display Offset bit F2 | |
| TODO: SAM call at $ffca | |
| SAM call at $ffca returned $7e | $ffca: $ffca-$ffcb - SAM Display Offset bit F2 | |
| **** bus read $ffc9 | |
| Periphery.read_byte (cycle: 0x1f6) from: $ffc9: $ffc8-$ffc9 - SAM Display Offset bit F1 | |
| TODO: SAM call at $ffc9 | |
| SAM call at $ffc9 returned $7e | $ffc9: $ffc8-$ffc9 - SAM Display Offset bit F1 | |
| $bb78 get 'extended' word: ea = $ffc9 m = $7e7e | |
| $ffc9 instruction_ST8 kwargs: ea=$ffc9 m=$7e7e opcode=$f7 operand=<B (8-Bit):0> | |
| $bb78 ST8 store value $0 from B at $ffc9 | $ffc9: $ffc8-$ffc9 - SAM Display Offset bit F1 | |
| **** bus write $ffc9 | |
| *** write to periphery at $ffc9 the value $0 | |
| *** TODO: SAM write byte $0 to $ffc9 | $ffc9: $ffc8-$ffc9 - SAM Display Offset bit F1 | |
| ------------------------------------------------------------------------------- | |
| $bb78 read pc byte: $85 from $bb78 | |
| $bb78 BITA IMMEDIATE instruction_BIT | $bb78: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb79 read pc byte: $04 from $bb79 | |
| $bb79 addressing 'immediate byte' value: $4 | |
| $bb79 instruction_BIT kwargs: ea=$bb79 m=$4 opcode=$85 operand=<A (8-Bit):52> | |
| $bb7a BIT update CC with $4 (m:4 & A:52) | |
| ------------------------------------------------------------------------------- | |
| $bb7a read pc byte: $27 from $bb7a | |
| $bb7a BEQ RELATIVE instruction_BEQ | $bb7a: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb7b read pc byte: $05 from $bb7b | |
| $bb7c addressing 'relative' ea = $bb7c + 5 = $bb81 | $bb81: $bb80-$bb82 - D64 - Boots 64K mode with JMP $bf49 | |
| $bb7c get 'relative' byte: ea = $bb81 m = $f7 | |
| $bb81 instruction_BEQ kwargs: ea=$bb81 m=$f7 opcode=$27 | |
| $bb7c BEQ: don't branch to $f7, because Z==0 | $f7: $e6-$ff - D32 - Unused in Dragon 32 w/o DOS | |
| ------------------------------------------------------------------------------- | |
| $bb7c read pc byte: $f7 from $bb7c | |
| $bb7c STB EXTENDED instruction_ST8 | $bb7c: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb7d read pc word: $ffdb from $bb7d | |
| $bb7f addressing 'extended indirect' ea: $ffdb | $ffdb: $ffda-$ffdb - SAM Memory Size select bit M0 | |
| **** bus read $ffdc | |
| Periphery.read_byte (cycle: 0x20a) from: $ffdc: $ffdc-$ffdd - SAM Memory Size select bit M1 | |
| TODO: SAM call at $ffdc | |
| SAM call at $ffdc returned $7e | $ffdc: $ffdc-$ffdd - SAM Memory Size select bit M1 | |
| **** bus read $ffdb | |
| Periphery.read_byte (cycle: 0x20b) from: $ffdb: $ffda-$ffdb - SAM Memory Size select bit M0 | |
| TODO: SAM call at $ffdb | |
| SAM call at $ffdb returned $7e | $ffdb: $ffda-$ffdb - SAM Memory Size select bit M0 | |
| $bb7f get 'extended' word: ea = $ffdb m = $7e7e | |
| $ffdb instruction_ST8 kwargs: ea=$ffdb m=$7e7e opcode=$f7 operand=<B (8-Bit):0> | |
| $bb7f ST8 store value $0 from B at $ffdb | $ffdb: $ffda-$ffdb - SAM Memory Size select bit M0 | |
| **** bus write $ffdb | |
| *** write to periphery at $ffdb the value $0 | |
| *** TODO: SAM write byte $0 to $ffdb | $ffdb: $ffda-$ffdb - SAM Memory Size select bit M0 | |
| ------------------------------------------------------------------------------- | |
| $bb7f read pc byte: $20 from $bb7f | |
| $bb7f BRA RELATIVE instruction_BRA | $bb7f: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb80 read pc byte: $03 from $bb80 | |
| $bb81 addressing 'relative' ea = $bb81 + 3 = $bb84 | $bb84: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb81 get 'relative' byte: ea = $bb84 m = $1f | |
| $bb84 instruction_BRA kwargs: ea=$bb84 m=$1f opcode=$20 | |
| $bb81 BRA branch to $bb84 | $bb84: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| ------------------------------------------------------------------------------- | |
| $bb84 read pc byte: $1f from $bb84 | |
| $bb84 TFR IMMEDIATE instruction_TFR | $bb84: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb85 read pc byte: $9b from $bb85 | |
| $bb85 addressing 'immediate byte' value: $9b | |
| $bb85 instruction_TFR kwargs: ea=$bb85 m=$9b opcode=$1f | |
| $bb86 TFR: post byte: $9b -> high: $9 low: $b | |
| get register value $0 from B ($9) | |
| set register DP ($b) to $0 | |
| ------------------------------------------------------------------------------- | |
| $bb86 read pc byte: $1f from $bb86 | |
| $bb86 TFR IMMEDIATE instruction_TFR | $bb86: $bb40-$bb87 - D32 - Hardware init, JMPd to from $8000, Y should contain return address | |
| $bb87 read pc byte: $25 from $bb87 | |
| $bb87 addressing 'immediate byte' value: $25 | |
| $bb88 TFR: post byte: $25 -> high: $2 low: $5 | |
| get register value $b39b from Y ($2) | |
| set register PC ($5) to $b39b | |
| ------------------------------------------------------------------------------- | |
| $b39b read pc byte: $10 from $b39b | |
| $b39b PAGE1+ VARIANT instruction_PAGE | $b39b: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b39b *** last op code 31 count: 1 - new op code: $10 (PAGE1+ -> instruction_PAGE) | |
| $b39c read pc byte: $ce from $b39c | |
| $b39d *** call paged opcode $10ce | |
| $b39c LDS IMMEDIATE instruction_LD16 | $b39c: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b39d read pc word: $03d7 from $b39d | |
| $b39d addressing 'immediate word' value: $3d7 | |
| $b39d instruction_LD16 kwargs: ea=$b39d m=$3d7 opcode=$10ce operand=<S (8-Bit):65535> | |
| $b39f LD16 set S to $3d7 | $3d7: $2dd-$3d8 - BASIC line input buffer - used for de-/tokenising data | |
| ------------------------------------------------------------------------------- | |
| ------------------------------------------------------------------------------- | |
| $b39f read pc byte: $86 from $b39f | |
| $b39f LDA IMMEDIATE instruction_LD8 | $b39f: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b3a0 read pc byte: $37 from $b3a0 | |
| $b3a0 addressing 'immediate byte' value: $37 | |
| $b3a0 instruction_LD8 kwargs: ea=$b3a0 m=$37 opcode=$86 operand=<A (8-Bit):52> | |
| $b3a1 LD8 A = $37 | $b3a0: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| ------------------------------------------------------------------------------- | |
| $b3a1 read pc byte: $b7 from $b3a1 | |
| $b3a1 STA EXTENDED instruction_ST8 | $b3a1: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b3a2 read pc word: $ff23 from $b3a2 | |
| $b3a4 addressing 'extended indirect' ea: $ff23 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| **** bus read $ff24 | |
| Periphery.read_byte (cycle: 0x23a) from: $ff24: $bff0-$fff1 - Reserved ($0000) | |
| ERROR: no periphery handler at $ff24 (cycle: 570) | $ff24: $bff0-$fff1 - Reserved ($0000) | |
| **** bus read $ff23 | |
| Periphery.read_byte (cycle: 0x23b) from: $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| *** TODO: PIA 1 B side control register | |
| PIA call at $ff23 pia_1_B_control returned $37 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| $b3a4 get 'extended' word: ea = $ff23 m = $3700 | |
| $ff23 instruction_ST8 kwargs: ea=$ff23 m=$3700 opcode=$b7 operand=<A (8-Bit):55> | |
| $b3a4 ST8 store value $37 from A at $ff23 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| **** bus write $ff23 | |
| ------------------------------------------------------------------------------- | |
| $b3a4 read pc byte: $96 from $b3a4 | |
| $b3a4 LDA DIRECT instruction_LD8 | $b3a4: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b3a5 read pc byte: $71 from $b3a5 | |
| $b3a6 addressing 'direct': ea = $0 << 8 | $71 = $71 | |
| $b3a6 get 'direct' byte: ea = m = $71 | |
| $71 instruction_LD8 kwargs: ea=$71 m=$71 opcode=$96 operand=<A (8-Bit):55> | |
| $b3a6 LD8 A = $71 | $71: $71 - Restart flag - if not 0x55 cold start on reset, see $0072 | |
| ------------------------------------------------------------------------------- | |
| $b3a6 read pc byte: $81 from $b3a6 | |
| $b3a6 CMPA IMMEDIATE instruction_CMP8 | $b3a6: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b3a7 read pc byte: $55 from $b3a7 | |
| $b3a7 addressing 'immediate byte' value: $55 | |
| $b3a7 instruction_CMP8 kwargs: ea=$b3a7 m=$55 opcode=$81 operand=<A (8-Bit):113> | |
| $b3a8 CMP8 A $71 - $55 = $1c | |
| ------------------------------------------------------------------------------- | |
| $b3a8 read pc byte: $26 from $b3a8 | |
| $b3a8 BNE RELATIVE instruction_BNE | $b3a8: $b39b-$b3b3 - Called after Hardware init routine, following a RESET Inits stack, checks for Cold/warm start. If $0071 contains 0x55 and $0072:0073 points to NOP then execution is passed to [$0072:0073] otherwise branches to $b3ba | |
| $b3a9 read pc byte: $10 from $b3a9 | |
| $b3aa addressing 'relative' ea = $b3aa + 16 = $b3ba | $b3ba: $b3ba - Cold start routine - clears lo mem, inits BASIC | |
| $b3aa get 'relative' byte: ea = $b3ba m = $8e | |
| $b3ba instruction_BNE kwargs: ea=$b3ba m=$8e opcode=$26 | |
| $b3aa BNE branch to $b3ba, because Z==0 | $b3ba: $b3ba - Cold start routine - clears lo mem, inits BASIC | |
| ------------------------------------------------------------------------------- | |
| $b3ba read pc byte: $8e from $b3ba | |
| $b3ba LDX IMMEDIATE instruction_LD16 | $b3ba: $b3ba - Cold start routine - clears lo mem, inits BASIC | |
| $b3bb read pc word: $0401 from $b3bb | |
| $b3bb addressing 'immediate word' value: $401 | |
| $b3bb instruction_LD16 kwargs: ea=$b3bb m=$401 opcode=$8e operand=<X (8-Bit):65472> | |
| $b3bd LD16 set X to $401 | $401: $400-$5ff - Default Text screen | |
| ------------------------------------------------------------------------------- | |
| $b3bd read pc byte: $6f from $b3bd | |
| $b3bd CLR INDEXED instruction_CLR | $b3bd: $a000-$bfff - CoCo - Color BASIC ROM | |
| $b3be read pc byte: $83 from $b3be | |
| $b3bf addressing 'indexed' with postbyte: $83 == 10000011 | |
| $b3bf indexed addressing mode ea=$3ff | $3ff: $3ff - D64 - %PRNSEL% selects default printer port 0x00 Parallel, non-0x00 Serial (0x00) | |
| $b3bf get 'indexed' byte: ea = $3ff m = $0 | |
| $3ff instruction_CLR kwargs: ea=$3ff m=$0 opcode=$6f | |
| **** write $0 to $3ff - mem info: | |
| $0: $0 - BREAK message flag - if negative print BREAK | |
| $3ff: $3ff - D64 - %PRNSEL% selects default printer port 0x00 Parallel, non-0x00 Serial (0x00) | |
| ------------------------------------------------------------------------------- | |
| $b3bf read pc byte: $30 from $b3bf | |
| $b3bf LEAX INDEXED instruction_LEA_register | $b3bf: $a000-$bfff - CoCo - Color BASIC ROM | |
| $b3c0 read pc byte: $01 from $b3c0 | |
| $b3c1 addressing 'indexed' with postbyte: $1 == 00000001 | |
| *** write to periphery at $ff23 the value $37 | |
| *** TODO: PIA write byte $37 to $ff23 | $ff23: $ff23 - PIA 1 B side Control reg. CB1 i/p Cartridge CART FIRQ auto-start signal CB2 o/p Sound Mux enable (1 enable, 0 single bit sound) | |
| $b3c1 get 'indexed' byte: ea = $402 m = $0 | |
| $402 instruction_LEA_register kwargs: ea=$402 m=$0 opcode=$30 operand=<X (8-Bit):1025> | |
| $b3c1 LEA X: Set X to $402 | $402: $400-$5ff - Default Text screen | |
| ------------------------------------------------------------------------------- | |
| $b3c1 read pc byte: $26 from $b3c1 | |
| $b3c1 BNE RELATIVE instruction_BNE | $b3c1: $a000-$bfff - CoCo - Color BASIC ROM | |
| $b3c2 read pc byte: $fa from $b3c2 | |
| $b3c3 addressing 'relative' ea = $b3c3 + -6 = $b3bd | $b3bd: $a000-$bfff - CoCo - Color BASIC ROM | |
| $b3c3 get 'relative' byte: ea = $b3bd m = $6f | |
| $b3bd instruction_BNE kwargs: ea=$b3bd m=$6f opcode=$26 | |
| $b3c3 BNE: don't branch to $b3bd, because Z==1 | $b3bd: $a000-$bfff - CoCo - Color BASIC ROM | |
| ------------------------------------------------------------------------------- | |
| $b3c3 read pc byte: $bd from $b3c3 | |
| $b3c3 JSR EXTENDED instruction_JSR | $b3c3: $a000-$bfff - CoCo - Color BASIC ROM | |
| $b3c4 read pc word: $ba77 from $b3c4 | |
| $b3c6 addressing 'extended indirect' ea: $ba77 | $ba77: $ba77-$ba85 - Clears text screen (CoCo $a928) | |
| $b3c6 get 'extended' word: ea = $ba77 m = $c660 | |
| $ba77 instruction_JSR kwargs: ea=$ba77 m=$c660 opcode=$bd | |
| $b3c6 JSR to $ba77 | $ba77: $ba77-$ba85 - Clears text screen (CoCo $a928) | |
| push word $b3c6 to stack | |
| **** write $b3 to $3d5 - mem info: | |
| $b3: $b3 - Current background colour (0x00) | |
| $3d5: $2dd-$3d8 - BASIC line input buffer - used for de-/tokenising data | |
| **** write $c6 to $3d6 - mem info: | |
| $c6: $c5-$c6 - Current vertical pixel number | |
| $3d6: $2dd-$3d8 - BASIC line input buffer - used for de-/tokenising data | |
| ------------------------------------------------------------------------------- | |
| $ba77 read pc byte: $c6 from $ba77 | |
| $ba77 LDB IMMEDIATE instruction_LD8 | $ba77: $ba77-$ba85 - Clears text screen (CoCo $a928) | |
| $ba78 read pc byte: $60 from $ba78 | |
| $ba78 addressing 'immediate byte' value: $60 | |
| $ba78 instruction_LD8 kwargs: ea=$ba78 m=$60 opcode=$c6 operand=<B (8-Bit):0> | |
| $ba79 LD8 B = $60 | $ba78: $ba77-$ba85 - Clears text screen (CoCo $a928) | |
| ------------------------------------------------------------------------------- | |
| $ba79 read pc byte: $8e from $ba79 | |
| $ba79 LDX IMMEDIATE instruction_LD16 | $ba79: $ba79-$ba85 - Clears text screen with value in B (CoCo $a92a) | |
| $ba7a read pc word: $0400 from $ba7a | |
| $ba7a addressing 'immediate word' value: $400 | |
| $ba7a instruction_LD16 kwargs: ea=$ba7a m=$400 opcode=$8e operand=<X (8-Bit):1026> | |
| $ba7c LD16 set X to $400 | $400: $400-$5ff - Default Text screen | |
| ------------------------------------------------------------------------------- | |
| $ba7c read pc byte: $9f from $ba7c | |
| $ba7c STX DIRECT instruction_ST16 | $ba7c: $ba79-$ba85 - Clears text screen with value in B (CoCo $a92a) | |
| $ba7d read pc byte: $88 from $ba7d | |
| $ba7e addressing 'direct': ea = $0 << 8 | $88 = $88 | |
| $ba7e get 'direct' byte: ea = m = $88 | |
| $88 instruction_ST16 kwargs: ea=$88 m=$88 opcode=$9f operand=<X (8-Bit):1024> | |
| $ba7e ST16 store value $400 from X at $88 | $88: $88-$89 - Current VDU cursor addr (typ 0x0400-0x05ff) | |
| **** write $4 to $88 - mem info: | |
| $4: $4 - Count of IFs looking for ELSE | |
| $88: $88-$89 - Current VDU cursor addr (typ 0x0400-0x05ff) | |
| **** write $0 to $89 - mem info: | |
| $0: $0 - BREAK message flag - if negative print BREAK | |
| $89: $88-$89 - Current VDU cursor addr (typ 0x0400-0x05ff) | |
| ------------------------------------------------------------------------------- | |
| $ba7e read pc byte: $e7 from $ba7e | |
| $ba7e STB INDEXED instruction_ST8 | $ba7e: $ba79-$ba85 - Clears text screen with value in B (CoCo $a92a) | |
| $ba7f read pc byte: $80 from $ba7f | |
| $ba80 addressing 'indexed' with postbyte: $80 == 10000000 | |
| $ba80 indexed addressing mode ea=$401 | $401: $400-$5ff - Default Text screen | |
| $ba80 get 'indexed' byte: ea = $401 m = $0 | |
| $401 instruction_ST8 kwargs: ea=$401 m=$0 opcode=$e7 operand=<B (8-Bit):96> | |
| $ba80 ST8 store value $60 from B at $401 | $401: $400-$5ff - Default Text screen | |
| **** TODO: write $60 '`' to text screen address $401 |
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