cbmem_output_2023-01-30-18:17.txt

*** Pre-CBMEM romstage console overflowed, log truncated! ***
[DEBUG]  Selected CAS latency   : 9T
[DEBUG]  MPLL busy... done in 10 us
[DEBUG]  MPLL frequency is set at : 666 MHz
[DEBUG]  Selected CWL latency   : 7T
[DEBUG]  Selected tRCD          : 9T
[DEBUG]  Selected tRP           : 9T
[DEBUG]  Selected tRAS          : 24T
[DEBUG]  Selected tWR           : 10T
[DEBUG]  Selected tFAW          : 20T
[DEBUG]  Selected tRRD          : 4T
[DEBUG]  Selected tRTP          : 5T
[DEBUG]  Selected tWTR          : 5T
[DEBUG]  Selected tRFC          : 200T
[DEBUG]  Done dimm mapping
[DEBUG]  Update PCI-E configuration space:
[DEBUG]  PCI(0, 0, 0)[a0] = 0
[DEBUG]  PCI(0, 0, 0)[a4] = 4
[DEBUG]  PCI(0, 0, 0)[bc] = 82a00000
[DEBUG]  PCI(0, 0, 0)[a8] = 7d600000
[DEBUG]  PCI(0, 0, 0)[ac] = 4
[DEBUG]  PCI(0, 0, 0)[b8] = 80000000
[DEBUG]  PCI(0, 0, 0)[b0] = 80a00000
[DEBUG]  PCI(0, 0, 0)[b4] = 80800000
[DEBUG]  Done memory map
[DEBUG]  Done io registers
[DEBUG]  Done jedec reset
[DEBUG]  Done MRS commands
[WARN ]  Logic delay 2 greater than 1: 0 0
[WARN ]  Logic delay 2 greater than 1: 0 1
[WARN ]  Logic delay 2 greater than 1: 1 0
[WARN ]  Logic delay 2 greater than 1: 1 1
[DEBUG]  t123: 1912, 9120, 500
[NOTE ]  ME: Wrong mode : 2
[NOTE ]  ME: FWS2: 0x100a0140
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x0
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x0
[NOTE ]  ME:  MFS failure     : 0x1
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0xa
[NOTE ]  ME:  Current PM event: 0x0
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  PASSED! Tell ME that DRAM is ready
[NOTE ]  ME: ME is reporting as disabled, so not waiting for a response.
[NOTE ]  ME: FWS2: 0x100a0140
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x0
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x0
[NOTE ]  ME:  MFS failure     : 0x1
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0xa
[NOTE ]  ME:  Current PM event: 0x0
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  ME: Requested BIOS Action: No DID Ack received
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Initializing
[DEBUG]  ME: Current Operation State : Bring up
[DEBUG]  ME: Current Operation Mode  : Debug or Disabled by AltDisableBit
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : BUP Phase
[DEBUG]  ME: Power Management Event  : Clean Moff->Mx wake
[DEBUG]  ME: Progress Phase State    : Check to see if straps say ME DISABLED
[DEBUG]  memcfg DDR3 ref clock 133 MHz
[DEBUG]  memcfg DDR3 clock 1330 MHz
[DEBUG]  memcfg channel assignment: A: 0, B  1, C  2
[DEBUG]  memcfg channel[0] config (00620020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 0 MB width x8 single rank
[DEBUG]  memcfg channel[1] config (00620020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 0 MB width x8 single rank
[INFO ]  Timestamp - after RAM initialization: 3807099050
[DEBUG]  CBMEM:
[DEBUG]  IMD: root @ 0x7ffff000 254 entries.
[DEBUG]  IMD: root @ 0x7fffec00 62 entries.
[DEBUG]  FMAP: area COREBOOT found @ 290200 (1506816 bytes)
[DEBUG]  External stage cache:
[DEBUG]  IMD: root @ 0x803ff000 254 entries.
[DEBUG]  IMD: root @ 0x803fec00 62 entries.
[DEBUG]  CBMEM entry for DIMM info: 0x7ffda000
[DEBUG]  SMM Memory Map
[DEBUG]  SMRAM       : 0x80000000 0x800000
[DEBUG]   Subregion 0: 0x80000000 0x300000
[DEBUG]   Subregion 1: 0x80300000 0x100000
[DEBUG]   Subregion 2: 0x80400000 0x400000
[DEBUG]  Normal boot
[INFO ]  CBFS: Found 'fallback/postcar' @0x38380 size 0x3950 in mcache @0xfeff1058
[DEBUG]  Loading module at 0x7ffd0000 with entry 0x7ffd0031. filesize: 0x37e0 memsize: 0x96b8
[DEBUG]  Processing 76 relocs. Offset value of 0x7dfd0000
[INFO ]  Timestamp - end of romstage: 3838814412
[DEBUG]  BS: romstage times (exec / console): total (unknown) / 4 ms


[NOTE ]  coreboot-4.19 Tue Jan 17 04:09:17 UTC 2023 ramstage starting (log level: 7)...
[INFO ]  Timestamp - start of ramstage: 3959857038
[DEBUG]  Normal boot
[INFO ]  Timestamp - device enumeration: 3959873682
[INFO ]  Enumerating buses...
[DEBUG]  Root Device scanning...
[DEBUG]  CPU_CLUSTER: 0 enabled
[DEBUG]  DOMAIN: 0000 enabled
[DEBUG]  DOMAIN: 0000 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 00
[DEBUG]  PCI: 00:00.0 [8086/0100] enabled
[DEBUG]  PCI: 00:01.0 [8086/0101] enabled
[DEBUG]  PCI: 00:02.0 [8086/0102] enabled
[DEBUG]  PCI: 00:16.0 [8086/1c3a] enabled
[DEBUG]  PCI: 00:16.1: Disabling device
[DEBUG]  PCI: 00:16.2: Disabling device
[DEBUG]  PCI: 00:16.3: Disabling device
[DEBUG]  PCI: 00:19.0: Disabling device
[DEBUG]  PCI: 00:1a.0 [8086/1c2d] enabled
[DEBUG]  PCI: 00:1b.0 [8086/1c20] enabled
[DEBUG]  PCI: 00:1c.0 [8086/1c10] enabled
[DEBUG]  PCI: 00:1c.1 [8086/1c12] enabled
[DEBUG]  PCI: 00:1c.2 [8086/1c14] enabled
[DEBUG]  PCI: 00:1c.3 [8086/1c16] enabled
[DEBUG]  PCI: 00:1c.4 [8086/1c18] enabled
[DEBUG]  PCI: 00:1c.5 [8086/1c1a] enabled
[DEBUG]  PCI: 00:1c.6: Disabling device
[DEBUG]  PCI: 00:1c.7: Disabling device
[DEBUG]  PCI: 00:1d.0 [8086/1c26] enabled
[DEBUG]  PCI: 00:1e.0: Disabling device
[DEBUG]  PCI: 00:1e.0 [8086/244e] disabled
[DEBUG]  PCI: 00:1f.0 [8086/1c5c] enabled
[DEBUG]  PCI: 00:1f.2 [8086/1c00] enabled
[DEBUG]  PCI: 00:1f.3 [8086/1c22] enabled
[DEBUG]  PCI: 00:1f.5: Disabling device
[DEBUG]  PCI: 00:1f.5 [8086/1c08] disabled No operations
[DEBUG]  PCI: 00:1f.6: Disabling device
[DEBUG]  PCI: 00:1f.6 [8086/1c24] disabled No operations
[WARN ]  PCI: Leftover static devices:
[WARN ]  PCI: 00:16.1
[WARN ]  PCI: 00:16.2
[WARN ]  PCI: 00:16.3
[WARN ]  PCI: 00:19.0
[WARN ]  PCI: 00:1c.6
[WARN ]  PCI: 00:1c.7
[WARN ]  PCI: Check your devicetree.cb.
[DEBUG]  PCI: 00:01.0 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 01
[DEBUG]  PCI: 01:00.0 [10de/1c82] enabled
[DEBUG]  PCI: 01:00.1 [10de/0fb9] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s and L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s and L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  scan_bus: bus PCI: 00:01.0 finished in 0 msecs
[DEBUG]  PCI: 00:1c.0 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 02
[DEBUG]  scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
[DEBUG]  PCI: 00:1c.1 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 03
[DEBUG]  PCI: 03:00.0 [125b/9100] enabled
[DEBUG]  PCI: 03:00.1 [125b/9100] enabled
[DEBUG]  PCI: 03:00.2 [125b/9100] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled None
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 03:00.0: No LTR support
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled None
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 03:00.1: No LTR support
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled None
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 03:00.2: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
[DEBUG]  PCI: 00:1c.2 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 04
[DEBUG]  PCI: 04:00.0 [10ec/8168] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 04:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:1c.2 finished in 0 msecs
[DEBUG]  PCI: 00:1c.3 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 05
[DEBUG]  PCI: 05:00.0 [1b21/1042] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled None
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 05:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:1c.3 finished in 0 msecs
[DEBUG]  PCI: 00:1c.4 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 06
[DEBUG]  scan_bus: bus PCI: 00:1c.4 finished in 0 msecs
[DEBUG]  PCI: 00:1c.5 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 07
[INFO ]  Disabling ASPM for PCI: 07:00.0 [1b21/0611]
[DEBUG]  PCI: 07:00.0 [1b21/0611] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 07:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:1c.5 finished in 0 msecs
[DEBUG]  PCI: 00:1f.0 scanning...
[DEBUG]  PNP: 002e.0 disabled
[DEBUG]  PNP: 002e.1 enabled
[DEBUG]  PNP: 002e.2 enabled
[DEBUG]  PNP: 002e.3 disabled
[DEBUG]  PNP: 002e.5 enabled
[DEBUG]  PNP: 002e.6 disabled
[DEBUG]  PNP: 002e.7 disabled
[DEBUG]  PNP: 002e.8 disabled
[DEBUG]  PNP: 002e.9 disabled
[DEBUG]  PNP: 002e.a enabled
[DEBUG]  PNP: 002e.b enabled
[DEBUG]  PNP: 002e.d enabled
[DEBUG]  PNP: 002e.e disabled
[DEBUG]  PNP: 002e.f enabled
[DEBUG]  PNP: 002e.14 disabled
[DEBUG]  PNP: 002e.16 enabled
[DEBUG]  PNP: 002e.17 enabled
[DEBUG]  PNP: 004e.0 enabled
[DEBUG]  PNP: 002e.308 enabled
[DEBUG]  PNP: 002e.108 enabled
[DEBUG]  PNP: 002e.109 enabled
[DEBUG]  PNP: 002e.209 enabled
[DEBUG]  PNP: 002e.309 enabled
[DEBUG]  PNP: 002e.409 enabled
[DEBUG]  PNP: 002e.509 enabled
[DEBUG]  PNP: 002e.609 enabled
[DEBUG]  PNP: 002e.709 enabled
[DEBUG]  PNP: 002e.107 enabled
[DEBUG]  PNP: 002e.208 enabled
[DEBUG]  scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
[DEBUG]  PCI: 00:1f.3 scanning...
[DEBUG]  scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
[DEBUG]  scan_bus: bus DOMAIN: 0000 finished in 2 msecs
[DEBUG]  scan_bus: bus Root Device finished in 2 msecs
[INFO ]  done
[DEBUG]  BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 0 ms
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 280000 (65536 bytes)
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 280000 (65536 bytes)
[DEBUG]  MRC: Checking cached data update for 'RW_MRC_CACHE'.
[INFO ]  Manufacturer: c2
[INFO ]  SF: Detected c2 2016 with sector size 0x1000, total 0x400000
[NOTE ]  MRC: no data in 'RW_MRC_CACHE'
[DEBUG]  MRC: cache data 'RW_MRC_CACHE' needs update.
[DEBUG]  MRC: updated 'RW_MRC_CACHE'.
[DEBUG]  BS: BS_DEV_ENUMERATE exit times (exec / console): 8 / 0 ms
[INFO ]  Timestamp - device configuration: 3994012954
[DEBUG]  found VGA at PCI: 00:02.0
[DEBUG]  found VGA at PCI: 01:00.0
[DEBUG]  Use plugin graphics over integrated.
[DEBUG]  Setting up VGA for PCI: 01:00.0
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ]  Allocating resources...
[INFO ]  Reading resources...
[DEBUG]  Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG]  TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
[DEBUG]  MEBASE 0x7ffff00000
[DEBUG]  TSEG base 0x80000000 size 42M
[INFO ]  Available memory below 4GB: 2048M
[INFO ]  Available memory above 4GB: 14294M
[ERROR]  PNP: 004e.0 missing read_resources
[INFO ]  Done reading resources.
[INFO ]  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
[DEBUG]   PCI: 00:01.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    PCI: 01:00.0 24 *  [0x0 - 0x7f] io
[DEBUG]   PCI: 00:01.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:01.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 01:00.0 10 *  [0x0 - 0xffffff] mem
[DEBUG]    PCI: 01:00.0 30 *  [0x1000000 - 0x107ffff] mem
[DEBUG]    PCI: 01:00.1 10 *  [0x1080000 - 0x1083fff] mem
[DEBUG]   PCI: 00:01.0 mem: size: 1100000 align: 24 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:01.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]    PCI: 01:00.0 14 *  [0x0 - 0xfffffff] prefmem
[DEBUG]    PCI: 01:00.0 1c *  [0x10000000 - 0x11ffffff] prefmem
[DEBUG]   PCI: 00:01.0 prefmem: size: 12000000 align: 28 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    PCI: 03:00.0 10 *  [0x0 - 0x7] io
[DEBUG]    PCI: 03:00.1 10 *  [0x8 - 0xf] io
[DEBUG]    PCI: 03:00.2 10 *  [0x10 - 0x17] io
[DEBUG]    PCI: 03:00.2 14 *  [0x18 - 0x1f] io
[DEBUG]   PCI: 00:1c.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 03:00.0 14 *  [0x0 - 0xfff] mem
[DEBUG]    PCI: 03:00.0 24 *  [0x1000 - 0x1fff] mem
[DEBUG]    PCI: 03:00.1 14 *  [0x2000 - 0x2fff] mem
[DEBUG]    PCI: 03:00.1 24 *  [0x3000 - 0x3fff] mem
[DEBUG]    PCI: 03:00.2 18 *  [0x4000 - 0x4fff] mem
[DEBUG]    PCI: 03:00.2 24 *  [0x5000 - 0x5fff] mem
[DEBUG]   PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    PCI: 04:00.0 10 *  [0x0 - 0xff] io
[DEBUG]   PCI: 00:1c.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]   PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]    PCI: 04:00.0 20 *  [0x0 - 0x3fff] prefmem
[DEBUG]    PCI: 04:00.0 18 *  [0x4000 - 0x4fff] prefmem
[DEBUG]   PCI: 00:1c.2 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:1c.3 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:1c.3 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 05:00.0 10 *  [0x0 - 0x7fff] mem
[DEBUG]   PCI: 00:1c.3 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:1c.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:1c.5 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    PCI: 07:00.0 20 *  [0x0 - 0xf] io
[DEBUG]    PCI: 07:00.0 10 *  [0x10 - 0x17] io
[DEBUG]    PCI: 07:00.0 18 *  [0x18 - 0x1f] io
[DEBUG]    PCI: 07:00.0 14 *  [0x20 - 0x23] io
[DEBUG]    PCI: 07:00.0 1c *  [0x24 - 0x27] io
[DEBUG]   PCI: 00:1c.5 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.5 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 07:00.0 24 *  [0x0 - 0x1ff] mem
[DEBUG]   PCI: 00:1c.5 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ]  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
[DEBUG]  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG]   update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
[DEBUG]   update_constraints: PNP: 002e.1 60 base 00000378 limit 0000037f io (fixed)
[DEBUG]   update_constraints: PNP: 002e.2 60 base 000003f8 limit 000003ff io (fixed)
[DEBUG]   update_constraints: PNP: 002e.5 60 base 00000060 limit 00000060 io (fixed)
[DEBUG]   update_constraints: PNP: 002e.5 62 base 00000064 limit 00000064 io (fixed)
[DEBUG]   update_constraints: PNP: 002e.b 60 base 00000290 limit 00000291 io (fixed)
[DEBUG]   update_constraints: PNP: 002e.b 62 base 00000000 limit 00000001 io (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ]   DOMAIN: 0000: Resource ranges:
[INFO ]   * Base: 1000, Size: f000, Tag: 100
[DEBUG]    PCI: 00:01.0 1c *  [0x1000 - 0x1fff] limit: 1fff io
[DEBUG]    PCI: 00:1c.1 1c *  [0x2000 - 0x2fff] limit: 2fff io
[DEBUG]    PCI: 00:1c.2 1c *  [0x3000 - 0x3fff] limit: 3fff io
[DEBUG]    PCI: 00:1c.5 1c *  [0x4000 - 0x4fff] limit: 4fff io
[DEBUG]    PCI: 00:1f.2 20 *  [0x5000 - 0x501f] limit: 501f io
[ERROR]    ERROR: Resource didn't fit!!!   PNP: 002e.308 60 *  size: 0x8 limit: fff io
[DEBUG]    PCI: 00:1f.2 10 *  [0x5020 - 0x5027] limit: 5027 io
[DEBUG]    PCI: 00:1f.2 18 *  [0x5028 - 0x502f] limit: 502f io
[DEBUG]    PCI: 00:1f.2 14 *  [0x5030 - 0x5033] limit: 5033 io
[DEBUG]    PCI: 00:1f.2 1c *  [0x5034 - 0x5037] limit: 5037 io
[DEBUG]  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG]  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
[DEBUG]   update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 05 base 100000000 limit 47d5fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 09 base 20000000 limit 201fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 0a base 40000000 limit 401fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
[INFO ]   DOMAIN: 0000: Resource ranges:
[INFO ]   * Base: 82a00000, Size: 6d600000, Tag: 200
[INFO ]   * Base: f4000000, Size: ac00000, Tag: 200
[INFO ]   * Base: fec01000, Size: 3ff000, Tag: 200
[INFO ]   * Base: 47d600000, Size: b82a00000, Tag: 100200
[DEBUG]    PCI: 00:01.0 24 *  [0x90000000 - 0xa1ffffff] limit: a1ffffff prefmem
[DEBUG]    PCI: 00:01.0 20 *  [0x83000000 - 0x840fffff] limit: 840fffff mem
[DEBUG]    PCI: 00:1c.1 20 *  [0x82a00000 - 0x82afffff] limit: 82afffff mem
[DEBUG]    PCI: 00:1c.2 24 *  [0x82b00000 - 0x82bfffff] limit: 82bfffff prefmem
[DEBUG]    PCI: 00:1c.3 20 *  [0x82c00000 - 0x82cfffff] limit: 82cfffff mem
[DEBUG]    PCI: 00:1c.5 20 *  [0x82d00000 - 0x82dfffff] limit: 82dfffff mem
[DEBUG]    PCI: 00:1b.0 10 *  [0x82e00000 - 0x82e03fff] limit: 82e03fff mem
[DEBUG]    PCI: 00:1f.2 24 *  [0x82e04000 - 0x82e047ff] limit: 82e047ff mem
[DEBUG]    PCI: 00:1a.0 10 *  [0x82e05000 - 0x82e053ff] limit: 82e053ff mem
[DEBUG]    PCI: 00:1d.0 10 *  [0x82e06000 - 0x82e063ff] limit: 82e063ff mem
[DEBUG]    PCI: 00:1f.3 10 *  [0x82e07000 - 0x82e070ff] limit: 82e070ff mem
[DEBUG]    PCI: 00:16.0 10 *  [0x82e08000 - 0x82e0800f] limit: 82e0800f mem
[DEBUG]  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
[DEBUG]  PCI: 00:01.0 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff
[INFO ]   PCI: 00:01.0: Resource ranges:
[INFO ]   * Base: 1000, Size: 1000, Tag: 100
[DEBUG]    PCI: 01:00.0 24 *  [0x1000 - 0x107f] limit: 107f io
[DEBUG]  PCI: 00:01.0 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done
[DEBUG]  PCI: 00:01.0 prefmem: base: 90000000 size: 12000000 align: 28 gran: 20 limit: a1ffffff
[INFO ]   PCI: 00:01.0: Resource ranges:
[INFO ]   * Base: 90000000, Size: 12000000, Tag: 1200
[DEBUG]    PCI: 01:00.0 14 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
[DEBUG]    PCI: 01:00.0 1c *  [0xa0000000 - 0xa1ffffff] limit: a1ffffff prefmem
[DEBUG]  PCI: 00:01.0 prefmem: base: 90000000 size: 12000000 align: 28 gran: 20 limit: a1ffffff done
[DEBUG]  PCI: 00:01.0 mem: base: 83000000 size: 1100000 align: 24 gran: 20 limit: 840fffff
[INFO ]   PCI: 00:01.0: Resource ranges:
[INFO ]   * Base: 83000000, Size: 1100000, Tag: 200
[DEBUG]    PCI: 01:00.0 10 *  [0x83000000 - 0x83ffffff] limit: 83ffffff mem
[DEBUG]    PCI: 01:00.0 30 *  [0x84000000 - 0x8407ffff] limit: 8407ffff mem
[DEBUG]    PCI: 01:00.1 10 *  [0x84080000 - 0x84083fff] limit: 84083fff mem
[DEBUG]  PCI: 00:01.0 mem: base: 83000000 size: 1100000 align: 24 gran: 20 limit: 840fffff done
[DEBUG]  PCI: 00:1c.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
[INFO ]   PCI: 00:1c.1: Resource ranges:
[INFO ]   * Base: 2000, Size: 1000, Tag: 100
[DEBUG]    PCI: 03:00.0 10 *  [0x2000 - 0x2007] limit: 2007 io
[DEBUG]    PCI: 03:00.1 10 *  [0x2008 - 0x200f] limit: 200f io
[DEBUG]    PCI: 03:00.2 10 *  [0x2010 - 0x2017] limit: 2017 io
[DEBUG]    PCI: 03:00.2 14 *  [0x2018 - 0x201f] limit: 201f io
[DEBUG]  PCI: 00:1c.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
[DEBUG]  PCI: 00:1c.1 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff
[INFO ]   PCI: 00:1c.1: Resource ranges:
[INFO ]   * Base: 82a00000, Size: 100000, Tag: 200
[DEBUG]    PCI: 03:00.0 14 *  [0x82a00000 - 0x82a00fff] limit: 82a00fff mem
[DEBUG]    PCI: 03:00.0 24 *  [0x82a01000 - 0x82a01fff] limit: 82a01fff mem
[DEBUG]    PCI: 03:00.1 14 *  [0x82a02000 - 0x82a02fff] limit: 82a02fff mem
[DEBUG]    PCI: 03:00.1 24 *  [0x82a03000 - 0x82a03fff] limit: 82a03fff mem
[DEBUG]    PCI: 03:00.2 18 *  [0x82a04000 - 0x82a04fff] limit: 82a04fff mem
[DEBUG]    PCI: 03:00.2 24 *  [0x82a05000 - 0x82a05fff] limit: 82a05fff mem
[DEBUG]  PCI: 00:1c.1 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done
[DEBUG]  PCI: 00:1c.2 io: base: 3000 size: 1000 align: 12 gran: 12 limit: 3fff
[INFO ]   PCI: 00:1c.2: Resource ranges:
[INFO ]   * Base: 3000, Size: 1000, Tag: 100
[DEBUG]    PCI: 04:00.0 10 *  [0x3000 - 0x30ff] limit: 30ff io
[DEBUG]  PCI: 00:1c.2 io: base: 3000 size: 1000 align: 12 gran: 12 limit: 3fff done
[DEBUG]  PCI: 00:1c.2 prefmem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff
[INFO ]   PCI: 00:1c.2: Resource ranges:
[INFO ]   * Base: 82b00000, Size: 100000, Tag: 1200
[DEBUG]    PCI: 04:00.0 20 *  [0x82b00000 - 0x82b03fff] limit: 82b03fff prefmem
[DEBUG]    PCI: 04:00.0 18 *  [0x82b04000 - 0x82b04fff] limit: 82b04fff prefmem
[DEBUG]  PCI: 00:1c.2 prefmem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done
[DEBUG]  PCI: 00:1c.3 mem: base: 82c00000 size: 100000 align: 20 gran: 20 limit: 82cfffff
[INFO ]   PCI: 00:1c.3: Resource ranges:
[INFO ]   * Base: 82c00000, Size: 100000, Tag: 200
[DEBUG]    PCI: 05:00.0 10 *  [0x82c00000 - 0x82c07fff] limit: 82c07fff mem
[DEBUG]  PCI: 00:1c.3 mem: base: 82c00000 size: 100000 align: 20 gran: 20 limit: 82cfffff done
[DEBUG]  PCI: 00:1c.5 io: base: 4000 size: 1000 align: 12 gran: 12 limit: 4fff
[INFO ]   PCI: 00:1c.5: Resource ranges:
[INFO ]   * Base: 4000, Size: 1000, Tag: 100
[DEBUG]    PCI: 07:00.0 20 *  [0x4000 - 0x400f] limit: 400f io
[DEBUG]    PCI: 07:00.0 10 *  [0x4010 - 0x4017] limit: 4017 io
[DEBUG]    PCI: 07:00.0 18 *  [0x4018 - 0x401f] limit: 401f io
[DEBUG]    PCI: 07:00.0 14 *  [0x4020 - 0x4023] limit: 4023 io
[DEBUG]    PCI: 07:00.0 1c *  [0x4024 - 0x4027] limit: 4027 io
[DEBUG]  PCI: 00:1c.5 io: base: 4000 size: 1000 align: 12 gran: 12 limit: 4fff done
[DEBUG]  PCI: 00:1c.5 mem: base: 82d00000 size: 100000 align: 20 gran: 20 limit: 82dfffff
[INFO ]   PCI: 00:1c.5: Resource ranges:
[INFO ]   * Base: 82d00000, Size: 100000, Tag: 200
[DEBUG]    PCI: 07:00.0 24 *  [0x82d00000 - 0x82d001ff] limit: 82d001ff mem
[DEBUG]  PCI: 00:1c.5 mem: base: 82d00000 size: 100000 align: 20 gran: 20 limit: 82dfffff done
[INFO ]  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
[DEBUG]  PCI: 00:01.0 1c <- [0x0000000000001000 - 0x0000000000001fff] size 0x00001000 gran 0x0c bus 01 io
[DEBUG]  PCI: 00:01.0 24 <- [0x0000000090000000 - 0x00000000a1ffffff] size 0x12000000 gran 0x14 bus 01 prefmem
[DEBUG]  PCI: 00:01.0 20 <- [0x0000000083000000 - 0x00000000840fffff] size 0x01100000 gran 0x14 bus 01 mem
[DEBUG]  PCI: 01:00.0 10 <- [0x0000000083000000 - 0x0000000083ffffff] size 0x01000000 gran 0x18 mem
[DEBUG]  PCI: 01:00.0 14 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG]  PCI: 01:00.0 1c <- [0x00000000a0000000 - 0x00000000a1ffffff] size 0x02000000 gran 0x19 prefmem64
[DEBUG]  PCI: 01:00.0 24 <- [0x0000000000001000 - 0x000000000000107f] size 0x00000080 gran 0x07 io
[DEBUG]  PCI: 01:00.0 30 <- [0x0000000084000000 - 0x000000008407ffff] size 0x00080000 gran 0x13 romem
[DEBUG]  PCI: 01:00.1 10 <- [0x0000000084080000 - 0x0000000084083fff] size 0x00004000 gran 0x0e mem
[DEBUG]  PCI: 00:16.0 10 <- [0x0000000082e08000 - 0x0000000082e0800f] size 0x00000010 gran 0x04 mem64
[DEBUG]  PCI: 00:1a.0 10 <- [0x0000000082e05000 - 0x0000000082e053ff] size 0x00000400 gran 0x0a mem
[DEBUG]  PCI: 00:1b.0 10 <- [0x0000000082e00000 - 0x0000000082e03fff] size 0x00004000 gran 0x0e mem64
[DEBUG]  PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io
[DEBUG]  PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
[DEBUG]  PCI: 00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 02 mem
[DEBUG]  PCI: 00:1c.1 1c <- [0x0000000000002000 - 0x0000000000002fff] size 0x00001000 gran 0x0c bus 03 io
[DEBUG]  PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
[DEBUG]  PCI: 00:1c.1 20 <- [0x0000000082a00000 - 0x0000000082afffff] size 0x00100000 gran 0x14 bus 03 mem
[DEBUG]  PCI: 03:00.0 10 <- [0x0000000000002000 - 0x0000000000002007] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 03:00.0 14 <- [0x0000000082a00000 - 0x0000000082a00fff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 03:00.0 24 <- [0x0000000082a01000 - 0x0000000082a01fff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 03:00.1 10 <- [0x0000000000002008 - 0x000000000000200f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 03:00.1 14 <- [0x0000000082a02000 - 0x0000000082a02fff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 03:00.1 24 <- [0x0000000082a03000 - 0x0000000082a03fff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 03:00.2 10 <- [0x0000000000002010 - 0x0000000000002017] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 03:00.2 14 <- [0x0000000000002018 - 0x000000000000201f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 03:00.2 18 <- [0x0000000082a04000 - 0x0000000082a04fff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 03:00.2 24 <- [0x0000000082a05000 - 0x0000000082a05fff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 00:1c.2 1c <- [0x0000000000003000 - 0x0000000000003fff] size 0x00001000 gran 0x0c bus 04 io
[DEBUG]  PCI: 00:1c.2 24 <- [0x0000000082b00000 - 0x0000000082bfffff] size 0x00100000 gran 0x14 bus 04 prefmem
[DEBUG]  PCI: 00:1c.2 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 04 mem
[DEBUG]  PCI: 04:00.0 10 <- [0x0000000000003000 - 0x00000000000030ff] size 0x00000100 gran 0x08 io
[DEBUG]  PCI: 04:00.0 18 <- [0x0000000082b04000 - 0x0000000082b04fff] size 0x00001000 gran 0x0c prefmem64
[DEBUG]  PCI: 04:00.0 20 <- [0x0000000082b00000 - 0x0000000082b03fff] size 0x00004000 gran 0x0e prefmem64
[DEBUG]  PCI: 00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 05 io
[DEBUG]  PCI: 00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem
[DEBUG]  PCI: 00:1c.3 20 <- [0x0000000082c00000 - 0x0000000082cfffff] size 0x00100000 gran 0x14 bus 05 mem
[DEBUG]  PCI: 05:00.0 10 <- [0x0000000082c00000 - 0x0000000082c07fff] size 0x00008000 gran 0x0f mem64
[DEBUG]  PCI: 00:1c.4 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 06 io
[DEBUG]  PCI: 00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 06 prefmem
[DEBUG]  PCI: 00:1c.4 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 06 mem
[DEBUG]  PCI: 00:1c.5 1c <- [0x0000000000004000 - 0x0000000000004fff] size 0x00001000 gran 0x0c bus 07 io
[DEBUG]  PCI: 00:1c.5 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 07 prefmem
[DEBUG]  PCI: 00:1c.5 20 <- [0x0000000082d00000 - 0x0000000082dfffff] size 0x00100000 gran 0x14 bus 07 mem
[DEBUG]  PCI: 07:00.0 10 <- [0x0000000000004010 - 0x0000000000004017] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 07:00.0 14 <- [0x0000000000004020 - 0x0000000000004023] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 07:00.0 18 <- [0x0000000000004018 - 0x000000000000401f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 07:00.0 1c <- [0x0000000000004024 - 0x0000000000004027] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 07:00.0 20 <- [0x0000000000004000 - 0x000000000000400f] size 0x00000010 gran 0x04 io
[DEBUG]  PCI: 07:00.0 24 <- [0x0000000082d00000 - 0x0000000082d001ff] size 0x00000200 gran 0x09 mem
[DEBUG]  PCI: 00:1d.0 10 <- [0x0000000082e06000 - 0x0000000082e063ff] size 0x00000400 gran 0x0a mem
[DEBUG]  PNP: 002e.1 60 <- [0x0000000000000378 - 0x000000000000037f] size 0x00000008 gran 0x03 io
[DEBUG]  PNP: 002e.1 70 <- [0x0000000000000005 - 0x0000000000000005] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.1 74 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 drq
[DEBUG]  PNP: 002e.1 f0 <- [0x000000000000003c - 0x000000000000003b] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.2 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
[DEBUG]  PNP: 002e.2 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.5 60 <- [0x0000000000000060 - 0x0000000000000060] size 0x00000001 gran 0x00 io
[DEBUG]  PNP: 002e.5 62 <- [0x0000000000000064 - 0x0000000000000064] size 0x00000001 gran 0x00 io
[DEBUG]  PNP: 002e.5 70 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.5 72 <- [0x000000000000000c - 0x000000000000000c] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.a e5 <- [0x0000000000000006 - 0x0000000000000005] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.a e6 <- [0x000000000000000c - 0x000000000000000b] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.a e7 <- [0x0000000000000011 - 0x0000000000000010] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.a f0 <- [0x0000000000000000 - 0xffffffffffffffff] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.a f2 <- [0x000000000000005d - 0x000000000000005c] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.b 60 <- [0x0000000000000290 - 0x0000000000000291] size 0x00000002 gran 0x01 io
[DEBUG]  PNP: 002e.b 62 <- [0x0000000000000000 - 0x0000000000000001] size 0x00000002 gran 0x01 io
[ERROR]  PNP: 002e.b 70 irq size: 0x0000000001 not assigned in devicetree
[DEBUG]  PNP: 002e.f f0 <- [0x000000000000009d - 0x000000000000009c] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.16 30 <- [0x0000000000000020 - 0x000000000000001f] size 0x00000000 gran 0x00 io
[DEBUG]  PNP: 002e.17 e0 <- [0x00000000000000ff - 0x00000000000000fe] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.17 e1 <- [0x00000000000000ff - 0x00000000000000fe] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.17 e2 <- [0x00000000000000ff - 0x00000000000000fe] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.17 e3 <- [0x00000000000000ff - 0x00000000000000fe] size 0x00000000 gran 0x00 irq
[DEBUG]  PNP: 002e.17 e5 <- [0x00000000000000ff - 0x00000000000000fe] size 0x00000000 gran 0x00 irq
[ERROR]  PNP: 002e.308 60 io size: 0x0000000008 not assigned in devicetree
[DEBUG]  PCI: 00:1f.2 10 <- [0x0000000000005020 - 0x0000000000005027] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:1f.2 14 <- [0x0000000000005030 - 0x0000000000005033] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:1f.2 18 <- [0x0000000000005028 - 0x000000000000502f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:1f.2 1c <- [0x0000000000005034 - 0x0000000000005037] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:1f.2 20 <- [0x0000000000005000 - 0x000000000000501f] size 0x00000020 gran 0x05 io
[DEBUG]  PCI: 00:1f.2 24 <- [0x0000000082e04000 - 0x0000000082e047ff] size 0x00000800 gran 0x0b mem
[DEBUG]  PCI: 00:1f.3 10 <- [0x0000000082e07000 - 0x0000000082e070ff] size 0x00000100 gran 0x08 mem64
[INFO ]  Done setting resources.
[INFO ]  Done allocating resources.
[DEBUG]  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1 ms
[INFO ]  Timestamp - device enable: 4006008868
[INFO ]  Enabling resources...
[DEBUG]  PCI: 00:00.0 subsystem <- 8086/0100
[DEBUG]  PCI: 00:00.0 cmd <- 06
[DEBUG]  PCI: 00:01.0 bridge ctrl <- 001b
[DEBUG]  PCI: 00:01.0 subsystem <- 8086/0101
[DEBUG]  PCI: 00:01.0 cmd <- 07
[DEBUG]  PCI: 00:16.0 subsystem <- 8086/1c3a
[DEBUG]  PCI: 00:16.0 cmd <- 02
[DEBUG]  PCI: 00:1a.0 subsystem <- 8086/1c2d
[DEBUG]  PCI: 00:1a.0 cmd <- 102
[DEBUG]  PCI: 00:1b.0 subsystem <- 8086/1c20
[DEBUG]  PCI: 00:1b.0 cmd <- 102
[DEBUG]  PCI: 00:1c.0 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.0 subsystem <- 8086/1c10
[DEBUG]  PCI: 00:1c.0 cmd <- 100
[DEBUG]  PCI: 00:1c.1 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.1 subsystem <- 8086/1c12
[DEBUG]  PCI: 00:1c.1 cmd <- 107
[DEBUG]  PCI: 00:1c.2 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.2 subsystem <- 8086/1c14
[DEBUG]  PCI: 00:1c.2 cmd <- 107
[DEBUG]  PCI: 00:1c.3 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.3 subsystem <- 8086/1c16
[DEBUG]  PCI: 00:1c.3 cmd <- 106
[DEBUG]  PCI: 00:1c.4 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.4 subsystem <- 8086/1c18
[DEBUG]  PCI: 00:1c.4 cmd <- 100
[DEBUG]  PCI: 00:1c.5 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.5 subsystem <- 8086/1c1a
[DEBUG]  PCI: 00:1c.5 cmd <- 107
[DEBUG]  PCI: 00:1d.0 subsystem <- 8086/1c26
[DEBUG]  PCI: 00:1d.0 cmd <- 102
[DEBUG]  PCI: 00:1f.0 subsystem <- 8086/1c5c
[DEBUG]  PCI: 00:1f.0 cmd <- 107
[DEBUG]  PCI: 00:1f.2 subsystem <- 8086/1c02
[DEBUG]  PCI: 00:1f.2 cmd <- 03
[DEBUG]  PCI: 00:1f.3 subsystem <- 8086/1c22
[DEBUG]  PCI: 00:1f.3 cmd <- 103
[DEBUG]  PCI: 01:00.0 cmd <- 03
[DEBUG]  PCI: 01:00.1 cmd <- 02
[DEBUG]  PCI: 03:00.0 cmd <- 03
[DEBUG]  PCI: 03:00.1 cmd <- 03
[DEBUG]  PCI: 03:00.2 cmd <- 03
[DEBUG]  PCI: 04:00.0 cmd <- 03
[DEBUG]  PCI: 05:00.0 cmd <- 02
[DEBUG]  PCI: 07:00.0 cmd <- 03
[INFO ]  done.
[INFO ]  Timestamp - device initialization: 4007833546
[INFO ]  Initializing devices...
[DEBUG]  CPU_CLUSTER: 0 init
[DEBUG]  MTRR: Physical address space:
[DEBUG]  0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG]  0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG]  0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG]  0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 0
[DEBUG]  0x0000000090000000 - 0x00000000a1ffffff size 0x12000000 type 1
[DEBUG]  0x00000000a2000000 - 0x00000000ffffffff size 0x5e000000 type 0
[DEBUG]  0x0000000100000000 - 0x000000047d5fffff size 0x37d600000 type 6
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG]  apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
[DEBUG]  MTRR: default type WB/UC MTRR counts: 8/6.
[DEBUG]  MTRR: UC selected as default type.
[DEBUG]  MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
[DEBUG]  MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1
[DEBUG]  MTRR: 2 base 0x00000000a0000000 mask 0x0000000ffe000000 type 1
[DEBUG]  MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6
[DEBUG]  MTRR: 4 base 0x0000000200000000 mask 0x0000000e00000000 type 6
[DEBUG]  MTRR: 5 base 0x0000000400000000 mask 0x0000000f80000000 type 6

[DEBUG]  MTRR check
[DEBUG]  Fixed MTRRs   : Enabled
[DEBUG]  Variable MTRRs: Enabled

[DEBUG]  CPU has 2 cores, 4 threads enabled.
[DEBUG]  Setting up SMI for CPU
[INFO ]  Will perform SMM setup.
[DEBUG]  FMAP: area COREBOOT found @ 290200 (1506816 bytes)
[INFO ]  CBFS: Found 'cpu_microcode_blob.bin' @0x15400 size 0x6800 in mcache @0x7ffdd0ac
[DEBUG]  microcode: sig=0x206a7 pf=0x2 revision=0x2f
[INFO ]  CPU: Intel(R) Core(TM) i3-2130 CPU @ 3.40GHz.
[INFO ]  LAPIC 0x0 in XAPIC mode.
[DEBUG]  CPU: APIC: 00 enabled
[DEBUG]  CPU: APIC: 01 enabled
[DEBUG]  CPU: APIC: 02 enabled
[DEBUG]  CPU: APIC: 03 enabled
[DEBUG]  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG]  Processing 16 relocs. Offset value of 0x00030000
[DEBUG]  Attempting to start 3 APs
[DEBUG]  Waiting for 10ms after sending INIT.
[DEBUG]  Waiting for SIPI to complete...
[DEBUG]  done.
[DEBUG]  Waiting for SIPI to complete...
[INFO ]  LAPIC 0x1 in XAPIC mode.
[DEBUG]  done.
[INFO ]  AP: slot 1 apic_id 1, MCU rev: 0x0000002f
[INFO ]  LAPIC 0x3 in XAPIC mode.
[INFO ]  LAPIC 0x2 in XAPIC mode.
[INFO ]  AP: slot 3 apic_id 3, MCU rev: 0x0000002f
[INFO ]  AP: slot 2 apic_id 2, MCU rev: 0x0000002f
[DEBUG]  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8
[DEBUG]  Processing 11 relocs. Offset value of 0x00038000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80001000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.start32_offset = 0x4c
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG]  SMM Module: stub loaded at 38000. Will call 0x7ffa1189
[DEBUG]  Installing permanent SMM handler to 0x80000000
[DEBUG]  FX_SAVE      [0x802ff800-0x80300000]
[DEBUG]  HANDLER      [0x802fe000-0x802ff1a8]

[DEBUG]  CPU 0
[DEBUG]    ss0        [0x802fdc00-0x802fe000]
[DEBUG]    stub0      [0x802f6000-0x802f61e8]

[DEBUG]  CPU 1
[DEBUG]    ss1        [0x802fd800-0x802fdc00]
[DEBUG]    stub1      [0x802f5c00-0x802f5de8]

[DEBUG]  CPU 2
[DEBUG]    ss2        [0x802fd400-0x802fd800]
[DEBUG]    stub2      [0x802f5800-0x802f59e8]

[DEBUG]  CPU 3
[DEBUG]    ss3        [0x802fd000-0x802fd400]
[DEBUG]    stub3      [0x802f5400-0x802f55e8]

[DEBUG]  stacks       [0x80000000-0x80001000]
[DEBUG]  Loading module at 0x802fe000 with entry 0x802fe29a. filesize: 0x1190 memsize: 0x11a8
[DEBUG]  Processing 58 relocs. Offset value of 0x802fe000
[DEBUG]  Loading module at 0x802f6000 with entry 0x802f6000. filesize: 0x1e8 memsize: 0x1e8
[DEBUG]  Processing 11 relocs. Offset value of 0x802f6000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80001000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.start32_offset = 0x4c
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG]  SMM Module: placing smm entry code at 802f5c00,  cpu # 0x1
[DEBUG]  SMM Module: placing smm entry code at 802f5800,  cpu # 0x2
[DEBUG]  SMM Module: placing smm entry code at 802f5400,  cpu # 0x3
[DEBUG]  SMM Module: stub loaded at 802f6000. Will call 0x802fe29a
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ee000, cpu = 0
[DEBUG]  In relocation handler: cpu 0
[DEBUG]  New SMBASE=0x802ee000 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802edc00, cpu = 1
[INFO ]  microcode: Update skipped, already up-to-date
[DEBUG]  In relocation handler: cpu 1
[DEBUG]  New SMBASE=0x802edc00 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed400, cpu = 3
[DEBUG]  In relocation handler: cpu 3
[DEBUG]  New SMBASE=0x802ed400 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed800, cpu = 2
[INFO ]  microcode: Update skipped, already up-to-date
[DEBUG]  In relocation handler: cpu 2
[DEBUG]  New SMBASE=0x802ed800 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  Initializing CPU #0
[DEBUG]  CPU: vendor Intel device 206a7
[DEBUG]  CPU: family 06, model 2a, stepping 07
[INFO ]  CPU: Intel(R) Core(TM) i3-2130 CPU @ 3.40GHz.
[INFO ]  CPU: platform id 1
[INFO ]  CPU: cpuid(1) 0x206a7
[INFO ]  CPU: AES NOT supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3400
[INFO ]  Turbo is unavailable
[INFO ]  CPU #0 initialized
[INFO ]  Initializing CPU #1
[INFO ]  Initializing CPU #2
[INFO ]  Initializing CPU #3
[DEBUG]  CPU: vendor Intel device 206a7
[DEBUG]  CPU: family 06, model 2a, stepping 07
[DEBUG]  CPU: vendor Intel device 206a7
[DEBUG]  CPU: family 06, model 2a, stepping 07
[DEBUG]  CPU: vendor Intel device 206a7
[DEBUG]  CPU: family 06, model 2a, stepping 07
[INFO ]  CPU: Intel(R) Core(TM) i3-2130 CPU @ 3.40GHz.
[INFO ]  CPU: platform id 1
[INFO ]  CPU: Intel(R) Core(TM) i3-2130 CPU @ 3.40GHz.
[INFO ]  CPU: cpuid(1) 0x206a7
[INFO ]  CPU: platform id 1
[INFO ]  CPU: AES NOT supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[INFO ]  CPU: cpuid(1) 0x206a7
[DEBUG]  VMX status: enabled
[INFO ]  CPU: AES NOT supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  VMX status: enabled
[INFO ]  CPU: Intel(R) Core(TM) i3-2130 CPU @ 3.40GHz.
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[INFO ]  CPU: platform id 1
[INFO ]  CPU: cpuid(1) 0x206a7
[INFO ]  CPU: AES NOT supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3400
[DEBUG]  cpu: energy policy set to 6
[INFO ]  CPU #2 initialized
[DEBUG]  model_x06ax: frequency set to 3400
[INFO ]  CPU #3 initialized
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3400
[INFO ]  CPU #1 initialized
[INFO ]  bsp_do_flight_plan done after 10 msecs.
[DEBUG]  SMI_STS: 
[DEBUG]  GPE0_STS: GPIO14 GPIO11 GPIO10 GPIO9 GPIO7 
[DEBUG]  ALT_GP_SMI_STS: GPI14 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 
[DEBUG]  TCO_STS: 
[DEBUG]  Locking SMM.
[DEBUG]  CPU_CLUSTER: 0 init finished in 22 msecs
[DEBUG]  PCI: 00:00.0 init
[DEBUG]  Disabling PEG12.
[DEBUG]  Disabling PEG11.
[DEBUG]  Disabling IGD.
[DEBUG]  Disabling Device 4.
[DEBUG]  Disabling PEG60.
[DEBUG]  Disabling Device 7.
[DEBUG]  Set BIOS_RESET_CPL
[DEBUG]  CPU TDP: 65 Watts
[DEBUG]  PCI: 00:00.0 init finished in 1 msecs
[DEBUG]  PCI: 00:01.0 init
[DEBUG]  PCI: 00:01.0 init finished in 0 msecs
[DEBUG]  PCI: 00:16.0 init
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Initializing
[DEBUG]  ME: Current Operation State : Bring up
[DEBUG]  ME: Current Operation Mode  : Debug or Disabled by AltDisableBit
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : BUP Phase
[DEBUG]  ME: Power Management Event  : Clean Moff->Mx wake
[DEBUG]  ME: Progress Phase State    : Check to see if straps say ME DISABLED
[NOTE ]  ME: BIOS path: Disable
[DEBUG]  ME: me_state=0, me_state_prev=0
[DEBUG]  PCI: 00:16.0: Disabling device
[DEBUG]  PCI: 00:16.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1a.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:1a.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1b.0 init
[DEBUG]  Azalia: base = 0x82e00000
[DEBUG]  Azalia: codec_mask = 09
[DEBUG]  azalia_audio: Initializing codec #3
[DEBUG]  azalia_audio: codec viddid: 80862805
[DEBUG]  azalia_audio: verb_size: 16
[DEBUG]  azalia_audio: verb loaded.
[DEBUG]  azalia_audio: Initializing codec #0
[DEBUG]  azalia_audio: codec viddid: 10ec0887
[DEBUG]  azalia_audio: verb_size: 60
[DEBUG]  azalia_audio: verb loaded.
[DEBUG]  PCI: 00:1b.0 init finished in 4 msecs
[DEBUG]  PCI: 00:1c.0 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.1 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.1 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.2 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.2 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.3 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.3 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.4 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.4 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.5 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.5 init finished in 0 msecs
[DEBUG]  PCI: 00:1d.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:1d.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.0 init
[DEBUG]  pch: lpc_init
[INFO ]  PCH: detected H61, device id: 0x1c5c, rev id 0x5
[DEBUG]  IOAPIC: Initializing IOAPIC at 0xfec00000
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  IOAPIC: Clearing IOAPIC at 0xfec00000
[DEBUG]  IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ]  Set power off after power failure.
[INFO ]  NMI sources disabled.
[DEBUG]  CougarPoint PM init
[DEBUG]  RTC: failed = 0x0
[DEBUG]  RTC Init
[DEBUG]  apm_control: Disabling ACPI.
[DEBUG]  APMC done.
[DEBUG]  pch_spi_init
[DEBUG]  PCI: 00:1f.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.2 init
[DEBUG]  SATA: Initializing...
[DEBUG]  SATA: Controller in AHCI mode.
[DEBUG]  ABAR: 0x82e04000
[DEBUG]  PCI: 00:1f.2 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.3 init
[DEBUG]  PCI: 00:1f.3 init finished in 0 msecs
[DEBUG]  PCI: 01:00.0 init
[INFO ]  Timestamp - Option ROM initialization: 4107627368
[WARN ]  CBFS: 'pci10de,1c82.rom' not found.
[DEBUG]  Option ROM address for PCI: 01:00.0 = 84000000
[DEBUG]  Copying VGA ROM Image from 0x84000000 to 0xc0000, 0xf000 bytes
[INFO ]  Timestamp - Option ROM copy done: 4206220164
[ERROR]  Null dereference at eip: 0x7ff99511
[ERROR]  Null dereference at eip: 0x7ff9952b
[DEBUG]  Calling Option ROM...
[DEBUG]  ... Option ROM returned.
[DEBUG]  VGA Option ROM was run
[INFO ]  Timestamp - Option ROM run done: 6504052656
[DEBUG]  PCI: 01:00.0 init finished in 704 msecs
[DEBUG]  PCI: 01:00.1 init
[DEBUG]  PCI: 01:00.1 init finished in 0 msecs
[DEBUG]  PCI: 03:00.0 init
[DEBUG]  PCI: 03:00.0 init finished in 0 msecs
[DEBUG]  PCI: 03:00.1 init
[DEBUG]  PCI: 03:00.1 init finished in 0 msecs
[DEBUG]  PCI: 03:00.2 init
[DEBUG]  PCI: 03:00.2 init finished in 0 msecs
[DEBUG]  PCI: 04:00.0 init
[INFO ]  CBFS: Found 'rt8168-macaddress' @0x37a00 size 0x11 in mcache @0x7ffdd1d4
[DEBUG]  r8168: Resetting NIC...done
[DEBUG]  r8168: Programming MAC Address...done
[DEBUG]  r8168: Customized LED 0xf6
[DEBUG]  r8168: read back LED setting as 0xf6
[DEBUG]  PCI: 04:00.0 init finished in 0 msecs
[DEBUG]  PCI: 05:00.0 init
[DEBUG]  PCI: 05:00.0 init finished in 0 msecs
[DEBUG]  PNP: 002e.1 init
[DEBUG]  PNP: 002e.1 init finished in 0 msecs
[DEBUG]  PNP: 002e.2 init
[DEBUG]  PNP: 002e.2 init finished in 0 msecs
[DEBUG]  PNP: 002e.5 init
[DEBUG]  PNP: 002e.5 init finished in 0 msecs
[DEBUG]  PNP: 002e.a init
[DEBUG]  PNP: 002e.a init finished in 0 msecs
[DEBUG]  PNP: 002e.b init
[DEBUG]  PNP: 002e.b init finished in 0 msecs
[DEBUG]  PNP: 002e.d init
[DEBUG]  PNP: 002e.d init finished in 0 msecs
[DEBUG]  PNP: 002e.f init
[DEBUG]  PNP: 002e.f init finished in 0 msecs
[DEBUG]  PNP: 002e.16 init
[DEBUG]  PNP: 002e.16 init finished in 0 msecs
[DEBUG]  PNP: 002e.17 init
[DEBUG]  PNP: 002e.17 init finished in 0 msecs
[DEBUG]  PNP: 002e.308 init
[DEBUG]  PNP: 002e.308 init finished in 0 msecs
[DEBUG]  PNP: 002e.108 init
[DEBUG]  PNP: 002e.108 init finished in 0 msecs
[DEBUG]  PNP: 002e.109 init
[DEBUG]  PNP: 002e.109 init finished in 0 msecs
[DEBUG]  PNP: 002e.209 init
[DEBUG]  PNP: 002e.209 init finished in 0 msecs
[DEBUG]  PNP: 002e.309 init
[DEBUG]  PNP: 002e.309 init finished in 0 msecs
[DEBUG]  PNP: 002e.409 init
[DEBUG]  PNP: 002e.409 init finished in 0 msecs
[DEBUG]  PNP: 002e.509 init
[DEBUG]  PNP: 002e.509 init finished in 0 msecs
[DEBUG]  PNP: 002e.609 init
[DEBUG]  PNP: 002e.609 init finished in 0 msecs
[DEBUG]  PNP: 002e.709 init
[DEBUG]  PNP: 002e.709 init finished in 0 msecs
[DEBUG]  PNP: 002e.107 init
[DEBUG]  PNP: 002e.107 init finished in 0 msecs
[DEBUG]  PNP: 002e.208 init
[DEBUG]  PNP: 002e.208 init finished in 0 msecs
[INFO ]  Devices initialized
[DEBUG]  BS: BS_DEV_INIT run times (exec / console): 733 / 1 ms
[INFO ]  Finalize devices...
[DEBUG]  PCI: 00:1f.0 final
[DEBUG]  apm_control: Finalizing SMM.
[DEBUG]  APMC done.
[INFO ]  Devices finalized
[INFO ]  Timestamp - device setup done: 6504548272
[INFO ]  Timestamp - cbmem post: 6504552752
[INFO ]  Timestamp - write tables: 6504555872
[INFO ]  CBFS: Found 'fallback/dsdt.aml' @0x35780 size 0x2232 in mcache @0x7ffdd1a8
[WARN ]  CBFS: 'fallback/slic' not found.
[INFO ]  ACPI: Writing ACPI tables at 7ff4d000.
[DEBUG]  ACPI:    * FACS
[DEBUG]  ACPI:    * DSDT
[DEBUG]  ACPI:    * FADT
[DEBUG]  ACPI: added table 1/32, length now 40
[DEBUG]  ACPI:     * SSDT
[DEBUG]  Found 1 CPU(s) with 4 core(s) each.
[DEBUG]  PSS: 3400MHz power 65000 control 0x2200 status 0x2200
[DEBUG]  PSS: 2800MHz power 49857 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 40738 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 32372 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 24592 control 0x1000 status 0x1000
[DEBUG]  PSS: 3400MHz power 65000 control 0x2200 status 0x2200
[DEBUG]  PSS: 2800MHz power 49857 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 40738 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 32372 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 24592 control 0x1000 status 0x1000
[DEBUG]  PSS: 3400MHz power 65000 control 0x2200 status 0x2200
[DEBUG]  PSS: 2800MHz power 49857 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 40738 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 32372 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 24592 control 0x1000 status 0x1000
[DEBUG]  PSS: 3400MHz power 65000 control 0x2200 status 0x2200
[DEBUG]  PSS: 2800MHz power 49857 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 40738 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 32372 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 24592 control 0x1000 status 0x1000
[DEBUG]  PCI space above 4GB MMIO is at 0x47d600000, len = 0xb82a00000
[DEBUG]  Generating ACPI PIRQ entries
[INFO ]  \_SB.PCI0.RP03.RLTK.RLTK: Realtek r8168 PCI: 04:00.0
[WARN ]  CBFS: 'pci10de,1c82.rom' not found.
[DEBUG]  Option ROM address for PCI: 01:00.0 = 84000000
[ERROR]  Incorrect expansion ROM header signature beef
[WARN ]  PCI: 01:00.0: Missing PCI Option ROM
[DEBUG]  ACPI: added table 2/32, length now 44
[DEBUG]  ACPI:    * MCFG
[DEBUG]  ACPI: added table 3/32, length now 48
[DEBUG]  ACPI:    * MADT
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  ACPI: added table 4/32, length now 52
[DEBUG]  current = 7ff50a60
[DEBUG]  ACPI:    * HPET
[DEBUG]  ACPI: added table 5/32, length now 56
[INFO ]  ACPI: done.
[DEBUG]  ACPI tables: 15008 bytes.
[DEBUG]  smbios_write_tables: 7ff45000
[DEBUG]  SMBIOS firmware version is set to coreboot_version: '4.19'
[INFO ]  Create SMBIOS type 16
[INFO ]  Create SMBIOS type 17
[INFO ]  Create SMBIOS type 20
[DEBUG]  SMBIOS tables: 939 bytes.
[DEBUG]  Writing table forward entry at 0x00000500
[DEBUG]  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6fe7
[DEBUG]  Writing coreboot table at 0x7ff71000
[DEBUG]   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG]   1. 0000000000001000-000000000009ffff: RAM
[DEBUG]   2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG]   3. 0000000000100000-000000001fffffff: RAM
[DEBUG]   4. 0000000020000000-00000000201fffff: RESERVED
[DEBUG]   5. 0000000020200000-000000003fffffff: RAM
[DEBUG]   6. 0000000040000000-00000000401fffff: RESERVED
[DEBUG]   7. 0000000040200000-000000007ff44fff: RAM
[DEBUG]   8. 000000007ff45000-000000007ff89fff: CONFIGURATION TABLES
[DEBUG]   9. 000000007ff8a000-000000007ffcefff: RAMSTAGE
[DEBUG]  10. 000000007ffcf000-000000007fffffff: CONFIGURATION TABLES
[DEBUG]  11. 0000000080000000-00000000829fffff: RESERVED
[DEBUG]  12. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG]  13. 0000000100000000-000000047d5fffff: RAM
[DEBUG]  Wrote coreboot table at: 0x7ff71000, 0x3a8 bytes, checksum 7328
[DEBUG]  coreboot table: 960 bytes.
[DEBUG]  IMD ROOT    0. 0x7ffff000 0x00001000
[DEBUG]  IMD SMALL   1. 0x7fffe000 0x00001000
[DEBUG]  CONSOLE     2. 0x7ffde000 0x00020000
[DEBUG]  RO MCACHE   3. 0x7ffdd000 0x0000030c
[DEBUG]  TIME STAMP  4. 0x7ffdc000 0x00000910
[DEBUG]  MRC DATA    5. 0x7ffdb000 0x00000648
[DEBUG]  MEM INFO    6. 0x7ffda000 0x000007a8
[DEBUG]  AFTER CAR   7. 0x7ffcf000 0x0000b000
[DEBUG]  RAMSTAGE    8. 0x7ff89000 0x00046000
[DEBUG]  SMM BACKUP  9. 0x7ff79000 0x00010000
[DEBUG]  COREBOOT   10. 0x7ff71000 0x00008000
[DEBUG]  ACPI       11. 0x7ff4d000 0x00024000
[DEBUG]  SMBIOS     12. 0x7ff45000 0x00008000
[DEBUG]  IMD small region:
[DEBUG]    IMD ROOT    0. 0x7fffec00 0x00000400
[DEBUG]    FMAP        1. 0x7fffeb20 0x000000e0
[DEBUG]    ROMSTAGE    2. 0x7fffeb00 0x00000004
[DEBUG]    ROMSTG STCK 3. 0x7fffea40 0x000000a8
[DEBUG]    ACPI GNVS   4. 0x7fffe940 0x00000100
[INFO ]  Timestamp - finalize chips: 6513842764
[DEBUG]  BS: BS_WRITE_TABLES run times (exec / console): 3 / 0 ms
[INFO ]  Timestamp - starting to load payload: 6513850236
[INFO ]  CBFS: Found 'fallback/payload' @0x3bd40 size 0xbc771 in mcache @0x7ffdd29c
[DEBUG]  Checking segment from ROM address 0xffecbf6c
[DEBUG]  Checking segment from ROM address 0xffecbf88
[DEBUG]  Loading segment from ROM address 0xffecbf6c
[DEBUG]    code (compression=1)
[DEBUG]    New segment dstaddr 0x00800000 memsize 0x590000 srcaddr 0xffecbfa4 filesize 0xbc739
[DEBUG]  Loading Segment: addr: 0x00800000 memsz: 0x0000000000590000 filesz: 0x00000000000bc739
[DEBUG]  using LZMA
[INFO ]  Timestamp - starting LZMA decompress (ignore for x86): 6514073468
[INFO ]  Timestamp - finished LZMA decompress (ignore for x86): 7300989892
[DEBUG]  Loading segment from ROM address 0xffecbf88
[DEBUG]    Entry Point 0x00801626
[DEBUG]  BS: BS_PAYLOAD_LOAD run times (exec / console): 232 / 0 ms
[DEBUG]  ICH-NM10-PCH: watchdog disabled
[DEBUG]  Jumping to boot code at 0x00801626(0x7ff71000)
[INFO ]  Timestamp - selfboot jump: 7301166400

defconfig

CONFIG_CCACHE=y
CONFIG_TIMESTAMPS_ON_CONSOLE=y
CONFIG_VENDOR_ASUS=y
CONFIG_CBFS_SIZE=0x180000
# CONFIG_CONSOLE_SERIAL is not set
# CONFIG_POST_DEVICE is not set
# CONFIG_POST_IO is not set
CONFIG_INTEL_GMA_VBT_FILE="../data.vbt"
CONFIG_BOARD_ASUS_P8H61_M_PRO=y
CONFIG_IFD_BIN_PATH="../d.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_EDK2_BOOT_TIMEOUT=2
CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29
CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_HIDE_MEI_ON_ERROR=y
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
CONFIG_HAVE_ME_BIN=y
CONFIG_STITCH_ME_BIN=y
CONFIG_CHECK_ME=y
CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS=y
CONFIG_VGA_ROM_RUN=y
CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_REALTEK_8168_MACADDRESS="54:04:a6:ce:01:d4"
# CONFIG_SMMSTORE is not set
# CONFIG_BOOTBLOCK_CONSOLE is not set
# CONFIG_POSTCAR_CONSOLE is not set
# CONFIG_SQUELCH_EARLY_SMP is not set
# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set
# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set
CONFIG_PAYLOAD_EDK2=y
CONFIG_EDK2_ABOVE_4G_MEMORY=y
CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y
CONFIG_EDK2_FOLLOW_BGRT_SPEC=y
# CONFIG_EDK2_FULL_SCREEN_SETUP is not set
CONFIG_EDK2_SD_MMC_TIMEOUT=10