Last active
July 21, 2022 09:01
-
-
Save jeffdi/8dbc17a777492bff039951985a803c0f to your computer and use it in GitHub Desktop.
VexRiscv Min+Debug+Cache core configuration
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| val spinalVersion = "1.6.0" | |
| lazy val root = (project in file(".")). | |
| settings( | |
| inThisBuild(List( | |
| organization := "com.github.spinalhdl", | |
| scalaVersion := "2.11.12", | |
| version := "0.1.0-SNAPSHOT" | |
| )), | |
| name := "VexRiscvOnWishbone", | |
| libraryDependencies ++= Seq( | |
| compilerPlugin("com.github.spinalhdl" % "spinalhdl-idsl-plugin_2.11" % spinalVersion) | |
| ), | |
| scalacOptions += s"-Xplugin-require:idsl-plugin" | |
| ).dependsOn(vexRiscv) | |
| lazy val vexRiscv = RootProject(file("ext/VexRiscv")) | |
| fork := true |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| (venv) jeffs-mbp:verilog jeffdi$ find ext -print | |
| ext | |
| ext/target | |
| ext/target/streams | |
| ext/target/streams/_global | |
| ext/target/streams/_global/ivyConfiguration | |
| ext/target/streams/_global/ivyConfiguration/_global | |
| ext/target/streams/_global/ivyConfiguration/_global/streams | |
| ext/target/streams/_global/ivyConfiguration/_global/streams/out | |
| ext/target/streams/_global/update | |
| ext/target/streams/_global/update/_global | |
| ext/target/streams/_global/update/_global/streams | |
| ext/target/streams/_global/update/_global/streams/out | |
| ext/target/streams/_global/moduleSettings | |
| ext/target/streams/_global/moduleSettings/_global | |
| ext/target/streams/_global/moduleSettings/_global/streams | |
| ext/target/streams/_global/moduleSettings/_global/streams/out | |
| ext/target/streams/_global/ivySbt | |
| ext/target/streams/_global/ivySbt/_global | |
| ext/target/streams/_global/ivySbt/_global/streams | |
| ext/target/streams/_global/ivySbt/_global/streams/out | |
| ext/target/streams/_global/projectDescriptors | |
| ext/target/streams/_global/projectDescriptors/_global | |
| ext/target/streams/_global/projectDescriptors/_global/streams | |
| ext/target/streams/_global/projectDescriptors/_global/streams/out | |
| ext/target/streams/_global/csrProject | |
| ext/target/streams/_global/csrProject/_global | |
| ext/target/streams/_global/csrProject/_global/streams | |
| ext/target/streams/_global/csrProject/_global/streams/out | |
| ext/target/streams/_global/dependencyPositions | |
| ext/target/streams/_global/dependencyPositions/_global | |
| ext/target/streams/_global/dependencyPositions/_global/streams | |
| ext/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12 | |
| ext/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp | |
| ext/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp | |
| ext/target/streams/_global/csrConfiguration | |
| ext/target/streams/_global/csrConfiguration/_global | |
| ext/target/streams/_global/csrConfiguration/_global/streams | |
| ext/target/streams/_global/csrConfiguration/_global/streams/out | |
| ext/target/streams/compile | |
| ext/target/streams/compile/unmanagedJars | |
| ext/target/streams/compile/unmanagedJars/_global | |
| ext/target/streams/compile/unmanagedJars/_global/streams | |
| ext/target/streams/compile/unmanagedJars/_global/streams/export | |
| ext/target/scala-2.12 | |
| ext/target/scala-2.12/update | |
| ext/target/scala-2.12/update/update_cache_2.12 | |
| ext/target/scala-2.12/update/update_cache_2.12/output | |
| ext/target/scala-2.12/update/update_cache_2.12/inputs | |
| ext/VexRiscv | |
| ext/VexRiscv/target | |
| ext/VexRiscv/target/streams | |
| ext/VexRiscv/target/streams/_global | |
| ext/VexRiscv/target/streams/_global/ivyConfiguration | |
| ext/VexRiscv/target/streams/_global/ivyConfiguration/_global | |
| ext/VexRiscv/target/streams/_global/ivyConfiguration/_global/streams | |
| ext/VexRiscv/target/streams/_global/ivyConfiguration/_global/streams/out | |
| ext/VexRiscv/target/streams/_global/update | |
| ext/VexRiscv/target/streams/_global/update/_global | |
| ext/VexRiscv/target/streams/_global/update/_global/streams | |
| ext/VexRiscv/target/streams/_global/update/_global/streams/out | |
| ext/VexRiscv/target/streams/_global/moduleSettings | |
| ext/VexRiscv/target/streams/_global/moduleSettings/_global | |
| ext/VexRiscv/target/streams/_global/moduleSettings/_global/streams | |
| ext/VexRiscv/target/streams/_global/moduleSettings/_global/streams/out | |
| ext/VexRiscv/target/streams/_global/ivySbt | |
| ext/VexRiscv/target/streams/_global/ivySbt/_global | |
| ext/VexRiscv/target/streams/_global/ivySbt/_global/streams | |
| ext/VexRiscv/target/streams/_global/ivySbt/_global/streams/out | |
| ext/VexRiscv/target/streams/_global/projectDescriptors | |
| ext/VexRiscv/target/streams/_global/projectDescriptors/_global | |
| ext/VexRiscv/target/streams/_global/projectDescriptors/_global/streams | |
| ext/VexRiscv/target/streams/_global/projectDescriptors/_global/streams/out | |
| ext/VexRiscv/target/streams/_global/csrProject | |
| ext/VexRiscv/target/streams/_global/csrProject/_global | |
| ext/VexRiscv/target/streams/_global/csrProject/_global/streams | |
| ext/VexRiscv/target/streams/_global/csrProject/_global/streams/out | |
| ext/VexRiscv/target/streams/_global/dependencyPositions | |
| ext/VexRiscv/target/streams/_global/dependencyPositions/_global | |
| ext/VexRiscv/target/streams/_global/dependencyPositions/_global/streams | |
| ext/VexRiscv/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12 | |
| ext/VexRiscv/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp | |
| ext/VexRiscv/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp | |
| ext/VexRiscv/target/streams/_global/csrConfiguration | |
| ext/VexRiscv/target/streams/_global/csrConfiguration/_global | |
| ext/VexRiscv/target/streams/_global/csrConfiguration/_global/streams | |
| ext/VexRiscv/target/streams/_global/csrConfiguration/_global/streams/out | |
| ext/VexRiscv/target/streams/compile | |
| ext/VexRiscv/target/streams/compile/unmanagedJars | |
| ext/VexRiscv/target/streams/compile/unmanagedJars/_global | |
| ext/VexRiscv/target/streams/compile/unmanagedJars/_global/streams | |
| ext/VexRiscv/target/streams/compile/unmanagedJars/_global/streams/export | |
| ext/VexRiscv/target/scala-2.12 | |
| ext/VexRiscv/target/scala-2.12/update | |
| ext/VexRiscv/target/scala-2.12/update/update_cache_2.12 | |
| ext/VexRiscv/target/scala-2.12/update/update_cache_2.12/output | |
| ext/VexRiscv/target/scala-2.12/update/update_cache_2.12/inputs |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| SRC := ${shell find . -type f -name \*.scala} | |
| all: VexRiscv.v VexRiscv_Debug.v VexRiscv_Lite.v VexRiscv_LiteDebug.v VexRiscv_IMAC.v VexRiscv_IMACDebug.v VexRiscv_Min.v VexRiscv_MinDebug.v VexRiscv_Full.v VexRiscv_FullDebug.v VexRiscv_FullCfu.v VexRiscv_FullCfuDebug.v VexRiscv_Linux.v VexRiscv_LinuxDebug.v VexRiscv_LinuxNoDspFmax.v VexRiscv_Secure.v VexRiscv_SecureDebug.v | |
| VexRiscv.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault" | |
| VexRiscv_Debug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault -d --outputFile VexRiscv_Debug" | |
| VexRiscv_Lite.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --iCacheSize 2048 --dCacheSize 0 --mulDiv true --singleCycleShift false --singleCycleMulDiv false --outputFile VexRiscv_Lite" | |
| VexRiscv_LiteDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault -d --iCacheSize 2048 --dCacheSize 0 --mulDiv true --singleCycleShift false --singleCycleMulDiv false --outputFile VexRiscv_LiteDebug" | |
| VexRiscv_IMAC.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --atomics true --compressedGen true --outputFile VexRiscv_IMAC" | |
| VexRiscv_IMACDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --atomics true --compressedGen true -d --outputFile VexRiscv_IMACDebug" | |
| VexRiscv_Min.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --iCacheSize 0 --dCacheSize 0 --mulDiv false --singleCycleShift false --singleCycleMulDiv false --bypass false --prediction none --outputFile VexRiscv_Min" | |
| VexRiscv_MinDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault -d --iCacheSize 0 --dCacheSize 0 --mulDiv false --singleCycleShift false --singleCycleMulDiv false --bypass false --prediction none --outputFile VexRiscv_MinDebug" | |
| VexRiscv_MinDebug_Cache.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault -d --iCacheSize 64 --dCacheSize 0 --mulDiv false --singleCycleShift false --singleCycleMulDiv false --bypass false --prediction none --outputFile VexRiscv_MinDebug_Cache" | |
| VexRiscv_Full.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --outputFile VexRiscv_Full" | |
| VexRiscv_FullDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all -d --outputFile VexRiscv_FullDebug" | |
| VexRiscv_FullCfu.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --cfu true --outputFile VexRiscv_FullCfu" | |
| VexRiscv_FullCfuDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --cfu true -d --outputFile VexRiscv_FullCfuDebug" | |
| VexRiscv_Linux.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig linux-minimal --outputFile VexRiscv_Linux" | |
| VexRiscv_LinuxDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig linux-minimal -d --outputFile VexRiscv_LinuxDebug" | |
| VexRiscv_LinuxNoDspFmax.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig linux-minimal --singleCycleMulDiv=false --relaxedPcCalculation=true --prediction=none --outputFile VexRiscv_LinuxNoDspFmax" | |
| VexRiscv_Secure.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --pmpRegions 16 --pmpGranularity 256 --csrPluginConfig secure --outputFile VexRiscv_Secure" | |
| VexRiscv_SecureDebug.v: $(SRC) | |
| sbt compile "runMain vexriscv.GenCoreDefault --pmpRegions 16 --pmpGranularity 256 --csrPluginConfig secure -d --outputFile VexRiscv_SecureDebug" |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| (venv) jeffs-mbp:verilog jeffdi$ make VexRiscv_MinDebug_Cache.v | |
| sbt compile "runMain vexriscv.GenCoreDefault -d --iCacheSize 64 --dCacheSize 0 --mulDiv false --singleCycleShift false --singleCycleMulDiv false --bypass false --prediction none --outputFile VexRiscv_MinDebug_Cache" | |
| WARNING: A terminally deprecated method in java.lang.System has been called | |
| WARNING: System::setSecurityManager has been called by sbt.TrapExit$ (file:/Users/jeffdi/.sbt/boot/scala-2.12.14/org.scala-sbt/sbt/1.5.5/run_2.12-1.5.5.jar) | |
| WARNING: Please consider reporting this to the maintainers of sbt.TrapExit$ | |
| WARNING: System::setSecurityManager will be removed in a future release | |
| [info] welcome to sbt 1.5.5 (Homebrew Java 17.0.1) | |
| [info] loading settings for project verilog-build from plugins.sbt ... | |
| [info] loading project definition from /Users/jeffdi/Projects/caravel_mgmt_soc_litex/_litex_reference/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/project | |
| [info] loading settings for project root from build.sbt ... | |
| [info] set current project to VexRiscvOnWishbone (in build file:/Users/jeffdi/Projects/caravel_mgmt_soc_litex/_litex_reference/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/) | |
| [info] Executing in batch mode. For better performance use sbt's shell | |
| [info] Updating | |
| [info] Resolved dependencies | |
| [warn] | |
| [warn] Note: Unresolved dependencies path: | |
| [error] sbt.librarymanagement.ResolveException: Error downloading default:vexriscv_2.11:0.1.0-SNAPSHOT | |
| [error] Not found | |
| [error] Not found | |
| [error] not found: /Users/jeffdi/.ivy2/localdefault/vexriscv_2.11/0.1.0-SNAPSHOT/ivys/ivy.xml | |
| [error] not found: https://repo1.maven.org/maven2/default/vexriscv_2.11/0.1.0-SNAPSHOT/vexriscv_2.11-0.1.0-SNAPSHOT.pom | |
| [error] at lmcoursier.CoursierDependencyResolution.unresolvedWarningOrThrow(CoursierDependencyResolution.scala:258) | |
| [error] at lmcoursier.CoursierDependencyResolution.$anonfun$update$38(CoursierDependencyResolution.scala:227) | |
| [error] at scala.util.Either$LeftProjection.map(Either.scala:573) | |
| [error] at lmcoursier.CoursierDependencyResolution.update(CoursierDependencyResolution.scala:227) | |
| [error] at sbt.librarymanagement.DependencyResolution.update(DependencyResolution.scala:60) | |
| [error] at sbt.internal.LibraryManagement$.resolve$1(LibraryManagement.scala:59) | |
| [error] at sbt.internal.LibraryManagement$.$anonfun$cachedUpdate$12(LibraryManagement.scala:133) | |
| [error] at sbt.util.Tracked$.$anonfun$lastOutput$1(Tracked.scala:73) | |
| [error] at sbt.internal.LibraryManagement$.$anonfun$cachedUpdate$20(LibraryManagement.scala:146) | |
| [error] at scala.util.control.Exception$Catch.apply(Exception.scala:228) | |
| [error] at sbt.internal.LibraryManagement$.$anonfun$cachedUpdate$11(LibraryManagement.scala:146) | |
| [error] at sbt.internal.LibraryManagement$.$anonfun$cachedUpdate$11$adapted(LibraryManagement.scala:127) | |
| [error] at sbt.util.Tracked$.$anonfun$inputChangedW$1(Tracked.scala:219) | |
| [error] at sbt.internal.LibraryManagement$.cachedUpdate(LibraryManagement.scala:160) | |
| [error] at sbt.Classpaths$.$anonfun$updateTask0$1(Defaults.scala:3678) | |
| [error] at scala.Function1.$anonfun$compose$1(Function1.scala:49) | |
| [error] at sbt.internal.util.$tilde$greater.$anonfun$$u2219$1(TypeFunctions.scala:62) | |
| [error] at sbt.std.Transform$$anon$4.work(Transform.scala:68) | |
| [error] at sbt.Execute.$anonfun$submit$2(Execute.scala:282) | |
| [error] at sbt.internal.util.ErrorHandling$.wideConvert(ErrorHandling.scala:23) | |
| [error] at sbt.Execute.work(Execute.scala:291) | |
| [error] at sbt.Execute.$anonfun$submit$1(Execute.scala:282) | |
| [error] at sbt.ConcurrentRestrictions$$anon$4.$anonfun$submitValid$1(ConcurrentRestrictions.scala:265) | |
| [error] at sbt.CompletionService$$anon$2.call(CompletionService.scala:64) | |
| [error] at java.base/java.util.concurrent.FutureTask.run(FutureTask.java:264) | |
| [error] at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Executors.java:539) | |
| [error] at java.base/java.util.concurrent.FutureTask.run(FutureTask.java:264) | |
| [error] at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136) | |
| [error] at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635) | |
| [error] at java.base/java.lang.Thread.run(Thread.java:833) | |
| [error] (update) sbt.librarymanagement.ResolveException: Error downloading default:vexriscv_2.11:0.1.0-SNAPSHOT | |
| [error] Not found | |
| [error] Not found | |
| [error] not found: /Users/jeffdi/.ivy2/localdefault/vexriscv_2.11/0.1.0-SNAPSHOT/ivys/ivy.xml | |
| [error] not found: https://repo1.maven.org/maven2/default/vexriscv_2.11/0.1.0-SNAPSHOT/vexriscv_2.11-0.1.0-SNAPSHOT.pom | |
| [error] Total time: 2 s, completed Nov 30, 2021, 1:55:14 PM | |
| make: *** [Makefile:30: VexRiscv_MinDebug_Cache.v] Error 1 | |
| (venv) jeffs-mbp:verilog jeffdi$ |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Hi,
How do you solve the "Error downloading default:vexriscv_2.11:0.1.0-SNAPSHOT" error?