piezo.v

module piezo(
  rst, clk, btn, piezo, sseg
);
  input rst, clk;
  input [7:0] btn;

  output piezo;
  output [7:0] sseg;

  wire piezo;

  reg [7:0] sseg;
  reg buff;
  reg frequency;
  
  integer cnt_sound;

  assign piezo = buff;
  
  always @(btn)
	 case (btn)
		8'b00000001: frequency = 1915;
		8'b00000010: frequency = 2032;
		8'b00000100: frequency = 2272;
		8'b00001000: frequency = 2564;
		8'b00010000: frequency = 2873;
		8'b00100000: frequency = 3048;
		8'b01000000: frequency = 3424;
		8'b10000000: frequency = 3846;
		default: frequency = 0;
	 endcase

  always @(btn)
    case (btn)
      8'b00000001: sseg = 8'b11111100;
      8'b00000010: sseg = 8'b01100000;
      8'b00000100: sseg = 8'b11011010;
      8'b00001000: sseg = 8'b11110010;
      8'b00010000: sseg = 8'b01100110;
      8'b00100000: sseg = 8'b10110110;
      8'b01000000: sseg = 8'b10111110;
      8'b10000000: sseg = 8'b11100000;
    endcase

  always @(negedge rst or posedge clk) begin
    if (~rst) begin
      cnt_sound = 0;
      buff = 0;
    end
    else if (cnt_sound >= frequency) begin
        cnt_sound = 0;
        buff = ~buff;
    end
    else cnt_sound = cnt_sound + 1;
  end
endmodule