Created
July 30, 2018 19:25
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| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,2146)@ 35.043888 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1552, diff=0, hw=1488 hw_last=1488 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-58)@ 35.043888 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1552, diff=1, hw=1489 hw_last=1488 | |
| [drm:drm_handle_vblank_events] vblank event on 1553, current 1553 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-14)@ 35.052401 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1584, diff=1, hw=3073 hw_last=3072 | |
| [drm:drm_handle_vblank_events] vblank event on 1585, current 1585 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (8) | |
| [drm:drm_mode_object_get] OBJ ID: 110 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (8) | |
| [drm:drm_atomic_state_default_clear] Clearing atomic state 0xfffff80012b91800 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 106 (1) | |
| [drm:drm_mode_object_put] OBJ ID: 112 (1) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (6) | |
| [drm:__drm_atomic_state_free] Freeing atomic state 0xfffff80012b91800 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-46)@ 35.061500 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1553, diff=1, hw=1490 hw_last=1489 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-28)@ 35.061500 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1554, diff=0, hw=1490 hw_last=1490 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-14)@ 35.069054 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1585, diff=1, hw=3074 hw_last=3073 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-8)@ 35.069054 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1586, diff=0, hw=3074 hw_last=3074 | |
| uhub0: at usbus0, port 1, addr 1 (disconnected) | |
| ugen0.2: <CNFEH63N075040003062 IntegratedWebcamHD> at usbus0 (disconnected) | |
| ugen0.3: <Microsoft Microsoft 2.4GHz Transceiver v9.0> at usbus0 (disconnected) | |
| ukbd0: at uhub0, port 3, addr 2 (disconnected) | |
| ukbd0: detached | |
| ums0: at uhub0, port 3, addr 2 (disconnected) | |
| ums0: detached | |
| uhid0: at uhub0, port 3, addr 2 (disconnected) | |
| uhid0: detached | |
| ugen0.4: <vendor 0x046d C922 Pro Stream Webcam> at usbus0 (disconnected) | |
| ugen0.5: <Broadcom Corp 5880> at usbus0 (disconnected) | |
| i915_pm_suspend | |
| i915_drm_suspend | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI B IO power well | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI D IO power well | |
| [drm:drm_atomic_state_init] Allocated atomic state 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 105 (1) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:37:pipe A] 0xfffff80002883800 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 113 (1) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] 0xfffff80002883000 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:57:pipe C] 0xfffff8014c912800 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (5) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0xfffff800025b0a00 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0xfffff800025b0900 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] 0xfffff800025b0800 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (6) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:38:plane 1B] 0xfffff800025b0700 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 2B] 0xfffff800025b0600 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:44:cursor B] 0xfffff800025b0500 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] 0xfffff800025b0400 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:51:plane 2C] 0xfffff800025b0300 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:54:cursor C] 0xfffff800025b0200 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (6) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:59:eDP-1] 0xfffff80012b25380 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 69 (3) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:69:HDMI-A-1] 0xfffff80002926280 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 72 (5) | |
| [drm:drm_mode_object_get] OBJ ID: 72 (6) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:DP-1] 0xfffff80002926580 state to 0xfffff800025b9c00 | |
| [drm:drm_mode_object_get] OBJ ID: 76 (3) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:76:HDMI-A-2] 0xfffff80002926100 state to 0xfffff800025b9c00 | |
| [drm:drm_atomic_state_init] Allocated atomic state 0xfffff800025bb000 | |
| [drm:drm_mode_object_get] OBJ ID: 105 (2) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:37:pipe A] 0xfffff8014c912000 state to 0xfffff800025bb000 | |
| [drm:drm_mode_object_put] OBJ ID: 105 (3) | |
| [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 0xfffff8014c912000 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (7) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0xfffff800025b0000 state to 0xfffff800025bb000 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff800025bb000 | |
| [drm:drm_mode_object_get] OBJ ID: 59 (7) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (8) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:59:eDP-1] 0xfffff80012b25580 state to 0xfffff800025bb000 | |
| [drm:drm_mode_object_get] OBJ ID: 113 (2) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] 0xfffff8014c911800 state to 0xfffff800025bb000 | |
| [drm:drm_mode_object_put] OBJ ID: 113 (3) | |
| [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 0xfffff8014c911800 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (8) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:38:plane 1B] 0xfffff800025afe00 state to 0xfffff800025bb000 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff800025bb000 | |
| [drm:drm_mode_object_get] OBJ ID: 72 (7) | |
| [drm:drm_mode_object_get] OBJ ID: 72 (8) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:DP-1] 0xfffff80002926380 state to 0xfffff800025bb000 | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:57:pipe C] 0xfffff8014c911000 state to 0xfffff800025bb000 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:57:pipe C] to 0xfffff800025bb000 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (8) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80012b25580 to [NOCRTC] | |
| [drm:drm_mode_object_put] OBJ ID: 72 (8) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80002926380 to [NOCRTC] | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0000 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0000 | |
| [drm:drm_mode_object_put] OBJ ID: 110 (9) | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025afe00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025afe00 | |
| [drm:drm_mode_object_put] OBJ ID: 110 (8) | |
| [drm:drm_atomic_check_only] checking 0xfffff800025bb000 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] mode changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] enable changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] active changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:59:eDP-1] | |
| [drm:update_connector_routing] Disabling [CONNECTOR:59:eDP-1] | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:72:DP-1] | |
| [drm:update_connector_routing] Disabling [CONNECTOR:72:DP-1] | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] needs all connectors, enable: n, active: n | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff800025bb000 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: n, active: n | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff800025bb000 | |
| [drm:intel_modeset_checks] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:37:pipe A] has [PLANE:28:plane 1A] with fb -1 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:47:pipe B] has [PLANE:38:plane 1B] with fb -1 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:38:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 | |
| [drm:skl_print_wm_changes] [PLANE:28:plane 1A] ddb (0 - 438) -> (0 - 0) | |
| [drm:skl_print_wm_changes] [PLANE:34:cursor A] ddb (438 - 446) -> (0 - 0) | |
| [drm:skl_print_wm_changes] [PLANE:38:plane 1B] ddb (446 - 884) -> (0 - 0) | |
| [drm:skl_print_wm_changes] [PLANE:44:cursor B] ddb (884 - 892) -> (0 - 0) | |
| [drm:drm_atomic_commit] committing 0xfffff800025bb000 | |
| [drm:intel_edp_backlight_off] | |
| [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 | |
| [drm:drm_crtc_vblank_off] crtc 0, vblank enabled 0, inmodeset 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,520)@ 36.263643 -> 3991004359.418564 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1586, diff=71, hw=3145 hw_last=3074 | |
| [drm:intel_disable_pipe] disabling pipe A | |
| [drm:edp_panel_vdd_on] Turning eDP port A VDD on | |
| [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b | |
| [drm:edp_panel_off] Turn eDP port A panel power off | |
| [drm:wait_panel_off] Wait for panel power off time | |
| [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control 00000000 | |
| [drm:wait_panel_status] Wait complete | |
| [drm:__intel_fbc_disable] Disabling FBC on pipe A | |
| [drm:intel_disable_shared_dpll] disable DPLL 0 (active 1, on? 1) for crtc 37 | |
| [drm:intel_disable_shared_dpll] disabling DPLL 0 | |
| [drm:hsw_audio_codec_disable] Disable audio codec on pipe B | |
| [drm:drm_crtc_vblank_off] crtc 1, vblank enabled 0, inmodeset 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,1293)@ 36.320888 -> 3991004359.418564 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1554, diff=75, hw=1565 hw_last=1490 | |
| [drm:intel_disable_pipe] disabling pipe B | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010 | |
| [drm:intel_hpd_irq_handler] digital hpd port A - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0 | |
| [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A | |
| [drm:intel_disable_shared_dpll] disable DPLL 1 (active 2, on? 1) for crtc 47 | |
| [drm:intel_disable_shared_dpll] disabling DPLL 1 | |
| [drm:intel_set_cdclk] Changing CDCLK to 337500 kHz, VCO 8100000 kHz, ref 24000 kHz | |
| [drm:intel_update_cdclk] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz | |
| [drm:verify_encoder_state] [ENCODER:58:DDI A] | |
| [drm:verify_encoder_state] [ENCODER:68:DDI B] | |
| [drm:verify_encoder_state] [ENCODER:71:DDI C] | |
| [drm:verify_encoder_state] [ENCODER:73:DP-MST A] | |
| [drm:verify_encoder_state] [ENCODER:74:DP-MST B] | |
| [drm:verify_encoder_state] [ENCODER:75:DP-MST C] | |
| [drm:intel_connector_verify_state] [CONNECTOR:59:eDP-1] | |
| [drm:intel_connector_verify_state] [CONNECTOR:72:DP-1] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| [drm:verify_single_dpll_state] DPLL 1 | |
| [drm:verify_single_dpll_state] DPLL 2 | |
| [drm:verify_single_dpll_state] DPLL 3 | |
| [drm:drm_mode_object_put] OBJ ID: 105 (2) | |
| [drm:verify_crtc_state] [CRTC:37:pipe A] | |
| [drm:drm_mode_object_put] OBJ ID: 113 (2) | |
| [drm:verify_crtc_state] [CRTC:47:pipe B] | |
| [drm:intel_enable_sagv] Enabling the SAGV | |
| [drm:drm_mode_object_put] OBJ ID: 110 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (6) | |
| [drm:drm_atomic_state_default_clear] Clearing atomic state 0xfffff800025bb000 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (4) | |
| [drm:__drm_atomic_state_free] Freeing atomic state 0xfffff800025bb000 | |
| suspend_to_idle | |
| i915_drm_suspend COMPLETE | |
| i915_pm_suspend_late | |
| i915_drm_suspend_late | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI D IO power well | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI C IO power well | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI B IO power well | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI A/E IO power well | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling power well 2 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DC off | |
| gen9_dc_off_power_well_disable: has dmc payload, enable skl dc6 | |
| [drm:skl_enable_dc6] Enabling DC6 | |
| [drm:gen9_set_dc_state] Setting DC state from 00 to 02 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| suspend_to_idle | |
| vgapci0: child drmn0 requested pci_disable_io | |
| vgapci0: child drmn0 requested pci_disable_io | |
| vgapci0: child drmn0 requested pci_set_powerstate | |
| suspend_to_idle | |
| i915_drm_suspend_late COMPLETE | |
| acpi0: cleared fixed power button status | |
| i915_pm_resume_early | |
| i915_drm_resume_early | |
| vgapci0: child drmn0 requested pci_set_powerstate | |
| vgapci0: child drmn0 requested pci_enable_io | |
| vgapci0: child drmn0 requested pci_enable_io | |
| [drm:__intel_uncore_early_sanitize] unclaimed mmio detected on uncore init, clearing | |
| i915_pm_resume | |
| i915_drm_resume | |
| [drm:intel_opregion_setup] graphic opregion physical addr: 0xabe55018 | |
| [drm:intel_opregion_setup] Public ACPI methods supported | |
| [drm:intel_opregion_setup] SWSCI supported | |
| [drm:swsci] SWSCI request timed out | |
| [drm:swsci] SWSCI request already in progress | |
| [drm:swsci_setup] SWSCI GBDA callbacks 00000001, SBCB callbacks 00000001 | |
| [drm:intel_opregion_setup] ASLE supported | |
| [drm:intel_opregion_setup] ASLE extension supported | |
| [drm:intel_opregion_setup] Found valid VBT in ACPI OpRegion (Mailbox #4) | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DC off | |
| [drm:gen9_set_dc_state] Setting DC state from 00 to 00 | |
| [drm:gen9_set_dc_state] DC state mismatch (0x2 -> 0x0) | |
| WARN_ON((val & ((1<<((0)*6+5)) | (1<<((0)*6+4)) | (1<<((0)*6)))) != (1<<((0)*6)))WARN_ON(!intel_cdclk_state_compare(&dev_priv->cdclk.hw, &cdclk_state))Unexpected DBuf power power state (0x0000000a) | |
| [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DC off | |
| gen9_dc_off_power_well_disable: has dmc payload, enable skl dc6 | |
| CSR SSP Base Not fine | |
| CSR HTP Not fine | |
| [drm:skl_enable_dc6] Enabling DC6 | |
| [drm:gen9_set_dc_state] Setting DC state from 00 to 02 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DC off | |
| [drm:gen9_set_dc_state] Setting DC state from 02 to 00 | |
| WARN_ON((val & ((1<<((0)*6+5)) | (1<<((0)*6+4)) | (1<<((0)*6)))) != (1<<((0)*6)))WARN_ON(!intel_cdclk_state_compare(&dev_priv->cdclk.hw, &cdclk_state))Unexpected DBuf power power state (0x0000000a) | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling power well 2 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling power well 2 | |
| [drm:hsw_wait_for_power_well_disable] power well 2 forced on (bios:1 driver:0 kvmr:0 debug:0) | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DC off | |
| gen9_dc_off_power_well_disable: has dmc payload, enable skl dc6 | |
| [drm:skl_enable_dc6] Enabling DC6 | |
| [drm:gen9_set_dc_state] Setting DC state from 00 to 02 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:gen8_init_common_ring] Execlists enabled for rcs0 | |
| [drm:init_workarounds_ring] rcs0: Number of context specific w/a: 13 | |
| [drm:gen8_init_common_ring] Execlists enabled for bcs0 | |
| [drm:gen8_init_common_ring] Execlists enabled for vcs0 | |
| [drm:gen8_init_common_ring] Execlists enabled for vecs0 | |
| WARN_ON((val & ((1<<((0)*6+5)) | (1<<((0)*6+4)) | (1<<((0)*6)))) != (1<<((0)*6))) | |
| [drm:intel_update_cdclk] Current CD clock rate: 24000 kHz, VCO: 0 kHz, ref: 24000 kHz | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_set_plane_visible] pipe A active planes 0x0 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_set_plane_visible] pipe A active planes 0x0 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_set_plane_visible] pipe A active planes 0x0 | |
| [drm:intel_modeset_readout_hw_state] [CRTC:37:pipe A] hw state readout: disabled | |
| [drm:intel_set_plane_visible] pipe B active planes 0x0 | |
| [drm:intel_set_plane_visible] pipe B active planes 0x0 | |
| [drm:intel_set_plane_visible] pipe B active planes 0x0 | |
| [drm:intel_modeset_readout_hw_state] [CRTC:47:pipe B] hw state readout: disabled | |
| [drm:intel_set_plane_visible] pipe C active planes 0x0 | |
| [drm:intel_set_plane_visible] pipe C active planes 0x0 | |
| [drm:intel_set_plane_visible] pipe C active planes 0x0 | |
| [drm:intel_modeset_readout_hw_state] [CRTC:57:pipe C] hw state readout: disabled | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_modeset_readout_hw_state] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_modeset_readout_hw_state] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_modeset_readout_hw_state] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_modeset_readout_hw_state] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_modeset_readout_hw_state] [ENCODER:58:DDI A] hw state readout: disabled, pipe A | |
| [drm:intel_modeset_readout_hw_state] [ENCODER:68:DDI B] hw state readout: disabled, pipe A | |
| [drm:intel_modeset_readout_hw_state] [ENCODER:71:DDI C] hw state readout: disabled, pipe A | |
| [drm:intel_modeset_readout_hw_state] [ENCODER:73:DP-MST A] hw state readout: disabled, pipe A | |
| [drm:intel_modeset_readout_hw_state] [ENCODER:74:DP-MST B] hw state readout: disabled, pipe B | |
| [drm:intel_modeset_readout_hw_state] [ENCODER:75:DP-MST C] hw state readout: disabled, pipe C | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_modeset_readout_hw_state] [CONNECTOR:59:eDP-1] hw state readout: disabled | |
| [drm:intel_modeset_readout_hw_state] [CONNECTOR:69:HDMI-A-1] hw state readout: disabled | |
| [drm:intel_modeset_readout_hw_state] [CONNECTOR:72:DP-1] hw state readout: disabled | |
| [drm:intel_modeset_readout_hw_state] [CONNECTOR:76:HDMI-A-2] hw state readout: disabled | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:intel_dump_pipe_config] [CRTC:37:pipe A][setup_hw_state] | |
| [drm:intel_dump_pipe_config] output_types: (0x0) | |
| [drm:intel_dump_pipe_config] cpu_transcoder: A, pipe bpp: 0, dithering: 0 | |
| [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 | |
| [drm:intel_dump_pipe_config] requested mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 | |
| [drm:intel_dump_pipe_config] adjusted mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 | |
| [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 | |
| [drm:intel_dump_pipe_config] port clock: 0, pipe src size: 0x0, pixel rate 0 | |
| [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 | |
| [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled | |
| [drm:intel_dump_pipe_config] ips: 0, double wide: 0 | |
| [drm:skl_dump_hw_state] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0 | |
| [drm:intel_dump_pipe_config] planes on this crtc | |
| [drm:intel_dump_pipe_config] [PLANE:28:plane 1A] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:31:plane 2A] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:34:cursor A] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [CRTC:47:pipe B][setup_hw_state] | |
| [drm:intel_dump_pipe_config] output_types: (0x0) | |
| [drm:intel_dump_pipe_config] cpu_transcoder: A, pipe bpp: 0, dithering: 0 | |
| [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 | |
| [drm:intel_dump_pipe_config] requested mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 | |
| [drm:intel_dump_pipe_config] adjusted mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 | |
| [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 | |
| [drm:intel_dump_pipe_config] port clock: 0, pipe src size: 0x0, pixel rate 0 | |
| [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 | |
| [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled | |
| [drm:intel_dump_pipe_config] ips: 0, double wide: 0 | |
| [drm:skl_dump_hw_state] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0 | |
| [drm:intel_dump_pipe_config] planes on this crtc | |
| [drm:intel_dump_pipe_config] [PLANE:38:plane 1B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:41:plane 2B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:44:cursor B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [CRTC:57:pipe C][setup_hw_state] | |
| [drm:intel_dump_pipe_config] output_types: (0x0) | |
| [drm:intel_dump_pipe_config] cpu_transcoder: A, pipe bpp: 0, dithering: 0 | |
| [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 | |
| [drm:intel_dump_pipe_config] requested mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 | |
| [drm:intel_dump_pipe_config] adjusted mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 | |
| [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 | |
| [drm:intel_dump_pipe_config] port clock: 0, pipe src size: 0x0, pixel rate 0 | |
| [drm:intel_dump_pipe_config] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 | |
| [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled | |
| [drm:intel_dump_pipe_config] ips: 0, double wide: 0 | |
| [drm:skl_dump_hw_state] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0 | |
| [drm:intel_dump_pipe_config] planes on this crtc | |
| [drm:intel_dump_pipe_config] [PLANE:48:plane 1C] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:51:plane 2C] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:54:cursor C] disabled, scaler_id = -1 | |
| [drm:intel_modeset_setup_hw_state] DPLL 0 enabled but not in use, disabling | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling always-on | |
| [drm:drm_atomic_check_only] checking 0xfffff800025b9c00 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] mode changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] enable changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] active changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:59:eDP-1] | |
| [drm:update_connector_routing] [CONNECTOR:59:eDP-1] keeps [ENCODER:58:DDI A], now on [CRTC:37:pipe A] | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:69:HDMI-A-1] | |
| [drm:update_connector_routing] Disabling [CONNECTOR:69:HDMI-A-1] | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:72:DP-1] | |
| [drm:update_connector_routing] [CONNECTOR:72:DP-1] keeps [ENCODER:71:DDI C], now on [CRTC:47:pipe B] | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:76:HDMI-A-2] | |
| [drm:update_connector_routing] Disabling [CONNECTOR:76:HDMI-A-2] | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:37:pipe A] needs all connectors, enable: y, active: y | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff800025b9c00 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff800025b9c00 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:57:pipe C] needs all connectors, enable: n, active: n | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:57:pipe C] to 0xfffff800025b9c00 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff800025b9c00 | |
| [drm:connected_sink_compute_bpp] [CONNECTOR:59:eDP-1] checking for sink bpp constrains | |
| [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 18 | |
| [drm:drm_mode_debug_printmodeline] Modeline 63:"1366x768" 60 70120 1366 1414 1446 1485 768 772 776 787 0x48 0x9 | |
| [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 270000 pixel clock 70120KHz | |
| [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 1 clock 270000 bpp 18 | |
| [drm:intel_dp_compute_config] DP link bw required 157770 available 270000 | |
| [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1 | |
| [drm:intel_dump_pipe_config] [CRTC:37:pipe A][modeset] | |
| [drm:intel_dump_pipe_config] output_types: EDP (0x100) | |
| [drm:intel_dump_pipe_config] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1 | |
| [drm:intel_dump_m_n_config] dp m_n: lanes: 1; gmch_m: 2450871, gmch_n: 4194304, link_m: 136159, link_n: 524288, tu: 64 | |
| [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 | |
| [drm:intel_dump_pipe_config] requested mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 70120 1366 1414 1446 1485 768 772 776 787 0x48 0x9 | |
| [drm:intel_dump_pipe_config] adjusted mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 70120 1366 1414 1446 1485 768 772 776 787 0x48 0x9 | |
| [drm:intel_dump_crtc_timings] crtc timings: 70120 1366 1414 1446 1485 768 772 776 787, type: 0x48 flags: 0x9 | |
| [drm:intel_dump_pipe_config] port clock: 270000, pipe src size: 1366x768, pixel rate 70120 | |
| [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 | |
| [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled | |
| [drm:intel_dump_pipe_config] ips: 0, double wide: 0 | |
| [drm:skl_dump_hw_state] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0 | |
| [drm:intel_dump_pipe_config] planes on this crtc | |
| [drm:intel_dump_pipe_config] [PLANE:28:plane 1A] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:31:plane 2A] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:34:cursor A] disabled, scaler_id = -1 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff800025b9c00 | |
| [drm:connected_sink_compute_bpp] [CONNECTOR:72:DP-1] checking for sink bpp constrains | |
| [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 30 | |
| [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 533250KHz | |
| [drm:intel_dp_compute_config] DP link bw 14 rate select 00 lane count 4 clock 540000 bpp 30 | |
| [drm:intel_dp_compute_config] DP link bw required 1999688 available 2160000 | |
| [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 30, dithering: 0 | |
| [drm:intel_dump_pipe_config] [CRTC:47:pipe B][modeset] | |
| [drm:intel_dump_pipe_config] output_types: DP (0x80) | |
| [drm:intel_dump_pipe_config] cpu_transcoder: B, pipe bpp: 30, dithering: 0 | |
| [drm:intel_dump_m_n_config] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 64 | |
| [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 | |
| [drm:intel_dump_pipe_config] requested mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9 | |
| [drm:intel_dump_pipe_config] adjusted mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9 | |
| [drm:intel_dump_crtc_timings] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x48 flags: 0x9 | |
| [drm:intel_dump_pipe_config] port clock: 540000, pipe src size: 3840x2160, pixel rate 533250 | |
| [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 | |
| [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled | |
| [drm:intel_dump_pipe_config] ips: 0, double wide: 0 | |
| [drm:skl_dump_hw_state] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0 | |
| [drm:intel_dump_pipe_config] planes on this crtc | |
| [drm:intel_dump_pipe_config] [PLANE:38:plane 1B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:41:plane 2B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:44:cursor B] disabled, scaler_id = -1 | |
| [drm:intel_modeset_checks] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:37:pipe A] has [PLANE:28:plane 1A] with fb 110 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:47:pipe B] has [PLANE:38:plane 1B] with fb 110 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:38:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 | |
| [drm:intel_find_shared_dpll] [CRTC:37:pipe A] allocated DPLL 0 | |
| [drm:intel_reference_shared_dpll] using DPLL 0 for pipe A | |
| [drm:intel_find_shared_dpll] [CRTC:47:pipe B] allocated DPLL 1 | |
| [drm:intel_reference_shared_dpll] using DPLL 1 for pipe B | |
| [drm:skl_print_wm_changes] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 438) | |
| [drm:skl_print_wm_changes] [PLANE:34:cursor A] ddb (0 - 0) -> (438 - 446) | |
| [drm:skl_print_wm_changes] [PLANE:38:plane 1B] ddb (0 - 0) -> (446 - 884) | |
| [drm:skl_print_wm_changes] [PLANE:44:cursor B] ddb (0 - 0) -> (884 - 892) | |
| [drm:drm_atomic_commit] committing 0xfffff800025b9c00 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling always-on | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DC off | |
| [drm:gen9_set_dc_state] Setting DC state from 02 to 00 | |
| WARN_ON((val & ((1<<((0)*6+5)) | (1<<((0)*6+4)) | (1<<((0)*6)))) != (1<<((0)*6)))Unexpected DBuf power power state (0x0000000a) | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling power well 2 | |
| [drm:drm_calc_timestamping_constants] crtc 37: hwmode: htotal 1485, vtotal 787, vdisplay 768 | |
| [drm:drm_calc_timestamping_constants] crtc 37: clock 70120 kHz framedur 16667070 linedur 21177 | |
| [drm:drm_calc_timestamping_constants] crtc 47: hwmode: htotal 4000, vtotal 2222, vdisplay 2160 | |
| [drm:drm_calc_timestamping_constants] crtc 47: clock 533250 kHz framedur 16667604 linedur 7501 | |
| [drm:intel_set_cdclk] Changing CDCLK to 540000 kHz, VCO 8100000 kHz, ref 24000 kHz | |
| [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz, VCO: 8100000 kHz, ref: 24000 kHz | |
| [drm:intel_disable_sagv] Disabling the SAGV | |
| [drm:verify_encoder_state] [ENCODER:58:DDI A] | |
| [drm:verify_encoder_state] [ENCODER:68:DDI B] | |
| [drm:verify_encoder_state] [ENCODER:71:DDI C] | |
| [drm:verify_encoder_state] [ENCODER:73:DP-MST A] | |
| [drm:verify_encoder_state] [ENCODER:74:DP-MST B] | |
| [drm:verify_encoder_state] [ENCODER:75:DP-MST C] | |
| [drm:intel_connector_verify_state] [CONNECTOR:69:HDMI-A-1] | |
| [drm:intel_connector_verify_state] [CONNECTOR:76:HDMI-A-2] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| [drm:verify_single_dpll_state] DPLL 1 | |
| [drm:verify_single_dpll_state] DPLL 2 | |
| [drm:verify_single_dpll_state] DPLL 3 | |
| [drm:intel_enable_shared_dpll] enable DPLL 0 (active 1, on? 0) for crtc 37 | |
| [drm:intel_enable_shared_dpll] enabling DPLL 0 | |
| [drm:edp_panel_on] Turn eDP port A panel power on | |
| [drm:wait_panel_power_cycle] Wait for panel power cycle | |
| [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control 00000000 | |
| [drm:wait_panel_status] Wait complete | |
| [drm:wait_panel_on] Wait for panel power on | |
| [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control 00000003 | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010 | |
| [drm:intel_hpd_irq_handler] digital hpd port A - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0 | |
| [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A | |
| [drm:wait_panel_status] Wait complete | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI A/E IO power well | |
| [drm:edp_panel_vdd_on] Turning eDP port A VDD on | |
| [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b | |
| [drm:intel_dp_set_signal_levels] Using signal levels 00000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 0 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS1 | |
| [drm:intel_dp_link_training_clock_recovery] clock recovery OK | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS2 | |
| [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful | |
| [drm:intel_dp_start_link_train] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 1[drm:intel_enable_pipe] enabling pipe A | |
| [drm:drm_crtc_vblank_on] crtc 0, vblank enabled 0, inmodeset 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-19)@ 40.210936 -> 0.000000 [e 0 us, 0 rep] | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-18)@ 40.210936 -> 40.211339 [e 0 us, 0 rep] | |
| [drm:intel_edp_backlight_on] | |
| [drm:intel_panel_enable_backlight] pipe A | |
| [drm:intel_panel_actually_set_backlight] set backlight PWM = 470 | |
| [drm:intel_edp_drrs_enable] Panel doesn't support DRRS | |
| [drm:intel_fbc_alloc_cfb] reserved 23592960 bytes of contiguous stolen space for FBC, threshold: 1 | |
| [drm:intel_fbc_enable] Enabling FBC on pipe A | |
| [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-9)@ 40.211941 -> -2197.428342 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1658, diff=0, hw=1 hw_last=1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-7)@ 40.211941 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1658, diff=0, hw=1 hw_last=1 | |
| [drm:intel_enable_shared_dpll] enable DPLL 1 (active 2, on? 0) for crtc 47 | |
| [drm:intel_enable_shared_dpll] enabling DPLL 1 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI C IO power well | |
| [drm:intel_dp_set_signal_levels] Using signal levels 00000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 0 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS1 | |
| [drm:intel_dp_set_signal_levels] Using signal levels 05000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 1 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 1 | |
| [drm:intel_dp_set_signal_levels] Using signal levels 08000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 2 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 1 | |
| [drm:intel_dp_link_training_clock_recovery] clock recovery OK | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS3 | |
| [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful | |
| [drm:intel_dp_start_link_train] [CONNECTOR:72:DP-1] Link Training Passed at Link Rate = 540000, Lane count = 4[drm:intel_enable_pipe] enabling pipe B | |
| [drm:drm_crtc_vblank_on] crtc 1, vblank enabled 0, inmodeset 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-61)@ 40.217936 -> 0.000000 [e 0 us, 0 rep] | |
| [drm:intel_edp_drrs_enable] Panel doesn't support DRRS | |
| [drm:intel_audio_codec_enable] ELD on [CONNECTOR:72:DP-1], [ENCODER:71:DDI C] | |
| [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 32 bytes ELD | |
| [drm:hsw_dp_audio_config_update] using automatic Maud, Naud | |
| [drm:drm_vblank_enable] enabling vblank on crtc 1, ret: 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-49)@ 40.217936 -> -2197.428342 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1630, diff=0, hw=1 hw_last=1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-42)@ 40.217936 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1630, diff=0, hw=1 hw_last=1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-18)@ 40.228550 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1658, diff=1, hw=2 hw_last=1 | |
| [drm:drm_handle_vblank_events] vblank event on 1659, current 1659 | |
| [drm:gen8_de_irq_handler] Fault errors on pipe A: 0x00000080 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-60)@ 40.234937 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1630, diff=1, hw=2 hw_last=1 | |
| [drm:drm_handle_vblank_events] vblank event on 1631, current 1631 | |
| [drm:intel_connector_verify_state] [CONNECTOR:59:eDP-1] | |
| [drm:verify_crtc_state] [CRTC:37:pipe A] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| [drm:intel_connector_verify_state] [CONNECTOR:72:DP-1] | |
| [drm:verify_crtc_state] [CRTC:47:pipe B] | |
| [drm:verify_single_dpll_state] DPLL 1 | |
| [drm:verify_crtc_state] [CRTC:57:pipe C] | |
| [drm:drm_mode_object_get] OBJ ID: 110 (3) | |
| [drm:drm_mode_object_get] OBJ ID: 110 (4) | |
| [drm:drm_atomic_state_default_clear] Clearing atomic state 0xfffff800025b9c00 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 69 (3) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 76 (3) | |
| [drm:__drm_atomic_state_free] Freeing atomic state 0xfffff800025b9c00 | |
| [drm:intel_didl_outputs] 4 outputs detected | |
| [drm:intel_dp_detect] [CONNECTOR:59:eDP-1] | |
| [drm:intel_dp_print_rates] source rates: 162000, 216000, 270000, 324000, 432000, 540000 | |
| [drm:intel_dp_print_rates] sink rates: 162000, 270000 | |
| [drm:intel_dp_print_rates] common rates: 162000, 270000 | |
| [drm:drm_dp_read_desc] DP sink: OUI fffff80012b611b4hD dev-ID 0xfffff80012b611b7E HW-rev 0.0 SW-rev 0.0 quirks 0x0000 | |
| [drm:drm_helper_hpd_irq_event] [CONNECTOR:59:eDP-1] status updated from connected to connected | |
| [drm:intel_hdmi_detect] [CONNECTOR:69:HDMI-A-1] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008db11690E (err -6) | |
| [drm:drm_helper_hpd_irq_event] [CONNECTOR:69:HDMI-A-1] status updated from disconnected to disconnected | |
| [drm:intel_dp_detect] [CONNECTOR:72:DP-1] | |
| [drm:intel_dp_read_dpcd] DPCD: fffff80012b6d12bh | |
| [drm:intel_dp_print_rates] source rates: 162000, 216000, 270000, 324000, 432000, 540000 | |
| [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000 | |
| [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000 | |
| [drm:drm_dp_read_desc] DP sink: OUI fffff80012b6d1b4hD dev-ID 0xfffff80012b6d1b7E HW-rev 0.0 SW-rev 0.0 quirks 0x0000 | |
| [drm:intel_dp_configure_mst] Sink is not MST capable | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-19)@ 40.244936 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1659, diff=1, hw=3 hw_last=2 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-17)@ 40.244936 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1660, diff=0, hw=3 hw_last=3 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,251)@ 40.253941 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1631, diff=1, hw=3 hw_last=2 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,258)@ 40.253941 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1632, diff=0, hw=3 hw_last=3 | |
| [drm:drm_detect_monitor_audio] Monitor has basic audio support | |
| [drm:drm_helper_hpd_irq_event] [CONNECTOR:72:DP-1] status updated from connected to connected | |
| [drm:intel_hdmi_detect] [CONNECTOR:76:HDMI-A-2] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008db11690E (err -6) | |
| [drm:drm_helper_hpd_irq_event] [CONNECTOR:76:HDMI-A-2] status updated from disconnected to disconnected | |
| uhub0: <0x8086 XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus0 | |
| link state changed to down | |
| em0: link state changed to DOWN | |
| bridge0: link state changed to DOWN | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040 | |
| [drm:intel_hpd_irq_handler] digital hpd port C - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 0 | |
| [drm:intel_dp_hpd_pulse] got hpd irq on port C - long | |
| [drm:i915_hotplug_work_func] running encoder hotplug functions | |
| [drm:i915_hotplug_work_func] Connector DP-1 (pin 6) received hotplug event. | |
| [drm:intel_dp_detect] [CONNECTOR:72:DP-1] | |
| [drm:intel_hpd_irq_event] [CONNECTOR:72:DP-1] status updated from connected to disconnected | |
| [drm:i915_hotplug_work_func] Connector HDMI-A-2 (pin 6) received hotplug event. | |
| [drm:intel_hdmi_detect] [CONNECTOR:76:HDMI-A-2] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008daf86f0E (err -6) | |
| [drm:drm_fb_helper_hotplug_event] | |
| [drm:drm_setup_crtcs] | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:59:eDP-1] | |
| [drm:intel_dp_detect] [CONNECTOR:59:eDP-1] | |
| [drm:intel_dp_print_rates] source rates: 162000, 216000, 270000, 324000, 432000, 540000 | |
| [drm:intel_dp_print_rates] sink rates: 162000, 270000 | |
| [drm:intel_dp_print_rates] common rates: 162000, 270000 | |
| [drm:drm_dp_read_desc] DP sink: OUI fffff80012b611b4hD dev-ID 0xfffff80012b611b7E HW-rev 0.0 SW-rev 0.0 quirks 0x0000 | |
| [drm:drm_add_display_info] non_desktop set to 0 | |
| [drm:drm_add_display_info] eDP-1: Assigning EDID-1.4 digital sink color depth as 6 bpc. | |
| [drm:drm_mode_object_put] OBJ ID: 78 (1) | |
| [drm:drm_add_display_info] non_desktop set to 0 | |
| [drm:drm_add_display_info] eDP-1: Assigning EDID-1.4 digital sink color depth as 6 bpc. | |
| [drm:drm_edid_to_eld] ELD: no CEA Extension found | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:59:eDP-1] probed modes : | |
| [drm:drm_mode_debug_printmodeline] Modeline 60:"1366x768" 60 70120 1366 1414 1446 1485 768 772 776 787 0x48 0x9 | |
| [drm:drm_mode_debug_printmodeline] Modeline 61:"1366x768" 47 60200 1366 1466 1566 1567 768 788 808 809 0x40 0x9 | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:69:HDMI-A-1] | |
| [drm:intel_hdmi_detect] [CONNECTOR:69:HDMI-A-1] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008daf8570E (err -6) | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:69:HDMI-A-1] disconnected | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:DP-1] | |
| [drm:intel_dp_detect] [CONNECTOR:72:DP-1] | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:DP-1] disconnected | |
| [drm:drm_mode_object_put] OBJ ID: 79 (1) | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:76:HDMI-A-2] | |
| [drm:intel_hdmi_detect] [CONNECTOR:76:HDMI-A-2] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008daf8570E (err -6) | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:76:HDMI-A-2] disconnected | |
| [drm:drm_enable_connectors] connector 59 enabled? yes | |
| [drm:drm_enable_connectors] connector 69 enabled? no | |
| [drm:drm_enable_connectors] connector 72 enabled? no | |
| [drm:drm_enable_connectors] connector 76 enabled? no | |
| [drm:intel_fb_initial_config] Not using firmware configuration | |
| [drm:drm_target_preferred] looking for cmdline mode on connector 59 | |
| [drm:drm_target_preferred] looking for preferred mode on connector 59 0 | |
| [drm:drm_target_preferred] found mode 1366x768 | |
| [drm:drm_setup_crtcs] picking CRTCs for 3840x2160 config | |
| [drm:drm_mode_object_put] OBJ ID: 59 (4) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (4) | |
| [drm:drm_setup_crtcs] desired mode 1366x768 set on crtc 37 (0,0) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (3) | |
| [drm:drm_atomic_state_init] Allocated atomic state 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (5) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0xfffff8000293b700 state to 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 105 (1) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:37:pipe A] 0xfffff80002974000 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0xfffff80012b68400 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b68400 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b68400 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] 0xfffff80012b68300 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b68300 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b68300 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (6) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:38:plane 1B] 0xfffff80012b67000 state to 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 113 (1) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] 0xfffff80002973800 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 2B] 0xfffff80012b68b00 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b68b00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b68b00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:44:cursor B] 0xfffff80012b68a00 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b68a00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b68a00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] 0xfffff80012b66e00 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:51:plane 2C] 0xfffff80012b68900 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b68900 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b68900 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:54:cursor C] 0xfffff80012b68c00 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b68c00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b68c00 | |
| [drm:drm_mode_object_put] OBJ ID: 105 (2) | |
| [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state 0xfffff80002974000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff8000293b700 to [CRTC:37:pipe A] | |
| [drm:drm_atomic_set_fb_for_plane] Set [FB:110] for plane state 0xfffff8000293b700 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (8) | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (6) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:59:eDP-1] 0xfffff80002926300 state to 0xfffff8000295f000 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80002926300 to [NOCRTC] | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80002926300 to [CRTC:37:pipe A] | |
| [drm:drm_mode_object_put] OBJ ID: 113 (2) | |
| [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0xfffff80002973800 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b67000 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b67000 | |
| [drm:drm_mode_object_put] OBJ ID: 110 (7) | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 72 (4) | |
| [drm:drm_mode_object_get] OBJ ID: 72 (5) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:DP-1] 0xfffff80012b4c500 state to 0xfffff8000295f000 | |
| [drm:drm_mode_object_put] OBJ ID: 72 (5) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80012b4c500 to [NOCRTC] | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:57:pipe C] 0xfffff80002973000 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0xfffff80002973000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b66e00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b66e00 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:57:pipe C] to 0xfffff8000295f000 | |
| [drm:drm_atomic_check_only] checking 0xfffff8000295f000 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:59:eDP-1] | |
| [drm:update_connector_routing] [CONNECTOR:59:eDP-1] keeps [ENCODER:58:DDI A], now on [CRTC:37:pipe A] | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:72:DP-1] | |
| [drm:update_connector_routing] Disabling [CONNECTOR:72:DP-1] | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: n, active: n | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff8000295f000 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff8000295f000 | |
| [drm:intel_modeset_checks] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:37:pipe A] has [PLANE:28:plane 1A] with fb 110 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1 | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:47:pipe B] has [PLANE:38:plane 1B] with fb -1 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:38:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 | |
| [drm:intel_find_shared_dpll] [CRTC:37:pipe A] allocated DPLL 0 | |
| [drm:intel_reference_shared_dpll] using DPLL 0 for pipe A | |
| [drm:skl_print_wm_changes] [PLANE:28:plane 1A] ddb (0 - 438) -> (0 - 860) | |
| [drm:skl_print_wm_changes] [PLANE:34:cursor A] ddb (438 - 446) -> (860 - 892) | |
| [drm:skl_print_wm_changes] [PLANE:38:plane 1B] ddb (446 - 884) -> (0 - 0) | |
| [drm:skl_print_wm_changes] [PLANE:44:cursor B] ddb (884 - 892) -> (0 - 0) | |
| [drm:drm_atomic_commit] committing 0xfffff8000295f000 | |
| [drm:intel_edp_backlight_off] | |
| [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 | |
| [drm:drm_crtc_vblank_off] crtc 0, vblank enabled 0, inmodeset 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,442)@ 41.204939 -> 3991004359.418564 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1660, diff=57, hw=60 hw_last=3 | |
| [drm:intel_disable_pipe] disabling pipe A | |
| [drm:edp_panel_off] Turn eDP port A panel power off | |
| [drm:wait_panel_off] Wait for panel power off time | |
| [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control 00000000 | |
| [drm] RC6 on | |
| [drm:wait_panel_status] Wait complete | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI A/E IO power well | |
| [drm:__intel_fbc_disable] Disabling FBC on pipe A | |
| [drm:intel_disable_shared_dpll] disable DPLL 0 (active 1, on? 1) for crtc 37 | |
| [drm:intel_disable_shared_dpll] disabling DPLL 0 | |
| [drm:hsw_audio_codec_disable] Disable audio codec on pipe B | |
| [drm:drm_crtc_vblank_off] crtc 1, vblank enabled 0, inmodeset 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,1377)@ 41.261942 -> 3991004359.418564 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1632, diff=60, hw=63 hw_last=3 | |
| [drm:intel_disable_pipe] disabling pipe B | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010 | |
| [drm:intel_hpd_irq_handler] digital hpd port A - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0 | |
| [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI C IO power well | |
| [drm:intel_disable_shared_dpll] disable DPLL 1 (active 2, on? 1) for crtc 47 | |
| [drm:intel_disable_shared_dpll] disabling DPLL 1 | |
| [drm:drm_calc_timestamping_constants] crtc 37: hwmode: htotal 1485, vtotal 787, vdisplay 768 | |
| [drm:drm_calc_timestamping_constants] crtc 37: clock 70120 kHz framedur 16667070 linedur 21177 | |
| [drm:intel_set_cdclk] Changing CDCLK to 337500 kHz, VCO 8100000 kHz, ref 24000 kHz | |
| [drm:intel_update_cdclk] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz | |
| [drm:verify_encoder_state] [ENCODER:58:DDI A] | |
| [drm:verify_encoder_state] [ENCODER:68:DDI B] | |
| [drm:verify_encoder_state] [ENCODER:71:DDI C] | |
| [drm:verify_encoder_state] [ENCODER:73:DP-MST A] | |
| [drm:verify_encoder_state] [ENCODER:74:DP-MST B] | |
| [drm:verify_encoder_state] [ENCODER:75:DP-MST C] | |
| [drm:intel_connector_verify_state] [CONNECTOR:72:DP-1] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| [drm:verify_single_dpll_state] DPLL 1 | |
| [drm:verify_single_dpll_state] DPLL 2 | |
| [drm:verify_single_dpll_state] DPLL 3 | |
| [drm:intel_enable_shared_dpll] enable DPLL 0 (active 1, on? 0) for crtc 37 | |
| [drm:intel_enable_shared_dpll] enabling DPLL 0 | |
| [drm:edp_panel_on] Turn eDP port A panel power on | |
| [drm:wait_panel_power_cycle] Wait for panel power cycle | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040 | |
| [drm:intel_hpd_irq_handler] digital hpd port C - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 1 | |
| [drm:intel_dp_hpd_pulse] got hpd irq on port C - long | |
| uhub0: 18 ports with 18 removable, self powered | |
| [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control 00000000 | |
| [drm:wait_panel_status] Wait complete | |
| [drm:wait_panel_on] Wait for panel power on | |
| [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control 00000003 | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010 | |
| [drm:intel_hpd_irq_handler] digital hpd port A - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1 | |
| [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A | |
| [drm:wait_panel_status] Wait complete | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI A/E IO power well | |
| [drm:edp_panel_vdd_on] Turning eDP port A VDD on | |
| [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b | |
| [drm:intel_dp_set_signal_levels] Using signal levels 00000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 0 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS1 | |
| [drm:intel_dp_link_training_clock_recovery] clock recovery OK | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS2 | |
| [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful | |
| [drm:intel_dp_start_link_train] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 1[drm:intel_enable_pipe] enabling pipe A | |
| [drm:drm_crtc_vblank_on] crtc 0, vblank enabled 0, inmodeset 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-18)@ 42.070943 -> 0.000000 [e 0 us, 0 rep] | |
| [drm:intel_edp_backlight_on] | |
| [drm:intel_panel_enable_backlight] pipe A | |
| [drm:intel_panel_actually_set_backlight] set backlight PWM = 470 | |
| [drm:intel_edp_drrs_enable] Panel doesn't support DRRS | |
| [drm:intel_fbc_alloc_cfb] reserved 23592960 bytes of contiguous stolen space for FBC, threshold: 1 | |
| [drm:intel_fbc_enable] Enabling FBC on pipe A | |
| [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,3)@ 42.070943 -> -2197.428342 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1718, diff=0, hw=61 hw_last=61 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,12)@ 42.071943 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1718, diff=0, hw=61 hw_last=61 | |
| lock order reversal: | |
| 1st 0xfffff800027348e0 filedesc structure (filedesc structure) @ /usr/src/sys/kern/sys_generic.c:1445 | |
| 2nd 0xfffff80026322068 devfs (devfs) @ /usr/src/sys/kern/vfs_vnops.c:1507 | |
| stack backtrace: | |
| #0 0xffffffff806f7b93 at witness_debugger+0x73 | |
| #1 0xffffffff806f7a14 at witness_checkorder+0xe34 | |
| #2 0xffffffff8066092a at lockmgr_lock_fast_path+0x17a | |
| #3 0xffffffff80ac7c29 at VOP_LOCK1_APV+0xd9 | |
| #4 0xffffffff807757d6 at _vn_lock+0x66 | |
| #5 0xffffffff8077460b at vn_poll+0x3b | |
| #6 0xffffffff80546a8d at devfs_poll_f+0xcd | |
| #7 0xffffffff806fe8bd at kern_poll+0x51d | |
| #8 0xffffffff806fe390 at sys_poll+0x50 | |
| #9 0xffffffff80a26261 at amd64_syscall+0x281 | |
| #10 0xffffffff80a00e5d at fast_syscall_common+0x101 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-18)@ 42.087935 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1718, diff=1, hw=62 hw_last=61 | |
| [drm:drm_handle_vblank_events] vblank event on 1719, current 1719 | |
| [drm:intel_connector_verify_state] [CONNECTOR:59:eDP-1] | |
| [drm:drm_mode_object_put] OBJ ID: 105 (1) | |
| [drm:verify_crtc_state] [CRTC:37:pipe A] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling power well 2 | |
| [drm:hsw_wait_for_power_well_disable] power well 2 forced on (bios:1 driver:0 kvmr:0 debug:0) | |
| [drm:drm_mode_object_put] OBJ ID: 113 (1) | |
| [drm:verify_crtc_state] [CRTC:47:pipe B] | |
| [drm:intel_enable_sagv] Enabling the SAGV | |
| [drm:drm_mode_object_get] OBJ ID: 110 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (7) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (6) | |
| [drm:drm_atomic_state_default_clear] Clearing atomic state 0xfffff8000295f000 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (4) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (3) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (4) | |
| [drm:__drm_atomic_state_free] Freeing atomic state 0xfffff8000295f000 | |
| [drm:i915_hotplug_work_func] running encoder hotplug functions | |
| [drm:i915_hotplug_work_func] Connector DP-1 (pin 6) received hotplug event. | |
| [drm:intel_dp_detect] [CONNECTOR:72:DP-1] | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling power well 2 | |
| [drm:drm_atomic_state_init] Allocated atomic state 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (3) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0xfffff800025b0200 state to 0xfffff8000295f000 | |
| [drm:drm_mode_object_get] OBJ ID: 77 (1) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:37:pipe A] 0xfffff80012b5a800 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_plane_state] [drm:intel_dp_read_dpcd] DPCD: fffff80012b6d12bh | |
| Added [PLANE:31:plane 2A] 0xfffff800025b0300 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0300 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0300 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] 0xfffff800025b0400 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0400 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0400 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:38:plane 1B] 0xfffff800025b0500 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 2B] 0xfffff800025b0600 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0600 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0600 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:44:cursor B] 0xfffff800025b0700 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0700 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0700 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] 0xfffff800025b0800 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:51:plane 2C] 0xfffff800025b0900 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0900 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0900 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:54:cursor C] 0xfffff800025b0a00 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0a00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0a00 | |
| [drm:drm_mode_object_put] OBJ ID: 77 (2) | |
| [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state 0xfffff80012b5a800 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0200 to [CRTC:37:pipe A] | |
| [drm:drm_atomic_set_fb_for_plane] Set [FB:110] for plane state 0xfffff800025b0200 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (4) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (5) | |
| [drm:intel_dp_print_rates] source rates: 162000, 216000, 270000, 324000, 432000, 540000 | |
| [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000 | |
| [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000 | |
| [drm:drm_dp_read_desc] DP sink: OUI fffff80012b6d1b4hD dev-ID 0xfffff80012b6d1b7E HW-rev 0.0 SW-rev 0.0 quirks 0x0000 | |
| [drm:intel_dp_configure_mst] Sink is not MST capable | |
| [drm:drm_detect_monitor_audio] Monitor has basic audio support | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling power well 2 | |
| [drm:hsw_wait_for_power_well_disable] power well 2 forced on (bios:1 driver:0 kvmr:0 debug:0) | |
| [drm:intel_hpd_irq_event] [drm:drm_atomic_add_affected_connectors] [CONNECTOR:72:DP-1] status updated from disconnected to connected | |
| Adding all current connectors for [CRTC:37:pipe A] to 0xfffff8000295f000 | |
| [drm:i915_hotplug_work_func] Connector HDMI-A-2 (pin 6) received hotplug event. | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (6) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:59:eDP-1] 0xfffff80012b25500 state to 0xfffff8000295f000 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80012b25500 to [NOCRTC] | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_atomic_set_crtc_for_connector] [drm:drm_calc_vbltimestamp_from_scanoutpos] Link connector state 0xfffff80012b25500 to [CRTC:37:pipe A] | |
| crtc 0 : v p(0,-19)@ 42.103935 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_atomic_get_crtc_state] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1719, diff=1, hw=63 hw_last=62 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-6)@ 42.104935 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1720, diff=0, hw=63 hw_last=63 | |
| Added [CRTC:47:pipe B] 0xfffff80012b6b000 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0xfffff80012b6b000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0500 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff800025b0500 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff8000295f000 | |
| [drm:drm_atomic_get_crtc_state] | |
| Added [CRTC:57:pipe C] 0xfffff80012b65800 state to 0xfffff8000295f000 | |
| [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0xfffff80012b65800 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff800025b0800 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] | |
| Set [NOFB] for plane state 0xfffff800025b0800 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:57:pipe C] to 0xfffff8000295f000 | |
| [drm:drm_atomic_check_only] checking 0xfffff8000295f000 | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:59:eDP-1] | |
| [drm:update_connector_routing] [CONNECTOR:59:eDP-1] keeps [ENCODER:58:DDI A], now on [CRTC:37:pipe A] | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:37:pipe A] has [PLANE:28:plane 1A] with fb 110 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 | |
| [drm:drm_atomic_commit] committing 0xfffff8000295f000 | |
| [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,101)@ 42.106935 -> -2197.428342 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1720, diff=0, hw=63 hw_last=63 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,109)@ 42.106935 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1720, diff=0, hw=63 hw_last=63 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,507)@ 42.131935 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1720, diff=1, hw=64 hw_last=63 | |
| [drm:drm_handle_vblank_events] vblank event on 1721, current 1721 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (4) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (5) | |
| [drm:drm_atomic_state_default_clear] Clearing atomic state 0xfffff8000295f000 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 77 (1) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (4) | |
| [drm:__drm_atomic_state_free] Freeing atomic state 0xfffff8000295f000 | |
| [drm:intel_hdmi_detect] [CONNECTOR:76:HDMI-A-2] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc | |
| [drm:do_gmbus_xfer] [drm:drm_calc_vbltimestamp_from_scanoutpos] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| crtc 0 : v p(0,-18)@ 42.137935 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:do_gmbus_xfer] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1721, diff=1, hw=65 hw_last=64 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-4)@ 42.137935 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1722, diff=0, hw=65 hw_last=65 | |
| GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008daf86f0E (err -6) | |
| [drm:drm_fb_helper_hotplug_event] | |
| [drm:drm_setup_crtcs] | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:59:eDP-1] | |
| [drm:intel_dp_detect] [CONNECTOR:59:eDP-1] | |
| [drm:intel_dp_print_rates] source rates: 162000, 216000, 270000, 324000, 432000, 540000 | |
| [drm:intel_dp_print_rates] sink rates: 162000, 270000 | |
| [drm:intel_dp_print_rates] common rates: 162000, 270000 | |
| [drm:drm_dp_read_desc] DP sink: OUI fffff80012b611b4hD dev-ID 0xfffff80012b611b7E HW-rev 0.0 SW-rev 0.0 quirks 0x0000 | |
| [drm:drm_add_display_info] non_desktop set to 0 | |
| [drm:drm_add_display_info] eDP-1: Assigning EDID-1.4 digital sink color depth as 6 bpc. | |
| [drm:drm_mode_object_put] OBJ ID: 106 (1) | |
| [drm:drm_add_display_info] non_desktop set to 0 | |
| [drm:drm_add_display_info] eDP-1: Assigning EDID-1.4 digital sink color depth as 6 bpc. | |
| [drm:drm_edid_to_eld] ELD: no CEA Extension found | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:59:eDP-1] probed modes : | |
| [drm:drm_mode_debug_printmodeline] Modeline 60:"1366x768" 60 70120 1366 1414 1446 1485 768 772 776 787 0x48 0x9 | |
| [drm:drm_mode_debug_printmodeline] Modeline 61:"1366x768" 47 60200 1366 1466 1566 1567 768 788 808 809 0x40 0x9 | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:69:HDMI-A-1] | |
| [drm:intel_hdmi_detect] [CONNECTOR:69:HDMI-A-1] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008daf8570E (err -6) | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:69:HDMI-A-1] disconnected | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:DP-1] | |
| [drm:intel_dp_detect] [CONNECTOR:72:DP-1] | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling power well 2 | |
| [drm:intel_dp_read_dpcd] DPCD: fffff80012b6d12bh | |
| [drm:intel_dp_print_rates] source rates: 162000, 216000, 270000, 324000, 432000, 540000 | |
| [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000 | |
| [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000 | |
| [drm:drm_dp_read_desc] DP sink: OUI fffff80012b6d1b4hD dev-ID 0xfffff80012b6d1b7E HW-rev 0.0 SW-rev 0.0 quirks 0x0000 | |
| [drm:intel_dp_configure_mst] Sink is not MST capable | |
| [drm:drm_detect_monitor_audio] Monitor has basic audio support | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling power well 2 | |
| [drm:hsw_wait_for_power_well_disable] power well 2 forced on (bios:1 driver:0 kvmr:0 debug:0) | |
| [drm:drm_add_display_info] non_desktop set to 0 | |
| [drm:drm_add_display_info] DP-1: Assigning EDID-1.4 digital sink color depth as 10 bpc. | |
| [drm:drm_add_display_info] non_desktop set to 0 | |
| [drm:drm_add_display_info] DP-1: Assigning EDID-1.4 digital sink color depth as 10 bpc. | |
| [drm:drm_edid_to_eld] ELD monitor U28E590 | |
| [drm:drm_edid_to_eld] ELD size 32, SAD count 1 | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:DP-1] probed modes : | |
| [drm:drm_mode_debug_printmodeline] Modeline 80:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9 | |
| [drm:drm_mode_debug_printmodeline] Modeline 83:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 108:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 82:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 | |
| [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 107:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 89:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 | |
| [drm:drm_mode_debug_printmodeline] Modeline 88:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 98:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 90:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 | |
| [drm:drm_mode_debug_printmodeline] Modeline 85:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6 | |
| [drm:drm_mode_debug_printmodeline] Modeline 84:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 109:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 99:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 100:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 101:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 102:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 103:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 104:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 91:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 92:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 | |
| [drm:drm_mode_debug_printmodeline] Modeline 93:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 94:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 95:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 111:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 96:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa | |
| [drm:drm_mode_debug_printmodeline] Modeline 97:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:76:HDMI-A-2] | |
| [drm:intel_hdmi_detect] [CONNECTOR:76:HDMI-A-2] | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1) | |
| [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry | |
| [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) | |
| [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: 0xfffffe008daf8570E (err -6) | |
| [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:76:HDMI-A-2] disconnected | |
| [drm:drm_enable_connectors] connector 59 enabled? yes | |
| [drm:drm_enable_connectors] connector 69 enabled? no | |
| [drm:drm_enable_connectors] connector 72 enabled? yes | |
| [drm:drm_enable_connectors] connector 76 enabled? no | |
| [drm:intel_fb_initial_config] Not using firmware configuration | |
| [drm:drm_target_preferred] looking for cmdline mode on connector 59 | |
| [drm:drm_target_preferred] looking for preferred mode on connector 59 0 | |
| [drm:drm_target_preferred] found mode 1366x768 | |
| [drm:drm_target_preferred] looking for cmdline mode on connector 72 | |
| [drm:drm_target_preferred] looking for preferred mode on connector 72 0 | |
| [drm:drm_target_preferred] found mode 3840x2160 | |
| [drm:drm_setup_crtcs] picking CRTCs for 3840x2160 config | |
| [drm:drm_mode_object_put] OBJ ID: 59 (4) | |
| [drm:drm_setup_crtcs] desired mode 1366x768 set on crtc 37 (0,0) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (3) | |
| [drm:drm_setup_crtcs] desired mode 3840x2160 set on crtc 47 (0,0) | |
| [drm:drm_mode_object_get] OBJ ID: 72 (2) | |
| [drm:drm_atomic_state_init] Allocated atomic state 0xfffff80012b90c00 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (3) | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0xfffff80012b39d00 state to 0xfffff80012b90c00 | |
| [drm:drm_mode_object_get] OBJ ID: 78 (1) | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:37:pipe A] 0xfffff80002973800 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0xfffff80012b66400 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b66400 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b66400 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] 0xfffff80012b66300 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b66300 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b66300 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:38:plane 1B] 0xfffff80012b66200 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 2B] 0xfffff80012b66100 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b66100 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b66100 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:44:cursor B] 0xfffff80012b66000 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b66000 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b66000 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] 0xfffff80012b3ae00 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:51:plane 2C] 0xfffff80012b3ad00 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b3ad00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b3ad00 | |
| [drm:drm_atomic_get_plane_state] Added [PLANE:54:cursor C] 0xfffff80012b3ac00 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b3ac00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b3ac00 | |
| [drm:drm_mode_object_put] OBJ ID: 78 (2) | |
| [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state 0xfffff80002973800 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b39d00 to [CRTC:37:pipe A] | |
| [drm:drm_atomic_set_fb_for_plane] Set [FB:110] for plane state 0xfffff80012b39d00 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (4) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (5) | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff80012b90c00 | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_get] OBJ ID: 59 (6) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:59:eDP-1] 0xfffff80012b4bc00 state to 0xfffff80012b90c00 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80012b4bc00 to [NOCRTC] | |
| [drm:drm_mode_object_get] OBJ ID: 59 (5) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80012b4bc00 to [CRTC:37:pipe A] | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] 0xfffff8014c912800 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3840x2160] for CRTC state 0xfffff8014c912800 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b66200 to [CRTC:47:pipe B] | |
| [drm:drm_atomic_set_fb_for_plane] Set [FB:110] for plane state 0xfffff80012b66200 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (4) | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff80012b90c00 | |
| [drm:drm_mode_object_get] OBJ ID: 72 (3) | |
| [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:DP-1] 0xfffff80012b4bb80 state to 0xfffff80012b90c00 | |
| [drm:drm_mode_object_get] OBJ ID: 72 (4) | |
| [drm:drm_atomic_set_crtc_for_connector] Link connector state 0xfffff80012b4bb80 to [CRTC:47:pipe B] | |
| [drm:drm_atomic_get_crtc_state] Added [CRTC:57:pipe C] 0xfffff80002883000 state to 0xfffff80012b90c00 | |
| [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0xfffff80002883000 | |
| [drm:drm_atomic_set_crtc_for_plane] Link plane state 0xfffff80012b3ae00 to [NOCRTC] | |
| [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0xfffff80012b3ae00 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:57:pipe C] to 0xfffff80012b90c00 | |
| [drm:drm_atomic_check_only] checking 0xfffff80012b90c00 | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:59:eDP-1] | |
| [drm:update_connector_routing] [CONNECTOR:59:eDP-1] keeps [ENCODER:58:DDI A], now on [CRTC:37:pipe A] | |
| [drm:update_connector_routing] Updating routing for [CONNECTOR:72:DP-1] | |
| [drm:update_connector_routing] [CONNECTOR:72:DP-1] using [ENCODER:71:DDI C] on [CRTC:47:pipe B] | |
| [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff80012b90c00 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to 0xfffff80012b90c00 | |
| [drm:connected_sink_compute_bpp] [CONNECTOR:72:DP-1] checking for sink bpp constrains | |
| [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 30 | |
| [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 533250KHz | |
| [drm:intel_dp_compute_config] DP link bw 14 rate select 00 lane count 4 clock 540000 bpp 30 | |
| [drm:intel_dp_compute_config] DP link bw required 1999688 available 2160000 | |
| [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 30, dithering: 0 | |
| [drm:intel_dump_pipe_config] [CRTC:47:pipe B][modeset] | |
| [drm:intel_dump_pipe_config] output_types: DP (0x80) | |
| [drm:intel_dump_pipe_config] cpu_transcoder: B, pipe bpp: 30, dithering: 0 | |
| [drm:intel_dump_m_n_config] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 64 | |
| [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 | |
| [drm:intel_dump_pipe_config] requested mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9 | |
| [drm:intel_dump_pipe_config] adjusted mode: | |
| [drm:drm_mode_debug_printmodeline] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9 | |
| [drm:intel_dump_crtc_timings] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x48 flags: 0x9 | |
| [drm:intel_dump_pipe_config] port clock: 540000, pipe src size: 3840x2160, pixel rate 533250 | |
| [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 | |
| [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled | |
| [drm:intel_dump_pipe_config] ips: 0, double wide: 0 | |
| [drm:skl_dump_hw_state] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0 | |
| [drm:intel_dump_pipe_config] planes on this crtc | |
| [drm:intel_dump_pipe_config] [PLANE:38:plane 1B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:41:plane 2B] disabled, scaler_id = -1 | |
| [drm:intel_dump_pipe_config] [PLANE:44:cursor B] disabled, scaler_id = -1 | |
| [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:37:pipe A] to 0xfffff80012b90c00 | |
| [drm:intel_modeset_checks] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:37:pipe A] has [PLANE:28:plane 1A] with fb 110 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1 | |
| [drm:intel_plane_atomic_calc_changes] [CRTC:47:pipe B] has [PLANE:38:plane 1B] with fb 110 | |
| [drm:intel_plane_atomic_calc_changes] [PLANE:38:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 | |
| [drm:intel_find_shared_dpll] [CRTC:37:pipe A] allocated DPLL 0 | |
| [drm:intel_reference_shared_dpll] using DPLL 0 for pipe A | |
| [drm:intel_find_shared_dpll] [CRTC:47:pipe B] allocated DPLL 1 | |
| [drm:intel_reference_shared_dpll] using DPLL 1 for pipe B | |
| [drm:skl_print_wm_changes] [PLANE:28:plane 1A] ddb (0 - 860) -> (0 - 438) | |
| [drm:skl_print_wm_changes] [PLANE:34:cursor A] ddb (860 - 892) -> (438 - 446) | |
| [drm:skl_print_wm_changes] [PLANE:38:plane 1B] ddb (0 - 0) -> (446 - 884) | |
| [drm:skl_print_wm_changes] [PLANE:44:cursor B] ddb (0 - 0) -> (884 - 892) | |
| [drm:drm_atomic_commit] committing 0xfffff80012b90c00 | |
| [drm:intel_edp_backlight_off] | |
| ugen0.2: <CNFEH63N075040003062 IntegratedWebcamHD> at usbus0 | |
| [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 | |
| [drm:drm_crtc_vblank_off] crtc 0, vblank enabled 0, inmodeset 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,126)@ 42.374193 -> 3991004359.418564 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1722, diff=14, hw=79 hw_last=65 | |
| [drm:intel_disable_pipe] disabling pipe A | |
| [drm:edp_panel_off] Turn eDP port A panel power off | |
| [drm:wait_panel_off] Wait for panel power off time | |
| [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control 00000000 | |
| [drm:wait_panel_status] Wait complete | |
| intel_power_well_disable | |
| [drm:intel_power_well_disable] disabling DDI A/E IO power well | |
| [drm:__intel_fbc_disable] Disabling FBC on pipe A | |
| [drm:intel_disable_shared_dpll] disable DPLL 0 (active 1, on? 1) for crtc 37 | |
| [drm:intel_disable_shared_dpll] disabling DPLL 0 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling power well 2 | |
| [drm:drm_calc_timestamping_constants] crtc 37: hwmode: htotal 1485, vtotal 787, vdisplay 768 | |
| [drm:drm_calc_timestamping_constants] crtc 37: clock 70120 kHz framedur 16667070 linedur 21177 | |
| [drm:drm_calc_timestamping_constants] crtc 47: hwmode: htotal 4000, vtotal 2222, vdisplay 2160 | |
| [drm:drm_calc_timestamping_constants] crtc 47: clock 533250 kHz framedur 16667604 linedur 7501 | |
| [drm:intel_set_cdclk] Changing CDCLK to 540000 kHz, VCO 8100000 kHz, ref 24000 kHz | |
| [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz, VCO: 8100000 kHz, ref: 24000 kHz | |
| [drm:intel_disable_sagv] Disabling the SAGV | |
| [drm:verify_encoder_state] [ENCODER:58:DDI A] | |
| [drm:verify_encoder_state] [ENCODER:68:DDI B] | |
| [drm:verify_encoder_state] [ENCODER:71:DDI C] | |
| [drm:verify_encoder_state] [ENCODER:73:DP-MST A] | |
| [drm:verify_encoder_state] [ENCODER:74:DP-MST B] | |
| [drm:verify_encoder_state] [ENCODER:75:DP-MST C] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| [drm:verify_single_dpll_state] DPLL 1 | |
| [drm:verify_single_dpll_state] DPLL 2 | |
| [drm:verify_single_dpll_state] DPLL 3 | |
| [drm:intel_enable_shared_dpll] enable DPLL 0 (active 1, on? 0) for crtc 37 | |
| [drm:intel_enable_shared_dpll] enabling DPLL 0 | |
| [drm:edp_panel_on] Turn eDP port A panel power on | |
| [drm:wait_panel_power_cycle] Wait for panel power cycle | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010 | |
| [drm:intel_hpd_irq_handler] digital hpd port A - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0 | |
| [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A | |
| ugen0.3: <Microsoft Microsoft 2.4GHz Transceiver v9.0> at usbus0 | |
| ukbd0 on uhub0 | |
| ukbd0: <Microsoft Microsoft 2.4GHz Transceiver v9.0, class 0/0, rev 2.00/7.97, addr 2> on usbus0 | |
| kbd2 at ukbd0 | |
| ums0 on uhub0 | |
| ums0: <Microsoft Microsoft 2.4GHz Transceiver v9.0, class 0/0, rev 2.00/7.97, addr 2> on usbus0 | |
| ums0: 5 buttons and [XYZT] coordinates ID=26 | |
| ums0: 0 buttons and [T] coordinates ID=0 | |
| uhid0 on uhub0 | |
| uhid0: <Microsoft Microsoft 2.4GHz Transceiver v9.0, class 0/0, rev 2.00/7.97, addr 2> on usbus0 | |
| [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control 00000000 | |
| [drm:wait_panel_status] Wait complete | |
| [drm:wait_panel_on] Wait for panel power on | |
| [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control 00000003 | |
| [drm:intel_get_hpd_pins] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010 | |
| [drm:intel_hpd_irq_handler] digital hpd port A - long | |
| [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1 | |
| [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A | |
| [drm:wait_panel_status] Wait complete | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI A/E IO power well | |
| [drm:edp_panel_vdd_on] Turning eDP port A VDD on | |
| [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b | |
| [drm:intel_dp_set_signal_levels] Using signal levels 00000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 0 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS1 | |
| [drm:intel_dp_link_training_clock_recovery] clock recovery OK | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS2 | |
| [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful | |
| [drm:intel_dp_start_link_train] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 1[drm:intel_enable_pipe] enabling pipe A | |
| [drm:drm_crtc_vblank_on] crtc 0, vblank enabled 0, inmodeset 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-19)@ 43.285027 -> 0.000000 [e 0 us, 0 rep] | |
| [drm:intel_edp_backlight_on] | |
| [drm:intel_panel_enable_backlight] pipe A | |
| [drm:intel_panel_actually_set_backlight] set backlight PWM = 470 | |
| [drm:intel_edp_drrs_enable] Panel doesn't support DRRS | |
| [drm:intel_fbc_alloc_cfb] reserved 23592960 bytes of contiguous stolen space for FBC, threshold: 1 | |
| [drm:intel_fbc_enable] Enabling FBC on pipe A | |
| [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-8)@ 43.285027 -> -2197.428342 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1737, diff=0, hw=80 hw_last=80 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-5)@ 43.285941 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1737, diff=0, hw=80 hw_last=80 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-17)@ 43.302350 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1737, diff=1, hw=81 hw_last=80 | |
| [drm:drm_handle_vblank_events] vblank event on 1738, current 1738 | |
| [drm:intel_enable_shared_dpll] enable DPLL 1 (active 2, on? 0) for crtc 47 | |
| [drm:intel_enable_shared_dpll] enabling DPLL 1 | |
| intel_power_well_enable | |
| [drm:intel_power_well_enable] enabling DDI C IO power well | |
| [drm:intel_dp_set_signal_levels] Using signal levels 00000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 0 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS1 | |
| [drm:intel_dp_set_signal_levels] Using signal levels 04000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 1 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:intel_dp_set_signal_levels] Using signal levels 07000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 2 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:intel_dp_link_training_clock_recovery] clock recovery OK | |
| [drm:_intel_dp_set_link_train] Using DP training pattern TPS3 | |
| [drm:intel_dp_set_signal_levels] Using signal levels 08000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 2 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 1 | |
| [drm:intel_dp_set_signal_levels] Using signal levels 07000000 | |
| [drm:intel_dp_set_signal_levels] Using vswing level 2 | |
| [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0 | |
| [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful | |
| [drm:intel_dp_start_link_train] [CONNECTOR:72:DP-1] Link Training Passed at Link Rate = 540000, Lane count = 4[drm:intel_enable_pipe] enabling pipe B | |
| [drm:drm_crtc_vblank_on] crtc 1, vblank enabled 0, inmodeset 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-61)@ 43.310933 -> 0.000000 [e 0 us, 0 rep] | |
| [drm:intel_edp_drrs_enable] Panel doesn't support DRRS | |
| [drm:intel_audio_codec_enable] ELD on [CONNECTOR:72:DP-1], [ENCODER:71:DDI C] | |
| [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 32 bytes ELD | |
| [drm:hsw_dp_audio_config_update] using automatic Maud, Naud | |
| [drm:drm_vblank_enable] enabling vblank on crtc 1, ret: 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-46)@ 43.310933 -> -2197.428342 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1693, diff=0, hw=64 hw_last=64 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-38)@ 43.310933 -> -2197.428336 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1693, diff=0, hw=64 hw_last=64 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-19)@ 43.318937 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1738, diff=1, hw=82 hw_last=81 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 0 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 0 : v p(0,-16)@ 43.318937 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1739, diff=0, hw=82 hw_last=82 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-61)@ 43.327937 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1693, diff=1, hw=65 hw_last=64 | |
| [drm:drm_handle_vblank_events] vblank event on 1694, current 1694 | |
| [drm:intel_connector_verify_state] [CONNECTOR:59:eDP-1] | |
| [drm:drm_mode_object_put] OBJ ID: 78 (1) | |
| [drm:verify_crtc_state] [CRTC:37:pipe A] | |
| [drm:verify_single_dpll_state] DPLL 0 | |
| [drm:intel_connector_verify_state] [CONNECTOR:72:DP-1] | |
| [drm:verify_crtc_state] [CRTC:47:pipe B] | |
| [drm:verify_single_dpll_state] DPLL 1 | |
| [drm:drm_mode_object_get] OBJ ID: 110 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (6) | |
| [drm:drm_mode_object_get] OBJ ID: 110 (5) | |
| [drm:drm_atomic_state_default_clear] Clearing atomic state 0xfffff80012b90c00 | |
| [drm:drm_mode_object_put] OBJ ID: 59 (6) | |
| [drm:drm_mode_object_put] OBJ ID: 59 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 72 (5) | |
| [drm:drm_mode_object_put] OBJ ID: 110 (6) | |
| [drm:__drm_atomic_state_free] Freeing atomic state 0xfffff80012b90c00 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-61)@ 43.343933 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1694, diff=1, hw=66 hw_last=65 | |
| [drm:vblank_disable_fn] disabling vblank on crtc 1 | |
| [drm:drm_calc_vbltimestamp_from_scanoutpos] crtc 1 : v p(0,-52)@ 43.344934 -> -2200.981866 [e 0 us, 0 rep] | |
| [drm:drm_update_vblank_count] updating vblank count on crtc 1: current=1695, diff=0, hw=66 hw_last=66 | |
| ugen0.4: <vendor 0x046d C922 Pro Stream Webcam> at usbus0 | |
| ugen0.5: <Broadcom Corp 5880> at usbus0 | |
| Link state changed to up | |
| em0: link state changed to UP | |
| bridge0: link state changed to UP | |
| [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off | |
| [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007 |
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