Created
June 21, 2010 08:42
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#include "AT91SAM7.h" | |
typedef struct _AT91S_PIO { | |
AT91_REG PIO_SODR; // Set Output Data Register | |
AT91_REG PIO_CODR; // Clear Output Data Register | |
} AT91S_PIO, *AT91PS_PIO; | |
#define A0 AT91C_PIO_PA30 //((unsigned int) 1 << 30) // Pin Controlled by PA30 | |
#define WR AT91C_PIO_PA4 | |
#define RD AT91C_PIO_PA28 | |
#define D0 AT91C_PIO_PA6 | |
#define D1 AT91C_PIO_PA26 | |
#define D2 AT91C_PIO_PA8 | |
#define D3 AT91C_PIO_PA24 | |
#define D4 AT91C_PIO_PA10 | |
#define D5 AT91C_PIO_PA22 | |
#define D6 AT91C_PIO_PA12 | |
#define D7 AT91C_PIO_PA20 | |
#define XCS AT91C_PIO_PA14 | |
#define RST AT91C_PIO_PA21 | |
void writeIO (int mask) | |
{ | |
volatile AT91PS_PIO pPIO = AT91C_BASE_PIOA; // (PIOA) Base Address | |
pPIO -> PIO_SODR &= ( mask | D0); | |
pPIO -> PIO_SODR &= ( mask | D1); | |
pPIO -> PIO_SODR &= ( mask | D2); | |
pPIO -> PIO_SODR &= ( mask | D3); | |
pPIO -> PIO_SODR &= ( mask | D4); | |
pPIO -> PIO_SODR &= ( mask | D5); | |
pPIO -> PIO_SODR &= ( mask | D6); | |
pPIO -> PIO_SODR &= ( mask | D7); | |
} | |
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// Control instructions | |
// Function Parameter | |
#define EXTIN 0x39 // Ext = 0 set | |
#define EXTOUT 0x31 // Ext = 1 set | |
// Ext = 0 | |
#define DISON 0xAF // Display on | |
#define DISOFF 0xAE // Display off | |
#define DISNOR 0xA6 // Normal display | |
#define DISINV 0xA7 // Inverse display | |
#define COMSCN 0xBB // Common scan direction 1 byte | |
#define DISCTL 0xCA // Display control 3 bytes | |
#define SLPIN 0x95 // Sleep in | |
#define SLPOUT 0x94 // Sleep out | |
#define LASET 0x75 // Line address set | |
#define CASET 0x15 // Column address set 2 bytes | |
#define DATSDR 0xBC // Data scan direction 2 bytes | |
#define RGBSET8 0xCE // 256-color position set 3 bytes | |
#define RAMWR 0x5C // Writing to memory data | |
#define RAMRD 0x5D // Reading from memory data | |
#define PTLIN 0xA8 // Partial display in 2 bytes | |
#define PTLOUT 0xA9 // Partial display out | |
#define RMWIN 0xE0 // Read and modify write | |
#define RMWOUT 0xEE // RMW End | |
#define ASCSET 0xAA // Area scroll set 4 bytes | |
#define SCSTART 0xAB // Scroll start set 1 byte | |
#define OSCON 0xD1 // Internal oscillation on | |
#define OSCOFF 0xD2 // Internal oscillation off | |
#define PWRCTR 0x20 // Power control 1 byte | |
#define VOLCTR 0x81 // Electronic volume control 2 bytes | |
#define VOLUP 0xD6 // Increment electronic control by 1 | |
#define VOLDOWN 0xD7 // Decrement electronic control by 1 | |
#define RESERVE 0x82 // Not used | |
#define EPSRRD1 0x7C // Read register 1 | |
#define EPSRRD2 0x7D // Read register 2 | |
#define NOP 0x25 // NOP instruction | |
#define EPINT 0x07 // Initial code(1) 1 byte | |
// Ext = 1 | |
#define GRAY1 0x20 // Frame 1 gray PWM set | |
#define GRAY2 0x21 // Frame 2 gray PWM set | |
#define ANASET 0x32 // Analog circuit set | |
#define SWINT 0x34 // Software initial | |
#define EPCTIN 0xCD // Control EEPROM | |
#define EPCOUT 0xCC // Cancel EEPROM control | |
#define EPMWR 0xFC // Write into EEPROM | |
#define EPMRD 0xFD // Read from EEPROM |
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