qemu.patch

diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index c98eeb4..fc72e4f 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -866,19 +866,24 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
     }
 
     if (load_segment(env, &e1, &e2, selector) != 0) {
+        qemu_log_mask(CPU_LOG_RESET, "XXXX load_segment\n");
         raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
     }
     if (!(e2 & DESC_S_MASK) || !(e2 & (DESC_CS_MASK))) {
+        qemu_log_mask(CPU_LOG_RESET, "XXXX CS / S MASK\n");
         raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
     }
     dpl = (e2 >> DESC_DPL_SHIFT) & 3;
     if (dpl > cpl) {
+        qemu_log_mask(CPU_LOG_RESET, "XXXX CPL\n");
         raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
     }
     if (!(e2 & DESC_P_MASK)) {
+        qemu_log_mask(CPU_LOG_RESET, "XXXX not P\n");
         raise_exception_err(env, EXCP0B_NOSEG, selector & 0xfffc);
     }
     if (!(e2 & DESC_L_MASK) || (e2 & DESC_B_MASK)) {
+        qemu_log_mask(CPU_LOG_RESET, "XXXX NOT L / B \n");
         raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
     }
     if ((!(e2 & DESC_C_MASK) && dpl < cpl) || ist != 0) {
@@ -889,12 +894,14 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
     } else if ((e2 & DESC_C_MASK) || dpl == cpl) {
         /* to same privilege */
         if (env->eflags & VM_MASK) {
+            qemu_log_mask(CPU_LOG_RESET, "XXXX VM\n");
             raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
         }
         new_stack = 0;
         esp = env->regs[R_ESP];
         dpl = cpl;
     } else {
+        qemu_log_mask(CPU_LOG_RESET, "XXXX WTF\n");
         raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc);
         new_stack = 0; /* avoid warning */
         esp = 0; /* avoid warning */