jonpovey

alias extDoor d0 # blueshift trick airlock
alias intDoor d1
alias extVent d2
alias intVent d3
alias gasSense d4
define doorsHash HASH("StructureCompositeDoor")
define tankMaxPressure 58000 # option: allow burst!
define tankRebalanceDelay 2
move r10 2.5 # ext atmos target repressure, kPa
move r11 20.0 # int atmos target repressure

jonpovey

async with join_any() as tm:
  @tm.fork
  async def block1() -> None:
    ...
  tm.add("test", Combine(...))
# join_any here

await tm.join_all()  # wait for them all to finish now

jonpovey

Clarification of interrupt things in DCPU spec 1.7
A couple of questions, and suggestions.

=== EXECUTIVE SUMMARY ==========================================================

1. Is hardware still notified about triggering of interrupts it has sent to
   DCPU? It looks like that feature has been removed (good).

2. Can you clarify that if there are interrupts on queue, after RFI the
   interrupt handler is immediately called again? This is the right way to do it

jonpovey

HIT_HMD2043

                               __    __
                                ||  ||
                                ||==|| I T
                               _||  ||_

                    Harold Innovation Technologies
                "If it ain't a HIT, it's a piece of..."

jonpovey

Hi Notch,

EXECUTIVE SUMMARY:
Please add interrupt *masking* rather than just enable/ignore options, as this means
we can have critical sections without losing interrupts (random clock drift bad).

LONG-WINDED VERSION:

Losing interrupts makes me sad :(
(And will be confusing and hard to debug)