One-Process, Two-Process and Three-Process State Machines
"a state machine is worth a thousand equations" - Josy Boelen (yes ...)
and their Resets
About State Machines
On the internet for a dealing with FPGA programming, I often read the advice to write One-Process state machines only.
And I usually beg to differ. (You shouldn't be surprised ...)
The principal arguments given are that a One-Process state machine description is 'free from latches' and at the same time requires less typing. Now being lazy is a hallmark of a good engineer, but ...
In a lot of cases a One-Process description fits exactly. However in my line of work this is rarely so.
To understand the deeper differences between the One- and Two-Process description we have to go back to Moore and Mealy.