Created
August 11, 2015 20:43
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[動作未確認] https://github.com/kbc-developers/android_kernel_htc_m7wlj をHTX21に対応させるためのパッチ
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diff --git arch/arm/configs/cyanogenmod_impression_j_defconfig arch/arm/configs/cyanogenmod_impression_j_defconfig | |
new file mode 100644 | |
index 0000000..bf77416 | |
--- /dev/null | |
+++ arch/arm/configs/cyanogenmod_impression_j_defconfig | |
@@ -0,0 +1,3745 @@ | |
+# | |
+# Automatically generated file; DO NOT EDIT. | |
+# Linux/arm 3.4.10 Kernel Configuration | |
+# | |
+CONFIG_ARM=y | |
+CONFIG_ARM_HAS_SG_CHAIN=y | |
+CONFIG_MIGHT_HAVE_PCI=y | |
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
+CONFIG_GENERIC_GPIO=y | |
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set | |
+CONFIG_GENERIC_CLOCKEVENTS=y | |
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y | |
+CONFIG_KTIME_SCALAR=y | |
+CONFIG_HAVE_PROC_CPU=y | |
+CONFIG_STACKTRACE_SUPPORT=y | |
+CONFIG_LOCKDEP_SUPPORT=y | |
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |
+CONFIG_HARDIRQS_SW_RESEND=y | |
+CONFIG_GENERIC_IRQ_PROBE=y | |
+CONFIG_ARM_TICKET_LOCKS=y | |
+CONFIG_RWSEM_GENERIC_SPINLOCK=y | |
+CONFIG_ARCH_HAS_CPUFREQ=y | |
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | |
+CONFIG_GENERIC_HWEIGHT=y | |
+CONFIG_GENERIC_CALIBRATE_DELAY=y | |
+CONFIG_NEED_DMA_MAP_STATE=y | |
+CONFIG_VECTORS_BASE=0xffff0000 | |
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set | |
+CONFIG_NEED_MACH_IO_H=y | |
+CONFIG_NEED_MACH_MEMORY_H=y | |
+CONFIG_PHYS_OFFSET=0x80600000 | |
+CONFIG_GENERIC_BUG=y | |
+# CONFIG_ARCH_RANDOM is not set | |
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |
+CONFIG_HAVE_IRQ_WORK=y | |
+CONFIG_IRQ_WORK=y | |
+ | |
+# | |
+# General setup | |
+# | |
+CONFIG_EXPERIMENTAL=y | |
+CONFIG_INIT_ENV_ARG_LIMIT=32 | |
+CONFIG_CROSS_COMPILE="" | |
+CONFIG_LOCALVERSION="-CM" | |
+CONFIG_LOCALVERSION_AUTO=y | |
+CONFIG_HAVE_KERNEL_GZIP=y | |
+CONFIG_HAVE_KERNEL_LZMA=y | |
+CONFIG_HAVE_KERNEL_XZ=y | |
+CONFIG_HAVE_KERNEL_LZO=y | |
+CONFIG_KERNEL_GZIP=y | |
+# CONFIG_KERNEL_LZMA is not set | |
+# CONFIG_KERNEL_XZ is not set | |
+# CONFIG_KERNEL_LZO is not set | |
+CONFIG_DEFAULT_HOSTNAME="(none)" | |
+# CONFIG_SWAP is not set | |
+# CONFIG_SYSVIPC is not set | |
+# CONFIG_POSIX_MQUEUE is not set | |
+# CONFIG_BSD_PROCESS_ACCT is not set | |
+# CONFIG_FHANDLE is not set | |
+# CONFIG_TASKSTATS is not set | |
+CONFIG_AUDIT=y | |
+CONFIG_AUDITSYSCALL=y | |
+CONFIG_AUDIT_WATCH=y | |
+CONFIG_AUDIT_TREE=y | |
+# CONFIG_AUDIT_LOGINUID_IMMUTABLE is not set | |
+CONFIG_HAVE_GENERIC_HARDIRQS=y | |
+ | |
+# | |
+# IRQ subsystem | |
+# | |
+CONFIG_GENERIC_HARDIRQS=y | |
+CONFIG_GENERIC_IRQ_SHOW=y | |
+CONFIG_IRQ_DOMAIN=y | |
+# CONFIG_IRQ_DOMAIN_DEBUG is not set | |
+ | |
+# | |
+# RCU Subsystem | |
+# | |
+CONFIG_TREE_PREEMPT_RCU=y | |
+CONFIG_PREEMPT_RCU=y | |
+CONFIG_RCU_FANOUT=32 | |
+# CONFIG_RCU_FANOUT_EXACT is not set | |
+CONFIG_RCU_FAST_NO_HZ=y | |
+# CONFIG_TREE_RCU_TRACE is not set | |
+# CONFIG_RCU_BOOST is not set | |
+CONFIG_IKCONFIG=y | |
+CONFIG_IKCONFIG_PROC=y | |
+CONFIG_LOG_BUF_SHIFT=17 | |
+CONFIG_CGROUPS=y | |
+# CONFIG_CGROUP_DEBUG is not set | |
+CONFIG_CGROUP_FREEZER=y | |
+CONFIG_CGROUP_TIMER_SLACK=y | |
+# CONFIG_CGROUP_DEVICE is not set | |
+# CONFIG_CPUSETS is not set | |
+CONFIG_CGROUP_CPUACCT=y | |
+CONFIG_RESOURCE_COUNTERS=y | |
+# CONFIG_CGROUP_MEM_RES_CTLR is not set | |
+# CONFIG_CGROUP_PERF is not set | |
+CONFIG_CGROUP_SCHED=y | |
+CONFIG_FAIR_GROUP_SCHED=y | |
+# CONFIG_CFS_BANDWIDTH is not set | |
+CONFIG_RT_GROUP_SCHED=y | |
+# CONFIG_BLK_CGROUP is not set | |
+# CONFIG_CHECKPOINT_RESTORE is not set | |
+CONFIG_NAMESPACES=y | |
+# CONFIG_UTS_NS is not set | |
+# CONFIG_USER_NS is not set | |
+# CONFIG_PID_NS is not set | |
+# CONFIG_NET_NS is not set | |
+# CONFIG_SCHED_AUTOGROUP is not set | |
+# CONFIG_SYSFS_DEPRECATED is not set | |
+CONFIG_RELAY=y | |
+CONFIG_BLK_DEV_INITRD=y | |
+CONFIG_INITRAMFS_SOURCE="" | |
+CONFIG_RD_GZIP=y | |
+# CONFIG_RD_BZIP2 is not set | |
+# CONFIG_RD_LZMA is not set | |
+# CONFIG_RD_XZ is not set | |
+# CONFIG_RD_LZO is not set | |
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
+CONFIG_SYSCTL=y | |
+CONFIG_ANON_INODES=y | |
+CONFIG_PANIC_TIMEOUT=5 | |
+CONFIG_EXPERT=y | |
+CONFIG_UID16=y | |
+# CONFIG_SYSCTL_SYSCALL is not set | |
+CONFIG_KALLSYMS=y | |
+# CONFIG_KALLSYMS_ALL is not set | |
+CONFIG_HOTPLUG=y | |
+CONFIG_PRINTK=y | |
+CONFIG_PRINTK_CPU_ID=y | |
+CONFIG_PRINTK_PID=y | |
+# CONFIG_TRACING_SPINLOCK is not set | |
+# CONFIG_TRACING_WORKQUEUE_HISTORY is not set | |
+CONFIG_TRACING_IRQ_PWR=y | |
+CONFIG_BUG=y | |
+CONFIG_ELF_CORE=y | |
+CONFIG_BASE_FULL=y | |
+CONFIG_FUTEX=y | |
+CONFIG_EPOLL=y | |
+CONFIG_SIGNALFD=y | |
+CONFIG_TIMERFD=y | |
+CONFIG_EVENTFD=y | |
+CONFIG_SHMEM=y | |
+CONFIG_ASHMEM=y | |
+CONFIG_AIO=y | |
+CONFIG_EMBEDDED=y | |
+CONFIG_HAVE_PERF_EVENTS=y | |
+CONFIG_PERF_USE_VMALLOC=y | |
+ | |
+# | |
+# Kernel Performance Events And Counters | |
+# | |
+CONFIG_PERF_EVENTS=y | |
+# CONFIG_PERF_COUNTERS is not set | |
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set | |
+CONFIG_VM_EVENT_COUNTERS=y | |
+# CONFIG_SLUB_DEBUG is not set | |
+CONFIG_COMPAT_BRK=y | |
+# CONFIG_SLAB is not set | |
+CONFIG_SLUB=y | |
+# CONFIG_SLOB is not set | |
+# CONFIG_PROFILING is not set | |
+CONFIG_TRACEPOINTS=y | |
+CONFIG_HAVE_OPROFILE=y | |
+# CONFIG_JUMP_LABEL is not set | |
+CONFIG_HAVE_KPROBES=y | |
+CONFIG_HAVE_KRETPROBES=y | |
+CONFIG_HAVE_DMA_ATTRS=y | |
+CONFIG_HAVE_DMA_CONTIGUOUS=y | |
+CONFIG_USE_GENERIC_SMP_HELPERS=y | |
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y | |
+CONFIG_HAVE_CLK=y | |
+CONFIG_HAVE_DMA_API_DEBUG=y | |
+CONFIG_HAVE_HW_BRKPT_RESERVED_RW_ACCESS=y | |
+CONFIG_HAVE_ARCH_JUMP_LABEL=y | |
+ | |
+# | |
+# GCOV-based kernel profiling | |
+# | |
+# CONFIG_GCOV_KERNEL is not set | |
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y | |
+CONFIG_RT_MUTEXES=y | |
+CONFIG_BASE_SMALL=0 | |
+# CONFIG_MODULES is not set | |
+CONFIG_STOP_MACHINE=y | |
+CONFIG_BLOCK=y | |
+CONFIG_LBDAF=y | |
+# CONFIG_BLK_DEV_BSG is not set | |
+# CONFIG_BLK_DEV_BSGLIB is not set | |
+# CONFIG_BLK_DEV_INTEGRITY is not set | |
+ | |
+# | |
+# Partition Types | |
+# | |
+CONFIG_PARTITION_ADVANCED=y | |
+# CONFIG_ACORN_PARTITION is not set | |
+# CONFIG_OSF_PARTITION is not set | |
+# CONFIG_AMIGA_PARTITION is not set | |
+# CONFIG_ATARI_PARTITION is not set | |
+# CONFIG_MAC_PARTITION is not set | |
+CONFIG_MSDOS_PARTITION=y | |
+# CONFIG_BSD_DISKLABEL is not set | |
+# CONFIG_MINIX_SUBPARTITION is not set | |
+# CONFIG_SOLARIS_X86_PARTITION is not set | |
+# CONFIG_UNIXWARE_DISKLABEL is not set | |
+# CONFIG_LDM_PARTITION is not set | |
+# CONFIG_SGI_PARTITION is not set | |
+# CONFIG_ULTRIX_PARTITION is not set | |
+# CONFIG_SUN_PARTITION is not set | |
+# CONFIG_KARMA_PARTITION is not set | |
+CONFIG_EFI_PARTITION=y | |
+# CONFIG_SYSV68_PARTITION is not set | |
+ | |
+# | |
+# IO Schedulers | |
+# | |
+CONFIG_IOSCHED_NOOP=y | |
+# CONFIG_IOSCHED_TEST is not set | |
+CONFIG_IOSCHED_DEADLINE=y | |
+CONFIG_IOSCHED_ROW=y | |
+CONFIG_IOSCHED_CFQ=y | |
+CONFIG_IOSCHED_FIOPS=y | |
+# CONFIG_DEFAULT_DEADLINE is not set | |
+CONFIG_DEFAULT_ROW=y | |
+# CONFIG_DEFAULT_CFQ is not set | |
+# CONFIG_DEFAULT_NOOP is not set | |
+CONFIG_DEFAULT_IOSCHED="row" | |
+# CONFIG_INLINE_SPIN_TRYLOCK is not set | |
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | |
+# CONFIG_INLINE_SPIN_LOCK is not set | |
+# CONFIG_INLINE_SPIN_LOCK_BH is not set | |
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | |
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | |
+CONFIG_UNINLINE_SPIN_UNLOCK=y | |
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | |
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | |
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | |
+# CONFIG_INLINE_READ_TRYLOCK is not set | |
+# CONFIG_INLINE_READ_LOCK is not set | |
+# CONFIG_INLINE_READ_LOCK_BH is not set | |
+# CONFIG_INLINE_READ_LOCK_IRQ is not set | |
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | |
+# CONFIG_INLINE_READ_UNLOCK is not set | |
+# CONFIG_INLINE_READ_UNLOCK_BH is not set | |
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set | |
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | |
+# CONFIG_INLINE_WRITE_TRYLOCK is not set | |
+# CONFIG_INLINE_WRITE_LOCK is not set | |
+# CONFIG_INLINE_WRITE_LOCK_BH is not set | |
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | |
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | |
+# CONFIG_INLINE_WRITE_UNLOCK is not set | |
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | |
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | |
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | |
+CONFIG_MUTEX_SPIN_ON_OWNER=y | |
+# CONFIG_DEBUG_CSD_LOCK is not set | |
+CONFIG_FREEZER=y | |
+ | |
+# | |
+# System Type | |
+# | |
+CONFIG_MMU=y | |
+# CONFIG_ARCH_INTEGRATOR is not set | |
+# CONFIG_ARCH_REALVIEW is not set | |
+# CONFIG_ARCH_VERSATILE is not set | |
+# CONFIG_ARCH_VEXPRESS is not set | |
+# CONFIG_ARCH_AT91 is not set | |
+# CONFIG_ARCH_BCMRING is not set | |
+# CONFIG_ARCH_HIGHBANK is not set | |
+# CONFIG_ARCH_CLPS711X is not set | |
+# CONFIG_ARCH_CNS3XXX is not set | |
+# CONFIG_ARCH_GEMINI is not set | |
+# CONFIG_ARCH_PRIMA2 is not set | |
+# CONFIG_ARCH_EBSA110 is not set | |
+# CONFIG_ARCH_EP93XX is not set | |
+# CONFIG_ARCH_FOOTBRIDGE is not set | |
+# CONFIG_ARCH_MXC is not set | |
+# CONFIG_ARCH_MXS is not set | |
+# CONFIG_ARCH_NETX is not set | |
+# CONFIG_ARCH_H720X is not set | |
+# CONFIG_ARCH_IOP13XX is not set | |
+# CONFIG_ARCH_IOP32X is not set | |
+# CONFIG_ARCH_IOP33X is not set | |
+# CONFIG_ARCH_IXP23XX is not set | |
+# CONFIG_ARCH_IXP2000 is not set | |
+# CONFIG_ARCH_IXP4XX is not set | |
+# CONFIG_ARCH_DOVE is not set | |
+# CONFIG_ARCH_KIRKWOOD is not set | |
+# CONFIG_ARCH_LPC32XX is not set | |
+# CONFIG_ARCH_MV78XX0 is not set | |
+# CONFIG_ARCH_ORION5X is not set | |
+# CONFIG_ARCH_MMP is not set | |
+# CONFIG_ARCH_KS8695 is not set | |
+# CONFIG_ARCH_W90X900 is not set | |
+# CONFIG_ARCH_TEGRA is not set | |
+# CONFIG_ARCH_PICOXCELL is not set | |
+# CONFIG_ARCH_PNX4008 is not set | |
+# CONFIG_ARCH_PXA is not set | |
+CONFIG_ARCH_MSM=y | |
+# CONFIG_ARCH_SHMOBILE is not set | |
+# CONFIG_ARCH_RPC is not set | |
+# CONFIG_ARCH_SA1100 is not set | |
+# CONFIG_ARCH_S3C24XX is not set | |
+# CONFIG_ARCH_S3C64XX is not set | |
+# CONFIG_ARCH_S5P64X0 is not set | |
+# CONFIG_ARCH_S5PC100 is not set | |
+# CONFIG_ARCH_S5PV210 is not set | |
+# CONFIG_ARCH_EXYNOS is not set | |
+# CONFIG_ARCH_SHARK is not set | |
+# CONFIG_ARCH_U300 is not set | |
+# CONFIG_ARCH_U8500 is not set | |
+# CONFIG_ARCH_NOMADIK is not set | |
+# CONFIG_ARCH_DAVINCI is not set | |
+# CONFIG_ARCH_OMAP is not set | |
+# CONFIG_PLAT_SPEAR is not set | |
+# CONFIG_ARCH_VT8500 is not set | |
+# CONFIG_ARCH_ZYNQ is not set | |
+# CONFIG_GPIO_PCA953X is not set | |
+# CONFIG_KEYBOARD_GPIO_POLLED is not set | |
+ | |
+# | |
+# MSM SoC Type | |
+# | |
+# CONFIG_ARCH_MSM7X01A is not set | |
+# CONFIG_ARCH_MSM7X25 is not set | |
+# CONFIG_ARCH_MSM7X27 is not set | |
+# CONFIG_ARCH_MSM7X30 is not set | |
+# CONFIG_ARCH_QSD8X50 is not set | |
+# CONFIG_ARCH_MSM8X60 is not set | |
+CONFIG_ARCH_MSM8960=y | |
+# CONFIG_ARCH_MSM8930 is not set | |
+CONFIG_ARCH_APQ8064=y | |
+# CONFIG_ARCH_MSM8974 is not set | |
+# CONFIG_MACH_ELITE is not set | |
+# CONFIG_MACH_VILLE is not set | |
+# CONFIG_MACH_FIGHTER is not set | |
+# CONFIG_MACH_JET is not set | |
+# CONFIG_MACH_VALENTE_WX is not set | |
+# CONFIG_ARCH_FSM9XXX is not set | |
+# CONFIG_ARCH_MSM9615 is not set | |
+# CONFIG_ARCH_MSM8625 is not set | |
+# CONFIG_ARCH_MSM9625 is not set | |
+CONFIG_MSM_SOC_REV_NONE=y | |
+# CONFIG_MSM_SOC_REV_A is not set | |
+CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y | |
+CONFIG_ARCH_MSM_KRAIT=y | |
+CONFIG_MSM_SMP=y | |
+CONFIG_ARCH_MSM_KRAITMP=y | |
+CONFIG_MSM_KRAIT_WFE_FIXUP=y | |
+CONFIG_MSM_RPM=y | |
+# CONFIG_MSM_RPM_SMD is not set | |
+CONFIG_MSM_MPM=y | |
+CONFIG_MSM_XO=y | |
+CONFIG_MSM_REMOTE_SPINLOCK_SFPB=y | |
+# CONFIG_PERFLOCK is not set | |
+# CONFIG_PERFLOCK_BOOT_LOCK is not set | |
+ | |
+# | |
+# MSM Board Selection | |
+# | |
+# CONFIG_MACH_MSM8960_SIM is not set | |
+# CONFIG_MACH_MSM8960_RUMI3 is not set | |
+# CONFIG_MACH_MSM8960_CDP is not set | |
+# CONFIG_MACH_MSM8960_MTP is not set | |
+# CONFIG_MACH_MSM8960_FLUID is not set | |
+# CONFIG_MACH_MSM8960_LIQUID is not set | |
+# CONFIG_MACH_APQ8064_SIM is not set | |
+# CONFIG_MACH_APQ8064_RUMI3 is not set | |
+# CONFIG_MACH_APQ8064_CDP is not set | |
+# CONFIG_MACH_APQ8064_MTP is not set | |
+# CONFIG_MACH_APQ8064_LIQUID is not set | |
+# CONFIG_MACH_MPQ8064_CDP is not set | |
+# CONFIG_MACH_MPQ8064_HRD is not set | |
+# CONFIG_MACH_MPQ8064_DTV is not set | |
+# CONFIG_MSM_STACKED_MEMORY is not set | |
+CONFIG_KERNEL_PMEM_EBI_REGION=y | |
+CONFIG_MSM_AMSS_VERSION=6225 | |
+# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
+# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
+CONFIG_MSM_AMSS_VERSION_6225=y | |
+CONFIG_HTC_BATT_CORE=y | |
+# CONFIG_HTC_BATT8x60 is not set | |
+CONFIG_HTC_BATT_8960=y | |
+# CONFIG_HTC_ONMODE_CHARGING is not set | |
+# CONFIG_BUILD_EDIAG is not set | |
+# CONFIG_HTC_FD_MONITOR is not set | |
+CONFIG_MSM7X00A_USE_GP_TIMER=y | |
+# CONFIG_MSM7X00A_USE_DG_TIMER is not set | |
+CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
+# CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
+# CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
+# CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
+# CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
+CONFIG_MSM7X00A_SLEEP_MODE=0 | |
+# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE_SUSPEND is not set | |
+CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE=y | |
+# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_APPS_SLEEP is not set | |
+# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
+# CONFIG_MSM7X00A_IDLE_SLEEP_WAIT_FOR_INTERRUPT is not set | |
+CONFIG_MSM7X00A_IDLE_SLEEP_MODE=1 | |
+CONFIG_MSM7X00A_IDLE_SLEEP_MIN_TIME=20000000 | |
+CONFIG_MSM7X00A_IDLE_SPIN_TIME=80000 | |
+CONFIG_MSM_IDLE_STATS=y | |
+CONFIG_MSM_IDLE_STATS_FIRST_BUCKET=62500 | |
+CONFIG_MSM_IDLE_STATS_BUCKET_SHIFT=2 | |
+CONFIG_MSM_IDLE_STATS_BUCKET_COUNT=10 | |
+CONFIG_MSM_SUSPEND_STATS_FIRST_BUCKET=1000000000 | |
+CONFIG_CPU_HAS_L2_PMU=y | |
+# CONFIG_HTC_HEADSET is not set | |
+# CONFIG_GSBI5_UARTDM is not set | |
+CONFIG_HTC_HEADSET_MGR=y | |
+# CONFIG_HTC_HEADSET_GPIO is not set | |
+CONFIG_HTC_HEADSET_PMIC=y | |
+# CONFIG_HTC_HEADSET_8X60 is not set | |
+CONFIG_GSBI4_UARTDM=y | |
+# CONFIG_HTC_PWRSINK is not set | |
+# CONFIG_BUILD_OMA_DM is not set | |
+# CONFIG_MSM_FIQ_SUPPORT is not set | |
+# CONFIG_MSM_SERIAL_DEBUGGER is not set | |
+# CONFIG_MSM_PROC_COMM is not set | |
+CONFIG_MSM_SMD=y | |
+# CONFIG_MSM_SMD_PKG3 is not set | |
+CONFIG_MSM_SMD_PKG4=y | |
+CONFIG_MSM_SMD0_WQ=y | |
+# CONFIG_MSM_SMD_DEBUG is not set | |
+CONFIG_MSM_BAM_DMUX=y | |
+CONFIG_MSM_N_WAY_SMD=y | |
+CONFIG_MSM_N_WAY_SMSM=y | |
+CONFIG_MSM_RESET_MODEM=y | |
+# CONFIG_MSM_SMD_LOGGING is not set | |
+# CONFIG_MSM_IPC_LOGGING is not set | |
+CONFIG_MSM_SMD_NMEA=y | |
+CONFIG_MSM_SMD_TTY=y | |
+CONFIG_MSM_SMD_QMI=y | |
+CONFIG_MSM_SMD_PKT=y | |
+CONFIG_MSM_DSPS=y | |
+# CONFIG_MSM_ONCRPCROUTER is not set | |
+CONFIG_MSM_IPC_ROUTER=y | |
+CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y | |
+CONFIG_FORCE_FAST_CHARGE=y | |
+# CONFIG_MSM_DALRPC is not set | |
+# CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
+# CONFIG_MSM_AVS_HW is not set | |
+# CONFIG_MSM_HW3D is not set | |
+CONFIG_AMSS_7X25_VERSION_2009=y | |
+# CONFIG_AMSS_7X25_VERSION_2008 is not set | |
+CONFIG_RTAC=y | |
+# CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
+# CONFIG_MSM_DMA_TEST is not set | |
+CONFIG_WIFI_CONTROL_FUNC=y | |
+CONFIG_WIFI_MEM_PREALLOC=y | |
+# CONFIG_HTC_BATT_ALARM is not set | |
+# CONFIG_SURF_FFA_GPIO_KEYPAD is not set | |
+CONFIG_MSM_SLEEP_TIME_OVERRIDE=y | |
+# CONFIG_MSM_MEMORY_LOW_POWER_MODE is not set | |
+CONFIG_MSM_PM_TIMEOUT_HALT=y | |
+# CONFIG_MSM_PM_TIMEOUT_RESET_MODEM is not set | |
+# CONFIG_MSM_PM_TIMEOUT_RESET_CHIP is not set | |
+CONFIG_MSM_IDLE_WAIT_ON_MODEM=0 | |
+CONFIG_MSM_RPM_REGULATOR=y | |
+CONFIG_HTC_HEADSET_ONE_WIRE=y | |
+CONFIG_MSM_PIL=y | |
+# CONFIG_MSM_PIL_MODEM is not set | |
+# CONFIG_MSM_PIL_QDSP6V3 is not set | |
+CONFIG_MSM_PIL_QDSP6V4=y | |
+# CONFIG_MSM_PIL_LPASS_QDSP6V5 is not set | |
+# CONFIG_MSM_PIL_MSS_QDSP6V5 is not set | |
+CONFIG_MSM_PIL_RIVA=y | |
+CONFIG_MSM_PIL_TZAPPS=y | |
+# CONFIG_MSM_PIL_DSPS is not set | |
+CONFIG_MSM_PIL_VIDC=y | |
+# CONFIG_MSM_PIL_VENUS is not set | |
+CONFIG_MSM_PIL_GSS=y | |
+# CONFIG_MSM_PIL_PRONTO is not set | |
+CONFIG_MSM_SCM=y | |
+CONFIG_MSM_SUBSYSTEM_RESTART=y | |
+CONFIG_MSM_SYSMON_COMM=y | |
+CONFIG_MSM_MODEM_8960=y | |
+CONFIG_MSM_LPASS_8960=y | |
+CONFIG_MSM_SSR_INDEPENDENT=y | |
+# CONFIG_MSM_MODEM_SSR_ENABLE is not set | |
+# CONFIG_MSM_LPASS_SSR_ENABLE is not set | |
+# CONFIG_MSM_WCNSS_SSR_ENABLE is not set | |
+# CONFIG_MSM_WCNSS_SSR_8960 is not set | |
+# CONFIG_MSM_GSS_SSR_8064 is not set | |
+CONFIG_MSM_BUSPM_DEV=y | |
+# CONFIG_MSM_8X60_TZ_LOG is not set | |
+CONFIG_MSM_TZ_LOG=y | |
+CONFIG_MSM_RPM_LOG=y | |
+CONFIG_MSM_RPM_STATS_LOG=y | |
+CONFIG_MSM_DIRECT_SCLK_ACCESS=y | |
+CONFIG_IOMMU_API=y | |
+CONFIG_MSM_GPIOMUX=y | |
+CONFIG_MSM_NATIVE_RESTART=y | |
+CONFIG_MSM_PM8X60=y | |
+CONFIG_MSM_EVENT_TIMER=y | |
+CONFIG_MSM_BUS_SCALING=y | |
+CONFIG_MSM_BUS_RPM_MULTI_TIER_ENABLED=y | |
+# CONFIG_MSM_BUS_RPM_VDDCX_SCALING_ENABLED is not set | |
+CONFIG_MSM_WATCHDOG=y | |
+# CONFIG_MSM_WATCHDOG_V2 is not set | |
+# CONFIG_MSM_DLOAD_MODE is not set | |
+# CONFIG_MSM_JTAG is not set | |
+# CONFIG_MSM_SLEEP_STATS_DEVICE is not set | |
+CONFIG_MSM_RUN_QUEUE_STATS=y | |
+# CONFIG_MSM_STANDALONE_POWER_COLLAPSE is not set | |
+# CONFIG_MSM_GSBI9_UART is not set | |
+CONFIG_MSM_SHOW_RESUME_IRQ=y | |
+# CONFIG_SUPPORT_DQ_BATTERY is not set | |
+# CONFIG_MSM_FAKE_BATTERY is not set | |
+CONFIG_APQ8064_ONLY=y | |
+# CONFIG_MSM8960_ONLY is not set | |
+# CONFIG_MSM8930_ONLY is not set | |
+CONFIG_MSM_QDSP6_APR=y | |
+CONFIG_MSM_QDSP6_CODECS=y | |
+# CONFIG_MSM_QDSP6V2_CODECS is not set | |
+CONFIG_MSM_AUDIO_QDSP6=y | |
+# CONFIG_MSM_AUDIO_QDSP6V2 is not set | |
+CONFIG_MSM_ULTRASOUND=y | |
+# CONFIG_MSM_SPM_V1 is not set | |
+CONFIG_MSM_SPM_V2=y | |
+CONFIG_MSM_L2_SPM=y | |
+CONFIG_MSM_MULTIMEDIA_USE_ION=y | |
+# CONFIG_MSM_OCMEM is not set | |
+CONFIG_MSM_RTB=y | |
+CONFIG_MSM_RTB_SEPARATE_CPUS=y | |
+# CONFIG_MSM_EBI_ERP is not set | |
+CONFIG_MSM_CACHE_ERP=y | |
+CONFIG_MSM_L1_ERR_PANIC=y | |
+# CONFIG_MSM_L1_ERR_LOG is not set | |
+CONFIG_MSM_L2_ERP_PRINT_ACCESS_ERRORS=y | |
+# CONFIG_MSM_L2_ERP_PORT_PANIC is not set | |
+# CONFIG_MSM_L2_ERP_1BIT_PANIC is not set | |
+CONFIG_MSM_L2_ERP_2BIT_PANIC=y | |
+CONFIG_IGNORE_L2_FALSE_ALARM=y | |
+CONFIG_MSM_DCVS=y | |
+CONFIG_HAVE_ARCH_HAS_CURRENT_TIMER=y | |
+# CONFIG_MSM_CACHE_DUMP is not set | |
+# CONFIG_ACPU_CUSTOM_FREQ_SUPPORT is not set | |
+CONFIG_MSM_HSIC_SYSMON=y | |
+# CONFIG_MSM_HSIC_SYSMON_TEST is not set | |
+# CONFIG_MACH_DELUXE_J is not set | |
+CONFIG_MACH_IMPRESSION_J=y | |
+# CONFIG_MACH_M7_UL is not set | |
+# CONFIG_MACH_M7_DXG is not set | |
+# CONFIG_MACH_T6_DXG is not set | |
+# CONFIG_QSC_MODEM is not set | |
+CONFIG_SUPPORT_USB_SPEAKER=y | |
+CONFIG_SENSE_4_PLUS=y | |
+CONFIG_MSM_NONSMD_PACKET_FILTER=y | |
+# CONFIG_IO_FOOTPRINT is not set | |
+# CONFIG_BT_WBS_BRCM is not set | |
+CONFIG_HTC_POWEROFF_MODEM_IN_OFFMODE_CHARGING=y | |
+CONFIG_HTC_STORE_MODEM_RESET_INFO=y | |
+CONFIG_MSM_CPU_PWRCTL=y | |
+# CONFIG_IOEXTENDER is not set | |
+ | |
+# | |
+# System MMU | |
+# | |
+ | |
+# | |
+# Processor Type | |
+# | |
+CONFIG_CPU_V7=y | |
+CONFIG_CPU_32v6K=y | |
+CONFIG_CPU_32v7=y | |
+CONFIG_CPU_ABRT_EV7=y | |
+CONFIG_CPU_PABRT_V7=y | |
+CONFIG_CPU_CACHE_V7=y | |
+CONFIG_CPU_CACHE_VIPT=y | |
+CONFIG_CPU_COPY_V6=y | |
+CONFIG_CPU_TLB_V7=y | |
+CONFIG_CPU_HAS_ASID=y | |
+CONFIG_CPU_CP15=y | |
+CONFIG_CPU_CP15_MMU=y | |
+ | |
+# | |
+# Processor Features | |
+# | |
+# CONFIG_ARM_LPAE is not set | |
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | |
+CONFIG_ARM_THUMB=y | |
+CONFIG_ARM_THUMBEE=y | |
+CONFIG_SWP_EMULATE=y | |
+# CONFIG_CPU_ICACHE_DISABLE is not set | |
+# CONFIG_CPU_DCACHE_DISABLE is not set | |
+# CONFIG_CPU_BPREDICT_DISABLE is not set | |
+# CONFIG_CACHE_L2X0 is not set | |
+CONFIG_ARM_L1_CACHE_SHIFT_6=y | |
+CONFIG_ARM_L1_CACHE_SHIFT=6 | |
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y | |
+# CONFIG_VCM is not set | |
+CONFIG_STRICT_MEMORY_RWX=y | |
+CONFIG_ARM_NR_BANKS=8 | |
+# CONFIG_RESERVE_FIRST_PAGE is not set | |
+CONFIG_CPU_HAS_PMU=y | |
+CONFIG_MULTI_IRQ_HANDLER=y | |
+# CONFIG_ARM_ERRATA_430973 is not set | |
+# CONFIG_ARM_ERRATA_458693 is not set | |
+# CONFIG_ARM_ERRATA_460075 is not set | |
+# CONFIG_ARM_ERRATA_742230 is not set | |
+# CONFIG_ARM_ERRATA_742231 is not set | |
+# CONFIG_ARM_ERRATA_720789 is not set | |
+# CONFIG_ARM_ERRATA_743622 is not set | |
+# CONFIG_ARM_ERRATA_751472 is not set | |
+# CONFIG_ARM_ERRATA_754322 is not set | |
+# CONFIG_ARM_ERRATA_754327 is not set | |
+# CONFIG_ARM_ERRATA_764369 is not set | |
+# CONFIG_KSAPI is not set | |
+CONFIG_ARM_GIC=y | |
+# CONFIG_FIQ_DEBUGGER is not set | |
+ | |
+# | |
+# Bus support | |
+# | |
+# CONFIG_PCI is not set | |
+# CONFIG_PCI_SYSCALL is not set | |
+CONFIG_ARCH_SUPPORTS_MSI=y | |
+# CONFIG_PCCARD is not set | |
+ | |
+# | |
+# Kernel Features | |
+# | |
+# CONFIG_ASM_CODE_FOOTPRINT is not set | |
+CONFIG_TICK_ONESHOT=y | |
+CONFIG_NO_HZ=y | |
+CONFIG_HIGH_RES_TIMERS=y | |
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
+CONFIG_HAVE_SMP=y | |
+CONFIG_SMP=y | |
+# CONFIG_SMP_ON_UP is not set | |
+CONFIG_ARM_CPU_TOPOLOGY=y | |
+CONFIG_SCHED_MC=y | |
+# CONFIG_SCHED_SMT is not set | |
+CONFIG_HAVE_ARM_SCU=y | |
+# CONFIG_ARM_ARCH_TIMER is not set | |
+CONFIG_VMSPLIT_3G=y | |
+# CONFIG_VMSPLIT_2G is not set | |
+# CONFIG_VMSPLIT_1G is not set | |
+CONFIG_PAGE_OFFSET=0xC0000000 | |
+CONFIG_NR_CPUS=4 | |
+CONFIG_HOTPLUG_CPU=y | |
+CONFIG_LOCAL_TIMERS=y | |
+CONFIG_ARCH_NR_GPIO=0 | |
+# CONFIG_PREEMPT_NONE is not set | |
+# CONFIG_PREEMPT_VOLUNTARY is not set | |
+CONFIG_PREEMPT=y | |
+CONFIG_PREEMPT_COUNT=y | |
+CONFIG_HZ=100 | |
+CONFIG_SCHED_HRTICK=y | |
+# CONFIG_THUMB2_KERNEL is not set | |
+CONFIG_AEABI=y | |
+# CONFIG_OABI_COMPAT is not set | |
+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y | |
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | |
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | |
+CONFIG_HAVE_ARCH_PFN_VALID=y | |
+CONFIG_HIGHMEM=y | |
+# CONFIG_HIGHPTE is not set | |
+CONFIG_HW_PERF_EVENTS=y | |
+CONFIG_VMALLOC_RESERVE=0x19000000 | |
+CONFIG_SELECT_MEMORY_MODEL=y | |
+CONFIG_FLATMEM_MANUAL=y | |
+CONFIG_FLATMEM=y | |
+CONFIG_FLAT_NODE_MEM_MAP=y | |
+CONFIG_HAVE_MEMBLOCK=y | |
+CONFIG_PAGEFLAGS_EXTENDED=y | |
+CONFIG_SPLIT_PTLOCK_CPUS=4 | |
+CONFIG_COMPACTION=y | |
+CONFIG_MIGRATION=y | |
+# CONFIG_PHYS_ADDR_T_64BIT is not set | |
+CONFIG_ZONE_DMA_FLAG=0 | |
+CONFIG_BOUNCE=y | |
+CONFIG_VIRT_TO_BUS=y | |
+CONFIG_KSM=y | |
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
+CONFIG_CLEANCACHE=y | |
+# CONFIG_ARCH_MEMORY_PROBE is not set | |
+# CONFIG_ARCH_MEMORY_REMOVE is not set | |
+# CONFIG_ARCH_POPULATES_NODE_MAP is not set | |
+# CONFIG_ENABLE_DMM is not set | |
+# CONFIG_FIX_MOVABLE_ZONE is not set | |
+CONFIG_DONT_MAP_HOLE_AFTER_MEMBANK0=y | |
+# CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG is not set | |
+# CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE is not set | |
+CONFIG_FORCE_MAX_ZONEORDER=11 | |
+CONFIG_ALIGNMENT_TRAP=y | |
+# CONFIG_UACCESS_WITH_MEMCPY is not set | |
+# CONFIG_SECCOMP is not set | |
+CONFIG_CC_STACKPROTECTOR=y | |
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set | |
+CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y | |
+# CONFIG_CP_ACCESS is not set | |
+ | |
+# | |
+# Boot options | |
+# | |
+# CONFIG_USE_OF is not set | |
+CONFIG_ZBOOT_ROM_TEXT=0 | |
+CONFIG_ZBOOT_ROM_BSS=0 | |
+CONFIG_CMDLINE="" | |
+# CONFIG_XIP_KERNEL is not set | |
+# CONFIG_KEXEC is not set | |
+# CONFIG_CRASH_DUMP is not set | |
+# CONFIG_AUTO_ZRELADDR is not set | |
+ | |
+# | |
+# CPU Power Management | |
+# | |
+ | |
+# | |
+# CPU Frequency scaling | |
+# | |
+CONFIG_CPU_FREQ=y | |
+CONFIG_CPU_FREQ_TABLE=y | |
+CONFIG_CPU_FREQ_STAT=y | |
+CONFIG_CPU_FREQ_STAT_DETAILS=y | |
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | |
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | |
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | |
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | |
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | |
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set | |
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | |
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y | |
+CONFIG_CPU_FREQ_GOV_USERSPACE=y | |
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y | |
+# CONFIG_CPU_FREQ_GOV_ONDEMAND_2_PHASE=y | |
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y | |
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | |
+ | |
+# | |
+# ARM CPU frequency scaling drivers | |
+# | |
+# CONFIG_ARM_EXYNOS4210_CPUFREQ is not set | |
+# CONFIG_ARM_EXYNOS4X12_CPUFREQ is not set | |
+# CONFIG_ARM_EXYNOS5250_CPUFREQ is not set | |
+CONFIG_CPU_IDLE=y | |
+CONFIG_CPU_IDLE_GOV_LADDER=y | |
+CONFIG_CPU_IDLE_GOV_MENU=y | |
+CONFIG_CPU_FREQ_MSM=y | |
+ | |
+# | |
+# Floating point emulation | |
+# | |
+ | |
+# | |
+# At least one emulation must be selected | |
+# | |
+CONFIG_VFP=y | |
+CONFIG_VFPv3=y | |
+CONFIG_NEON=y | |
+ | |
+# | |
+# Userspace binary formats | |
+# | |
+CONFIG_BINFMT_ELF=y | |
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y | |
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y | |
+CONFIG_HAVE_AOUT=y | |
+# CONFIG_BINFMT_AOUT is not set | |
+# CONFIG_BINFMT_MISC is not set | |
+ | |
+# | |
+# Power management options | |
+# | |
+CONFIG_SUSPEND=y | |
+CONFIG_SUSPEND_FREEZER=y | |
+CONFIG_HAS_WAKELOCK=y | |
+CONFIG_HAS_EARLYSUSPEND=y | |
+CONFIG_WAKELOCK=y | |
+CONFIG_WAKELOCK_STAT=y | |
+CONFIG_USER_WAKELOCK=y | |
+CONFIG_EARLYSUSPEND=y | |
+CONFIG_SUSPEND_DISABLE_SPC=y | |
+CONFIG_EARLYSUSPEND_BOOST_CPU_SPEED=y | |
+# CONFIG_NO_SUSPEND is not set | |
+# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set | |
+CONFIG_FB_EARLYSUSPEND=y | |
+CONFIG_PM_SLEEP=y | |
+CONFIG_PM_SLEEP_SMP=y | |
+CONFIG_PM_RUNTIME=y | |
+CONFIG_PM=y | |
+# CONFIG_PM_DEBUG is not set | |
+# CONFIG_APM_EMULATION is not set | |
+CONFIG_PM_CLK=y | |
+CONFIG_CPU_PM=y | |
+# CONFIG_SUSPEND_TIME is not set | |
+# CONFIG_HTC_PNPMGR is not set | |
+# CONFIG_ADAPTIVE_TUNING is not set | |
+CONFIG_ARCH_SUSPEND_POSSIBLE=y | |
+CONFIG_ARM_CPU_SUSPEND=y | |
+CONFIG_NET=y | |
+ | |
+# | |
+# Networking options | |
+# | |
+CONFIG_PACKET=y | |
+CONFIG_UNIX=y | |
+# CONFIG_UNIX_DIAG is not set | |
+CONFIG_XFRM=y | |
+CONFIG_XFRM_USER=y | |
+# CONFIG_XFRM_SUB_POLICY is not set | |
+# CONFIG_XFRM_MIGRATE is not set | |
+# CONFIG_XFRM_STATISTICS is not set | |
+CONFIG_XFRM_IPCOMP=y | |
+CONFIG_NET_KEY=y | |
+# CONFIG_NET_KEY_MIGRATE is not set | |
+CONFIG_INET=y | |
+CONFIG_IP_MULTICAST=y | |
+CONFIG_IP_ADVANCED_ROUTER=y | |
+# CONFIG_IP_FIB_TRIE_STATS is not set | |
+CONFIG_IP_MULTIPLE_TABLES=y | |
+# CONFIG_IP_ROUTE_MULTIPATH is not set | |
+CONFIG_IP_ROUTE_VERBOSE=y | |
+CONFIG_IP_PNP=y | |
+CONFIG_IP_PNP_DHCP=y | |
+# CONFIG_IP_PNP_BOOTP is not set | |
+# CONFIG_IP_PNP_RARP is not set | |
+# CONFIG_NET_IPIP is not set | |
+# CONFIG_NET_IPGRE_DEMUX is not set | |
+# CONFIG_IP_MROUTE is not set | |
+# CONFIG_ARPD is not set | |
+# CONFIG_SYN_COOKIES is not set | |
+CONFIG_INET_AH=y | |
+CONFIG_INET_ESP=y | |
+# CONFIG_INET_IPCOMP is not set | |
+# CONFIG_INET_XFRM_TUNNEL is not set | |
+CONFIG_INET_TUNNEL=y | |
+CONFIG_INET_XFRM_MODE_TRANSPORT=y | |
+CONFIG_INET_XFRM_MODE_TUNNEL=y | |
+# CONFIG_INET_XFRM_MODE_BEET is not set | |
+# CONFIG_INET_LRO is not set | |
+CONFIG_INET_DIAG=y | |
+CONFIG_INET_TCP_DIAG=y | |
+# CONFIG_INET_UDP_DIAG is not set | |
+CONFIG_TCP_CONG_ADVANCED=y | |
+# CONFIG_TCP_CONG_BIC is not set | |
+CONFIG_TCP_CONG_CUBIC=y | |
+# CONFIG_TCP_CONG_WESTWOOD is not set | |
+# CONFIG_TCP_CONG_HTCP is not set | |
+# CONFIG_TCP_CONG_HSTCP is not set | |
+# CONFIG_TCP_CONG_HYBLA is not set | |
+# CONFIG_TCP_CONG_VEGAS is not set | |
+# CONFIG_TCP_CONG_SCALABLE is not set | |
+# CONFIG_TCP_CONG_LP is not set | |
+# CONFIG_TCP_CONG_VENO is not set | |
+# CONFIG_TCP_CONG_YEAH is not set | |
+# CONFIG_TCP_CONG_ILLINOIS is not set | |
+CONFIG_DEFAULT_CUBIC=y | |
+# CONFIG_DEFAULT_RENO is not set | |
+CONFIG_DEFAULT_TCP_CONG="cubic" | |
+# CONFIG_TCP_MD5SIG is not set | |
+# CONFIG_HTC_NETWORK_DEBUG is not set | |
+CONFIG_HTC_MONITOR=y | |
+CONFIG_IPV6=y | |
+CONFIG_IPV6_PRIVACY=y | |
+CONFIG_IPV6_ROUTER_PREF=y | |
+CONFIG_IPV6_ROUTE_INFO=y | |
+CONFIG_IPV6_OPTIMISTIC_DAD=y | |
+CONFIG_INET6_AH=y | |
+CONFIG_INET6_ESP=y | |
+CONFIG_INET6_IPCOMP=y | |
+CONFIG_IPV6_MIP6=y | |
+CONFIG_INET6_XFRM_TUNNEL=y | |
+CONFIG_INET6_TUNNEL=y | |
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y | |
+CONFIG_INET6_XFRM_MODE_TUNNEL=y | |
+CONFIG_INET6_XFRM_MODE_BEET=y | |
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | |
+CONFIG_IPV6_SIT=y | |
+# CONFIG_IPV6_SIT_6RD is not set | |
+CONFIG_IPV6_NDISC_NODETYPE=y | |
+# CONFIG_IPV6_TUNNEL is not set | |
+CONFIG_IPV6_MULTIPLE_TABLES=y | |
+CONFIG_IPV6_SUBTREES=y | |
+# CONFIG_IPV6_MROUTE is not set | |
+# CONFIG_NETLABEL is not set | |
+CONFIG_ANDROID_PARANOID_NETWORK=y | |
+CONFIG_NET_ACTIVITY_STATS=y | |
+CONFIG_NETWORK_SECMARK=y | |
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set | |
+CONFIG_NETFILTER=y | |
+# CONFIG_NETFILTER_DEBUG is not set | |
+CONFIG_NETFILTER_ADVANCED=y | |
+ | |
+# | |
+# Core Netfilter Configuration | |
+# | |
+CONFIG_NETFILTER_NETLINK=y | |
+# CONFIG_NETFILTER_NETLINK_ACCT is not set | |
+CONFIG_NETFILTER_NETLINK_QUEUE=y | |
+CONFIG_NETFILTER_NETLINK_LOG=y | |
+CONFIG_NF_CONNTRACK=y | |
+CONFIG_NF_CONNTRACK_MARK=y | |
+CONFIG_NF_CONNTRACK_SECMARK=y | |
+# CONFIG_NF_CONNTRACK_PROCFS is not set | |
+CONFIG_NF_CONNTRACK_EVENTS=y | |
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set | |
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set | |
+CONFIG_NF_CT_PROTO_DCCP=y | |
+CONFIG_NF_CT_PROTO_GRE=y | |
+CONFIG_NF_CT_PROTO_SCTP=y | |
+CONFIG_NF_CT_PROTO_UDPLITE=y | |
+CONFIG_NF_CONNTRACK_AMANDA=y | |
+CONFIG_NF_CONNTRACK_FTP=y | |
+CONFIG_NF_CONNTRACK_H323=y | |
+CONFIG_NF_CONNTRACK_IRC=y | |
+CONFIG_NF_CONNTRACK_BROADCAST=y | |
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y | |
+# CONFIG_NF_CONNTRACK_SNMP is not set | |
+CONFIG_NF_CONNTRACK_PPTP=y | |
+CONFIG_NF_CONNTRACK_SANE=y | |
+CONFIG_NF_CONNTRACK_SIP=y | |
+CONFIG_NF_CONNTRACK_TFTP=y | |
+CONFIG_NF_CT_NETLINK=y | |
+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set | |
+CONFIG_NETFILTER_TPROXY=y | |
+CONFIG_NETFILTER_XTABLES=y | |
+ | |
+# | |
+# Xtables combined modules | |
+# | |
+CONFIG_NETFILTER_XT_MARK=y | |
+CONFIG_NETFILTER_XT_CONNMARK=y | |
+ | |
+# | |
+# Xtables targets | |
+# | |
+# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set | |
+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set | |
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y | |
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y | |
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y | |
+# CONFIG_NETFILTER_XT_TARGET_CT is not set | |
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set | |
+CONFIG_NETFILTER_XT_TARGET_HL=y | |
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y | |
+# CONFIG_NETFILTER_XT_TARGET_LED is not set | |
+CONFIG_NETFILTER_XT_TARGET_LOG=y | |
+CONFIG_NETFILTER_XT_TARGET_MARK=y | |
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y | |
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y | |
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=y | |
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | |
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set | |
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y | |
+CONFIG_NETFILTER_XT_TARGET_TRACE=y | |
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y | |
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y | |
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | |
+ | |
+# | |
+# Xtables matches | |
+# | |
+# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set | |
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | |
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y | |
+# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set | |
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y | |
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y | |
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y | |
+# CONFIG_NETFILTER_XT_MATCH_CPU is not set | |
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set | |
+# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set | |
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set | |
+CONFIG_NETFILTER_XT_MATCH_ECN=y | |
+CONFIG_NETFILTER_XT_MATCH_ESP=y | |
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y | |
+CONFIG_NETFILTER_XT_MATCH_HELPER=y | |
+CONFIG_NETFILTER_XT_MATCH_HL=y | |
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y | |
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y | |
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y | |
+CONFIG_NETFILTER_XT_MATCH_MAC=y | |
+CONFIG_NETFILTER_XT_MATCH_MARK=y | |
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y | |
+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set | |
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set | |
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set | |
+CONFIG_NETFILTER_XT_MATCH_POLICY=y | |
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y | |
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y | |
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y | |
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y | |
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y | |
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | |
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set | |
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set | |
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set | |
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y | |
+CONFIG_NETFILTER_XT_MATCH_STATE=y | |
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y | |
+CONFIG_NETFILTER_XT_MATCH_STRING=y | |
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=y | |
+CONFIG_NETFILTER_XT_MATCH_TIME=y | |
+CONFIG_NETFILTER_XT_MATCH_U32=y | |
+# CONFIG_IP_SET is not set | |
+# CONFIG_IP_VS is not set | |
+ | |
+# | |
+# IP: Netfilter Configuration | |
+# | |
+CONFIG_NF_DEFRAG_IPV4=y | |
+CONFIG_NF_CONNTRACK_IPV4=y | |
+# CONFIG_IP_NF_QUEUE is not set | |
+CONFIG_IP_NF_IPTABLES=y | |
+CONFIG_IP_NF_MATCH_AH=y | |
+CONFIG_IP_NF_MATCH_ECN=y | |
+# CONFIG_IP_NF_MATCH_RPFILTER is not set | |
+CONFIG_IP_NF_MATCH_TTL=y | |
+CONFIG_IP_NF_FILTER=y | |
+CONFIG_IP_NF_TARGET_REJECT=y | |
+# CONFIG_IP_NF_TARGET_REJECT_SKERR is not set | |
+# CONFIG_IP_NF_TARGET_ULOG is not set | |
+CONFIG_NF_NAT=y | |
+CONFIG_NF_NAT_NEEDED=y | |
+CONFIG_IP_NF_TARGET_MASQUERADE=y | |
+CONFIG_IP_NF_TARGET_NETMAP=y | |
+CONFIG_IP_NF_TARGET_REDIRECT=y | |
+CONFIG_NF_NAT_PROTO_DCCP=y | |
+CONFIG_NF_NAT_PROTO_GRE=y | |
+CONFIG_NF_NAT_PROTO_UDPLITE=y | |
+CONFIG_NF_NAT_PROTO_SCTP=y | |
+CONFIG_NF_NAT_FTP=y | |
+CONFIG_NF_NAT_IRC=y | |
+CONFIG_NF_NAT_TFTP=y | |
+CONFIG_NF_NAT_AMANDA=y | |
+CONFIG_NF_NAT_PPTP=y | |
+CONFIG_NF_NAT_H323=y | |
+CONFIG_NF_NAT_SIP=y | |
+CONFIG_IP_NF_MANGLE=y | |
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set | |
+# CONFIG_IP_NF_TARGET_ECN is not set | |
+# CONFIG_IP_NF_TARGET_TTL is not set | |
+CONFIG_IP_NF_RAW=y | |
+CONFIG_IP_NF_SECURITY=y | |
+CONFIG_IP_NF_ARPTABLES=y | |
+CONFIG_IP_NF_ARPFILTER=y | |
+CONFIG_IP_NF_ARP_MANGLE=y | |
+ | |
+# | |
+# IPv6: Netfilter Configuration | |
+# | |
+CONFIG_NF_DEFRAG_IPV6=y | |
+CONFIG_NF_CONNTRACK_IPV6=y | |
+# CONFIG_IP6_NF_QUEUE is not set | |
+CONFIG_IP6_NF_IPTABLES=y | |
+CONFIG_IP6_NF_MATCH_AH=y | |
+CONFIG_IP6_NF_MATCH_EUI64=y | |
+CONFIG_IP6_NF_MATCH_FRAG=y | |
+CONFIG_IP6_NF_MATCH_OPTS=y | |
+CONFIG_IP6_NF_MATCH_HL=y | |
+CONFIG_IP6_NF_MATCH_IPV6HEADER=y | |
+CONFIG_IP6_NF_MATCH_MH=y | |
+# CONFIG_IP6_NF_MATCH_RPFILTER is not set | |
+CONFIG_IP6_NF_MATCH_RT=y | |
+CONFIG_IP6_NF_TARGET_HL=y | |
+CONFIG_IP6_NF_FILTER=y | |
+CONFIG_IP6_NF_TARGET_REJECT=y | |
+# CONFIG_IP6_NF_TARGET_REJECT_SKERR is not set | |
+CONFIG_IP6_NF_MANGLE=y | |
+CONFIG_IP6_NF_RAW=y | |
+# CONFIG_IP6_NF_SECURITY is not set | |
+# CONFIG_IP_DCCP is not set | |
+# CONFIG_IP_SCTP is not set | |
+# CONFIG_RDS is not set | |
+# CONFIG_TIPC is not set | |
+# CONFIG_ATM is not set | |
+# CONFIG_L2TP is not set | |
+# CONFIG_BRIDGE is not set | |
+# CONFIG_NET_DSA is not set | |
+# CONFIG_VLAN_8021Q is not set | |
+# CONFIG_DECNET is not set | |
+# CONFIG_LLC2 is not set | |
+# CONFIG_IPX is not set | |
+# CONFIG_ATALK is not set | |
+# CONFIG_X25 is not set | |
+# CONFIG_LAPB is not set | |
+# CONFIG_ECONET is not set | |
+# CONFIG_WAN_ROUTER is not set | |
+# CONFIG_PHONET is not set | |
+# CONFIG_IEEE802154 is not set | |
+CONFIG_NET_SCHED=y | |
+ | |
+# | |
+# Queueing/Scheduling | |
+# | |
+# CONFIG_NET_SCH_CBQ is not set | |
+CONFIG_NET_SCH_HTB=y | |
+# CONFIG_NET_SCH_HFSC is not set | |
+CONFIG_NET_SCH_PRIO=y | |
+# CONFIG_NET_SCH_MULTIQ is not set | |
+# CONFIG_NET_SCH_RED is not set | |
+# CONFIG_NET_SCH_SFB is not set | |
+# CONFIG_NET_SCH_SFQ is not set | |
+# CONFIG_NET_SCH_TEQL is not set | |
+# CONFIG_NET_SCH_TBF is not set | |
+# CONFIG_NET_SCH_GRED is not set | |
+# CONFIG_NET_SCH_DSMARK is not set | |
+# CONFIG_NET_SCH_NETEM is not set | |
+# CONFIG_NET_SCH_DRR is not set | |
+# CONFIG_NET_SCH_MQPRIO is not set | |
+# CONFIG_NET_SCH_CHOKE is not set | |
+# CONFIG_NET_SCH_QFQ is not set | |
+# CONFIG_NET_SCH_INGRESS is not set | |
+# CONFIG_NET_SCH_PLUG is not set | |
+ | |
+# | |
+# Classification | |
+# | |
+CONFIG_NET_CLS=y | |
+# CONFIG_NET_CLS_BASIC is not set | |
+# CONFIG_NET_CLS_TCINDEX is not set | |
+# CONFIG_NET_CLS_ROUTE4 is not set | |
+CONFIG_NET_CLS_FW=y | |
+CONFIG_NET_CLS_U32=y | |
+# CONFIG_CLS_U32_PERF is not set | |
+CONFIG_CLS_U32_MARK=y | |
+# CONFIG_NET_CLS_RSVP is not set | |
+# CONFIG_NET_CLS_RSVP6 is not set | |
+CONFIG_NET_CLS_FLOW=y | |
+# CONFIG_NET_CLS_CGROUP is not set | |
+CONFIG_NET_EMATCH=y | |
+CONFIG_NET_EMATCH_STACK=32 | |
+CONFIG_NET_EMATCH_CMP=y | |
+CONFIG_NET_EMATCH_NBYTE=y | |
+CONFIG_NET_EMATCH_U32=y | |
+CONFIG_NET_EMATCH_META=y | |
+CONFIG_NET_EMATCH_TEXT=y | |
+CONFIG_NET_CLS_ACT=y | |
+# CONFIG_NET_ACT_POLICE is not set | |
+# CONFIG_NET_ACT_GACT is not set | |
+# CONFIG_NET_ACT_MIRRED is not set | |
+# CONFIG_NET_ACT_IPT is not set | |
+# CONFIG_NET_ACT_NAT is not set | |
+# CONFIG_NET_ACT_PEDIT is not set | |
+# CONFIG_NET_ACT_SIMP is not set | |
+# CONFIG_NET_ACT_SKBEDIT is not set | |
+# CONFIG_NET_ACT_CSUM is not set | |
+# CONFIG_NET_CLS_IND is not set | |
+CONFIG_NET_SCH_FIFO=y | |
+# CONFIG_DCB is not set | |
+CONFIG_DNS_RESOLVER=y | |
+# CONFIG_BATMAN_ADV is not set | |
+# CONFIG_OPENVSWITCH is not set | |
+CONFIG_RPS=y | |
+CONFIG_RFS_ACCEL=y | |
+CONFIG_XPS=y | |
+# CONFIG_NETPRIO_CGROUP is not set | |
+CONFIG_BQL=y | |
+CONFIG_HAVE_BPF_JIT=y | |
+ | |
+# | |
+# Network testing | |
+# | |
+# CONFIG_NET_PKTGEN is not set | |
+# CONFIG_NET_DROP_MONITOR is not set | |
+# CONFIG_METRICO_TP is not set | |
+# CONFIG_HTC_NETWORK_MODIFY is not set | |
+# CONFIG_HAMRADIO is not set | |
+# CONFIG_CAN is not set | |
+# CONFIG_IRDA is not set | |
+CONFIG_BT=y | |
+CONFIG_BT_RFCOMM=y | |
+CONFIG_BT_RFCOMM_TTY=y | |
+CONFIG_BT_BNEP=y | |
+CONFIG_BT_BNEP_MC_FILTER=y | |
+CONFIG_BT_BNEP_PROTO_FILTER=y | |
+CONFIG_BT_HIDP=y | |
+ | |
+# | |
+# Bluetooth device drivers | |
+# | |
+CONFIG_BT_HCISMD=y | |
+# CONFIG_BT_HCIBTUSB is not set | |
+# CONFIG_BT_HCIBTSDIO is not set | |
+CONFIG_BT_HCIUART=y | |
+CONFIG_BT_HCIUART_H4=y | |
+# CONFIG_BT_HCIUART_BCSP is not set | |
+# CONFIG_BT_HCIUART_ATH3K is not set | |
+# CONFIG_BT_HCIUART_LL is not set | |
+# CONFIG_BT_HCIUART_IBS is not set | |
+# CONFIG_BT_HCIBCM203X is not set | |
+# CONFIG_BT_HCIBPA10X is not set | |
+# CONFIG_BT_MSM_SLEEP is not set | |
+# CONFIG_BT_HCIBFUSB is not set | |
+# CONFIG_BT_HCIVHCI is not set | |
+# CONFIG_BT_MRVL is not set | |
+CONFIG_MSM_BT_POWER=m | |
+CONFIG_BT_HID_BRCM=y | |
+# CONFIG_AF_RXRPC is not set | |
+CONFIG_FIB_RULES=y | |
+CONFIG_WIRELESS=y | |
+CONFIG_WIRELESS_EXT=y | |
+CONFIG_WEXT_CORE=y | |
+CONFIG_WEXT_PROC=y | |
+CONFIG_WEXT_PRIV=y | |
+CONFIG_CFG80211=y | |
+# CONFIG_NL80211_TESTMODE is not set | |
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | |
+# CONFIG_CFG80211_REG_DEBUG is not set | |
+CONFIG_CFG80211_DEFAULT_PS=y | |
+# CONFIG_CFG80211_DEBUGFS is not set | |
+# CONFIG_CFG80211_INTERNAL_REGDB is not set | |
+CONFIG_CFG80211_WEXT=y | |
+# CONFIG_WIRELESS_EXT_SYSFS is not set | |
+# CONFIG_LIB80211 is not set | |
+# CONFIG_CFG80211_ALLOW_RECONNECT is not set | |
+# CONFIG_MAC80211 is not set | |
+# CONFIG_WIMAX is not set | |
+CONFIG_RFKILL=y | |
+CONFIG_RFKILL_PM=y | |
+CONFIG_RFKILL_LEDS=y | |
+# CONFIG_RFKILL_INPUT is not set | |
+# CONFIG_RFKILL_REGULATOR is not set | |
+# CONFIG_RFKILL_GPIO is not set | |
+# CONFIG_NET_9P is not set | |
+# CONFIG_CAIF is not set | |
+# CONFIG_CEPH_LIB is not set | |
+# CONFIG_NFC is not set | |
+ | |
+# | |
+# Device Drivers | |
+# | |
+ | |
+# | |
+# Generic Driver Options | |
+# | |
+CONFIG_UEVENT_HELPER_PATH="" | |
+# CONFIG_DEVTMPFS is not set | |
+CONFIG_STANDALONE=y | |
+CONFIG_PREVENT_FIRMWARE_BUILD=y | |
+CONFIG_FW_LOADER=y | |
+CONFIG_FIRMWARE_IN_KERNEL=y | |
+CONFIG_EXTRA_FIRMWARE="" | |
+# CONFIG_DEBUG_DRIVER is not set | |
+# CONFIG_DEBUG_DEVRES is not set | |
+# CONFIG_SYS_HYPERVISOR is not set | |
+# CONFIG_GENERIC_CPU_DEVICES is not set | |
+CONFIG_SOC_BUS=y | |
+CONFIG_REGMAP=y | |
+CONFIG_REGMAP_I2C=y | |
+CONFIG_REGMAP_SPI=y | |
+CONFIG_DMA_SHARED_BUFFER=y | |
+CONFIG_GENLOCK=y | |
+CONFIG_GENLOCK_MISCDEVICE=y | |
+CONFIG_SYNC=y | |
+CONFIG_SW_SYNC=y | |
+# CONFIG_SW_SYNC_USER is not set | |
+# CONFIG_CMA is not set | |
+# CONFIG_CONNECTOR is not set | |
+# CONFIG_MTD is not set | |
+# CONFIG_PARPORT is not set | |
+CONFIG_BLK_DEV=y | |
+# CONFIG_BLK_DEV_COW_COMMON is not set | |
+CONFIG_BLK_DEV_LOOP=y | |
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 | |
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set | |
+ | |
+# | |
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected | |
+# | |
+# CONFIG_BLK_DEV_NBD is not set | |
+# CONFIG_BLK_DEV_UB is not set | |
+CONFIG_BLK_DEV_RAM=y | |
+CONFIG_BLK_DEV_RAM_COUNT=16 | |
+CONFIG_BLK_DEV_RAM_SIZE=4096 | |
+# CONFIG_BLK_DEV_XIP is not set | |
+# CONFIG_CDROM_PKTCDVD is not set | |
+# CONFIG_ATA_OVER_ETH is not set | |
+# CONFIG_MG_DISK is not set | |
+# CONFIG_BLK_DEV_RBD is not set | |
+ | |
+# | |
+# Misc devices | |
+# | |
+# CONFIG_SENSORS_LIS3LV02D is not set | |
+# CONFIG_AD525X_DPOT is not set | |
+CONFIG_ANDROID_PMEM=y | |
+# CONFIG_ATMEL_PWM is not set | |
+# CONFIG_ICS932S401 is not set | |
+# CONFIG_ENCLOSURE_SERVICES is not set | |
+# CONFIG_APDS9802ALS is not set | |
+# CONFIG_ISL29003 is not set | |
+# CONFIG_ISL29020 is not set | |
+# CONFIG_SENSORS_TSL2550 is not set | |
+# CONFIG_SENSORS_BH1780 is not set | |
+# CONFIG_SENSORS_BH1770 is not set | |
+# CONFIG_SENSORS_APDS990X is not set | |
+# CONFIG_HMC6352 is not set | |
+# CONFIG_SENSORS_AK8975 is not set | |
+# CONFIG_DS1682 is not set | |
+# CONFIG_TI_DAC7512 is not set | |
+CONFIG_UID_STAT=y | |
+# CONFIG_BMP085 is not set | |
+# CONFIG_USB_SWITCH_FSA9480 is not set | |
+# CONFIG_WL127X_RFKILL is not set | |
+# CONFIG_APANIC is not set | |
+CONFIG_TSIF=y | |
+# CONFIG_TSIF_CHRDEV is not set | |
+CONFIG_TSIF_NM32X_62X_DEV=y | |
+# CONFIG_TSIF_DEBUG is not set | |
+# CONFIG_TSPP is not set | |
+# CONFIG_HAPTIC_ISA1200 is not set | |
+# CONFIG_PMIC8XXX_VIBRATOR is not set | |
+CONFIG_PMIC8XXX_VIBRATOR_PWM=y | |
+# CONFIG_PMIC8XXX_NFC is not set | |
+# CONFIG_PMIC8XXX_UPL is not set | |
+CONFIG_QSEECOM=y | |
+# CONFIG_QFP_FUSE is not set | |
+CONFIG_CABLE_DETECT_ACCESSORY=y | |
+# CONFIG_CABLE_DETECT_ACCESSORY_BY_ADC is not set | |
+# CONFIG_USB_HSIC_SMSC_HUB is not set | |
+CONFIG_CABLE_DETECT_8XXX=y | |
+CONFIG_KDDI_ADAPTER=y | |
+# CONFIG_RESET_BY_CABLE_IN is not set | |
+# CONFIG_C2PORT is not set | |
+ | |
+# | |
+# EEPROM support | |
+# | |
+# CONFIG_EEPROM_AT24 is not set | |
+# CONFIG_EEPROM_AT25 is not set | |
+# CONFIG_EEPROM_LEGACY is not set | |
+# CONFIG_EEPROM_MAX6875 is not set | |
+CONFIG_EEPROM_93CX6=y | |
+# CONFIG_EEPROM_93XX46 is not set | |
+# CONFIG_IWMC3200TOP is not set | |
+ | |
+# | |
+# Texas Instruments shared transport line discipline | |
+# | |
+# CONFIG_TI_ST is not set | |
+# CONFIG_SENSORS_LIS3_SPI is not set | |
+# CONFIG_SENSORS_LIS3_I2C is not set | |
+CONFIG_MPU_SENSORS_MPU3050=y | |
+# CONFIG_MPU_SENSORS_ACCELEROMETER_NONE is not set | |
+# CONFIG_MPU_SENSORS_ADXL346 is not set | |
+# CONFIG_MPU_SENSORS_BMA150 is not set | |
+CONFIG_MPU_SENSORS_BMA250=y | |
+# CONFIG_MPU_SENSORS_BMA222 is not set | |
+# CONFIG_MPU_SENSORS_KXSD9 is not set | |
+# CONFIG_MPU_SENSORS_KXTF9 is not set | |
+# CONFIG_MPU_SENSORS_LIS331DLH is not set | |
+# CONFIG_MPU_SENSORS_LIS3DH is not set | |
+# CONFIG_MPU_SENSORS_LSM303DLHA is not set | |
+# CONFIG_MPU_SENSORS_MMA8450 is not set | |
+# CONFIG_MPU_SENSORS_MMA845X is not set | |
+# CONFIG_MPU_SENSORS_COMPASS_NONE is not set | |
+# CONFIG_MPU_SENSORS_AK8975 is not set | |
+CONFIG_MPU_SENSORS_AK8963=y | |
+# CONFIG_MPU_SENSORS_MMC314X is not set | |
+# CONFIG_MPU_SENSORS_AMI30X is not set | |
+# CONFIG_MPU_SENSORS_HMC5883 is not set | |
+# CONFIG_MPU_SENSORS_LSM303DLHM is not set | |
+# CONFIG_MPU_SENSORS_YAS529 is not set | |
+# CONFIG_MPU_SENSORS_HSCDTD002B is not set | |
+# CONFIG_MPU_SENSORS_HSCDTD004A is not set | |
+CONFIG_MPU_SENSORS_TIMERIRQ=y | |
+# CONFIG_MPU_SENSORS_DEBUG is not set | |
+ | |
+# | |
+# Altera FPGA firmware download module | |
+# | |
+# CONFIG_ALTERA_STAPL is not set | |
+ | |
+# | |
+# Vadality finger printer SPI driver | |
+# | |
+# CONFIG_FPR_SPI is not set | |
+# CONFIG_FPR_SPI_DMA_GSBI1 is not set | |
+# CONFIG_FPR_SPI_DMA_GSBI5 is not set | |
+ | |
+# | |
+# SCSI device support | |
+# | |
+CONFIG_SCSI_MOD=y | |
+# CONFIG_RAID_ATTRS is not set | |
+CONFIG_SCSI=y | |
+CONFIG_SCSI_DMA=y | |
+CONFIG_SCSI_TGT=y | |
+# CONFIG_SCSI_NETLINK is not set | |
+CONFIG_SCSI_PROC_FS=y | |
+ | |
+# | |
+# SCSI support type (disk, tape, CD-ROM) | |
+# | |
+CONFIG_BLK_DEV_SD=y | |
+# CONFIG_CHR_DEV_ST is not set | |
+# CONFIG_CHR_DEV_OSST is not set | |
+# CONFIG_BLK_DEV_SR is not set | |
+CONFIG_CHR_DEV_SG=y | |
+CONFIG_CHR_DEV_SCH=y | |
+CONFIG_SCSI_MULTI_LUN=y | |
+CONFIG_SCSI_CONSTANTS=y | |
+# CONFIG_SCSI_LOGGING is not set | |
+CONFIG_SCSI_SCAN_ASYNC=y | |
+ | |
+# | |
+# SCSI Transports | |
+# | |
+# CONFIG_SCSI_SPI_ATTRS is not set | |
+# CONFIG_SCSI_FC_ATTRS is not set | |
+# CONFIG_SCSI_ISCSI_ATTRS is not set | |
+# CONFIG_SCSI_SAS_ATTRS is not set | |
+# CONFIG_SCSI_SAS_LIBSAS is not set | |
+# CONFIG_SCSI_SRP_ATTRS is not set | |
+CONFIG_SCSI_LOWLEVEL=y | |
+# CONFIG_ISCSI_TCP is not set | |
+# CONFIG_ISCSI_BOOT_SYSFS is not set | |
+# CONFIG_LIBFC is not set | |
+# CONFIG_LIBFCOE is not set | |
+# CONFIG_SCSI_DEBUG is not set | |
+# CONFIG_SCSI_DH is not set | |
+# CONFIG_SCSI_OSD_INITIATOR is not set | |
+# CONFIG_ATA is not set | |
+CONFIG_MD=y | |
+# CONFIG_BLK_DEV_MD is not set | |
+CONFIG_BLK_DEV_DM=y | |
+# CONFIG_DM_DEBUG is not set | |
+CONFIG_DM_CRYPT=y | |
+# CONFIG_DM_SNAPSHOT is not set | |
+# CONFIG_DM_THIN_PROVISIONING is not set | |
+# CONFIG_DM_MIRROR is not set | |
+# CONFIG_DM_RAID is not set | |
+# CONFIG_DM_ZERO is not set | |
+# CONFIG_DM_MULTIPATH is not set | |
+# CONFIG_DM_DELAY is not set | |
+# CONFIG_DM_UEVENT is not set | |
+# CONFIG_DM_FLAKEY is not set | |
+# CONFIG_DM_VERITY is not set | |
+# CONFIG_TARGET_CORE is not set | |
+CONFIG_NETDEVICES=y | |
+CONFIG_NET_CORE=y | |
+# CONFIG_BONDING is not set | |
+CONFIG_DUMMY=y | |
+# CONFIG_EQUALIZER is not set | |
+CONFIG_MII=y | |
+# CONFIG_IFB is not set | |
+# CONFIG_NET_TEAM is not set | |
+# CONFIG_MACVLAN is not set | |
+# CONFIG_NETCONSOLE is not set | |
+# CONFIG_NETPOLL is not set | |
+# CONFIG_NET_POLL_CONTROLLER is not set | |
+CONFIG_TUN=y | |
+# CONFIG_VETH is not set | |
+ | |
+# | |
+# CAIF transport drivers | |
+# | |
+CONFIG_ETHERNET=y | |
+CONFIG_NET_VENDOR_BROADCOM=y | |
+# CONFIG_B44 is not set | |
+# CONFIG_NET_CALXEDA_XGMAC is not set | |
+CONFIG_NET_VENDOR_CHELSIO=y | |
+CONFIG_NET_VENDOR_CIRRUS=y | |
+# CONFIG_CS89x0 is not set | |
+# CONFIG_DM9000 is not set | |
+# CONFIG_DNET is not set | |
+CONFIG_NET_VENDOR_FARADAY=y | |
+# CONFIG_FTMAC100 is not set | |
+# CONFIG_FTGMAC100 is not set | |
+CONFIG_NET_VENDOR_INTEL=y | |
+CONFIG_NET_VENDOR_I825XX=y | |
+CONFIG_NET_VENDOR_MARVELL=y | |
+CONFIG_NET_VENDOR_MICREL=y | |
+CONFIG_KS8851=y | |
+# CONFIG_KS8851_MLL is not set | |
+CONFIG_NET_VENDOR_MICROCHIP=y | |
+# CONFIG_ENC28J60 is not set | |
+# CONFIG_MSM_RMNET is not set | |
+CONFIG_MSM_RMNET_BAM=y | |
+# CONFIG_QFEC is not set | |
+CONFIG_NET_VENDOR_NATSEMI=y | |
+CONFIG_NET_VENDOR_8390=y | |
+# CONFIG_AX88796 is not set | |
+# CONFIG_ETHOC is not set | |
+CONFIG_NET_VENDOR_SEEQ=y | |
+# CONFIG_SEEQ8005 is not set | |
+CONFIG_NET_VENDOR_SMSC=y | |
+CONFIG_SMC91X=y | |
+CONFIG_SMC911X=y | |
+CONFIG_SMSC911X=y | |
+# CONFIG_SMSC911X_ARCH_HOOKS is not set | |
+CONFIG_NET_VENDOR_STMICRO=y | |
+# CONFIG_STMMAC_ETH is not set | |
+CONFIG_PHYLIB=y | |
+ | |
+# | |
+# MII PHY device drivers | |
+# | |
+# CONFIG_AMD_PHY is not set | |
+# CONFIG_MARVELL_PHY is not set | |
+# CONFIG_DAVICOM_PHY is not set | |
+# CONFIG_QSEMI_PHY is not set | |
+# CONFIG_LXT_PHY is not set | |
+# CONFIG_CICADA_PHY is not set | |
+# CONFIG_VITESSE_PHY is not set | |
+# CONFIG_SMSC_PHY is not set | |
+# CONFIG_BROADCOM_PHY is not set | |
+# CONFIG_ICPLUS_PHY is not set | |
+# CONFIG_REALTEK_PHY is not set | |
+# CONFIG_NATIONAL_PHY is not set | |
+# CONFIG_STE10XP is not set | |
+# CONFIG_LSI_ET1011C_PHY is not set | |
+# CONFIG_MICREL_PHY is not set | |
+# CONFIG_FIXED_PHY is not set | |
+# CONFIG_MDIO_BITBANG is not set | |
+# CONFIG_MICREL_KS8995MA is not set | |
+CONFIG_PPP=y | |
+CONFIG_PPP_BSDCOMP=y | |
+CONFIG_PPP_DEFLATE=y | |
+CONFIG_PPP_FILTER=y | |
+CONFIG_PPP_MPPE=y | |
+# CONFIG_PPP_MULTILINK is not set | |
+CONFIG_PPPOE=y | |
+CONFIG_PPPOLAC=y | |
+CONFIG_PPPOPNS=y | |
+CONFIG_PPP_ASYNC=y | |
+CONFIG_PPP_SYNC_TTY=y | |
+CONFIG_SLIP=y | |
+CONFIG_SLHC=y | |
+CONFIG_SLIP_COMPRESSED=y | |
+# CONFIG_SLIP_SMART is not set | |
+CONFIG_SLIP_MODE_SLIP6=y | |
+ | |
+# | |
+# USB Network Adapters | |
+# | |
+# CONFIG_USB_CATC is not set | |
+# CONFIG_USB_KAWETH is not set | |
+# CONFIG_USB_PEGASUS is not set | |
+# CONFIG_USB_RTL8150 is not set | |
+CONFIG_USB_USBNET=y | |
+CONFIG_USB_NET_AX8817X=y | |
+CONFIG_USB_NET_CDCETHER=y | |
+# CONFIG_USB_NET_CDC_EEM is not set | |
+CONFIG_USB_NET_CDC_NCM=y | |
+# CONFIG_USB_NET_DM9601 is not set | |
+# CONFIG_USB_NET_SMSC75XX is not set | |
+# CONFIG_USB_NET_SMSC95XX is not set | |
+# CONFIG_USB_NET_GL620A is not set | |
+CONFIG_USB_NET_NET1080=y | |
+# CONFIG_USB_NET_PLUSB is not set | |
+# CONFIG_USB_NET_MCS7830 is not set | |
+# CONFIG_USB_NET_RNDIS_HOST is not set | |
+CONFIG_USB_NET_CDC_SUBSET=y | |
+# CONFIG_USB_ALI_M5632 is not set | |
+# CONFIG_USB_AN2720 is not set | |
+CONFIG_USB_BELKIN=y | |
+CONFIG_USB_ARMLINUX=y | |
+# CONFIG_USB_EPSON2888 is not set | |
+# CONFIG_USB_KC2190 is not set | |
+CONFIG_USB_NET_ZAURUS=y | |
+# CONFIG_USB_NET_CX82310_ETH is not set | |
+# CONFIG_USB_NET_KALMIA is not set | |
+# CONFIG_USB_NET_QMI_WWAN is not set | |
+# CONFIG_USB_HSO is not set | |
+# CONFIG_USB_NET_INT51X1 is not set | |
+# CONFIG_USB_IPHETH is not set | |
+# CONFIG_USB_SIERRA_NET is not set | |
+# CONFIG_USB_VL600 is not set | |
+CONFIG_MSM_RMNET_USB=y | |
+CONFIG_WLAN=y | |
+# CONFIG_USB_ZD1201 is not set | |
+# CONFIG_USB_NET_RNDIS_WLAN is not set | |
+# CONFIG_LIBRA_SDIOIF is not set | |
+# CONFIG_ATH6K_LEGACY_EXT is not set | |
+# CONFIG_WCNSS_CORE is not set | |
+# CONFIG_QUALCOMM_WLAN is not set | |
+# CONFIG_ATH_COMMON is not set | |
+# CONFIG_BCMDHD_4334_MCC=y | |
+CONFIG_BCMDHD_FW_PATH="/system/etc/firmware/fw_bcm4334.bin" | |
+CONFIG_BCMDHD_NVRAM_PATH="/etc/calibration" | |
+# CONFIG_DHD_USE_STATIC_BUF is not set | |
+# CONFIG_DHD_USE_SCHED_SCAN is not set | |
+# CONFIG_BRCMFMAC is not set | |
+# CONFIG_HOSTAP is not set | |
+# CONFIG_IWM is not set | |
+# CONFIG_LIBERTAS is not set | |
+# CONFIG_MWIFIEX is not set | |
+# CONFIG_BCMDHD_4330 is not set | |
+# CONFIG_HTC_IGNORE_SKB_ALIGNMENT is not set | |
+# CONFIG_BCMDHD_4334 is not set | |
+# CONFIG_BCMDHD_4335 is not set | |
+# CONFIG_BCMDHD_4335_MCC is not set | |
+CONFIG_BCMDHD_4334_MCC=y | |
+ | |
+# | |
+# Enable WiMAX (Networking options) to see the WiMAX drivers | |
+# | |
+# CONFIG_WAN is not set | |
+# CONFIG_HTC_TCP_SYN_FAIL is not set | |
+# CONFIG_KINETO_GAN is not set | |
+# CONFIG_ISDN is not set | |
+ | |
+# | |
+# Input device support | |
+# | |
+CONFIG_INPUT=y | |
+# CONFIG_INPUT_FF_MEMLESS is not set | |
+CONFIG_INPUT_POLLDEV=y | |
+# CONFIG_INPUT_SPARSEKMAP is not set | |
+ | |
+# | |
+# Userland interfaces | |
+# | |
+CONFIG_INPUT_MOUSEDEV=y | |
+CONFIG_INPUT_MOUSEDEV_PSAUX=y | |
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | |
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |
+# CONFIG_INPUT_JOYDEV is not set | |
+CONFIG_INPUT_EVDEV=y | |
+# CONFIG_INPUT_EVBUG is not set | |
+CONFIG_INPUT_KEYRESET=y | |
+ | |
+# | |
+# Input Device Drivers | |
+# | |
+CONFIG_INPUT_KEYBOARD=y | |
+# CONFIG_KEYBOARD_ADP5588 is not set | |
+# CONFIG_KEYBOARD_ADP5589 is not set | |
+CONFIG_KEYBOARD_ATKBD=y | |
+# CONFIG_KEYBOARD_QT1070 is not set | |
+# CONFIG_KEYBOARD_QT2160 is not set | |
+# CONFIG_KEYBOARD_LKKBD is not set | |
+# CONFIG_KEYBOARD_GPIO is not set | |
+# CONFIG_KEYBOARD_TCA6416 is not set | |
+# CONFIG_KEYBOARD_TCA8418 is not set | |
+# CONFIG_KEYBOARD_MATRIX is not set | |
+# CONFIG_KEYBOARD_LM8323 is not set | |
+# CONFIG_KEYBOARD_MAX7359 is not set | |
+# CONFIG_KEYBOARD_MCS is not set | |
+# CONFIG_KEYBOARD_MPR121 is not set | |
+# CONFIG_KEYBOARD_NEWTON is not set | |
+# CONFIG_KEYBOARD_OPENCORES is not set | |
+CONFIG_KEYBOARD_PMIC8XXX=y | |
+# CONFIG_KEYBOARD_SAMSUNG is not set | |
+# CONFIG_KEYBOARD_STOWAWAY is not set | |
+# CONFIG_KEYBOARD_SUNKBD is not set | |
+# CONFIG_KEYBOARD_OMAP4 is not set | |
+# CONFIG_KEYBOARD_XTKBD is not set | |
+# CONFIG_KEYBOARD_QCIKBD is not set | |
+CONFIG_INPUT_MOUSE=y | |
+CONFIG_MOUSE_PS2=y | |
+CONFIG_MOUSE_PS2_ALPS=y | |
+CONFIG_MOUSE_PS2_LOGIPS2PP=y | |
+CONFIG_MOUSE_PS2_SYNAPTICS=y | |
+CONFIG_MOUSE_PS2_TRACKPOINT=y | |
+# CONFIG_MOUSE_PS2_ELANTECH is not set | |
+# CONFIG_MOUSE_PS2_SENTELIC is not set | |
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set | |
+# CONFIG_MOUSE_SERIAL is not set | |
+# CONFIG_MOUSE_APPLETOUCH is not set | |
+# CONFIG_MOUSE_BCM5974 is not set | |
+# CONFIG_MOUSE_VSXXXAA is not set | |
+# CONFIG_MOUSE_GPIO is not set | |
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set | |
+# CONFIG_MOUSE_QCITP is not set | |
+# CONFIG_MOUSE_SYNAPTICS_USB is not set | |
+CONFIG_INPUT_JOYSTICK=y | |
+# CONFIG_JOYSTICK_ANALOG is not set | |
+# CONFIG_JOYSTICK_A3D is not set | |
+# CONFIG_JOYSTICK_ADI is not set | |
+# CONFIG_JOYSTICK_COBRA is not set | |
+# CONFIG_JOYSTICK_GF2K is not set | |
+# CONFIG_JOYSTICK_GRIP is not set | |
+# CONFIG_JOYSTICK_GRIP_MP is not set | |
+# CONFIG_JOYSTICK_GUILLEMOT is not set | |
+# CONFIG_JOYSTICK_INTERACT is not set | |
+# CONFIG_JOYSTICK_SIDEWINDER is not set | |
+# CONFIG_JOYSTICK_TMDC is not set | |
+# CONFIG_JOYSTICK_IFORCE is not set | |
+# CONFIG_JOYSTICK_WARRIOR is not set | |
+# CONFIG_JOYSTICK_MAGELLAN is not set | |
+# CONFIG_JOYSTICK_SPACEORB is not set | |
+# CONFIG_JOYSTICK_SPACEBALL is not set | |
+# CONFIG_JOYSTICK_STINGER is not set | |
+# CONFIG_JOYSTICK_TWIDJOY is not set | |
+# CONFIG_JOYSTICK_ZHENHUA is not set | |
+# CONFIG_JOYSTICK_AS5011 is not set | |
+# CONFIG_JOYSTICK_JOYDUMP is not set | |
+CONFIG_JOYSTICK_XPAD=y | |
+# CONFIG_JOYSTICK_XPAD_FF is not set | |
+# CONFIG_JOYSTICK_XPAD_LEDS is not set | |
+# CONFIG_TOUCHDISC_VTD518_SHINETSU is not set | |
+# CONFIG_INPUT_TABLET is not set | |
+CONFIG_INPUT_TOUCHSCREEN=y | |
+# CONFIG_TOUCHSCREEN_ADS7846 is not set | |
+# CONFIG_TOUCHSCREEN_AD7877 is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_DETECT_CABLE is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_DETECT_USB is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_DETECT_USB_VBUS is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_WLS is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_224E is not set | |
+# CONFIG_TOUCHSCREEN_AD7879 is not set | |
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set | |
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set | |
+# CONFIG_TOUCHSCREEN_BU21013 is not set | |
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set | |
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set | |
+# CONFIG_TOUCHSCREEN_CYPRESS_CS is not set | |
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set | |
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | |
+# CONFIG_TOUCHSCREEN_EETI is not set | |
+# CONFIG_TOUCHSCREEN_EGALAX is not set | |
+# CONFIG_TOUCHSCREEN_FUJITSU is not set | |
+# CONFIG_TOUCHSCREEN_ILI210X is not set | |
+# CONFIG_TOUCHSCREEN_GUNZE is not set | |
+# CONFIG_TOUCHSCREEN_ELO is not set | |
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | |
+# CONFIG_TOUCHSCREEN_MAX11801 is not set | |
+# CONFIG_TOUCHSCREEN_MCS5000 is not set | |
+# CONFIG_TOUCHSCREEN_MTOUCH is not set | |
+# CONFIG_TOUCHSCREEN_INEXIO is not set | |
+# CONFIG_TOUCHSCREEN_MK712 is not set | |
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set | |
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set | |
+# CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C is not set | |
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | |
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set | |
+# CONFIG_TOUCHSCREEN_PIXCIR is not set | |
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | |
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | |
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set | |
+# CONFIG_TOUCHSCREEN_TSC2005 is not set | |
+# CONFIG_TOUCHSCREEN_TSC2007 is not set | |
+# CONFIG_TOUCHSCREEN_MSM_LEGACY is not set | |
+# CONFIG_TOUCHSCREEN_W90X900 is not set | |
+# CONFIG_TOUCHSCREEN_ST1232 is not set | |
+# CONFIG_TOUCHSCREEN_TPS6507X is not set | |
+# CONFIG_TOUCHSCREEN_CY8C_TS is not set | |
+# CONFIG_TOUCHSCREEN_CYTTSP_I2C_QC is not set | |
+# CONFIG_TOUCHSCREEN_FT5X06 is not set | |
+CONFIG_TOUCHSCREEN_SYNAPTICS_3K=y | |
+# CONFIG_TOUCHSCREEN_SYNAPTICS_SWEEP2WAKE is not set | |
+CONFIG_TOUCHSCREEN_MAX11871=y | |
+# CONFIG_TOUCHSCREEN_MAX1187X is not set | |
+# CONFIG_TOUCHSCREEN_HIMAX is not set | |
+CONFIG_INPUT_MISC=y | |
+# CONFIG_INPUT_AD714X is not set | |
+# CONFIG_INPUT_BMA150 is not set | |
+# CONFIG_INPUT_PM8XXX_VIBRATOR is not set | |
+# CONFIG_INPUT_PMIC8XXX_PWRKEY is not set | |
+# CONFIG_INPUT_MMA8450 is not set | |
+# CONFIG_INPUT_MPU3050 is not set | |
+# CONFIG_INPUT_GP2A is not set | |
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set | |
+# CONFIG_INPUT_ATI_REMOTE2 is not set | |
+CONFIG_INPUT_KEYCHORD=y | |
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
+# CONFIG_INPUT_KXTJ9 is not set | |
+# CONFIG_INPUT_POWERMATE is not set | |
+# CONFIG_INPUT_YEALINK is not set | |
+# CONFIG_INPUT_CM109 is not set | |
+CONFIG_INPUT_UINPUT=y | |
+CONFIG_INPUT_GPIO=y | |
+# CONFIG_PWRKEY_STATUS_API is not set | |
+# CONFIG_INPUT_ISA1200_FF_MEMLESS is not set | |
+# CONFIG_INPUT_PCF8574 is not set | |
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | |
+# CONFIG_INPUT_ADXL34X is not set | |
+# CONFIG_INPUT_CMA3000 is not set | |
+# CONFIG_BOSCH_BMA150 is not set | |
+# CONFIG_INPUT_DUMMY_KEYPAD is not set | |
+# CONFIG_POWER_KEY_LED is not set | |
+# CONFIG_POWER_KEY_CLR_RESET is not set | |
+# CONFIG_POWER_VOLUP_RESET is not set | |
+# CONFIG_PWRKEY_WAKESRC_LOG is not set | |
+# CONFIG_INPUT_FPC1080 is not set | |
+ | |
+# | |
+# Hardware I/O ports | |
+# | |
+CONFIG_SERIO=y | |
+CONFIG_SERIO_SERPORT=y | |
+CONFIG_SERIO_LIBPS2=y | |
+# CONFIG_SERIO_RAW is not set | |
+# CONFIG_SERIO_ALTERA_PS2 is not set | |
+# CONFIG_SERIO_PS2MULT is not set | |
+# CONFIG_GAMEPORT is not set | |
+ | |
+# | |
+# Character devices | |
+# | |
+# CONFIG_VT is not set | |
+CONFIG_UNIX98_PTYS=y | |
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | |
+# CONFIG_LEGACY_PTYS is not set | |
+# CONFIG_SERIAL_NONSTANDARD is not set | |
+# CONFIG_N_GSM is not set | |
+# CONFIG_N_SMUX is not set | |
+# CONFIG_TRACE_SINK is not set | |
+# CONFIG_DEVMEM is not set | |
+# CONFIG_DEVKMEM is not set | |
+ | |
+# | |
+# Serial drivers | |
+# | |
+# CONFIG_SERIAL_8250 is not set | |
+ | |
+# | |
+# Non-8250 serial port support | |
+# | |
+# CONFIG_SERIAL_MAX3100 is not set | |
+# CONFIG_SERIAL_MAX3107 is not set | |
+CONFIG_SERIAL_CORE=y | |
+CONFIG_SERIAL_CORE_CONSOLE=y | |
+# CONFIG_IMC_UART2DM_HANDSHAKE is not set | |
+CONFIG_SERIAL_MSM=y | |
+# CONFIG_SERIAL_MSM_CONSOLE is not set | |
+CONFIG_SERIAL_MSM_HS=y | |
+CONFIG_SERIAL_MSM_HS_BRCM=y | |
+# CONFIG_SERIAL_MSM_HS_IMC is not set | |
+# CONFIG_SERIAL_MSM_CLOCK_CONTROL is not set | |
+CONFIG_SERIAL_MSM_HSL=y | |
+# CONFIG_SERIAL_IRDA is not set | |
+CONFIG_SERIAL_CIR=y | |
+CONFIG_SERIAL_MSM_HSL_CONSOLE=y | |
+# CONFIG_SERIAL_BCM_BT_LPM is not set | |
+# CONFIG_SERIAL_TIMBERDALE is not set | |
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set | |
+# CONFIG_SERIAL_ALTERA_UART is not set | |
+# CONFIG_SERIAL_IFX6X60 is not set | |
+# CONFIG_SERIAL_MSM_SMD is not set | |
+# CONFIG_SERIAL_XILINX_PS_UART is not set | |
+ | |
+# | |
+# Diag Support | |
+# | |
+CONFIG_DIAG_CHAR=y | |
+ | |
+# | |
+# DIAG traffic over USB | |
+# | |
+CONFIG_DIAG_OVER_USB=y | |
+ | |
+# | |
+# SDIO support for DIAG | |
+# | |
+ | |
+# | |
+# HSIC/SMUX support for DIAG | |
+# | |
+CONFIG_DIAGFWD_BRIDGE_CODE=y | |
+# CONFIG_TTY_PRINTK is not set | |
+# CONFIG_HVC_DCC is not set | |
+# CONFIG_IPMI_HANDLER is not set | |
+CONFIG_HW_RANDOM=y | |
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set | |
+CONFIG_HW_RANDOM_MSM=y | |
+# CONFIG_R3964 is not set | |
+# CONFIG_RAW_DRIVER is not set | |
+# CONFIG_TCG_TPM is not set | |
+# CONFIG_DCC_TTY is not set | |
+# CONFIG_RAMOOPS is not set | |
+CONFIG_MSM_ROTATOR=y | |
+# CONFIG_MMC_GENERIC_CSDIO is not set | |
+CONFIG_I2C=y | |
+CONFIG_I2C_BOARDINFO=y | |
+CONFIG_I2C_COMPAT=y | |
+CONFIG_I2C_CHARDEV=y | |
+# CONFIG_I2C_MUX is not set | |
+ | |
+# | |
+# Miscellaneous I2C Chip support | |
+# | |
+# CONFIG_INPUT_YAS_MAGNETOMETER is not set | |
+# CONFIG_SENSORS_AKM8975 is not set | |
+# CONFIG_SENSORS_AKM8975_PANA_GYRO is not set | |
+# CONFIG_SENSORS_AK8963 is not set | |
+CONFIG_SENSORS_AK8963_NST=y | |
+# CONFIG_SENSORS_PANASONIC_GYRO is not set | |
+CONFIG_SENSORS_R3GD20=y | |
+# CONFIG_SENSORS_LSM330_ACC is not set | |
+# CONFIG_SENSORS_LSM330_GYRO is not set | |
+# CONFIG_TPS65200 is not set | |
+CONFIG_BOSCH_BMA250=y | |
+# CONFIG_SENSORS_BMA250 is not set | |
+# CONFIG_SENSORS_ONLY_BMA250 is not set | |
+# CONFIG_SENSORS_BMA2X2 is not set | |
+# CONFIG_SENSORS_BMG160 is not set | |
+CONFIG_SENSORS_NFC_PN544=y | |
+# CONFIG_INPUT_CAPELLA_CM3628 is not set | |
+CONFIG_INPUT_CAPELLA_CM3629=y | |
+# CONFIG_WSENSOR_ENABLE is not set | |
+# CONFIG_PSENSOR_KTHRESHOLD is not set | |
+# CONFIG_VP_A1026 is not set | |
+# CONFIG_VP_A1028 is not set | |
+# CONFIG_AMP_TPA2051D3 is not set | |
+CONFIG_AMP_TPA6185=y | |
+CONFIG_AMP_RT5501=y | |
+# CONFIG_AMP_RT5501_DELAY is not set | |
+CONFIG_AMP_TFA9887=y | |
+# CONFIG_AMP_TFA9887L is not set | |
+# CONFIG_INPUT_ISL29028 is not set | |
+# CONFIG_INPUT_ISL29029 is not set | |
+CONFIG_CIR_ALWAYS_READY=y | |
+CONFIG_R3GD20_NEW_SENSOR_TYPE=y | |
+# CONFIG_SIG_MOTION is not set | |
+CONFIG_I2C_HELPER_AUTO=y | |
+ | |
+# | |
+# I2C Hardware Bus support | |
+# | |
+ | |
+# | |
+# I2C system bus drivers (mostly embedded / system-on-chip) | |
+# | |
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set | |
+# CONFIG_I2C_GPIO is not set | |
+# CONFIG_I2C_MSM is not set | |
+CONFIG_I2C_QUP=y | |
+# CONFIG_I2C_OCORES is not set | |
+# CONFIG_I2C_PCA_PLATFORM is not set | |
+# CONFIG_I2C_PXA_PCI is not set | |
+# CONFIG_I2C_SIMTEC is not set | |
+# CONFIG_I2C_XILINX is not set | |
+ | |
+# | |
+# External I2C/SMBus adapter drivers | |
+# | |
+# CONFIG_I2C_DIOLAN_U2C is not set | |
+# CONFIG_I2C_PARPORT_LIGHT is not set | |
+# CONFIG_I2C_TAOS_EVM is not set | |
+# CONFIG_I2C_TINY_USB is not set | |
+ | |
+# | |
+# Other I2C/SMBus bus drivers | |
+# | |
+# CONFIG_I2C_DEBUG_CORE is not set | |
+# CONFIG_I2C_DEBUG_ALGO is not set | |
+# CONFIG_I2C_DEBUG_BUS is not set | |
+CONFIG_SPI=y | |
+# CONFIG_SPI_DEBUG is not set | |
+CONFIG_SPI_MASTER=y | |
+ | |
+# | |
+# SPI Master Controller Drivers | |
+# | |
+# CONFIG_SPI_ALTERA is not set | |
+# CONFIG_SPI_BITBANG is not set | |
+# CONFIG_SPI_GPIO is not set | |
+# CONFIG_SPI_OC_TINY is not set | |
+# CONFIG_SPI_PXA2XX_PCI is not set | |
+# CONFIG_SPI_XILINX is not set | |
+CONFIG_SPI_QUP=y | |
+# CONFIG_SPI_DESIGNWARE is not set | |
+ | |
+# | |
+# SPI Protocol Masters | |
+# | |
+CONFIG_SPI_SPIDEV=y | |
+# CONFIG_SPI_TLE62X0 is not set | |
+# CONFIG_SPMI is not set | |
+CONFIG_SLIMBUS=y | |
+CONFIG_SLIMBUS_MSM_CTRL=y | |
+# CONFIG_HSI is not set | |
+ | |
+# | |
+# PPS support | |
+# | |
+# CONFIG_PPS is not set | |
+ | |
+# | |
+# PPS generators support | |
+# | |
+ | |
+# | |
+# PTP clock support | |
+# | |
+ | |
+# | |
+# Enable Device Drivers -> PPS to see the PTP clock options. | |
+# | |
+CONFIG_ARCH_REQUIRE_GPIOLIB=y | |
+CONFIG_GPIOLIB=y | |
+CONFIG_DEBUG_GPIO=y | |
+CONFIG_GPIO_SYSFS=y | |
+ | |
+# | |
+# Memory mapped GPIO drivers: | |
+# | |
+# CONFIG_GPIO_GENERIC_PLATFORM is not set | |
+# CONFIG_GPIO_MSM_V1 is not set | |
+CONFIG_GPIO_MSM_V2=y | |
+# CONFIG_GPIO_MSM_V3 is not set | |
+# CONFIG_GPIO_FSM9XXX is not set | |
+ | |
+# | |
+# I2C GPIO expanders: | |
+# | |
+# CONFIG_GPIO_MAX7300 is not set | |
+# CONFIG_GPIO_MAX732X is not set | |
+# CONFIG_GPIO_PCF857X is not set | |
+CONFIG_GPIO_SX150X=y | |
+# CONFIG_GPIO_ADP5588 is not set | |
+ | |
+# | |
+# PCI GPIO expanders: | |
+# | |
+ | |
+# | |
+# SPI GPIO expanders: | |
+# | |
+# CONFIG_GPIO_MAX7301 is not set | |
+# CONFIG_GPIO_MCP23S08 is not set | |
+# CONFIG_GPIO_MC33880 is not set | |
+# CONFIG_GPIO_74X164 is not set | |
+ | |
+# | |
+# AC97 GPIO expanders: | |
+# | |
+ | |
+# | |
+# MODULbus GPIO expanders: | |
+# | |
+CONFIG_GPIO_PM8XXX=y | |
+CONFIG_GPIO_PM8XXX_MPP=y | |
+# CONFIG_GPIO_PM8XXX_RPC is not set | |
+# CONFIG_W1 is not set | |
+CONFIG_POWER_SUPPLY=y | |
+# CONFIG_POWER_SUPPLY_DEBUG is not set | |
+# CONFIG_PDA_POWER is not set | |
+# CONFIG_TEST_POWER is not set | |
+# CONFIG_BATTERY_DS2780 is not set | |
+# CONFIG_BATTERY_DS2781 is not set | |
+# CONFIG_BATTERY_DS2782 is not set | |
+# CONFIG_BATTERY_SBS is not set | |
+# CONFIG_BATTERY_BQ27x00 is not set | |
+# CONFIG_BATTERY_MAX17040 is not set | |
+# CONFIG_BATTERY_MAX17042 is not set | |
+# CONFIG_CHARGER_ISP1704 is not set | |
+# CONFIG_CHARGER_MAX8903 is not set | |
+# CONFIG_CHARGER_LP8727 is not set | |
+# CONFIG_CHARGER_GPIO is not set | |
+# CONFIG_CHARGER_MANAGER is not set | |
+# CONFIG_BATTERY_MSM is not set | |
+# CONFIG_BATTERY_MSM8X60 is not set | |
+CONFIG_ISL9519_CHARGER=y | |
+# CONFIG_SMB137B_CHARGER is not set | |
+CONFIG_SMB349_CHARGER=y | |
+# CONFIG_BATTERY_BQ27520 is not set | |
+# CONFIG_BATTERY_BQ27541 is not set | |
+CONFIG_PM8921_CHARGER=y | |
+CONFIG_PM8XXX_CCADC=y | |
+# CONFIG_LTC4088_CHARGER is not set | |
+CONFIG_PM8921_BMS=y | |
+# CONFIG_CHARGER_SMB347 is not set | |
+CONFIG_HWMON=y | |
+# CONFIG_HWMON_VID is not set | |
+# CONFIG_HWMON_DEBUG_CHIP is not set | |
+ | |
+# | |
+# Native drivers | |
+# | |
+# CONFIG_SENSORS_AD7314 is not set | |
+# CONFIG_SENSORS_AD7414 is not set | |
+# CONFIG_SENSORS_AD7418 is not set | |
+# CONFIG_SENSORS_ADCXX is not set | |
+# CONFIG_SENSORS_ADM1021 is not set | |
+# CONFIG_SENSORS_ADM1025 is not set | |
+# CONFIG_SENSORS_ADM1026 is not set | |
+# CONFIG_SENSORS_ADM1029 is not set | |
+# CONFIG_SENSORS_ADM1031 is not set | |
+# CONFIG_SENSORS_ADM9240 is not set | |
+# CONFIG_SENSORS_ADT7411 is not set | |
+# CONFIG_SENSORS_ADT7462 is not set | |
+# CONFIG_SENSORS_ADT7470 is not set | |
+# CONFIG_SENSORS_ADT7475 is not set | |
+# CONFIG_SENSORS_ASC7621 is not set | |
+# CONFIG_SENSORS_ATXP1 is not set | |
+# CONFIG_SENSORS_DS620 is not set | |
+# CONFIG_SENSORS_DS1621 is not set | |
+# CONFIG_SENSORS_F71805F is not set | |
+# CONFIG_SENSORS_F71882FG is not set | |
+# CONFIG_SENSORS_F75375S is not set | |
+# CONFIG_SENSORS_G760A is not set | |
+# CONFIG_SENSORS_GL518SM is not set | |
+# CONFIG_SENSORS_GL520SM is not set | |
+# CONFIG_SENSORS_GPIO_FAN is not set | |
+# CONFIG_SENSORS_IT87 is not set | |
+# CONFIG_SENSORS_JC42 is not set | |
+# CONFIG_SENSORS_LINEAGE is not set | |
+# CONFIG_SENSORS_LM63 is not set | |
+# CONFIG_SENSORS_LM70 is not set | |
+# CONFIG_SENSORS_LM73 is not set | |
+# CONFIG_SENSORS_LM75 is not set | |
+# CONFIG_SENSORS_LM77 is not set | |
+# CONFIG_SENSORS_LM78 is not set | |
+# CONFIG_SENSORS_LM80 is not set | |
+# CONFIG_SENSORS_LM83 is not set | |
+# CONFIG_SENSORS_LM85 is not set | |
+# CONFIG_SENSORS_LM87 is not set | |
+# CONFIG_SENSORS_LM90 is not set | |
+# CONFIG_SENSORS_LM92 is not set | |
+# CONFIG_SENSORS_LM93 is not set | |
+# CONFIG_SENSORS_LTC4151 is not set | |
+# CONFIG_SENSORS_LTC4215 is not set | |
+# CONFIG_SENSORS_LTC4245 is not set | |
+# CONFIG_SENSORS_LTC4261 is not set | |
+# CONFIG_SENSORS_LM95241 is not set | |
+# CONFIG_SENSORS_LM95245 is not set | |
+# CONFIG_SENSORS_MAX1111 is not set | |
+# CONFIG_SENSORS_MAX16065 is not set | |
+# CONFIG_SENSORS_MAX1619 is not set | |
+# CONFIG_SENSORS_MAX1668 is not set | |
+# CONFIG_SENSORS_MAX6639 is not set | |
+# CONFIG_SENSORS_MAX6642 is not set | |
+# CONFIG_SENSORS_MAX6650 is not set | |
+# CONFIG_SENSORS_MCP3021 is not set | |
+# CONFIG_SENSORS_NTC_THERMISTOR is not set | |
+CONFIG_SENSORS_PM8XXX_ADC=y | |
+# CONFIG_SENSORS_EPM_ADC is not set | |
+# CONFIG_SENSORS_PC87360 is not set | |
+# CONFIG_SENSORS_PC87427 is not set | |
+# CONFIG_SENSORS_PCF8591 is not set | |
+# CONFIG_PMBUS is not set | |
+# CONFIG_SENSORS_SHT15 is not set | |
+# CONFIG_SENSORS_SHT21 is not set | |
+# CONFIG_SENSORS_SMM665 is not set | |
+# CONFIG_SENSORS_DME1737 is not set | |
+# CONFIG_SENSORS_EMC1403 is not set | |
+# CONFIG_SENSORS_EMC2103 is not set | |
+# CONFIG_SENSORS_EMC6W201 is not set | |
+# CONFIG_SENSORS_SMSC47M1 is not set | |
+# CONFIG_SENSORS_SMSC47M192 is not set | |
+# CONFIG_SENSORS_SMSC47B397 is not set | |
+# CONFIG_SENSORS_SCH56XX_COMMON is not set | |
+# CONFIG_SENSORS_SCH5627 is not set | |
+# CONFIG_SENSORS_SCH5636 is not set | |
+# CONFIG_SENSORS_ADS1015 is not set | |
+# CONFIG_SENSORS_ADS7828 is not set | |
+# CONFIG_SENSORS_ADS7871 is not set | |
+# CONFIG_SENSORS_AMC6821 is not set | |
+# CONFIG_SENSORS_THMC50 is not set | |
+# CONFIG_SENSORS_TMP102 is not set | |
+# CONFIG_SENSORS_TMP401 is not set | |
+# CONFIG_SENSORS_TMP421 is not set | |
+# CONFIG_SENSORS_VT1211 is not set | |
+# CONFIG_SENSORS_W83781D is not set | |
+# CONFIG_SENSORS_W83791D is not set | |
+# CONFIG_SENSORS_W83792D is not set | |
+# CONFIG_SENSORS_W83793 is not set | |
+# CONFIG_SENSORS_W83795 is not set | |
+# CONFIG_SENSORS_W83L785TS is not set | |
+# CONFIG_SENSORS_W83L786NG is not set | |
+# CONFIG_SENSORS_W83627HF is not set | |
+# CONFIG_SENSORS_W83627EHF is not set | |
+CONFIG_THERMAL=y | |
+CONFIG_THERMAL_HWMON=y | |
+# CONFIG_THERMAL_MSM_POPMEM is not set | |
+# CONFIG_THERMAL_TSENS is not set | |
+CONFIG_THERMAL_TSENS8960=y | |
+CONFIG_THERMAL_PM8XXX=y | |
+CONFIG_THERMAL_MONITOR=y | |
+CONFIG_THERMAL_MAX_TEMP_PROTECT=y | |
+CONFIG_THERMAL_MIN_TEMP_PROTECT=y | |
+# CONFIG_WATCHDOG is not set | |
+CONFIG_SSB_POSSIBLE=y | |
+ | |
+# | |
+# Sonics Silicon Backplane | |
+# | |
+# CONFIG_SSB is not set | |
+CONFIG_BCMA_POSSIBLE=y | |
+ | |
+# | |
+# Broadcom specific AMBA | |
+# | |
+# CONFIG_BCMA is not set | |
+ | |
+# | |
+# Multifunction device drivers | |
+# | |
+CONFIG_MFD_CORE=y | |
+# CONFIG_MFD_88PM860X is not set | |
+# CONFIG_MFD_SM501 is not set | |
+# CONFIG_MFD_ASIC3 is not set | |
+# CONFIG_HTC_EGPIO is not set | |
+# CONFIG_HTC_PASIC3 is not set | |
+# CONFIG_HTC_I2CPLD is not set | |
+# CONFIG_TPS6105X is not set | |
+# CONFIG_TPS65010 is not set | |
+# CONFIG_PMIC8058 is not set | |
+# CONFIG_PMIC8901 is not set | |
+# CONFIG_TPS6507X is not set | |
+# CONFIG_MFD_TPS65217 is not set | |
+# CONFIG_MFD_TPS6586X is not set | |
+# CONFIG_MFD_TPS65910 is not set | |
+# CONFIG_MFD_TPS65912_I2C is not set | |
+# CONFIG_MFD_TPS65912_SPI is not set | |
+# CONFIG_TWL4030_CORE is not set | |
+# CONFIG_TWL6040_CORE is not set | |
+# CONFIG_MFD_STMPE is not set | |
+# CONFIG_MFD_TC3589X is not set | |
+# CONFIG_MFD_TMIO is not set | |
+# CONFIG_MFD_T7L66XB is not set | |
+# CONFIG_MFD_TC6387XB is not set | |
+# CONFIG_MFD_TC6393XB is not set | |
+# CONFIG_PMIC_DA903X is not set | |
+# CONFIG_MFD_DA9052_SPI is not set | |
+# CONFIG_MFD_DA9052_I2C is not set | |
+# CONFIG_PMIC_ADP5520 is not set | |
+# CONFIG_MFD_MAX8925 is not set | |
+# CONFIG_MFD_MAX8997 is not set | |
+# CONFIG_MFD_MAX8998 is not set | |
+# CONFIG_MFD_S5M_CORE is not set | |
+# CONFIG_MFD_WM8400 is not set | |
+# CONFIG_MFD_WM831X_I2C is not set | |
+# CONFIG_MFD_WM831X_SPI is not set | |
+# CONFIG_MFD_WM8350_I2C is not set | |
+# CONFIG_MFD_WM8994 is not set | |
+# CONFIG_MFD_PCF50633 is not set | |
+# CONFIG_MFD_MC13XXX is not set | |
+# CONFIG_ABX500_CORE is not set | |
+# CONFIG_EZX_PCAP is not set | |
+# CONFIG_MFD_WL1273_CORE is not set | |
+CONFIG_MFD_PM8XXX=y | |
+CONFIG_MFD_PM8921_CORE=y | |
+CONFIG_MFD_PM8821_CORE=y | |
+# CONFIG_MFD_PM8018_CORE is not set | |
+CONFIG_MFD_PM8038_CORE=y | |
+CONFIG_MFD_PM8XXX_IRQ=y | |
+CONFIG_MFD_PM8821_IRQ=y | |
+# CONFIG_MFD_TPS65090 is not set | |
+# CONFIG_MFD_AAT2870_CORE is not set | |
+CONFIG_MFD_PM8XXX_DEBUG=y | |
+CONFIG_MFD_PM8XXX_PWM=y | |
+CONFIG_MFD_PM8XXX_MISC=y | |
+CONFIG_MFD_PM8XXX_SPK=y | |
+CONFIG_MFD_PM8XXX_BATT_ALARM=y | |
+# CONFIG_WCD9304_CODEC is not set | |
+CONFIG_WCD9310_CODEC=y | |
+# CONFIG_WCD9320_CODEC is not set | |
+# CONFIG_MFD_RC5T583 is not set | |
+CONFIG_REGULATOR=y | |
+# CONFIG_REGULATOR_DEBUG is not set | |
+# CONFIG_REGULATOR_DUMMY is not set | |
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set | |
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | |
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | |
+# CONFIG_REGULATOR_GPIO is not set | |
+# CONFIG_REGULATOR_AD5398 is not set | |
+# CONFIG_REGULATOR_ISL6271A is not set | |
+# CONFIG_REGULATOR_MAX1586 is not set | |
+# CONFIG_REGULATOR_MAX8649 is not set | |
+# CONFIG_REGULATOR_MAX8660 is not set | |
+# CONFIG_REGULATOR_MAX8952 is not set | |
+# CONFIG_REGULATOR_LP3971 is not set | |
+# CONFIG_REGULATOR_LP3972 is not set | |
+# CONFIG_REGULATOR_TPS62360 is not set | |
+# CONFIG_REGULATOR_TPS65023 is not set | |
+# CONFIG_REGULATOR_TPS6507X is not set | |
+# CONFIG_REGULATOR_TPS6524X is not set | |
+CONFIG_REGULATOR_PM8XXX=y | |
+CONFIG_REGULATOR_MSM_GPIO=y | |
+# CONFIG_REGULATOR_STUB is not set | |
+CONFIG_MEDIA_SUPPORT=y | |
+ | |
+# | |
+# Multimedia core support | |
+# | |
+# CONFIG_MEDIA_CONTROLLER is not set | |
+CONFIG_VIDEO_DEV=y | |
+CONFIG_VIDEO_V4L2_COMMON=y | |
+# CONFIG_DVB_CORE is not set | |
+CONFIG_VIDEO_MEDIA=y | |
+ | |
+# | |
+# Multimedia drivers | |
+# | |
+CONFIG_RC_CORE=y | |
+CONFIG_LIRC=y | |
+# CONFIG_USER_RC_INPUT is not set | |
+CONFIG_RC_MAP=y | |
+CONFIG_IR_NEC_DECODER=y | |
+CONFIG_IR_RC5_DECODER=y | |
+CONFIG_IR_RC6_DECODER=y | |
+CONFIG_IR_JVC_DECODER=y | |
+CONFIG_IR_SONY_DECODER=y | |
+CONFIG_IR_RC5_SZ_DECODER=y | |
+CONFIG_IR_SANYO_DECODER=y | |
+CONFIG_IR_MCE_KBD_DECODER=y | |
+CONFIG_IR_LIRC_CODEC=y | |
+# CONFIG_RC_ATI_REMOTE is not set | |
+# CONFIG_IR_IMON is not set | |
+# CONFIG_IR_MCEUSB is not set | |
+# CONFIG_IR_REDRAT3 is not set | |
+# CONFIG_IR_STREAMZAP is not set | |
+# CONFIG_RC_LOOPBACK is not set | |
+# CONFIG_IR_GPIO_CIR is not set | |
+CONFIG_MEDIA_TUNER=y | |
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set | |
+CONFIG_MEDIA_TUNER_SIMPLE=y | |
+CONFIG_MEDIA_TUNER_TDA8290=y | |
+CONFIG_MEDIA_TUNER_TDA827X=y | |
+CONFIG_MEDIA_TUNER_TDA18271=y | |
+CONFIG_MEDIA_TUNER_TDA9887=y | |
+CONFIG_MEDIA_TUNER_TEA5761=y | |
+CONFIG_MEDIA_TUNER_TEA5767=y | |
+CONFIG_MEDIA_TUNER_MT20XX=y | |
+CONFIG_MEDIA_TUNER_XC2028=y | |
+CONFIG_MEDIA_TUNER_XC5000=y | |
+CONFIG_MEDIA_TUNER_XC4000=y | |
+CONFIG_MEDIA_TUNER_MC44S803=y | |
+CONFIG_VIDEO_V4L2=y | |
+CONFIG_VIDEOBUF2_CORE=y | |
+CONFIG_VIDEOBUF2_MEMOPS=y | |
+CONFIG_VIDEOBUF2_DMA_CONTIG=y | |
+CONFIG_VIDEOBUF2_VMALLOC=y | |
+CONFIG_VIDEOBUF2_DMA_SG=y | |
+CONFIG_VIDEOBUF2_MSM_MEM=y | |
+CONFIG_VIDEO_CAPTURE_DRIVERS=y | |
+# CONFIG_VIDEO_ADV_DEBUG is not set | |
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | |
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | |
+CONFIG_VIDEO_IR_I2C=y | |
+ | |
+# | |
+# Audio decoders, processors and mixers | |
+# | |
+ | |
+# | |
+# RDS decoders | |
+# | |
+ | |
+# | |
+# Video decoders | |
+# | |
+ | |
+# | |
+# Video and audio decoders | |
+# | |
+ | |
+# | |
+# MPEG video encoders | |
+# | |
+ | |
+# | |
+# Video encoders | |
+# | |
+ | |
+# | |
+# Camera sensor devices | |
+# | |
+ | |
+# | |
+# Flash devices | |
+# | |
+ | |
+# | |
+# Video improvement chips | |
+# | |
+ | |
+# | |
+# Miscelaneous helper chips | |
+# | |
+# CONFIG_MSM_VCAP is not set | |
+CONFIG_V4L_USB_DRIVERS=y | |
+CONFIG_USB_VIDEO_CLASS=y | |
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | |
+# CONFIG_USB_GSPCA is not set | |
+# CONFIG_VIDEO_PVRUSB2 is not set | |
+# CONFIG_VIDEO_HDPVR is not set | |
+# CONFIG_VIDEO_EM28XX is not set | |
+# CONFIG_VIDEO_CX231XX is not set | |
+# CONFIG_VIDEO_TM6000 is not set | |
+# CONFIG_VIDEO_USBVISION is not set | |
+# CONFIG_USB_ET61X251 is not set | |
+# CONFIG_USB_SN9C102 is not set | |
+# CONFIG_USB_PWC is not set | |
+# CONFIG_VIDEO_CPIA2 is not set | |
+# CONFIG_USB_ZR364XX is not set | |
+# CONFIG_USB_STKWEBCAM is not set | |
+# CONFIG_USB_S2255 is not set | |
+CONFIG_V4L_PLATFORM_DRIVERS=y | |
+# CONFIG_SOC_CAMERA is not set | |
+CONFIG_VIDEO_NMI=y | |
+CONFIG_ISDBT_NMI=y | |
+# CONFIG_ISDBT_NMI_DEBUG is not set | |
+ | |
+# | |
+# Qualcomm MSM Camera And Video | |
+# | |
+CONFIG_MSM_CAMERA=y | |
+# CONFIG_MSM_CAMERA_DEBUG is not set | |
+CONFIG_MSM_CAMERA_V4L2=y | |
+ | |
+# | |
+# Camera Sensor Selection | |
+# | |
+# CONFIG_IMX074 is not set | |
+CONFIG_S5K3H2YX=y | |
+# CONFIG_S5K6A1GX is not set | |
+CONFIG_AR0260=y | |
+# CONFIG_AS0260 is not set | |
+CONFIG_OV2722=y | |
+# CONFIG_OV5647 is not set | |
+# CONFIG_MT9M114 is not set | |
+# CONFIG_IMX074_ACT is not set | |
+CONFIG_S5K3H2YX_ACT=y | |
+# CONFIG_S5K4E1 is not set | |
+CONFIG_MSM_CAMERA_FLASH_SC628A=y | |
+# CONFIG_IMX072 is not set | |
+# CONFIG_OV2720 is not set | |
+CONFIG_MSM_CAMERA_FLASH=y | |
+CONFIG_MSM_CAMERA_SENSOR=y | |
+CONFIG_MSM_ACTUATOR=y | |
+CONFIG_MSM_GEMINI=y | |
+CONFIG_RAWCHIP=y | |
+# CONFIG_RAWCHIPII is not set | |
+CONFIG_CAMERA_IMAGE_NONE_BOARD=y | |
+CONFIG_QUP_EXCLUSIVE_TO_CAMERA=y | |
+CONFIG_S5K3L1YX=y | |
+CONFIG_IMX091=y | |
+CONFIG_IMX175=y | |
+# CONFIG_IMX135 is not set | |
+CONFIG_OV8838=y | |
+# CONFIG_IMX175_ACT is not set | |
+# CONFIG_RUMBAS_ACT is not set | |
+CONFIG_AD5823_ACT=y | |
+CONFIG_AD5816_ACT=y | |
+CONFIG_TI201_ACT=y | |
+# CONFIG_ACT_OIS_BINDER is not set | |
+# CONFIG_LC898212_ACT is not set | |
+# CONFIG_MT9V113 is not set | |
+# CONFIG_IMX175_2LANE is not set | |
+# CONFIG_OV5693_ACT is not set | |
+# CONFIG_OV5693 is not set | |
+# CONFIG_RAWCHIP_MCLK is not set | |
+# CONFIG_DISABLE_MCLK_RAWCHIP_TO_MAINCAM is not set | |
+# CONFIG_S5K6A2YA is not set | |
+# CONFIG_S5K6AAFX is not set | |
+# CONFIG_VD6869 is not set | |
+# CONFIG_OV4688 is not set | |
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set | |
+CONFIG_MSM_VIDC=y | |
+CONFIG_RADIO_ADAPTERS=y | |
+# CONFIG_RADIO_SI470X is not set | |
+# CONFIG_USB_MR800 is not set | |
+# CONFIG_USB_DSBR is not set | |
+# CONFIG_I2C_SI4713 is not set | |
+# CONFIG_RADIO_SI4713 is not set | |
+# CONFIG_USB_KEENE is not set | |
+# CONFIG_RADIO_TEA5764 is not set | |
+# CONFIG_RADIO_SAA7706H is not set | |
+# CONFIG_RADIO_TEF6862 is not set | |
+# CONFIG_RADIO_WL1273 is not set | |
+ | |
+# | |
+# Texas Instruments WL128x FM driver (ST based) | |
+# | |
+# CONFIG_RADIO_WL128X is not set | |
+# CONFIG_RADIO_IRIS is not set | |
+ | |
+# | |
+# Graphics support | |
+# | |
+# CONFIG_DRM is not set | |
+CONFIG_ION=y | |
+CONFIG_ION_MSM=y | |
+CONFIG_MSM_KGSL=y | |
+# CONFIG_MSM_KGSL_CFF_DUMP is not set | |
+# CONFIG_MSM_KGSL_PSTMRTMDMP_CP_STAT_NO_DETAIL is not set | |
+# CONFIG_MSM_KGSL_PSTMRTMDMP_NO_IB_DUMP is not set | |
+# CONFIG_MSM_KGSL_PSTMRTMDMP_RB_HEX is not set | |
+CONFIG_MSM_KGSL_2D=y | |
+CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y | |
+CONFIG_MSM_KGSL_PAGE_TABLE_SIZE=0xFFF0000 | |
+CONFIG_MSM_KGSL_PAGE_TABLE_SIZE_FOR_IOMMU=0x1fe00000 | |
+CONFIG_MSM_KGSL_PAGE_TABLE_COUNT=24 | |
+CONFIG_MSM_KGSL_MMU_PAGE_FAULT=y | |
+# CONFIG_MSM_KGSL_DISABLE_SHADOW_WRITES is not set | |
+# CONFIG_VGASTATE is not set | |
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set | |
+CONFIG_FB=y | |
+# CONFIG_FIRMWARE_EDID is not set | |
+# CONFIG_FB_DDC is not set | |
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set | |
+CONFIG_FB_CFB_FILLRECT=y | |
+CONFIG_FB_CFB_COPYAREA=y | |
+CONFIG_FB_CFB_IMAGEBLIT=y | |
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | |
+CONFIG_FB_SYS_FILLRECT=y | |
+CONFIG_FB_SYS_COPYAREA=y | |
+CONFIG_FB_SYS_IMAGEBLIT=y | |
+# CONFIG_FB_FOREIGN_ENDIAN is not set | |
+CONFIG_FB_SYS_FOPS=y | |
+# CONFIG_FB_WMT_GE_ROPS is not set | |
+# CONFIG_FB_SVGALIB is not set | |
+# CONFIG_FB_MACMODES is not set | |
+# CONFIG_FB_BACKLIGHT is not set | |
+# CONFIG_FB_MODE_HELPERS is not set | |
+# CONFIG_FB_TILEBLITTING is not set | |
+ | |
+# | |
+# Frame buffer hardware drivers | |
+# | |
+# CONFIG_FB_S1D13XXX is not set | |
+# CONFIG_FB_TMIO is not set | |
+# CONFIG_FB_SMSCUFX is not set | |
+# CONFIG_FB_UDL is not set | |
+CONFIG_FB_VIRTUAL=y | |
+# CONFIG_FB_METRONOME is not set | |
+# CONFIG_FB_BROADSHEET is not set | |
+ | |
+# | |
+# Miscellaneous I2C Chip support II | |
+# | |
+CONFIG_FB_MSM_HDMI_MHL=y | |
+CONFIG_FB_MSM_HDMI_MHL_SII9234=y | |
+CONFIG_INTERNAL_CHARGING_SUPPORT=y | |
+CONFIG_MSM_VIDC_1080P=y | |
+CONFIG_MSM_VIDC_VENC=y | |
+CONFIG_MSM_VIDC_VDEC=y | |
+# CONFIG_MSM_VIDC_CONTENT_PROTECTION is not set | |
+CONFIG_FB_MSM=y | |
+# CONFIG_FB_MSM_BACKLIGHT is not set | |
+# CONFIG_FB_MSM_LOGO is not set | |
+CONFIG_FB_MSM_LCDC_HW=y | |
+CONFIG_FB_MSM_TRIPLE_BUFFER=y | |
+CONFIG_FB_MSM_MDP_HW=y | |
+# CONFIG_FB_MSM_MDP22 is not set | |
+# CONFIG_FB_MSM_MDP30 is not set | |
+# CONFIG_FB_MSM_MDP31 is not set | |
+CONFIG_FB_MSM_MDP40=y | |
+# CONFIG_FB_MSM_MDSS is not set | |
+# CONFIG_FB_MSM_MDP_NONE is not set | |
+# CONFIG_FB_MSM_EBI2 is not set | |
+# CONFIG_FB_MSM_MDDI is not set | |
+CONFIG_FB_MSM_MIPI_DSI=y | |
+# CONFIG_FB_MSM_LCDC is not set | |
+CONFIG_FB_MSM_LVDS=y | |
+CONFIG_FB_MSM_OVERLAY=y | |
+CONFIG_FB_MSM_DTV=y | |
+# CONFIG_FB_MSM_EXTMDDI is not set | |
+# CONFIG_FB_MSM_TVOUT is not set | |
+# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON is not set | |
+# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA is not set | |
+# CONFIG_FB_MSM_MDDI_ORISE is not set | |
+# CONFIG_FB_MSM_MDDI_QUICKVX is not set | |
+# CONFIG_FB_MSM_MDDI_AUTO_DETECT is not set | |
+# CONFIG_FB_MSM_LCDC_AUTO_DETECT is not set | |
+# CONFIG_FB_MSM_LCDC_PANEL is not set | |
+CONFIG_FB_MSM_MIPI_DSI_TOSHIBA=y | |
+# CONFIG_FB_MSM_MIPI_DSI_LGIT is not set | |
+CONFIG_FB_MSM_MIPI_DSI_RENESAS=y | |
+CONFIG_FB_MSM_MIPI_DSI_TRULY=y | |
+CONFIG_FB_MSM_MIPI_DSI_SIMULATOR=y | |
+CONFIG_FB_MSM_MIPI_DSI_NOVATEK=y | |
+CONFIG_FB_MSM_MIPI_DSI_NT35510=y | |
+CONFIG_FB_MSM_MIPI_DSI_ORISE=y | |
+CONFIG_FB_MSM_MIPI_DSI_NT35590=y | |
+CONFIG_FB_MSM_MIPI_DSI_TC358764_DSI2LVDS=y | |
+# CONFIG_FB_MSM_LCDC_ST15_WXGA is not set | |
+# CONFIG_FB_MSM_LCDC_ST15_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_PRISM_WVGA is not set | |
+# CONFIG_FB_MSM_LCDC_SAMSUNG_WSVGA is not set | |
+# CONFIG_FB_MSM_LCDC_CHIMEI_WXGA is not set | |
+# CONFIG_FB_MSM_LCDC_GORDON_VGA is not set | |
+# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT is not set | |
+# CONFIG_FB_MSM_LCDC_TOSHIBA_FWVGA_PT is not set | |
+# CONFIG_FB_MSM_LCDC_SHARP_WVGA_PT is not set | |
+# CONFIG_FB_MSM_LCDC_AUO_WVGA is not set | |
+# CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335 is not set | |
+# CONFIG_FB_MSM_LCDC_TRULY_HVGA_IPS3P2335_PT_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT is not set | |
+# CONFIG_FB_MSM_LCDC_NT35582_WVGA is not set | |
+# CONFIG_FB_MSM_LCDC_WXGA is not set | |
+# CONFIG_FB_MSM_MIPI_LGIT_VIDEO_WXGA_PT is not set | |
+CONFIG_FB_MSM_LVDS_CHIMEI_WXGA=y | |
+CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WVGA_PT=y | |
+CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WSVGA_PT=y | |
+CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WUXGA=y | |
+CONFIG_FB_MSM_MIPI_NOVATEK_VIDEO_QHD_PT=y | |
+CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT=y | |
+CONFIG_FB_MSM_MIPI_ORISE_VIDEO_720P_PT=y | |
+CONFIG_FB_MSM_MIPI_ORISE_CMD_720P_PT=y | |
+CONFIG_FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT=y | |
+CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT=y | |
+CONFIG_FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT=y | |
+CONFIG_FB_MSM_MIPI_NT35510_CMD_WVGA_PT=y | |
+# CONFIG_FB_MSM_MIPI_NT35516_VIDEO_QHD_PT is not set | |
+# CONFIG_FB_MSM_MIPI_NT35516_CMD_QHD_PT is not set | |
+CONFIG_FB_MSM_MIPI_NT35590_CMD_720P_PT=y | |
+CONFIG_FB_MSM_MIPI_NT35590_VIDEO_720P_PT=y | |
+CONFIG_FB_MSM_MIPI_CHIMEI_WXGA=y | |
+CONFIG_FB_MSM_MIPI_CHIMEI_WUXGA=y | |
+CONFIG_FB_MSM_MIPI_TRULY_VIDEO_WVGA_PT=y | |
+CONFIG_FB_MSM_MIPI_SIMULATOR_VIDEO=y | |
+CONFIG_FB_MSM_NO_MDP_PIPE_CTRL=y | |
+CONFIG_FB_MSM_OVERLAY0_WRITEBACK=y | |
+CONFIG_FB_MSM_OVERLAY1_WRITEBACK=y | |
+CONFIG_FB_MSM_WRITEBACK_MSM_PANEL=y | |
+# CONFIG_FB_MSM_LCDC_PRISM_WVGA_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_SAMSUNG_WSVGA_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_CHIMEI_WXGA_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_GORDON_VGA_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_TOSHIBA_FWVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_SHARP_WVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_AUO_WVGA_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_NT35582_PANEL is not set | |
+# CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT_PANEL is not set | |
+# CONFIG_FB_MSM_LVDS_CHIMEI_WXGA_PANEL is not set | |
+# CONFIG_FB_MSM_LVDS_FRC_FHD_PANEL is not set | |
+# CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM is not set | |
+# CONFIG_FB_MSM_MIPI_PANEL_DETECT is not set | |
+# CONFIG_FB_MSM_MDDI_PANEL_AUTO_DETECT is not set | |
+# CONFIG_FB_MSM_LCDC_PANEL_AUTO_DETECT is not set | |
+# CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT is not set | |
+CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT=y | |
+# CONFIG_FB_MSM_MDDI_PRISM_WVGA is not set | |
+# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT is not set | |
+# CONFIG_FB_MSM_MDDI_TOSHIBA_VGA is not set | |
+# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA is not set | |
+# CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128 is not set | |
+# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WSVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_TOSHIBA_VIDEO_WUXGA_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_NOVATEK_VIDEO_QHD_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_ORISE_VIDEO_720P_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_ORISE_CMD_720P_PT_PANEL is not set | |
+CONFIG_FB_MSM_MIPI_RENESAS_VIDEO_FWVGA_PT_PANEL=y | |
+# CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_CHIMEI_WXGA_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_CHIMEI_WUXGA_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_TRULY_VIDEO_WVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_NT35510_VIDEO_WVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_NT35510_CMD_WVGA_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_NT35516_VIDEO_QHD_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_NT35516_CMD_QHD_PT_PANEL is not set | |
+# CONFIG_FB_MSM_MIPI_SIMULATOR_VIDEO_PANEL is not set | |
+# CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF is not set | |
+# CONFIG_FB_MSM_HDMI_AS_PRIMARY is not set | |
+# CONFIG_FB_MSM_PANEL_NONE is not set | |
+CONFIG_FB_MSM_EXT_INTERFACE_COMMON=y | |
+CONFIG_FB_MSM_HDMI_COMMON=y | |
+CONFIG_FB_MSM_HDMI_3D=y | |
+# CONFIG_FB_MSM_HDMI_ADV7520_PANEL is not set | |
+CONFIG_FB_MSM_HDMI_MSM_PANEL=y | |
+# CONFIG_FB_MSM_HDMI_MSM_PANEL_DVI_SUPPORT is not set | |
+# CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT is not set | |
+# CONFIG_FB_MSM_HDMI_MHL_9244 is not set | |
+# CONFIG_FB_MSM_HDMI_MHL_8334 is not set | |
+# CONFIG_FB_MSM_TVOUT_NTSC_M is not set | |
+# CONFIG_FB_MSM_TVOUT_NTSC_J is not set | |
+# CONFIG_FB_MSM_TVOUT_PAL_BDGHIN is not set | |
+# CONFIG_FB_MSM_TVOUT_PAL_M is not set | |
+# CONFIG_FB_MSM_TVOUT_PAL_N is not set | |
+CONFIG_FB_MSM_TVOUT_NONE=y | |
+# CONFIG_FB_MSM_DEFAULT_DEPTH_RGB565 is not set | |
+# CONFIG_FB_MSM_DEFAULT_DEPTH_ARGB8888 is not set | |
+CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888=y | |
+# CONFIG_FB_MSM_EBI2_EPSON_S1D_QVGA_PANEL is not set | |
+# CONFIG_FB_MSM_EBI2_PANEL_DETECT is not set | |
+# CONFIG_FB_MSM_CABC_LEVEL_CONTROL is not set | |
+# CONFIG_EXYNOS_VIDEO is not set | |
+CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
+# CONFIG_LCD_CLASS_DEVICE is not set | |
+CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
+CONFIG_BACKLIGHT_GENERIC=y | |
+# CONFIG_BACKLIGHT_ADP8860 is not set | |
+# CONFIG_BACKLIGHT_ADP8870 is not set | |
+# CONFIG_BACKLIGHT_LP855X is not set | |
+# CONFIG_BACKLIGHT_LM3530 is not set | |
+# CONFIG_BACKLIGHT_LM3533 is not set | |
+# CONFIG_LOGO is not set | |
+CONFIG_SOUND=y | |
+# CONFIG_SOUND_OSS_CORE is not set | |
+CONFIG_SND=y | |
+CONFIG_SND_TIMER=y | |
+CONFIG_SND_PCM=y | |
+CONFIG_SND_HWDEP=y | |
+CONFIG_SND_RAWMIDI=y | |
+CONFIG_SND_JACK=y | |
+# CONFIG_SND_SEQUENCER is not set | |
+# CONFIG_SND_MIXER_OSS is not set | |
+# CONFIG_SND_PCM_OSS is not set | |
+# CONFIG_SND_HRTIMER is not set | |
+CONFIG_SND_DYNAMIC_MINORS=y | |
+CONFIG_SND_SUPPORT_OLD_API=y | |
+CONFIG_SND_VERBOSE_PROCFS=y | |
+# CONFIG_SND_VERBOSE_PRINTK is not set | |
+# CONFIG_SND_DEBUG is not set | |
+# CONFIG_SND_RAWMIDI_SEQ is not set | |
+# CONFIG_SND_OPL3_LIB_SEQ is not set | |
+# CONFIG_SND_OPL4_LIB_SEQ is not set | |
+# CONFIG_SND_SBAWE_SEQ is not set | |
+# CONFIG_SND_EMU10K1_SEQ is not set | |
+CONFIG_SND_DRIVERS=y | |
+# CONFIG_SND_DUMMY is not set | |
+# CONFIG_SND_ALOOP is not set | |
+# CONFIG_SND_MTPAV is not set | |
+# CONFIG_SND_SERIAL_U16550 is not set | |
+# CONFIG_SND_MPU401 is not set | |
+# CONFIG_SND_ARM is not set | |
+# CONFIG_SND_SPI is not set | |
+CONFIG_SND_USB=y | |
+CONFIG_SND_USB_AUDIO=y | |
+# CONFIG_SND_USB_UA101 is not set | |
+# CONFIG_SND_USB_CAIAQ is not set | |
+# CONFIG_SND_USB_6FIRE is not set | |
+CONFIG_SND_SOC=y | |
+ | |
+# | |
+# MSM SoC Audio support | |
+# | |
+CONFIG_SND_SOC_MSM_HOSTLESS_PCM=y | |
+CONFIG_SND_SOC_MSM_QDSP6_HDMI_AUDIO=y | |
+CONFIG_SND_SOC_MSM_QDSP6_INTF=y | |
+# CONFIG_SND_SOC_MSM_QDSP6V2_INTF is not set | |
+CONFIG_SND_SOC_VOICE=y | |
+CONFIG_SND_SOC_QDSP6=y | |
+# CONFIG_SND_SOC_QDSP6V2 is not set | |
+CONFIG_SND_HTC_Q6_NOBUG=y | |
+CONFIG_SND_SOC_MSM8960=y | |
+CONFIG_SND_SOC_I2C_AND_SPI=y | |
+# CONFIG_SND_SOC_ALL_CODECS is not set | |
+# CONFIG_SND_SOC_WCD9304=y | |
+CONFIG_SND_SOC_WCD9310=y | |
+CONFIG_SND_SOC_CS8427=y | |
+CONFIG_SND_SOC_MSM_STUB=y | |
+# CONFIG_SOUND_PRIME is not set | |
+CONFIG_HID_SUPPORT=y | |
+CONFIG_HID=y | |
+CONFIG_UHID=y | |
+# CONFIG_HID_BATTERY_STRENGTH is not set | |
+CONFIG_HIDRAW=y | |
+ | |
+# | |
+# USB Input Devices | |
+# | |
+CONFIG_USB_HID=y | |
+# CONFIG_HID_PID is not set | |
+# CONFIG_USB_HIDDEV is not set | |
+ | |
+# | |
+# Special HID drivers | |
+# | |
+# CONFIG_HID_A4TECH is not set | |
+# CONFIG_HID_ACRUX is not set | |
+CONFIG_HID_APPLE=y | |
+# CONFIG_HID_BELKIN is not set | |
+# CONFIG_HID_CHERRY is not set | |
+# CONFIG_HID_CHICONY is not set | |
+# CONFIG_HID_PRODIKEYS is not set | |
+# CONFIG_HID_CYPRESS is not set | |
+# CONFIG_HID_DRAGONRISE is not set | |
+# CONFIG_HID_EMS_FF is not set | |
+# CONFIG_HID_ELECOM is not set | |
+# CONFIG_HID_EZKEY is not set | |
+# CONFIG_HID_HOLTEK is not set | |
+# CONFIG_HID_KEYTOUCH is not set | |
+# CONFIG_HID_KYE is not set | |
+# CONFIG_HID_UCLOGIC is not set | |
+# CONFIG_HID_WALTOP is not set | |
+# CONFIG_HID_GYRATION is not set | |
+# CONFIG_HID_TWINHAN is not set | |
+# CONFIG_HID_KENSINGTON is not set | |
+# CONFIG_HID_LCPOWER is not set | |
+# CONFIG_HID_LOGITECH is not set | |
+CONFIG_HID_MAGICMOUSE=y | |
+CONFIG_HID_MICROSOFT=y | |
+# CONFIG_HID_MONTEREY is not set | |
+# CONFIG_HID_MULTITOUCH is not set | |
+# CONFIG_HID_NTRIG is not set | |
+# CONFIG_HID_ORTEK is not set | |
+# CONFIG_HID_PANTHERLORD is not set | |
+# CONFIG_HID_PETALYNX is not set | |
+# CONFIG_HID_PICOLCD is not set | |
+# CONFIG_HID_PRIMAX is not set | |
+# CONFIG_HID_ROCCAT is not set | |
+# CONFIG_HID_SAITEK is not set | |
+# CONFIG_HID_SAMSUNG is not set | |
+# CONFIG_HID_SONY is not set | |
+# CONFIG_HID_SPEEDLINK is not set | |
+# CONFIG_HID_SUNPLUS is not set | |
+# CONFIG_HID_GREENASIA is not set | |
+# CONFIG_HID_SMARTJOYPLUS is not set | |
+# CONFIG_HID_TIVO is not set | |
+# CONFIG_HID_TOPSEED is not set | |
+# CONFIG_HID_THRUSTMASTER is not set | |
+# CONFIG_HID_WACOM is not set | |
+# CONFIG_HID_WIIMOTE is not set | |
+# CONFIG_HID_ZEROPLUS is not set | |
+# CONFIG_HID_ZYDACRON is not set | |
+# CONFIG_USB_ARCH_HAS_OHCI is not set | |
+CONFIG_USB_ARCH_HAS_EHCI=y | |
+# CONFIG_USB_ARCH_HAS_XHCI is not set | |
+CONFIG_USB_SUPPORT=y | |
+CONFIG_USB_COMMON=y | |
+CONFIG_USB_ARCH_HAS_HCD=y | |
+CONFIG_USB=y | |
+# CONFIG_USB_DEBUG is not set | |
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | |
+ | |
+# | |
+# Miscellaneous USB options | |
+# | |
+# CONFIG_USB_DEVICEFS is not set | |
+CONFIG_USB_DEVICE_CLASS=y | |
+# CONFIG_USB_DYNAMIC_MINORS is not set | |
+CONFIG_USB_SUSPEND=y | |
+# CONFIG_USB_OTG is not set | |
+# CONFIG_USB_OTG_WHITELIST is not set | |
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set | |
+# CONFIG_USB_DWC3 is not set | |
+# CONFIG_USB_MON is not set | |
+# CONFIG_USB_WUSB_CBAF is not set | |
+ | |
+# | |
+# USB Host Controller Drivers | |
+# | |
+# CONFIG_USB_C67X00_HCD is not set | |
+CONFIG_USB_EHCI_HCD=y | |
+CONFIG_USB_EHCI_EHSET=y | |
+CONFIG_USB_EHCI_ROOT_HUB_TT=y | |
+CONFIG_USB_EHCI_TT_NEWSCHED=y | |
+CONFIG_USB_EHCI_MSM=y | |
+CONFIG_USB_EHCI_MSM_HSIC=y | |
+# CONFIG_USB_EHCI_MSM_HOST4 is not set | |
+# CONFIG_USB_OXU210HP_HCD is not set | |
+# CONFIG_USB_ISP116X_HCD is not set | |
+# CONFIG_USB_ISP1760_HCD is not set | |
+# CONFIG_USB_ISP1362_HCD is not set | |
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set | |
+# CONFIG_USB_SL811_HCD is not set | |
+# CONFIG_USB_R8A66597_HCD is not set | |
+# CONFIG_USB_PEHCI_HCD is not set | |
+# CONFIG_USB_MUSB_HDRC is not set | |
+ | |
+# | |
+# USB Device Class drivers | |
+# | |
+CONFIG_USB_ACM=y | |
+# CONFIG_USB_PRINTER is not set | |
+# CONFIG_USB_WDM is not set | |
+# CONFIG_USB_TMC is not set | |
+ | |
+# | |
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | |
+# | |
+ | |
+# | |
+# also be needed; see USB_STORAGE Help for more info | |
+# | |
+CONFIG_USB_STORAGE=y | |
+# CONFIG_USB_STORAGE_DEBUG is not set | |
+# CONFIG_USB_STORAGE_REALTEK is not set | |
+CONFIG_USB_STORAGE_DATAFAB=y | |
+CONFIG_USB_STORAGE_FREECOM=y | |
+CONFIG_USB_STORAGE_ISD200=y | |
+CONFIG_USB_STORAGE_USBAT=y | |
+CONFIG_USB_STORAGE_SDDR09=y | |
+CONFIG_USB_STORAGE_SDDR55=y | |
+CONFIG_USB_STORAGE_JUMPSHOT=y | |
+CONFIG_USB_STORAGE_ALAUDA=y | |
+CONFIG_USB_STORAGE_ONETOUCH=y | |
+CONFIG_USB_STORAGE_KARMA=y | |
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y | |
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set | |
+# CONFIG_USB_UAS is not set | |
+CONFIG_USB_LIBUSUAL=y | |
+ | |
+# | |
+# USB Imaging devices | |
+# | |
+# CONFIG_USB_MDC800 is not set | |
+# CONFIG_USB_MICROTEK is not set | |
+ | |
+# | |
+# USB port drivers | |
+# | |
+CONFIG_USB_SERIAL=y | |
+# CONFIG_USB_SERIAL_CONSOLE is not set | |
+# CONFIG_USB_EZUSB is not set | |
+# CONFIG_USB_SERIAL_GENERIC is not set | |
+# CONFIG_USB_SERIAL_AIRCABLE is not set | |
+# CONFIG_USB_SERIAL_ARK3116 is not set | |
+# CONFIG_USB_SERIAL_BELKIN is not set | |
+# CONFIG_USB_SERIAL_CH341 is not set | |
+# CONFIG_USB_SERIAL_WHITEHEAT is not set | |
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | |
+# CONFIG_USB_SERIAL_CP210X is not set | |
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set | |
+# CONFIG_USB_SERIAL_EMPEG is not set | |
+# CONFIG_USB_SERIAL_FTDI_SIO is not set | |
+# CONFIG_USB_SERIAL_FUNSOFT is not set | |
+# CONFIG_USB_SERIAL_VISOR is not set | |
+# CONFIG_USB_SERIAL_IPAQ is not set | |
+# CONFIG_USB_SERIAL_IR is not set | |
+# CONFIG_USB_SERIAL_EDGEPORT is not set | |
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set | |
+# CONFIG_USB_SERIAL_F81232 is not set | |
+# CONFIG_USB_SERIAL_GARMIN is not set | |
+# CONFIG_USB_SERIAL_IPW is not set | |
+# CONFIG_USB_SERIAL_IUU is not set | |
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | |
+# CONFIG_USB_SERIAL_KEYSPAN is not set | |
+# CONFIG_USB_SERIAL_KLSI is not set | |
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set | |
+# CONFIG_USB_SERIAL_MCT_U232 is not set | |
+# CONFIG_USB_SERIAL_METRO is not set | |
+# CONFIG_USB_SERIAL_MOS7720 is not set | |
+# CONFIG_USB_SERIAL_MOS7840 is not set | |
+# CONFIG_USB_SERIAL_MOTOROLA is not set | |
+# CONFIG_USB_SERIAL_NAVMAN is not set | |
+# CONFIG_USB_SERIAL_PL2303 is not set | |
+# CONFIG_USB_SERIAL_OTI6858 is not set | |
+# CONFIG_USB_SERIAL_QCAUX is not set | |
+CONFIG_USB_SERIAL_QUALCOMM=y | |
+# CONFIG_USB_SERIAL_SPCP8X5 is not set | |
+# CONFIG_USB_SERIAL_HP4X is not set | |
+# CONFIG_USB_SERIAL_SAFE is not set | |
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set | |
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | |
+# CONFIG_USB_SERIAL_SYMBOL is not set | |
+# CONFIG_USB_SERIAL_TI is not set | |
+# CONFIG_USB_SERIAL_CYBERJACK is not set | |
+# CONFIG_USB_SERIAL_XIRCOM is not set | |
+CONFIG_USB_SERIAL_WWAN=y | |
+# CONFIG_USB_SERIAL_OPTION is not set | |
+# CONFIG_USB_SERIAL_OMNINET is not set | |
+# CONFIG_USB_SERIAL_OPTICON is not set | |
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | |
+# CONFIG_USB_SERIAL_ZIO is not set | |
+# CONFIG_USB_SERIAL_SSU100 is not set | |
+# CONFIG_USB_SERIAL_CSVT is not set | |
+# CONFIG_USB_SERIAL_DEBUG is not set | |
+ | |
+# | |
+# USB Miscellaneous drivers | |
+# | |
+# CONFIG_USB_EMI62 is not set | |
+# CONFIG_USB_EMI26 is not set | |
+# CONFIG_USB_ADUTUX is not set | |
+# CONFIG_USB_SEVSEG is not set | |
+# CONFIG_USB_RIO500 is not set | |
+# CONFIG_USB_LEGOTOWER is not set | |
+# CONFIG_USB_LCD is not set | |
+# CONFIG_USB_LED is not set | |
+# CONFIG_USB_CYPRESS_CY7C63 is not set | |
+# CONFIG_USB_CYTHERM is not set | |
+# CONFIG_USB_IDMOUSE is not set | |
+# CONFIG_USB_FTDI_ELAN is not set | |
+# CONFIG_USB_APPLEDISPLAY is not set | |
+# CONFIG_USB_SISUSBVGA is not set | |
+# CONFIG_USB_LD is not set | |
+# CONFIG_USB_TRANCEVIBRATOR is not set | |
+# CONFIG_USB_IOWARRIOR is not set | |
+# CONFIG_USB_TEST is not set | |
+CONFIG_USB_EHSET_TEST_FIXTURE=y | |
+# CONFIG_USB_ISIGHTFW is not set | |
+# CONFIG_USB_YUREX is not set | |
+CONFIG_USB_QCOM_DIAG_BRIDGE=y | |
+# CONFIG_USB_QCOM_DIAG_BRIDGE_TEST is not set | |
+CONFIG_USB_QCOM_MDM_BRIDGE=y | |
+# CONFIG_USB_QCOM_KS_BRIDGE is not set | |
+CONFIG_USB_GADGET=y | |
+# CONFIG_USB_GADGET_DEBUG is not set | |
+CONFIG_USB_GADGET_DEBUG_FILES=y | |
+# CONFIG_USB_GADGET_DEBUG_FS is not set | |
+CONFIG_USB_GADGET_VBUS_DRAW=500 | |
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 | |
+ | |
+# | |
+# USB Peripheral Controller | |
+# | |
+# CONFIG_USB_FUSB300 is not set | |
+# CONFIG_USB_R8A66597 is not set | |
+# CONFIG_USB_MV_UDC is not set | |
+# CONFIG_USB_M66592 is not set | |
+# CONFIG_USB_NET2272 is not set | |
+CONFIG_USB_CI13XXX_MSM=y | |
+# CONFIG_USB_CI13XXX_MSM_HSIC is not set | |
+# CONFIG_USB_DWC3_MSM is not set | |
+# CONFIG_USB_MSM_72K is not set | |
+# CONFIG_USB_DUMMY_HCD is not set | |
+CONFIG_USB_GADGET_DUALSPEED=y | |
+# CONFIG_USB_GADGET_SUPERSPEED is not set | |
+# CONFIG_USB_ZERO is not set | |
+# CONFIG_USB_AUDIO is not set | |
+# CONFIG_USB_ETH is not set | |
+# CONFIG_USB_G_NCM is not set | |
+# CONFIG_USB_GADGETFS is not set | |
+# CONFIG_USB_FUNCTIONFS is not set | |
+# CONFIG_USB_FILE_STORAGE is not set | |
+# CONFIG_USB_MASS_STORAGE is not set | |
+# CONFIG_USB_G_SERIAL is not set | |
+# CONFIG_USB_MIDI_GADGET is not set | |
+# CONFIG_USB_G_PRINTER is not set | |
+CONFIG_USB_G_ANDROID=y | |
+# CONFIG_USB_CDC_COMPOSITE is not set | |
+# CONFIG_USB_G_ACM_MS is not set | |
+# CONFIG_USB_G_MULTI is not set | |
+# CONFIG_USB_G_HID is not set | |
+# CONFIG_USB_G_DBGP is not set | |
+# CONFIG_USB_G_WEBCAM is not set | |
+CONFIG_USB_CSW_HACK=y | |
+# CONFIG_USB_MSC_PROFILING is not set | |
+CONFIG_MODEM_SUPPORT=y | |
+CONFIG_RMNET_SMD_CTL_CHANNEL="" | |
+CONFIG_RMNET_SMD_DATA_CHANNEL="" | |
+CONFIG_USB_ANDROID_RMNET_CTRL_SMD=y | |
+ | |
+# | |
+# OTG and related infrastructure | |
+# | |
+CONFIG_USB_OTG_UTILS=y | |
+# CONFIG_USB_OTG_WAKELOCK is not set | |
+# CONFIG_USB_GPIO_VBUS is not set | |
+# CONFIG_USB_ULPI is not set | |
+# CONFIG_USB_MSM_OTG_72K is not set | |
+# CONFIG_NOP_USB_XCEIV is not set | |
+CONFIG_USB_MSM_OTG=y | |
+# CONFIG_USB_MSM_OTG_HTC is not set | |
+# CONFIG_USB_MSM_ACA is not set | |
+CONFIG_MMC=y | |
+# CONFIG_MMC_DEBUG is not set | |
+# CONFIG_MMC_PERF_PROFILING is not set | |
+CONFIG_MMC_MUST_PREVENT_WP_VIOLATION=y | |
+CONFIG_MMC_UNSAFE_RESUME=y | |
+CONFIG_MMC_CLKGATE=y | |
+CONFIG_MMC_EMBEDDED_SDIO=y | |
+CONFIG_MMC_PARANOID_SD_INIT=y | |
+ | |
+# | |
+# MMC/SD/SDIO Card Drivers | |
+# | |
+CONFIG_MMC_BLOCK=y | |
+CONFIG_MMC_BLOCK_MINORS=64 | |
+# CONFIG_MMC_BLOCK_BOUNCE is not set | |
+CONFIG_MMC_BLOCK_DEFERRED_RESUME=y | |
+# CONFIG_SDIO_UART is not set | |
+# CONFIG_MMC_TEST is not set | |
+CONFIG_MMC_CPRM_SUPPORT=y | |
+ | |
+# | |
+# MMC/SD/SDIO Host Controller Drivers | |
+# | |
+# CONFIG_MMC_SDHCI is not set | |
+# CONFIG_MMC_SDHCI_PXAV3 is not set | |
+# CONFIG_MMC_SDHCI_PXAV2 is not set | |
+CONFIG_MMC_MSM=y | |
+CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
+CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT=y | |
+# CONFIG_MMC_MSM_SDC2_SUPPORT is not set | |
+CONFIG_MMC_MSM_SDC3_SUPPORT=y | |
+# CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
+# CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT is not set | |
+CONFIG_MMC_MSM_SDC3_WP_SUPPORT=y | |
+# CONFIG_MMC_MSM_SDC4_SUPPORT is not set | |
+# CONFIG_MMC_MSM_SDC5_SUPPORT is not set | |
+CONFIG_MMC_MSM_SPS_SUPPORT=y | |
+# CONFIG_MMC_DW is not set | |
+# CONFIG_MMC_VUB300 is not set | |
+# CONFIG_MMC_USHC is not set | |
+# CONFIG_HTC_DISABLE_DUMMY52 is not set | |
+# CONFIG_WIFI_IRQ_DEBUG is not set | |
+CONFIG_WIFI_MMC=y | |
+# CONFIG_MEMSTICK is not set | |
+CONFIG_NEW_LEDS=y | |
+CONFIG_LEDS_CLASS=y | |
+ | |
+# | |
+# LED drivers | |
+# | |
+# CONFIG_LEDS_LM3530 is not set | |
+# CONFIG_LEDS_PCA9532 is not set | |
+# CONFIG_LEDS_GPIO is not set | |
+# CONFIG_LEDS_MSM_PDM is not set | |
+# CONFIG_LEDS_PMIC_MPP is not set | |
+# CONFIG_LEDS_LP3944 is not set | |
+# CONFIG_LEDS_CPLD is not set | |
+# CONFIG_LEDS_LP5521 is not set | |
+CONFIG_LEDS_LP5521_HTC=y | |
+# CONFIG_LEDS_LP5523 is not set | |
+# CONFIG_LEDS_PCA955X is not set | |
+# CONFIG_LEDS_PM8XXX is not set | |
+# CONFIG_LEDS_PM8921 is not set | |
+# CONFIG_LEDS_PCA9633 is not set | |
+# CONFIG_LEDS_DAC124S085 is not set | |
+# CONFIG_LEDS_REGULATOR is not set | |
+# CONFIG_LEDS_BD2802 is not set | |
+# CONFIG_LEDS_MSM_PMIC is not set | |
+# CONFIG_LEDS_LT3593 is not set | |
+# CONFIG_LEDS_RENESAS_TPU is not set | |
+# CONFIG_LEDS_TCA6507 is not set | |
+# CONFIG_LEDS_OT200 is not set | |
+CONFIG_LEDS_TRIGGERS=y | |
+ | |
+# | |
+# LED Triggers | |
+# | |
+# CONFIG_LEDS_TRIGGER_TIMER is not set | |
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | |
+# CONFIG_LEDS_TRIGGER_GPIO is not set | |
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | |
+CONFIG_FLASHLIGHT_TPS61310=y | |
+# CONFIG_FLASHLIGHT_1500mA is not set | |
+# CONFIG_LEDS_TRIGGER_SLEEP is not set | |
+ | |
+# | |
+# iptables trigger is under Netfilter config (LED target) | |
+# | |
+CONFIG_SWITCH=y | |
+# CONFIG_SWITCH_GPIO is not set | |
+# CONFIG_ACCESSIBILITY is not set | |
+CONFIG_RTC_LIB=y | |
+CONFIG_RTC_CLASS=y | |
+CONFIG_RTC_HCTOSYS=y | |
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | |
+# CONFIG_RTC_DEBUG is not set | |
+ | |
+# | |
+# RTC interfaces | |
+# | |
+CONFIG_RTC_INTF_SYSFS=y | |
+CONFIG_RTC_INTF_PROC=y | |
+CONFIG_RTC_INTF_DEV=y | |
+CONFIG_RTC_INTF_ALARM=y | |
+CONFIG_RTC_INTF_ALARM_DEV=y | |
+CONFIG_HTC_OFFMODE_ALARM=y | |
+CONFIG_HTC_QUICKBOOT_OFFMODE_ALARM=y | |
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | |
+# CONFIG_RTC_DRV_TEST is not set | |
+ | |
+# | |
+# I2C RTC drivers | |
+# | |
+# CONFIG_RTC_DRV_DS1307 is not set | |
+# CONFIG_RTC_DRV_DS1374 is not set | |
+# CONFIG_RTC_DRV_DS1672 is not set | |
+# CONFIG_RTC_DRV_DS3232 is not set | |
+# CONFIG_RTC_DRV_MAX6900 is not set | |
+# CONFIG_RTC_DRV_RS5C372 is not set | |
+# CONFIG_RTC_DRV_ISL1208 is not set | |
+# CONFIG_RTC_DRV_ISL12022 is not set | |
+# CONFIG_RTC_DRV_X1205 is not set | |
+# CONFIG_RTC_DRV_PCF8563 is not set | |
+# CONFIG_RTC_DRV_PCF8583 is not set | |
+# CONFIG_RTC_DRV_M41T80 is not set | |
+# CONFIG_RTC_DRV_BQ32K is not set | |
+# CONFIG_RTC_DRV_S35390A is not set | |
+# CONFIG_RTC_DRV_FM3130 is not set | |
+# CONFIG_RTC_DRV_RX8581 is not set | |
+# CONFIG_RTC_DRV_RX8025 is not set | |
+# CONFIG_RTC_DRV_EM3027 is not set | |
+# CONFIG_RTC_DRV_RV3029C2 is not set | |
+ | |
+# | |
+# SPI RTC drivers | |
+# | |
+# CONFIG_RTC_DRV_M41T93 is not set | |
+# CONFIG_RTC_DRV_M41T94 is not set | |
+# CONFIG_RTC_DRV_DS1305 is not set | |
+# CONFIG_RTC_DRV_DS1390 is not set | |
+# CONFIG_RTC_DRV_MAX6902 is not set | |
+# CONFIG_RTC_DRV_R9701 is not set | |
+# CONFIG_RTC_DRV_RS5C348 is not set | |
+# CONFIG_RTC_DRV_DS3234 is not set | |
+# CONFIG_RTC_DRV_PCF2123 is not set | |
+ | |
+# | |
+# Platform RTC drivers | |
+# | |
+# CONFIG_RTC_DRV_CMOS is not set | |
+# CONFIG_RTC_DRV_DS1286 is not set | |
+# CONFIG_RTC_DRV_DS1511 is not set | |
+# CONFIG_RTC_DRV_DS1553 is not set | |
+# CONFIG_RTC_DRV_DS1742 is not set | |
+# CONFIG_RTC_DRV_STK17TA8 is not set | |
+# CONFIG_RTC_DRV_M48T86 is not set | |
+# CONFIG_RTC_DRV_M48T35 is not set | |
+# CONFIG_RTC_DRV_M48T59 is not set | |
+# CONFIG_RTC_DRV_MSM6242 is not set | |
+# CONFIG_RTC_DRV_BQ4802 is not set | |
+# CONFIG_RTC_DRV_RP5C01 is not set | |
+# CONFIG_RTC_DRV_V3020 is not set | |
+ | |
+# | |
+# on-CPU RTC drivers | |
+# | |
+# CONFIG_RTC_DRV_MSM is not set | |
+# CONFIG_RTC_DRV_MSM7X00A is not set | |
+CONFIG_RTC_DRV_PM8XXX=y | |
+# CONFIG_DMADEVICES is not set | |
+# CONFIG_AUXDISPLAY is not set | |
+# CONFIG_UIO is not set | |
+ | |
+# | |
+# Virtio drivers | |
+# | |
+# CONFIG_VIRTIO_BALLOON is not set | |
+# CONFIG_VIRTIO_MMIO is not set | |
+ | |
+# | |
+# Microsoft Hyper-V guest support | |
+# | |
+CONFIG_STAGING=y | |
+# CONFIG_USBIP_CORE is not set | |
+# CONFIG_PRISM2_USB is not set | |
+# CONFIG_ECHO is not set | |
+# CONFIG_ASUS_OLED is not set | |
+# CONFIG_R8712U is not set | |
+# CONFIG_RTS5139 is not set | |
+# CONFIG_TRANZPORT is not set | |
+# CONFIG_LINE6_USB is not set | |
+# CONFIG_USB_SERIAL_QUATECH2 is not set | |
+# CONFIG_USB_SERIAL_QUATECH_USB2 is not set | |
+# CONFIG_IIO is not set | |
+CONFIG_QCACHE=y | |
+# CONFIG_FB_SM7XX is not set | |
+# CONFIG_BCM_WIMAX is not set | |
+# CONFIG_FT1000 is not set | |
+ | |
+# | |
+# Speakup console speech | |
+# | |
+# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set | |
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set | |
+# CONFIG_STAGING_MEDIA is not set | |
+ | |
+# | |
+# Android | |
+# | |
+CONFIG_ANDROID=y | |
+CONFIG_ANDROID_BINDER_IPC=y | |
+CONFIG_ANDROID_LOGGER=y | |
+CONFIG_ANDROID_PERSISTENT_RAM=y | |
+CONFIG_ANDROID_RAM_CONSOLE=y | |
+# CONFIG_DEBUG_BLDR_LOG is not set | |
+# CONFIG_DEBUG_LAST_BLDR_LOG is not set | |
+# CONFIG_PERSISTENT_TRACER is not set | |
+CONFIG_ANDROID_TIMED_OUTPUT=y | |
+CONFIG_ANDROID_TIMED_GPIO=y | |
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y | |
+CONFIG_ANDROID_LOW_MEMORY_KILLER_AUTODETECT_OOM_ADJ_VALUES=y | |
+# CONFIG_ANDROID_SWITCH is not set | |
+# CONFIG_ANDROID_INTF_ALARM_DEV is not set | |
+# CONFIG_PHONE is not set | |
+# CONFIG_USB_WPAN_HCD is not set | |
+ | |
+# | |
+# Qualcomm MSM specific device drivers | |
+# | |
+CONFIG_MSM_SSBI=y | |
+CONFIG_SPS=y | |
+# CONFIG_USB_BAM is not set | |
+CONFIG_SPS_SUPPORT_BAMDMA=y | |
+# CONFIG_SPS_SUPPORT_NDP_BAM is not set | |
+CONFIG_CLKDEV_LOOKUP=y | |
+CONFIG_HAVE_CLK_PREPARE=y | |
+ | |
+# | |
+# Hardware Spinlock drivers | |
+# | |
+CONFIG_IOMMU_SUPPORT=y | |
+CONFIG_MSM_IOMMU=y | |
+CONFIG_MSM_IOMMU_GPU_SYNC=y | |
+CONFIG_IOMMU_PGTABLES_L2=y | |
+ | |
+# | |
+# Remoteproc drivers (EXPERIMENTAL) | |
+# | |
+ | |
+# | |
+# Rpmsg drivers (EXPERIMENTAL) | |
+# | |
+# CONFIG_VIRT_DRIVERS is not set | |
+# CONFIG_PM_DEVFREQ is not set | |
+CONFIG_FELICA_CXD2235_DD=y | |
+# CONFIG_FELICA_DD is not set | |
+# CONFIG_MOBICORE_SUPPORT is not set | |
+# CONFIG_MSM_QDSS is not set | |
+# CONFIG_DIRTY_SYSTEM_DETECTOR is not set | |
+# CONFIG_HTC_DEBUG_SEND_SIGNAL is not set | |
+# CONFIG_HTC_DEBUG_SAVE_BOOT_MSG is not set | |
+ | |
+# | |
+# File systems | |
+# | |
+# CONFIG_EXT2_FS is not set | |
+# CONFIG_EXT3_FS is not set | |
+CONFIG_EXT4_FS=y | |
+CONFIG_EXT4_USE_FOR_EXT23=y | |
+CONFIG_EXT4_FS_XATTR=y | |
+# CONFIG_EXT4_FS_POSIX_ACL is not set | |
+CONFIG_EXT4_FS_SECURITY=y | |
+# CONFIG_EXT4_DEBUG is not set | |
+CONFIG_EXT4_E2FSCK_RECOVER=y | |
+CONFIG_JBD2=y | |
+# CONFIG_JBD2_DEBUG is not set | |
+CONFIG_FS_MBCACHE=y | |
+# CONFIG_REISERFS_FS is not set | |
+# CONFIG_JFS_FS is not set | |
+# CONFIG_XFS_FS is not set | |
+# CONFIG_GFS2_FS is not set | |
+# CONFIG_BTRFS_FS is not set | |
+# CONFIG_NILFS2_FS is not set | |
+CONFIG_FS_POSIX_ACL=y | |
+CONFIG_FILE_LOCKING=y | |
+CONFIG_FSNOTIFY=y | |
+# CONFIG_DNOTIFY is not set | |
+CONFIG_INOTIFY_USER=y | |
+# CONFIG_FANOTIFY is not set | |
+# CONFIG_QUOTA is not set | |
+# CONFIG_QUOTACTL is not set | |
+# CONFIG_AUTOFS4_FS is not set | |
+CONFIG_FUSE_FS=y | |
+CONFIG_FUSE_SD=y | |
+# CONFIG_CUSE is not set | |
+ | |
+# | |
+# Caches | |
+# | |
+# CONFIG_FSCACHE is not set | |
+ | |
+# | |
+# CD-ROM/DVD Filesystems | |
+# | |
+# CONFIG_ISO9660_FS is not set | |
+# CONFIG_UDF_FS is not set | |
+ | |
+# | |
+# DOS/FAT/NT Filesystems | |
+# | |
+CONFIG_FAT_FS=y | |
+# CONFIG_MSDOS_FS is not set | |
+CONFIG_VFAT_FS=y | |
+CONFIG_FAT_DEFAULT_CODEPAGE=437 | |
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |
+CONFIG_NTFS_FS=y | |
+# CONFIG_NTFS_DEBUG is not set | |
+# CONFIG_NTFS_RW is not set | |
+ | |
+# | |
+# Pseudo filesystems | |
+# | |
+CONFIG_PROC_FS=y | |
+CONFIG_PROC_SYSCTL=y | |
+CONFIG_PROC_PAGE_MONITOR=y | |
+CONFIG_SYSFS=y | |
+CONFIG_TMPFS=y | |
+# CONFIG_TMPFS_POSIX_ACL is not set | |
+# CONFIG_TMPFS_XATTR is not set | |
+# CONFIG_HUGETLB_PAGE is not set | |
+# CONFIG_CONFIGFS_FS is not set | |
+CONFIG_MISC_FILESYSTEMS=y | |
+# CONFIG_ADFS_FS is not set | |
+# CONFIG_AFFS_FS is not set | |
+# CONFIG_ECRYPT_FS is not set | |
+# CONFIG_HFS_FS is not set | |
+# CONFIG_HFSPLUS_FS is not set | |
+# CONFIG_BEFS_FS is not set | |
+# CONFIG_BFS_FS is not set | |
+# CONFIG_EFS_FS is not set | |
+# CONFIG_LOGFS is not set | |
+# CONFIG_CRAMFS is not set | |
+# CONFIG_SQUASHFS is not set | |
+# CONFIG_VXFS_FS is not set | |
+# CONFIG_MINIX_FS is not set | |
+# CONFIG_OMFS_FS is not set | |
+# CONFIG_HPFS_FS is not set | |
+# CONFIG_QNX4FS_FS is not set | |
+# CONFIG_QNX6FS_FS is not set | |
+# CONFIG_ROMFS_FS is not set | |
+# CONFIG_PSTORE is not set | |
+# CONFIG_SYSV_FS is not set | |
+# CONFIG_UFS_FS is not set | |
+CONFIG_F2FS_FS=y | |
+CONFIG_F2FS_STAT_FS=y | |
+CONFIG_F2FS_FS_XATTR=y | |
+CONFIG_F2FS_FS_POSIX_ACL=y | |
+CONFIG_F2FS_FS_SECURITY=y | |
+# CONFIG_F2FS_CHECK_FS is not set | |
+CONFIG_NETWORK_FILESYSTEMS=y | |
+# CONFIG_NFS_FS is not set | |
+# CONFIG_NFSD is not set | |
+# CONFIG_CEPH_FS is not set | |
+CONFIG_CIFS=y | |
+CONFIG_CIFS_STATS=y | |
+CONFIG_CIFS_STATS2=y | |
+CONFIG_CIFS_WEAK_PW_HASH=y | |
+CONFIG_CIFS_UPCALL=y | |
+CONFIG_CIFS_XATTR=y | |
+CONFIG_CIFS_POSIX=y | |
+CONFIG_CIFS_DEBUG2=y | |
+CONFIG_CIFS_DFS_UPCALL=y | |
+CONFIG_CIFS_ACL=y | |
+# CONFIG_NCP_FS is not set | |
+# CONFIG_CODA_FS is not set | |
+# CONFIG_AFS_FS is not set | |
+CONFIG_NLS=y | |
+CONFIG_NLS_DEFAULT="iso8859-1" | |
+CONFIG_NLS_CODEPAGE_437=y | |
+# CONFIG_NLS_CODEPAGE_737 is not set | |
+# CONFIG_NLS_CODEPAGE_775 is not set | |
+# CONFIG_NLS_CODEPAGE_850 is not set | |
+# CONFIG_NLS_CODEPAGE_852 is not set | |
+# CONFIG_NLS_CODEPAGE_855 is not set | |
+# CONFIG_NLS_CODEPAGE_857 is not set | |
+# CONFIG_NLS_CODEPAGE_860 is not set | |
+# CONFIG_NLS_CODEPAGE_861 is not set | |
+# CONFIG_NLS_CODEPAGE_862 is not set | |
+# CONFIG_NLS_CODEPAGE_863 is not set | |
+# CONFIG_NLS_CODEPAGE_864 is not set | |
+# CONFIG_NLS_CODEPAGE_865 is not set | |
+# CONFIG_NLS_CODEPAGE_866 is not set | |
+# CONFIG_NLS_CODEPAGE_869 is not set | |
+# CONFIG_NLS_CODEPAGE_936 is not set | |
+# CONFIG_NLS_CODEPAGE_950 is not set | |
+# CONFIG_NLS_CODEPAGE_932 is not set | |
+# CONFIG_NLS_CODEPAGE_949 is not set | |
+# CONFIG_NLS_CODEPAGE_874 is not set | |
+# CONFIG_NLS_ISO8859_8 is not set | |
+# CONFIG_NLS_CODEPAGE_1250 is not set | |
+# CONFIG_NLS_CODEPAGE_1251 is not set | |
+CONFIG_NLS_ASCII=y | |
+CONFIG_NLS_ISO8859_1=y | |
+# CONFIG_NLS_ISO8859_2 is not set | |
+# CONFIG_NLS_ISO8859_3 is not set | |
+# CONFIG_NLS_ISO8859_4 is not set | |
+# CONFIG_NLS_ISO8859_5 is not set | |
+# CONFIG_NLS_ISO8859_6 is not set | |
+# CONFIG_NLS_ISO8859_7 is not set | |
+# CONFIG_NLS_ISO8859_9 is not set | |
+# CONFIG_NLS_ISO8859_13 is not set | |
+# CONFIG_NLS_ISO8859_14 is not set | |
+# CONFIG_NLS_ISO8859_15 is not set | |
+# CONFIG_NLS_KOI8_R is not set | |
+# CONFIG_NLS_KOI8_U is not set | |
+CONFIG_NLS_UTF8=y | |
+# CONFIG_EXFAT_FS is not set | |
+CONFIG_ASYNC_FSYNC=y | |
+ | |
+# | |
+# Kernel hacking | |
+# | |
+CONFIG_PRINTK_TIME=y | |
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=6 | |
+CONFIG_ENABLE_WARN_DEPRECATED=y | |
+CONFIG_ENABLE_MUST_CHECK=y | |
+CONFIG_FRAME_WARN=2048 | |
+CONFIG_MAGIC_SYSRQ=y | |
+# CONFIG_STRIP_ASM_SYMS is not set | |
+# CONFIG_UNUSED_SYMBOLS is not set | |
+CONFIG_DEBUG_FS=y | |
+# CONFIG_HEADERS_CHECK is not set | |
+# CONFIG_DEBUG_SECTION_MISMATCH is not set | |
+CONFIG_DEBUG_KERNEL=y | |
+# CONFIG_DEBUG_SHIRQ is not set | |
+# CONFIG_LOCKUP_DETECTOR is not set | |
+# CONFIG_HARDLOCKUP_DETECTOR is not set | |
+# CONFIG_DETECT_HUNG_TASK is not set | |
+# CONFIG_SCHED_DEBUG is not set | |
+# CONFIG_SCHEDSTATS is not set | |
+CONFIG_TIMER_STATS=y | |
+# CONFIG_DEBUG_OBJECTS is not set | |
+# CONFIG_SLUB_STATS is not set | |
+CONFIG_DEBUG_KMEMLEAK=y | |
+CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=2000 | |
+CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y | |
+# CONFIG_DEBUG_PREEMPT is not set | |
+# CONFIG_DEBUG_RT_MUTEXES is not set | |
+# CONFIG_RT_MUTEX_TESTER is not set | |
+# CONFIG_DEBUG_SPINLOCK is not set | |
+# CONFIG_DEBUG_MUTEXES is not set | |
+# CONFIG_DEBUG_LOCK_ALLOC is not set | |
+# CONFIG_PROVE_LOCKING is not set | |
+# CONFIG_SPARSE_RCU_POINTER is not set | |
+# CONFIG_LOCK_STAT is not set | |
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set | |
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | |
+CONFIG_STACKTRACE=y | |
+# CONFIG_DEBUG_STACK_USAGE is not set | |
+# CONFIG_DEBUG_KOBJECT is not set | |
+# CONFIG_DEBUG_HIGHMEM is not set | |
+CONFIG_DEBUG_BUGVERBOSE=y | |
+CONFIG_DEBUG_INFO=y | |
+# CONFIG_DEBUG_INFO_REDUCED is not set | |
+# CONFIG_DEBUG_VM is not set | |
+# CONFIG_DEBUG_WRITECOUNT is not set | |
+CONFIG_DEBUG_MEMORY_INIT=y | |
+# CONFIG_DEBUG_LIST is not set | |
+# CONFIG_TEST_LIST_SORT is not set | |
+# CONFIG_DEBUG_SG is not set | |
+# CONFIG_DEBUG_NOTIFIERS is not set | |
+# CONFIG_DEBUG_CREDENTIALS is not set | |
+CONFIG_FRAME_POINTER=y | |
+# CONFIG_BOOT_PRINTK_DELAY is not set | |
+# CONFIG_RCU_TORTURE_TEST is not set | |
+CONFIG_RCU_CPU_STALL_TIMEOUT=60 | |
+# CONFIG_RCU_CPU_STALL_VERBOSE is not set | |
+# CONFIG_RCU_CPU_STALL_INFO is not set | |
+# CONFIG_RCU_TRACE is not set | |
+# CONFIG_BACKTRACE_SELF_TEST is not set | |
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | |
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | |
+# CONFIG_DEBUG_PER_CPU_MAPS is not set | |
+# CONFIG_LKDTM is not set | |
+# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set | |
+# CONFIG_FAULT_INJECTION is not set | |
+# CONFIG_DEBUG_PAGEALLOC is not set | |
+CONFIG_NOP_TRACER=y | |
+CONFIG_HAVE_FUNCTION_TRACER=y | |
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | |
+CONFIG_HAVE_DYNAMIC_FTRACE=y | |
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | |
+CONFIG_HAVE_C_RECORDMCOUNT=y | |
+CONFIG_TRACER_MAX_TRACE=y | |
+CONFIG_RING_BUFFER=y | |
+CONFIG_EVENT_TRACING=y | |
+# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set | |
+CONFIG_CONTEXT_SWITCH_TRACER=y | |
+CONFIG_TRACING=y | |
+CONFIG_GENERIC_TRACER=y | |
+CONFIG_TRACING_SUPPORT=y | |
+CONFIG_FTRACE=y | |
+CONFIG_FUNCTION_TRACER=y | |
+CONFIG_FUNCTION_GRAPH_TRACER=y | |
+# CONFIG_IRQSOFF_TRACER is not set | |
+# CONFIG_PREEMPT_TRACER is not set | |
+CONFIG_SCHED_TRACER=y | |
+CONFIG_BRANCH_PROFILE_NONE=y | |
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | |
+# CONFIG_PROFILE_ALL_BRANCHES is not set | |
+# CONFIG_STACK_TRACER is not set | |
+CONFIG_BLK_DEV_IO_TRACE=y | |
+CONFIG_DYNAMIC_FTRACE=y | |
+CONFIG_FUNCTION_PROFILER=y | |
+# CONFIG_CPU_FREQ_SWITCH_PROFILER is not set | |
+CONFIG_FTRACE_MCOUNT_RECORD=y | |
+# CONFIG_FTRACE_STARTUP_TEST is not set | |
+# CONFIG_RING_BUFFER_BENCHMARK is not set | |
+# CONFIG_DYNAMIC_DEBUG is not set | |
+# CONFIG_DMA_API_DEBUG is not set | |
+# CONFIG_ATOMIC64_SELFTEST is not set | |
+# CONFIG_PANIC_ON_DATA_CORRUPTION is not set | |
+# CONFIG_SAMPLES is not set | |
+CONFIG_HAVE_ARCH_KGDB=y | |
+# CONFIG_KGDB is not set | |
+# CONFIG_TEST_KSTRTOX is not set | |
+CONFIG_STRICT_DEVMEM=y | |
+CONFIG_ARM_UNWIND=y | |
+CONFIG_OLD_MCOUNT=y | |
+# CONFIG_DEBUG_USER is not set | |
+# CONFIG_DEBUG_RODATA is not set | |
+# CONFIG_DEBUG_LL is not set | |
+CONFIG_PID_IN_CONTEXTIDR=y | |
+ | |
+# | |
+# Security options | |
+# | |
+CONFIG_KEYS=y | |
+# CONFIG_ENCRYPTED_KEYS is not set | |
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set | |
+# CONFIG_SECURITY_DMESG_RESTRICT is not set | |
+CONFIG_SECURITY=y | |
+# CONFIG_SECURITYFS is not set | |
+CONFIG_SECURITY_NETWORK=y | |
+# CONFIG_SECURITY_NETWORK_XFRM is not set | |
+# CONFIG_SECURITY_PATH is not set | |
+CONFIG_LSM_MMAP_MIN_ADDR=32768 | |
+CONFIG_SECURITY_SELINUX=y | |
+# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set | |
+# CONFIG_SECURITY_SELINUX_DISABLE is not set | |
+CONFIG_SECURITY_SELINUX_DEVELOP=y | |
+CONFIG_SECURITY_SELINUX_AVC_STATS=y | |
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | |
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | |
+# CONFIG_SECURITY_TOMOYO is not set | |
+# CONFIG_SECURITY_APPARMOR is not set | |
+# CONFIG_SECURITY_YAMA is not set | |
+# CONFIG_SECURITY_ROOTFCTRL is not set | |
+# CONFIG_IMA is not set | |
+# CONFIG_EVM is not set | |
+CONFIG_DEFAULT_SECURITY_SELINUX=y | |
+# CONFIG_DEFAULT_SECURITY_DAC is not set | |
+CONFIG_DEFAULT_SECURITY="selinux" | |
+CONFIG_CRYPTO=y | |
+ | |
+# | |
+# Crypto core or helper | |
+# | |
+CONFIG_CRYPTO_ALGAPI=y | |
+CONFIG_CRYPTO_ALGAPI2=y | |
+CONFIG_CRYPTO_AEAD=y | |
+CONFIG_CRYPTO_AEAD2=y | |
+CONFIG_CRYPTO_BLKCIPHER=y | |
+CONFIG_CRYPTO_BLKCIPHER2=y | |
+CONFIG_CRYPTO_HASH=y | |
+CONFIG_CRYPTO_HASH2=y | |
+CONFIG_CRYPTO_RNG=y | |
+CONFIG_CRYPTO_RNG2=y | |
+CONFIG_CRYPTO_PCOMP2=y | |
+CONFIG_CRYPTO_MANAGER=y | |
+CONFIG_CRYPTO_MANAGER2=y | |
+# CONFIG_CRYPTO_USER is not set | |
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y | |
+# CONFIG_CRYPTO_GF128MUL is not set | |
+# CONFIG_CRYPTO_NULL is not set | |
+# CONFIG_CRYPTO_PCRYPT is not set | |
+CONFIG_CRYPTO_WORKQUEUE=y | |
+# CONFIG_CRYPTO_CRYPTD is not set | |
+CONFIG_CRYPTO_AUTHENC=y | |
+ | |
+# | |
+# Authenticated Encryption with Associated Data | |
+# | |
+# CONFIG_CRYPTO_CCM is not set | |
+# CONFIG_CRYPTO_GCM is not set | |
+# CONFIG_CRYPTO_SEQIV is not set | |
+ | |
+# | |
+# Block modes | |
+# | |
+CONFIG_CRYPTO_CBC=y | |
+# CONFIG_CRYPTO_CTR is not set | |
+# CONFIG_CRYPTO_CTS is not set | |
+CONFIG_CRYPTO_ECB=y | |
+# CONFIG_CRYPTO_LRW is not set | |
+# CONFIG_CRYPTO_PCBC is not set | |
+# CONFIG_CRYPTO_XTS is not set | |
+ | |
+# | |
+# Hash modes | |
+# | |
+CONFIG_CRYPTO_HMAC=y | |
+# CONFIG_CRYPTO_XCBC is not set | |
+# CONFIG_CRYPTO_VMAC is not set | |
+ | |
+# | |
+# Digest | |
+# | |
+CONFIG_CRYPTO_CRC32C=y | |
+# CONFIG_CRYPTO_GHASH is not set | |
+CONFIG_CRYPTO_MD4=y | |
+CONFIG_CRYPTO_MD5=y | |
+# CONFIG_CRYPTO_MICHAEL_MIC is not set | |
+# CONFIG_CRYPTO_RMD128 is not set | |
+# CONFIG_CRYPTO_RMD160 is not set | |
+# CONFIG_CRYPTO_RMD256 is not set | |
+# CONFIG_CRYPTO_RMD320 is not set | |
+CONFIG_CRYPTO_SHA1=y | |
+CONFIG_CRYPTO_SHA256=y | |
+# CONFIG_CRYPTO_SHA512 is not set | |
+# CONFIG_CRYPTO_TGR192 is not set | |
+# CONFIG_CRYPTO_WP512 is not set | |
+ | |
+# | |
+# Ciphers | |
+# | |
+CONFIG_CRYPTO_AES=y | |
+# CONFIG_CRYPTO_ANUBIS is not set | |
+CONFIG_CRYPTO_ARC4=y | |
+# CONFIG_CRYPTO_BLOWFISH is not set | |
+# CONFIG_CRYPTO_CAMELLIA is not set | |
+# CONFIG_CRYPTO_CAST5 is not set | |
+# CONFIG_CRYPTO_CAST6 is not set | |
+CONFIG_CRYPTO_DES=y | |
+# CONFIG_CRYPTO_FCRYPT is not set | |
+# CONFIG_CRYPTO_KHAZAD is not set | |
+# CONFIG_CRYPTO_SALSA20 is not set | |
+# CONFIG_CRYPTO_SEED is not set | |
+# CONFIG_CRYPTO_SERPENT is not set | |
+# CONFIG_CRYPTO_TEA is not set | |
+CONFIG_CRYPTO_TWOFISH=y | |
+CONFIG_CRYPTO_TWOFISH_COMMON=y | |
+ | |
+# | |
+# Compression | |
+# | |
+CONFIG_CRYPTO_DEFLATE=y | |
+# CONFIG_CRYPTO_ZLIB is not set | |
+# CONFIG_CRYPTO_LZO is not set | |
+ | |
+# | |
+# Random Number Generation | |
+# | |
+CONFIG_CRYPTO_ANSI_CPRNG=y | |
+# CONFIG_CRYPTO_USER_API_HASH is not set | |
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set | |
+CONFIG_CRYPTO_HW=y | |
+# CONFIG_CRYPTO_DEV_QCRYPTO is not set | |
+# CONFIG_CRYPTO_DEV_QCE is not set | |
+# CONFIG_CRYPTO_DEV_QCEDEV is not set | |
+# CONFIG_CRYPTO_DEV_OTA_CRYPTO is not set | |
+CONFIG_BINARY_PRINTF=y | |
+ | |
+# | |
+# Library routines | |
+# | |
+CONFIG_BITREVERSE=y | |
+CONFIG_GENERIC_STRNCPY_FROM_USER=y | |
+CONFIG_GENERIC_STRNLEN_USER=y | |
+CONFIG_GENERIC_PCI_IOMAP=y | |
+CONFIG_GENERIC_IO=y | |
+CONFIG_CRC_CCITT=y | |
+CONFIG_CRC16=y | |
+# CONFIG_CRC_T10DIF is not set | |
+# CONFIG_CRC_ITU_T is not set | |
+CONFIG_CRC32=y | |
+# CONFIG_CRC32_SELFTEST is not set | |
+CONFIG_CRC32_SLICEBY8=y | |
+# CONFIG_CRC32_SLICEBY4 is not set | |
+# CONFIG_CRC32_SARWATE is not set | |
+# CONFIG_CRC32_BIT is not set | |
+# CONFIG_CRC7 is not set | |
+CONFIG_LIBCRC32C=y | |
+# CONFIG_CRC8 is not set | |
+CONFIG_AUDIT_GENERIC=y | |
+CONFIG_ZLIB_INFLATE=y | |
+CONFIG_ZLIB_DEFLATE=y | |
+CONFIG_LZO_COMPRESS=y | |
+CONFIG_LZO_DECOMPRESS=y | |
+# CONFIG_XZ_DEC is not set | |
+# CONFIG_XZ_DEC_BCJ is not set | |
+CONFIG_DECOMPRESS_GZIP=y | |
+CONFIG_GENERIC_ALLOCATOR=y | |
+CONFIG_REED_SOLOMON=y | |
+CONFIG_REED_SOLOMON_ENC8=y | |
+CONFIG_REED_SOLOMON_DEC8=y | |
+CONFIG_TEXTSEARCH=y | |
+CONFIG_TEXTSEARCH_KMP=y | |
+CONFIG_TEXTSEARCH_BM=y | |
+CONFIG_TEXTSEARCH_FSM=y | |
+CONFIG_HAS_IOMEM=y | |
+CONFIG_HAS_IOPORT=y | |
+CONFIG_HAS_DMA=y | |
+CONFIG_CPU_RMAP=y | |
+CONFIG_DQL=y | |
+CONFIG_NLATTR=y | |
+# CONFIG_AVERAGE is not set | |
+# CONFIG_CORDIC is not set | |
diff --git arch/arm/mach-msm/Kconfig arch/arm/mach-msm/Kconfig | |
index 7b143c4..f288d5d 100644 | |
--- arch/arm/mach-msm/Kconfig | |
+++ arch/arm/mach-msm/Kconfig | |
@@ -2669,6 +2669,12 @@ config MACH_M7_DXG | |
help | |
Support for the HTC APQ8064 M7_DXG. | |
+config MACH_IMPRESSION_J | |
+ depends on ARCH_APQ8064 | |
+ bool "APQ8064 IMPRESSION_J" | |
+ help | |
+ Support for the HTC APQ8064 IMPRESSION_J. | |
+ | |
config MACH_T6_DXG | |
depends on ARCH_APQ8064 | |
bool "APQ8064 T6_DXG" | |
diff --git arch/arm/mach-msm/Makefile arch/arm/mach-msm/Makefile | |
index 217c789..66f42ba 100644 | |
--- arch/arm/mach-msm/Makefile | |
+++ arch/arm/mach-msm/Makefile | |
@@ -220,6 +220,7 @@ ifdef CONFIG_BT | |
obj-$(CONFIG_MACH_M7_WLJ) += board-m7wl-rfkill.o htc_bdaddress.o htc_4335_wl_reg.o | |
obj-$(CONFIG_MACH_MONARUDO) += board-monarudo-rfkill.o htc_bdaddress.o | |
obj-$(CONFIG_MACH_M7_UL) += board-m7-rfkill.o htc_bdaddress.o htc_4335_wl_reg.o | |
+ obj-$(CONFIG_MACH_IMPRESSION_J) += board-impression_j-rfkill.o htc_bdaddress.o | |
endif | |
#ifdef CONFIG_MSM_CAMERA_V4L2 | |
@@ -290,17 +291,19 @@ board-monarudo-all-objs += board-monarudo.o board-monarudo-pmic.o board-monarudo | |
board-m7-all-objs += board-m7.o board-m7-pmic.o board-m7-storage.o board-m7-gpiomux.o board-m7-keypad.o board-m7-wifi.o board-m7-audio.o | |
board-deluxe_j-all-objs += board-deluxe_j.o board-deluxe_j-pmic.o board-deluxe_j-storage.o board-deluxe_j-gpiomux.o board-deluxe_j-keypad.o board-deluxe_j-wifi.o board-deluxe_j-audio.o | |
board-m7wlj-all-objs += board-m7wlj.o board-m7wlj-pmic.o board-m7wlj-storage.o board-m7wlj-gpiomux.o board-m7wlj-keypad.o board-m7wl-wifi.o board-m7wlj-audio.o | |
- | |
+board-impression_j-all-objs += board-impression_j.o board-impression_j-pmic.o board-impression_j-storage.o board-impression_j-gpiomux.o board-impression_j-display.o board-impression_j-gpu.o board-impression_j-keypad.o board-impression_j-wifi.o board-impression_j-audio.o | |
ifdef CONFIG_FB_MSM | |
board-m7-all-objs += board-m7-display.o board-m7-gpu.o | |
board-deluxe_j-all-objs += board-deluxe_j-display.o board-deluxe_j-gpu.o | |
board-m7wlj-all-objs += board-m7wl-display.o board-m7wl-gpu.o | |
+board-impression_j-all-objs += board-impression_j-display.o board-impression_j-gpu.o | |
endif | |
ifdef CONFIG_MSM_CAMERA | |
board-monarudo-all-objs += board-monarudo-camera.o | |
board-m7-all-objs += board-m7-camera.o | |
board-deluxe_j-all-objs += board-deluxe_j-camera.o | |
board-m7wlj-all-objs += board-m7wlj-camera.o | |
+board-impression_j-all-objs += board-impression_j-camera.o | |
endif | |
obj-$(CONFIG_MACH_MSM8960_SIM) += board-8960-all.o board-8960-regulator.o | |
obj-$(CONFIG_MACH_MSM8960_RUMI3) += board-8960-all.o board-8960-regulator.o | |
@@ -320,6 +323,7 @@ obj-$(CONFIG_MACH_MPQ8064_HRD) += board-8064-all.o board-8064-regulator.o | |
obj-$(CONFIG_MACH_MPQ8064_DTV) += board-8064-all.o board-8064-regulator.o | |
obj-$(CONFIG_MACH_MONARUDO) += board-monarudo-all.o board-monarudo-regulator.o | |
obj-$(CONFIG_MACH_M7_UL) += board-m7-all.o board-m7-regulator.o | |
+obj-$(CONFIG_MACH_IMPRESSION_J) += board-impression_j-all.o board-impression_j-regulator.o | |
ifdef CONFIG_MACH_M7_UL | |
obj-$(CONFIG_BT_MSM_SLEEP) += board-m7-bluesleep.o | |
endif | |
@@ -333,6 +337,8 @@ obj-$(CONFIG_MACH_MONARUDO) += htc_util.o | |
obj-$(CONFIG_MACH_M7_UL) += htc_util.o | |
obj-$(CONFIG_MACH_DELUXE_J) += htc_util.o | |
obj-$(CONFIG_MACH_DELUXE_J) += ADP5585_ioextender.o | |
+obj-$(CONFIG_MACH_IMPRESSION_J) += htc_util.o | |
+obj-$(CONFIG_MACH_IMPRESSION_J) += ADP5585_ioextender.o | |
obj-$(CONFIG_MACH_M7_WLJ) += htc_util.o | |
obj-$(CONFIG_MACH_M7_WLJ) += ADP5585_ioextender.o | |
obj-$(CONFIG_MACH_ELITE) += board-elite.o board-elite-regulator.o board-elite-gpiomux.o board-elite-storage.o board-elite-audio.o board-elite-camera.o | |
diff --git arch/arm/mach-msm/board-impression_j-audio.c arch/arm/mach-msm/board-impression_j-audio.c | |
new file mode 100644 | |
index 0000000..b0e1176 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-audio.c | |
@@ -0,0 +1,156 @@ | |
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * HTC: elite machine driver which defines board-specific data | |
+ * Copy from sound/soc/msm/msm8960.c | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ */ | |
+ | |
+#include <linux/platform_device.h> | |
+#include <sound/pcm.h> | |
+#include <sound/q6asm.h> | |
+#include <mach/htc_acoustic_8960.h> | |
+#include <linux/module.h> | |
+#include "board-impression_j.h" | |
+#include "../sound/soc/msm/msm-pcm-routing.h" | |
+#include <linux/gpio.h> | |
+#include <mach/tpa6185.h> | |
+#include <mach/rt5501.h> | |
+static atomic_t q6_effect_mode = ATOMIC_INIT(-1); | |
+#define HAC_PAMP_GPIO 6 | |
+static struct regulator *reg_8921_lvs2; | |
+extern unsigned int system_rev; | |
+ | |
+static int power_on_amp(char *power, struct regulator **regul) | |
+{ | |
+ int rc; | |
+ | |
+ if (power == NULL) | |
+ return -ENODEV; | |
+ | |
+ *regul = regulator_get(NULL, power); | |
+ | |
+ if (IS_ERR(*regul)) { | |
+ pr_info("%s: failed to get %s\n", __func__, power); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_enable(*regul); | |
+ if (rc < 0) { | |
+ pr_info("%s: failed to Enable regulator %s failed\n", __func__, power); | |
+ regulator_put(*regul); | |
+ *regul = NULL; | |
+ return -ENODEV; | |
+ } | |
+ | |
+ return rc; | |
+} | |
+ | |
+static int power_off_amp(struct regulator *regul) | |
+{ | |
+ | |
+ int rc; | |
+ if (regul == NULL) | |
+ return -ENODEV; | |
+ | |
+ if (IS_ERR(regul)) { | |
+ pr_info(" %s: Invalid requlator ptr\n", __func__); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_disable(regul); | |
+ if (rc < 0) | |
+ pr_info("%s: disable regulator failed\n", __func__); | |
+ | |
+ regulator_put(regul); | |
+ regul = NULL; | |
+ return rc; | |
+} | |
+ | |
+static int impression_get_hw_component(void) | |
+{ | |
+ int hw_com = 0; | |
+ | |
+ if(query_tpa6185()) | |
+ hw_com |= HTC_AUDIO_TPA6185; | |
+ | |
+ if(query_rt5501()) | |
+ hw_com |= HTC_AUDIO_RT5501; | |
+ | |
+ return hw_com; | |
+} | |
+ | |
+static int impression_enable_digital_mic(void) | |
+{ | |
+ return 0; | |
+} | |
+ | |
+void apq8064_set_q6_effect_mode(int mode) | |
+{ | |
+ pr_info("%s: mode %d\n", __func__, mode); | |
+ atomic_set(&q6_effect_mode, mode); | |
+} | |
+ | |
+int apq8064_get_q6_effect_mode(void) | |
+{ | |
+ int mode = atomic_read(&q6_effect_mode); | |
+ pr_info("%s: mode %d\n", __func__, mode); | |
+ return mode; | |
+} | |
+ | |
+static struct acoustic_ops acoustic = { | |
+ .enable_digital_mic = impression_enable_digital_mic, | |
+ .get_hw_component = impression_get_hw_component, | |
+ .set_q6_effect = apq8064_set_q6_effect_mode, | |
+}; | |
+ | |
+static struct q6asm_ops qops = { | |
+ .get_q6_effect = apq8064_get_q6_effect_mode, | |
+}; | |
+ | |
+static struct msm_pcm_routing_ops rops = { | |
+ .get_q6_effect = apq8064_get_q6_effect_mode, | |
+}; | |
+ | |
+static int __init impression_j_audio_init(void) | |
+{ | |
+ int ret = 0; | |
+ | |
+ static uint32_t audio_i2s_table[] = { | |
+ GPIO_CFG(35, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), | |
+ GPIO_CFG(36, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), | |
+ GPIO_CFG(37, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), | |
+ }; | |
+ pr_info("%s", __func__); | |
+ gpio_request(HAC_PAMP_GPIO, "AUDIO_HAC_AMP"); | |
+ gpio_direction_output(HAC_PAMP_GPIO, 0); | |
+ gpio_free(HAC_PAMP_GPIO); | |
+ gpio_tlmm_config(audio_i2s_table[0], GPIO_CFG_DISABLE); | |
+ gpio_tlmm_config(audio_i2s_table[1], GPIO_CFG_DISABLE); | |
+ gpio_tlmm_config(audio_i2s_table[2], GPIO_CFG_DISABLE); | |
+ | |
+ power_on_amp("8921_lvs2", ®_8921_lvs2); | |
+ htc_register_q6asm_ops(&qops); | |
+ htc_register_pcm_routing_ops(&rops); | |
+ acoustic_register_ops(&acoustic); | |
+ return ret; | |
+ | |
+} | |
+late_initcall(impression_j_audio_init); | |
+ | |
+static void __exit impression_j_audio_exit(void) | |
+{ | |
+ pr_info("%s", __func__); | |
+ power_off_amp(reg_8921_lvs2); | |
+} | |
+module_exit(impression_j_audio_exit); | |
+ | |
+MODULE_DESCRIPTION("ALSA Platform Elite"); | |
+MODULE_LICENSE("GPL v2"); | |
diff --git arch/arm/mach-msm/board-impression_j-camera.c arch/arm/mach-msm/board-impression_j-camera.c | |
new file mode 100644 | |
index 0000000..bacd9d8 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-camera.c | |
@@ -0,0 +1,1956 @@ | |
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <asm/mach-types.h> | |
+#include <linux/i2c.h> | |
+#include <linux/gpio.h> | |
+#include <mach/board.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/gpiomux.h> | |
+#include <asm/setup.h> | |
+ | |
+#include "devices.h" | |
+#include "board-impression_j.h" | |
+ | |
+#include <linux/spi/spi.h> | |
+ | |
+#include "board-mahimahi-flashlight.h" | |
+#ifdef CONFIG_MSM_CAMERA_FLASH | |
+#include <linux/htc_flashlight.h> | |
+#endif | |
+ | |
+#define CAM_PIN_PMGPIO_V_RAW_1V2_EN 0 | |
+#define CAM_PIN_GPIO_V_RAW_D1V2_EN V_RAW_1V2_EN | |
+#define CAM_PIN_GPIO_MCAM_D1V2_EN V_CAM_D1V2_EN | |
+#define CAM_PIN_GPIO_V_CAM2_D1V8_EN PM8921_GPIO_PM_TO_SYS(V_CAM2_D1V8_EN) | |
+#define CAM_PIN_GPIO_V_CAM1_IO1V8_EN V_CAMIO_D1V8_EN | |
+ | |
+ | |
+#define CAM_PIN_GPIO_V_RAW_1V8_EN PM8921_GPIO_PM_TO_SYS(V_RAW_1V8_EN) | |
+#define CAM_PIN_GPIO_RAW_RSTN RAW_RST | |
+#define CAM_PIN_GPIO_RAW_INTR0 RAW_INT0 | |
+#define CAM_PIN_GPIO_RAW_INTR1 RAW_INT1 | |
+#define CAM_PIN_GPIO_CAM_MCLK0 CAM_MCLK0 | |
+#define CAM_PIN_GPIO_CAM_SEL CAM_SEL | |
+ | |
+#define CAM_PIN_GPIO_CAM_I2C_DAT I2C4_DATA_CAM | |
+#define CAM_PIN_GPIO_CAM_I2C_CLK I2C4_CLK_CAM | |
+ | |
+#define CAM_PIN_GPIO_MCAM_SPI_CLK MCAM_SPI_CLK | |
+#define CAM_PIN_GPIO_MCAM_SPI_CS0 MCAM_SPI_CS0 | |
+#define CAM_PIN_GPIO_MCAM_SPI_DI MCAM_SPI_DI | |
+#define CAM_PIN_GPIO_MCAM_SPI_DO MCAM_SPI_DO | |
+#define CAM_PIN_GPIO_CAM_PWDN PM8921_GPIO_PM_TO_SYS(CAM1_PWDN) | |
+#define CAM_PIN_GPIO_CAM_VCM_PD PM8921_GPIO_PM_TO_SYS(CAM_VCM_PD) | |
+#define CAM_PIN_GPIO_CAM2_RSTz CAM2_RSTz | |
+#define CAM_PIN_GPIO_CAM2_STANDBY 0 | |
+ | |
+#define CAM_PIN_MAIN_CAMERA_ID MAIN_CAM_ID | |
+#define CAM_PIN_FRONT_CAMERA_ID PM8921_GPIO_PM_TO_SYS(NC_PMGPIO_4) | |
+ | |
+ | |
+ | |
+#define MSM_8960_GSBI4_QUP_I2C_BUS_ID 4 | |
+ | |
+ | |
+#if 0 | |
+ | |
+enum cam_flashlight_mode_flags { | |
+ FL_MODE_OFF = 0, | |
+ FL_MODE_TORCH, | |
+ FL_MODE_FLASH, | |
+ FL_MODE_PRE_FLASH, | |
+ FL_MODE_TORCH_LED_A, | |
+ FL_MODE_TORCH_LED_B, | |
+ FL_MODE_TORCH_LEVEL_1, | |
+ FL_MODE_TORCH_LEVEL_2, | |
+ FL_MODE_CAMERA_EFFECT_FLASH, | |
+ FL_MODE_CAMERA_EFFECT_PRE_FLASH, | |
+ FL_MODE_FLASH_LEVEL1, | |
+ FL_MODE_FLASH_LEVEL2, | |
+ FL_MODE_FLASH_LEVEL3, | |
+ FL_MODE_FLASH_LEVEL4, | |
+ FL_MODE_FLASH_LEVEL5, | |
+ FL_MODE_FLASH_LEVEL6, | |
+ FL_MODE_FLASH_LEVEL7, | |
+ | |
+}; | |
+ | |
+#endif | |
+ | |
+static void mclk_switch(int camera_id) | |
+{ | |
+ int rc=0; | |
+ rc = gpio_request(CAM_PIN_GPIO_CAM_SEL, "CAM_PIN_GPIO_CAM_SEL"); | |
+ if (rc==0) { | |
+ gpio_direction_output(CAM_PIN_GPIO_CAM_SEL, camera_id); | |
+ gpio_free(CAM_PIN_GPIO_CAM_SEL); | |
+ mdelay(5); | |
+ } | |
+ else { | |
+ pr_err("mclk switch fail\n"); | |
+ } | |
+} | |
+ | |
+ | |
+static struct gpiomux_setting cam_settings[] = { | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_OUT_LOW, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_2, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_4MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_2, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_IN, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_OUT_HIGH, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_OUT_LOW, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_2, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_OUT_HIGH, | |
+ }, | |
+}; | |
+ | |
+static struct msm_gpiomux_config impression_j_cam_common_configs[] = { | |
+ { | |
+ .gpio = CAM_PIN_GPIO_CAM_MCLK0, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[1], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[2], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_CAM_I2C_DAT, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[3], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[11], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_CAM_I2C_CLK, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[3], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[11], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_RAW_INTR0, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[7], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[8], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_RAW_INTR1, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[7], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[8], | |
+ }, | |
+ }, | |
+ | |
+ { | |
+ .gpio = CAM_PIN_GPIO_MCAM_SPI_CLK, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[4], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[2], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_MCAM_SPI_CS0, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[6], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[2], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_MCAM_SPI_DI, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[4], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[0], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_MCAM_SPI_DO, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[4], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[2], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = CAM_PIN_GPIO_CAM_VCM_PD, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[10], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[10], | |
+ }, | |
+ }, | |
+ | |
+}; | |
+#if 0 | |
+static struct msm_gpiomux_config ar0260_front_cam_configs[] = { | |
+ { | |
+ .gpio = CAM_PIN_GPIO_CAM_SEL, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[10], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[9], | |
+ }, | |
+ }, | |
+}; | |
+ | |
+ | |
+static struct msm_gpiomux_config imx175_back_cam_configs[] = { | |
+ { | |
+ .gpio = CAM_PIN_GPIO_CAM_SEL, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cam_settings[9], | |
+ [GPIOMUX_SUSPENDED] = &cam_settings[10], | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+ | |
+ | |
+#ifdef CONFIG_MSM_CAMERA | |
+ | |
+#if 1 | |
+ | |
+static struct msm_bus_vectors cam_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_VFE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_VPE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_JPEG_ENC, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors cam_preview_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_VFE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 27648000, | |
+ .ib = 110592000, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_VPE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_JPEG_ENC, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors cam_video_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_VFE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 483063040, | |
+ .ib = 1832252160, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_VPE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 206807040, | |
+ .ib = 488816640, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_JPEG_ENC, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors cam_snapshot_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_VFE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 274423680, | |
+ .ib = 1097694720, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_VPE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_JPEG_ENC, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 540000000, | |
+ .ib = 1350000000, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors cam_zsl_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_VFE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 468686080, | |
+ .ib = 1874744320, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_VPE, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_JPEG_ENC, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 540518400, | |
+ .ib = 1351296000, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths cam_bus_client_config[] = { | |
+ { | |
+ ARRAY_SIZE(cam_init_vectors), | |
+ cam_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(cam_preview_vectors), | |
+ cam_preview_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(cam_video_vectors), | |
+ cam_video_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(cam_snapshot_vectors), | |
+ cam_snapshot_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(cam_zsl_vectors), | |
+ cam_zsl_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata cam_bus_client_pdata = { | |
+ cam_bus_client_config, | |
+ ARRAY_SIZE(cam_bus_client_config), | |
+ .name = "msm_camera", | |
+}; | |
+ | |
+ | |
+ | |
+#if 1 | |
+ | |
+static int impression_j_csi_vreg_on(void); | |
+static int impression_j_csi_vreg_off(void); | |
+ | |
+struct msm_camera_device_platform_data impression_j_msm_camera_csi_device_data[] = { | |
+ { | |
+ .ioclk.mclk_clk_rate = 24000000, | |
+ .ioclk.vfe_clk_rate = 228570000, | |
+ .csid_core = 0, | |
+ .camera_csi_on = impression_j_csi_vreg_on, | |
+ .camera_csi_off = impression_j_csi_vreg_off, | |
+ .cam_bus_scale_table = &cam_bus_client_pdata, | |
+ .csid_core = 0, | |
+ .is_csiphy = 1, | |
+ .is_csid = 1, | |
+ .is_ispif = 1, | |
+ .is_vpe = 1, | |
+ }, | |
+ { | |
+ .ioclk.mclk_clk_rate = 24000000, | |
+ .ioclk.vfe_clk_rate = 228570000, | |
+ .csid_core = 1, | |
+ .camera_csi_on = impression_j_csi_vreg_on, | |
+ .camera_csi_off = impression_j_csi_vreg_off, | |
+ .cam_bus_scale_table = &cam_bus_client_pdata, | |
+ .csid_core = 1, | |
+ .is_csiphy = 1, | |
+ .is_csid = 1, | |
+ .is_ispif = 1, | |
+ .is_vpe = 1, | |
+ }, | |
+}; | |
+ | |
+#ifdef CONFIG_MSM_CAMERA_FLASH | |
+int impression_j_flashlight_control(int mode) | |
+{ | |
+pr_info("%s, linear led, mode=%d", __func__, mode); | |
+#ifdef CONFIG_FLASHLIGHT_TPS61310 | |
+ return tps61310_flashlight_control(mode); | |
+#else | |
+ return 0; | |
+#endif | |
+} | |
+ | |
+ | |
+static struct msm_camera_sensor_flash_src msm_camera_flash_src = { | |
+ .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER, | |
+ .camera_flash = impression_j_flashlight_control, | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_RAWCHIP | |
+static int impression_j_use_ext_1v2(void) | |
+{ | |
+ return 1; | |
+} | |
+ | |
+static int impression_j_rawchip_vreg_on(void) | |
+{ | |
+ int rc; | |
+ pr_info("%s\n", __func__); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ pr_info("rawchip external 1v8 gpio_request,%d rc(%d)\n", CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ if (rc) { | |
+ pr_err("rawchip on\ | |
+ (\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ goto enable_1v8_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ | |
+ mdelay(5); | |
+ | |
+#if 0 | |
+ if (system_rev >= 1) { | |
+ if (impression_j_use_ext_1v2()) { | |
+#else | |
+ { | |
+ { | |
+#endif | |
+ mdelay(1); | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_D1V2_EN, "V_RAW_D1V2_EN"); | |
+ pr_info("rawchip external 1v2 gpio_request,%d rc(%d)\n", CAM_PIN_GPIO_V_RAW_D1V2_EN, rc); | |
+ if (rc < 0) { | |
+ pr_err("GPIO(%d) request failed", CAM_PIN_GPIO_V_RAW_D1V2_EN); | |
+ goto enable_ext_1v2_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_D1V2_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_D1V2_EN); | |
+ } | |
+ } | |
+ | |
+ return rc; | |
+ | |
+enable_ext_1v2_fail: | |
+#if 0 | |
+ | |
+ if (system_rev >= 0 && system_rev <= 3) { | |
+ rc = gpio_request(CAM_PIN_V_RAW_1V2_EN, "V_RAW_1V2_EN"); | |
+ if (rc) | |
+ pr_err("rawchip on\ | |
+ (\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_V_RAW_1V2_EN, rc); | |
+ gpio_direction_output(CAM_PIN_V_RAW_1V2_EN, 0); | |
+ gpio_free(CAM_PIN_V_RAW_1V2_EN); | |
+ } | |
+enable_1v2_fail: | |
+#endif | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc) | |
+ pr_err("rawchip on\ | |
+ (\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+enable_1v8_fail: | |
+ return rc; | |
+} | |
+ | |
+static int impression_j_rawchip_vreg_off(void) | |
+{ | |
+ int rc = 0; | |
+ | |
+ pr_info("%s\n", __func__); | |
+ | |
+#if 0 | |
+ if (system_rev >= 1) { | |
+ if (impression_j_use_ext_1v2()) { | |
+#else | |
+ { | |
+ { | |
+#endif | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_D1V2_EN, "V_RAW_D1V2_EN"); | |
+ if (rc) | |
+ pr_err("rawchip off(\ | |
+ \"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_D1V2_EN, rc); | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_D1V2_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_D1V2_EN); | |
+ | |
+ mdelay(1); | |
+ } | |
+ } | |
+ | |
+#if 0 | |
+ if (system_rev >= 0 && system_rev <= 3) { | |
+ { | |
+ | |
+ rc = gpio_request(CAM_PIN_V_RAW_1V2_EN, "V_RAW_1V2_EN"); | |
+ if (rc) | |
+ pr_err("rawchip off(\ | |
+ \"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_V_RAW_1V2_EN, rc); | |
+ gpio_direction_output(CAM_PIN_V_RAW_1V2_EN, 0); | |
+ gpio_free(CAM_PIN_V_RAW_1V2_EN); | |
+ } | |
+#endif | |
+ | |
+ mdelay(5); | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc) | |
+ pr_err("rawchip off\ | |
+ (\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ | |
+ return rc; | |
+} | |
+ | |
+static struct msm_camera_rawchip_info impression_j_msm_rawchip_board_info = { | |
+ .rawchip_reset = CAM_PIN_GPIO_RAW_RSTN, | |
+ .rawchip_intr0 = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, CAM_PIN_GPIO_RAW_INTR0), | |
+ .rawchip_intr1 = PM8921_GPIO_IRQ(PM8921_IRQ_BASE,CAM_PIN_GPIO_RAW_INTR1), | |
+ .rawchip_spi_freq = 27, | |
+ .rawchip_mclk_freq = 24, | |
+ .camera_rawchip_power_on = impression_j_rawchip_vreg_on, | |
+ .camera_rawchip_power_off = impression_j_rawchip_vreg_off, | |
+ .rawchip_use_ext_1v2 = impression_j_use_ext_1v2, | |
+}; | |
+ | |
+struct platform_device impression_j_msm_rawchip_device = { | |
+ .name = "rawchip", | |
+ .dev = { | |
+ .platform_data = &impression_j_msm_rawchip_board_info, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+ | |
+ | |
+static uint16_t ar0260_front_cam_gpio[] = { | |
+ CAM_PIN_GPIO_CAM_MCLK0, | |
+ CAM_PIN_GPIO_MCAM_SPI_CLK, | |
+ CAM_PIN_GPIO_MCAM_SPI_CS0, | |
+ CAM_PIN_GPIO_MCAM_SPI_DI, | |
+ CAM_PIN_GPIO_MCAM_SPI_DO, | |
+}; | |
+ | |
+static uint16_t imx175_back_cam_gpio[] = { | |
+ CAM_PIN_GPIO_CAM_MCLK0, | |
+ CAM_PIN_GPIO_MCAM_SPI_CLK, | |
+ CAM_PIN_GPIO_MCAM_SPI_CS0, | |
+ CAM_PIN_GPIO_MCAM_SPI_DI, | |
+ CAM_PIN_GPIO_MCAM_SPI_DO, | |
+}; | |
+ | |
+ | |
+static struct msm_camera_gpio_conf ar0260_front_cam_gpio_conf = { | |
+ .cam_gpiomux_conf_tbl = 0, | |
+ .cam_gpiomux_conf_tbl_size = 0, | |
+ .cam_gpio_tbl = ar0260_front_cam_gpio, | |
+ .cam_gpio_tbl_size = ARRAY_SIZE(ar0260_front_cam_gpio), | |
+}; | |
+ | |
+static struct msm_camera_gpio_conf imx175_back_cam_gpio_conf = { | |
+ .cam_gpiomux_conf_tbl = 0, | |
+ .cam_gpiomux_conf_tbl_size = 0, | |
+ .cam_gpio_tbl = imx175_back_cam_gpio, | |
+ .cam_gpio_tbl_size = ARRAY_SIZE(imx175_back_cam_gpio), | |
+}; | |
+ | |
+static struct msm_camera_gpio_conf ov8838_back_cam_gpio_conf = { | |
+ .cam_gpiomux_conf_tbl = 0, | |
+ .cam_gpiomux_conf_tbl_size = 0, | |
+ .cam_gpio_tbl = imx175_back_cam_gpio, | |
+ .cam_gpio_tbl_size = ARRAY_SIZE(imx175_back_cam_gpio), | |
+}; | |
+ | |
+ | |
+static struct regulator *reg_8921_l2; | |
+static struct regulator *reg_8921_l8; | |
+static struct regulator *reg_8921_l9; | |
+static struct regulator *reg_8921_l23; | |
+static struct regulator *reg_8921_lvs4; | |
+ | |
+ | |
+static int camera_sensor_power_enable(char *power, unsigned volt, struct regulator **sensor_power) | |
+{ | |
+ int rc; | |
+ | |
+ if (power == NULL) | |
+ return -ENODEV; | |
+ | |
+ *sensor_power = regulator_get(NULL, power); | |
+ | |
+ if (IS_ERR(*sensor_power)) { | |
+ pr_err("%s: Unable to get %s\n", __func__, power); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ if (volt != 1800000) { | |
+ rc = regulator_set_voltage(*sensor_power, volt, volt); | |
+ if (rc < 0) { | |
+ pr_err("%s: unable to set %s voltage to %d rc:%d\n", | |
+ __func__, power, volt, rc); | |
+ regulator_put(*sensor_power); | |
+ *sensor_power = NULL; | |
+ return -ENODEV; | |
+ } | |
+ } | |
+ | |
+ rc = regulator_enable(*sensor_power); | |
+ if (rc < 0) { | |
+ pr_err("%s: Enable regulator %s failed\n", __func__, power); | |
+ regulator_put(*sensor_power); | |
+ *sensor_power = NULL; | |
+ return -ENODEV; | |
+ } | |
+ | |
+ return rc; | |
+} | |
+ | |
+static int camera_sensor_power_disable(struct regulator *sensor_power) | |
+{ | |
+ | |
+ int rc; | |
+ if (sensor_power == NULL) | |
+ return -ENODEV; | |
+ | |
+ if (IS_ERR(sensor_power)) { | |
+ pr_err("%s: Invalid requlator ptr\n", __func__); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_disable(sensor_power); | |
+ if (rc < 0) | |
+ pr_err("%s: disable regulator failed\n", __func__); | |
+ | |
+ regulator_put(sensor_power); | |
+ sensor_power = NULL; | |
+ return rc; | |
+} | |
+ | |
+static int impression_j_csi_vreg_on(void) | |
+{ | |
+ pr_info("%s\n", __func__); | |
+ return camera_sensor_power_enable("8921_l2", 1200000, ®_8921_l2); | |
+} | |
+ | |
+static int impression_j_csi_vreg_off(void) | |
+{ | |
+ pr_info("%s\n", __func__); | |
+ return camera_sensor_power_disable(reg_8921_l2); | |
+} | |
+ | |
+static int impression_j_imx175_ov8838_vreg_on(void) | |
+{ | |
+ int rc; | |
+ pr_info("%s\n", __func__); | |
+ | |
+ mclk_switch(0); | |
+ | |
+ | |
+ pr_info("%s: 8921_l9 2800000\n", __func__); | |
+ rc = camera_sensor_power_enable("8921_l9", 2800000, ®_8921_l9); | |
+ pr_info("%s: 8921_l9 2800000 (%d)\n", __func__, rc); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable\ | |
+ (\"8921_l9\", 2.8V) FAILED %d\n", rc); | |
+ goto enable_vcm_fail; | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_D1V2_EN, "CAM_D1V2_EN"); | |
+ if (rc) { | |
+ pr_err("sensor_power_enable\ | |
+ (\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_D1V2_EN, rc); | |
+ goto enable_digital_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_D1V2_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_D1V2_EN); | |
+ mdelay(1); | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_MCAM_D1V2_EN, "MCAM_D1V2_EN"); | |
+ if (rc) { | |
+ pr_err("sensor_power_enable(\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_MCAM_D1V2_EN, rc); | |
+ goto enable_digital_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_MCAM_D1V2_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_MCAM_D1V2_EN); | |
+ mdelay(1); | |
+ | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_l23", 1800000, ®_8921_l23); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable(\"8921_l23\", 1.8V) FAILED %d\n", rc); | |
+ goto enable_digital_fail; | |
+ } | |
+ | |
+ mdelay(51); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "MAIN_CAM_IO_1V8_EN"); | |
+ if (rc) { | |
+ pr_err("sensor_power_enable(\"gpio %d\", 1.8V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_CAM1_IO1V8_EN, rc); | |
+ goto enable_io_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(1); | |
+ | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_l8", 2800000, ®_8921_l8); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable(\"8921_l8\", 2.8V) FAILED %d\n", rc); | |
+ goto enable_analog_fail; | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_lvs4", 1800000, ®_8921_lvs4); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable(\"8921_lvs4\", 1.8V) FAILED %d\n", rc); | |
+ goto enable_io_fail; | |
+ } | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_CAM2_RSTz, "CAM2_RST"); | |
+ if (rc < 0) { | |
+ pr_err("GPIO(%d) request failed", CAM_PIN_GPIO_CAM2_RSTz); | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_CAM2_RSTz, 1); | |
+ gpio_free(CAM_PIN_GPIO_CAM2_RSTz); | |
+ mdelay(1); | |
+ | |
+ return rc; | |
+ | |
+enable_io_fail: | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_D1V2_EN, "CAM_D1V2_EN"); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_D1V2_EN, rc); | |
+ else { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_D1V2_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_D1V2_EN); | |
+ } | |
+ | |
+enable_digital_fail: | |
+ camera_sensor_power_disable(reg_8921_l8); | |
+enable_analog_fail: | |
+ camera_sensor_power_disable(reg_8921_l9); | |
+enable_vcm_fail: | |
+ return rc; | |
+} | |
+ | |
+static int impression_j_imx175_ov8838_vreg_off(void) | |
+{ | |
+ int rc = 0; | |
+ | |
+ pr_info("%s\n", __func__); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l8); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_l8\") FAILED %d\n", rc); | |
+ mdelay(1); | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l23); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_l23\") FAILED %d\n", rc); | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_D1V2_EN, "CAM_D1V2_EN"); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_D1V2_EN, rc); | |
+ else { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_D1V2_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_D1V2_EN); | |
+ } | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_MCAM_D1V2_EN, "MCAM_D1V2_EN"); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_MCAM_D1V2_EN, rc); | |
+ else { | |
+ gpio_direction_output(CAM_PIN_GPIO_MCAM_D1V2_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_MCAM_D1V2_EN); | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "MAIN_CAM_IO_1V8_EN"); | |
+ if (rc>=0) { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(1); | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_lvs4); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_lvs6\") FAILED %d\n", rc); | |
+ | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_CAM2_RSTz, "CAM_RST"); | |
+ pr_info("reset pin gpio_request,%d\n", CAM_PIN_GPIO_CAM2_RSTz); | |
+ if (rc < 0) | |
+ pr_err("GPIO(%d) request failed", CAM_PIN_GPIO_CAM2_RSTz); | |
+ else { | |
+ gpio_direction_output(CAM_PIN_GPIO_CAM2_RSTz, 0); | |
+ gpio_free(CAM_PIN_GPIO_CAM2_RSTz); | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l9); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable\ | |
+ (\"8921_l9\") FAILED %d\n", rc); | |
+ | |
+ | |
+ mclk_switch(0); | |
+ | |
+ | |
+ return rc; | |
+} | |
+ | |
+ | |
+#if 0 | |
+struct msm_camera_device_platform_data impression_j_msm_camera_csi_device_data[] = { | |
+ { | |
+ .ioclk.mclk_clk_rate = 24000000, | |
+ .ioclk.vfe_clk_rate = 228570000, | |
+ .csid_core = 0, | |
+ .camera_csi_on = impression_j_csi_vreg_on, | |
+ .camera_csi_off = impression_j_csi_vreg_off, | |
+ .cam_bus_scale_table = &cam_bus_client_pdata, | |
+ }, | |
+ { | |
+ .ioclk.mclk_clk_rate = 24000000, | |
+ .ioclk.vfe_clk_rate = 228570000, | |
+ .csid_core = 1, | |
+ .camera_csi_on = impression_j_csi_vreg_on, | |
+ .camera_csi_off = impression_j_csi_vreg_off, | |
+ .cam_bus_scale_table = &cam_bus_client_pdata, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#if defined(CONFIG_AD5823_ACT) | |
+#if (defined(CONFIG_IMX175) || defined(CONFIG_IMX091)) | |
+static struct i2c_board_info ad5823_actuator_i2c_info = { | |
+ I2C_BOARD_INFO("ad5823_act", 0x1C), | |
+}; | |
+ | |
+static struct msm_actuator_info ad5823_actuator_info = { | |
+ .board_info = &ad5823_actuator_i2c_info, | |
+ .bus_id = MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ .vcm_pwd = CAM_PIN_GPIO_CAM_VCM_PD, | |
+ .vcm_enable = 1, | |
+}; | |
+#endif | |
+#endif | |
+ | |
+#if defined(CONFIG_TI201_ACT) | |
+#if defined(CONFIG_IMX091) | |
+static struct i2c_board_info ti201_actuator_i2c_info = { | |
+ I2C_BOARD_INFO("ti201_act", 0x1C), | |
+}; | |
+ | |
+static struct msm_actuator_info ti201_actuator_info = { | |
+ .board_info = &ti201_actuator_i2c_info, | |
+ .bus_id = MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ .vcm_pwd = CAM_PIN_GPIO_CAM_VCM_PD, | |
+ .vcm_enable = 1, | |
+}; | |
+#endif | |
+#endif | |
+ | |
+#if defined(CONFIG_AD5816_ACT) | |
+#if defined(CONFIG_IMX091) | |
+static struct i2c_board_info ad5816_actuator_i2c_info = { | |
+ I2C_BOARD_INFO("ad5816_act", 0x1C), | |
+}; | |
+ | |
+static struct msm_actuator_info ad5816_actuator_info = { | |
+ .board_info = &ad5816_actuator_i2c_info, | |
+ .bus_id = MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ .vcm_pwd = CAM_PIN_GPIO_CAM_VCM_PD, | |
+ .vcm_enable = 1, | |
+}; | |
+#endif | |
+#endif | |
+ | |
+#ifdef CONFIG_IMX175 | |
+ | |
+ | |
+static struct msm_camera_csi_lane_params imx175_csi_lane_params = { | |
+ .csi_lane_assign = 0xE4, | |
+ .csi_lane_mask = 0x3, | |
+}; | |
+ | |
+static struct msm_camera_sensor_platform_info sensor_imx175_board_info = { | |
+ .mount_angle = 90, | |
+ .mirror_flip = CAMERA_SENSOR_MIRROR_FLIP, | |
+ .sensor_reset_enable = 0, | |
+ .sensor_reset = 0, | |
+ .sensor_pwd = CAM_PIN_GPIO_CAM_PWDN, | |
+ .vcm_pwd = CAM_PIN_GPIO_CAM_VCM_PD, | |
+ .vcm_enable = 1, | |
+ .csi_lane_params = &imx175_csi_lane_params, | |
+}; | |
+ | |
+static struct camera_led_est msm_camera_sensor_imx175_led_table[] = { | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL1, | |
+ .current_ma = 150, | |
+ .lumen_value = 150, | |
+ .min_step = 61, | |
+ .max_step = 255 | |
+ }, | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL4, | |
+ .current_ma = 400, | |
+ .lumen_value = 440, | |
+ .min_step = 49, | |
+ .max_step = 61 | |
+ }, | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL7, | |
+ .current_ma = 700, | |
+ .lumen_value = 750, | |
+ .min_step = 0, | |
+ .max_step = 49 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_FLASH, | |
+ .current_ma = 750, | |
+ .lumen_value = 745, | |
+ .min_step = 0, | |
+ .max_step = 44 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_FLASH_LEVEL2, | |
+ .current_ma = 200, | |
+ .lumen_value = 250, | |
+ .min_step = 0, | |
+ .max_step = 270 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_OFF, | |
+ .current_ma = 0, | |
+ .lumen_value = 0, | |
+ .min_step = 0, | |
+ .max_step = 0 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_TORCH, | |
+ .current_ma = 150, | |
+ .lumen_value = 150, | |
+ .min_step = 0, | |
+ .max_step = 0 | |
+ }, | |
+ { | |
+ .enable =0, | |
+ .led_state = FL_MODE_FLASH, | |
+ .current_ma = 750, | |
+ .lumen_value = 745, | |
+ .min_step = 271, | |
+ .max_step = 317 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_FLASH_LEVEL5, | |
+ .current_ma = 500, | |
+ .lumen_value = 500, | |
+ .min_step = 25, | |
+ .max_step = 26 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_FLASH, | |
+ .current_ma = 750, | |
+ .lumen_value = 750, | |
+ .min_step = 271, | |
+ .max_step = 325 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_TORCH_LEVEL_2, | |
+ .current_ma = 200, | |
+ .lumen_value = 75, | |
+ .min_step = 0, | |
+ .max_step = 40 | |
+ }, | |
+}; | |
+ | |
+static struct camera_led_info msm_camera_sensor_imx175_led_info = { | |
+ .enable = 1, | |
+ .low_limit_led_state = FL_MODE_TORCH, | |
+ .max_led_current_ma = 750, | |
+ .num_led_est_table = ARRAY_SIZE(msm_camera_sensor_imx175_led_table), | |
+}; | |
+ | |
+static struct camera_flash_info msm_camera_sensor_imx175_flash_info = { | |
+ .led_info = &msm_camera_sensor_imx175_led_info, | |
+ .led_est_table = msm_camera_sensor_imx175_led_table, | |
+}; | |
+ | |
+static struct camera_flash_cfg msm_camera_sensor_imx175_flash_cfg = { | |
+ .low_temp_limit = 5, | |
+ .low_cap_limit = 15, | |
+ .low_cap_limit_dual = 0, | |
+ .flash_info = &msm_camera_sensor_imx175_flash_info, | |
+}; | |
+ | |
+ | |
+static struct msm_camera_sensor_flash_data flash_imx175 = { | |
+ .flash_type = MSM_CAMERA_FLASH_LED, | |
+#ifdef CONFIG_MSM_CAMERA_FLASH | |
+ .flash_src = &msm_camera_flash_src, | |
+#endif | |
+ | |
+}; | |
+ | |
+#ifdef CONFIG_IMX175 | |
+#if defined(CONFIG_AD5823_ACT) || defined(CONFIG_TI201_ACT) || defined(CONFIG_AD5816_ACT) | |
+static struct msm_actuator_info *imx175_actuator_table[] = { | |
+#if defined(CONFIG_AD5823_ACT) | |
+ &ad5823_actuator_info, | |
+#endif | |
+#if defined(CONFIG_TI201_ACT) | |
+ &ti201_actuator_info, | |
+#endif | |
+#if defined(CONFIG_AD5816_ACT) | |
+ &ad5816_actuator_info, | |
+#endif | |
+}; | |
+#endif | |
+#endif | |
+ | |
+static struct msm_camera_sensor_info msm_camera_sensor_imx175_data = { | |
+ .sensor_name = "imx175", | |
+ .camera_power_on = impression_j_imx175_ov8838_vreg_on, | |
+ .camera_power_off = impression_j_imx175_ov8838_vreg_off, | |
+ .pdata = &impression_j_msm_camera_csi_device_data[0], | |
+ .flash_data = &flash_imx175, | |
+ .sensor_platform_info = &sensor_imx175_board_info, | |
+ .gpio_conf = &imx175_back_cam_gpio_conf, | |
+ .csi_if = 1, | |
+ .camera_type = BACK_CAMERA_2D, | |
+#if defined(CONFIG_AD5823_ACT) || defined(CONFIG_TI201_ACT) || defined(CONFIG_AD5816_ACT) | |
+ .num_actuator_info_table = ARRAY_SIZE(imx175_actuator_table), | |
+ .actuator_info_table = &imx175_actuator_table[0], | |
+#endif | |
+#ifdef CONFIG_AD5823_ACT | |
+ .actuator_info = &ti201_actuator_info, | |
+#endif | |
+ .use_rawchip = RAWCHIP_ENABLE, | |
+ .flash_cfg = &msm_camera_sensor_imx175_flash_cfg, | |
+}; | |
+ | |
+ | |
+ | |
+#endif | |
+ | |
+ | |
+#ifdef CONFIG_AR0260 | |
+static int impression_j_ar0260_vreg_on(void) | |
+{ | |
+ int rc; | |
+ pr_info("%s\n", __func__); | |
+ mclk_switch (0); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "MAIN_CAM_IO_1V8_EN"); | |
+ if (rc) { | |
+ pr_err("sensor_power_enable(\"gpio %d\", 1.8V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_CAM1_IO1V8_EN, rc); | |
+ goto enable_io_fail2; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(1); | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc) { | |
+ pr_err("rawchip on(\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ goto enable_digital_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ | |
+ mdelay(5); | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_l23", 1800000, ®_8921_l23); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable(\"8921_l23\", 1.8V) FAILED %d\n", rc); | |
+ goto enable_digital_fail; | |
+ } | |
+ mdelay(60); | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_lvs4", 1800000, ®_8921_lvs4); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable(\"8921_lvs4\", 1.8V) FAILED %d\n", rc); | |
+ goto enable_io_fail; | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_l8", 2800000, ®_8921_l8); | |
+ if (rc < 0) { | |
+ pr_err("sensor_power_enable(\"8921_l8\", 2.8V) FAILED %d\n", rc); | |
+ goto enable_analog_fail; | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ mclk_switch (1); | |
+ return rc; | |
+ | |
+enable_analog_fail: | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_lvs4); | |
+ | |
+enable_io_fail: | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l23); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_l23\") FAILED %d\n", rc); | |
+ | |
+ | |
+enable_digital_fail: | |
+enable_io_fail2: | |
+ | |
+ return rc; | |
+} | |
+ | |
+static int impression_j_ar0260_vreg_off(void) | |
+{ | |
+ int rc; | |
+ pr_info("%s\n", __func__); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l8); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_l8\") FAILED %d\n", rc); | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_lvs4); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_lvs4\") FAILED %d\n", rc); | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l23); | |
+ if (rc < 0) | |
+ pr_err("sensor_power_disable(\"8921_l23\") FAILED %d\n", rc); | |
+ mdelay(1); | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc) { | |
+ pr_err("rawchip on(\"gpio %d\", 1.2V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ } | |
+ else | |
+ { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "MAIN_CAM_IO_1V8_EN"); | |
+ if (rc>=0) { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(1); | |
+ } | |
+ | |
+ mclk_switch (0); | |
+ | |
+ return rc; | |
+} | |
+ | |
+static struct msm_camera_csi_lane_params ar0260_csi_lane_params = { | |
+ .csi_lane_assign = 0xE4, | |
+ .csi_lane_mask = 0x1, | |
+}; | |
+ | |
+static struct msm_camera_sensor_platform_info sensor_ar0260_board_info = { | |
+ .mount_angle = 270, | |
+ .mirror_flip = CAMERA_SENSOR_MIRROR, | |
+ .sensor_reset_enable = 1, | |
+ .sensor_reset = CAM_PIN_GPIO_CAM2_RSTz, | |
+ .sensor_pwd = CAM_PIN_GPIO_CAM2_STANDBY, | |
+ .vcm_pwd = 0, | |
+ .vcm_enable = 0, | |
+ .csi_lane_params = &ar0260_csi_lane_params, | |
+}; | |
+ | |
+static struct msm_camera_sensor_flash_data flash_ar0260 = { | |
+ .flash_type = MSM_CAMERA_FLASH_NONE, | |
+}; | |
+ | |
+static struct msm_camera_sensor_info msm_camera_sensor_ar0260_data = { | |
+ .sensor_name = "ar0260", | |
+ .sensor_reset = CAM_PIN_GPIO_CAM2_RSTz, | |
+ .sensor_pwd = CAM_PIN_GPIO_CAM2_STANDBY, | |
+ .vcm_pwd = 0, | |
+ .vcm_enable = 0, | |
+ .camera_power_on = impression_j_ar0260_vreg_on, | |
+ .camera_power_off = impression_j_ar0260_vreg_off, | |
+ .pdata = &impression_j_msm_camera_csi_device_data[0], | |
+ .flash_data = &flash_ar0260, | |
+ .sensor_platform_info = &sensor_ar0260_board_info, | |
+ .gpio_conf = &ar0260_front_cam_gpio_conf, | |
+ .csi_if = 1, | |
+ .camera_type = FRONT_CAMERA_2D, | |
+ .use_rawchip = RAWCHIP_ENABLE, | |
+}; | |
+ | |
+#endif | |
+ | |
+#ifdef CONFIG_OV2722 | |
+static int impression_j_ov2722_vreg_on(void) | |
+{ | |
+ int rc; | |
+ pr_info("[CAM] %s\n", __func__); | |
+ | |
+ | |
+ mclk_switch (0); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc) { | |
+ pr_err("[CAM] rawchip on(\"gpio %d\", 1.2V) FAILED %d\n",CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ goto exit; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ mdelay(5); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_CAM2_RSTz, "ov2722"); | |
+ if (rc < 0) { | |
+ pr_err("GPIO(%d) request failed", CAM_PIN_GPIO_CAM2_RSTz); | |
+ goto reset_high_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_CAM2_RSTz, 1); | |
+ gpio_free(CAM_PIN_GPIO_CAM2_RSTz); | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_lvs4", 1800000, ®_8921_lvs4); | |
+ if (rc < 0) { | |
+ pr_err("[CAM] sensor_power_enable(\"8921_lvs4\", 1.8V) FAILED %d\n", rc); | |
+ goto enable_io_fail; | |
+ } | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "MAIN_CAM_IO_1V8_EN"); | |
+ if (rc) { | |
+ pr_err("sensor_power_enable(\"gpio %d\", 1.8V) FAILED %d\n", | |
+ CAM_PIN_GPIO_V_CAM1_IO1V8_EN, rc); | |
+ | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(1); | |
+ | |
+ | |
+ rc = camera_sensor_power_enable("8921_l8", 2800000, ®_8921_l8); | |
+ if (rc < 0) { | |
+ pr_err("[CAM] sensor_power_enable(\"8921_l8\", 2.8V) FAILED %d\n", rc); | |
+ goto enable_analog_fail; | |
+ } | |
+ mdelay(5); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_CAM2_RSTz, "ov2722"); | |
+ if (rc < 0) { | |
+ pr_err("GPIO(%d) request failed", CAM_PIN_GPIO_CAM2_RSTz); | |
+ goto reset_low_fail; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_CAM2_RSTz, 0); | |
+ gpio_free(CAM_PIN_GPIO_CAM2_RSTz); | |
+ mdelay(5); | |
+ | |
+ | |
+ mclk_switch (1); | |
+ | |
+ return rc; | |
+ | |
+reset_low_fail: | |
+ rc = camera_sensor_power_disable(reg_8921_l8); | |
+ if (rc < 0) | |
+ pr_err("[CAM] sensor_power_disable(\"reg_8921_l8\") FAILED %d\n", rc); | |
+ | |
+enable_analog_fail: | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_lvs4); | |
+ if (rc < 0) | |
+ pr_err("[CAM] sensor_power_disable(\"reg_8921_lvs4\") FAILED %d\n", rc); | |
+ | |
+enable_io_fail: | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_CAM2_RSTz, "ov2722"); | |
+ if (rc >= 0) { | |
+ gpio_direction_output(CAM_PIN_GPIO_CAM2_RSTz, 0); | |
+ gpio_free(CAM_PIN_GPIO_CAM2_RSTz); | |
+ } | |
+ | |
+reset_high_fail: | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc>=0) { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ } | |
+exit: | |
+ | |
+ return rc; | |
+} | |
+ | |
+static int impression_j_ov2722_vreg_off(void) | |
+{ | |
+ int rc; | |
+ pr_info("[CAM] %s\n", __func__); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_l8); | |
+ if (rc < 0) | |
+ pr_err("[CAM] sensor_power_disable(\"8921_l8\") FAILED %d\n", rc); | |
+ | |
+ | |
+ rc = camera_sensor_power_disable(reg_8921_lvs4); | |
+ if (rc < 0) | |
+ pr_err("[CAM] sensor_power_disable(\"8921_lvs4\") FAILED %d\n", rc); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_RAW_1V8_EN, "V_RAW_1V8_EN"); | |
+ if (rc < 0) { | |
+ pr_err("[CAM] rawchip on(\"gpio %d\", 1.2V) FAILED %d\n",CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ } | |
+ else | |
+ { | |
+ gpio_direction_output(CAM_PIN_GPIO_V_RAW_1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_RAW_1V8_EN); | |
+ } | |
+ | |
+ | |
+ mclk_switch (0); | |
+ | |
+ return rc; | |
+} | |
+ | |
+static struct msm_camera_csi_lane_params ov2722_csi_lane_params = { | |
+ .csi_lane_assign = 0xE4, | |
+ .csi_lane_mask = 0x1, | |
+}; | |
+ | |
+static struct msm_camera_sensor_platform_info sensor_ov2722_board_info = { | |
+ .mount_angle = 270, | |
+ .mirror_flip = CAMERA_SENSOR_MIRROR_FLIP, | |
+ .sensor_reset_enable = 1, | |
+ .sensor_reset = CAM_PIN_GPIO_CAM2_RSTz, | |
+ .sensor_pwd = CAM_PIN_GPIO_CAM2_STANDBY, | |
+ .vcm_pwd = 0, | |
+ .vcm_enable = 0, | |
+ .csi_lane_params = &ov2722_csi_lane_params, | |
+}; | |
+ | |
+static struct msm_camera_sensor_flash_data flash_ov2722 = { | |
+ .flash_type = MSM_CAMERA_FLASH_NONE, | |
+}; | |
+ | |
+static struct msm_camera_sensor_info msm_camera_sensor_ov2722_data = { | |
+ .sensor_name = "ov2722", | |
+ .sensor_reset = CAM_PIN_GPIO_CAM2_RSTz, | |
+ .sensor_pwd = CAM_PIN_GPIO_CAM2_STANDBY, | |
+ .vcm_pwd = 0, | |
+ .vcm_enable = 0, | |
+ .camera_power_on = impression_j_ov2722_vreg_on, | |
+ .camera_power_off = impression_j_ov2722_vreg_off, | |
+ .pdata = &impression_j_msm_camera_csi_device_data[0], | |
+ .flash_data = &flash_ov2722, | |
+ .sensor_platform_info = &sensor_ov2722_board_info, | |
+ .gpio_conf = &ar0260_front_cam_gpio_conf, | |
+ .csi_if = 1, | |
+ .camera_type = FRONT_CAMERA_2D, | |
+ .use_rawchip = RAWCHIP_ENABLE, | |
+}; | |
+ | |
+#endif | |
+ | |
+ | |
+#ifdef CONFIG_OV8838 | |
+ | |
+static struct msm_camera_csi_lane_params ov8838_csi_lane_params = { | |
+ .csi_lane_assign = 0xE4, | |
+ .csi_lane_mask = 0x3, | |
+}; | |
+ | |
+static struct msm_camera_sensor_platform_info sensor_ov8838_board_info = { | |
+ .mount_angle = 90, | |
+ .mirror_flip = CAMERA_SENSOR_NONE, | |
+ .sensor_reset_enable = 0, | |
+ .sensor_reset = 0, | |
+ .sensor_pwd = CAM_PIN_GPIO_CAM_PWDN, | |
+ .vcm_pwd = CAM_PIN_GPIO_CAM_VCM_PD, | |
+ .vcm_enable = 1, | |
+ .csi_lane_params = &ov8838_csi_lane_params, | |
+}; | |
+ | |
+static struct camera_led_est msm_camera_sensor_ov8838_led_table[] = { | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL2, | |
+ .current_ma = 200, | |
+ .lumen_value = 250, | |
+ .min_step = 29, | |
+ .max_step = 128 | |
+ }, | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL3, | |
+ .current_ma = 300, | |
+ .lumen_value = 350, | |
+ .min_step = 27, | |
+ .max_step = 28 | |
+ }, | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL4, | |
+ .current_ma = 400, | |
+ .lumen_value = 440, | |
+ .min_step = 25, | |
+ .max_step = 26 | |
+ }, | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH_LEVEL6, | |
+ .current_ma = 600, | |
+ .lumen_value = 625, | |
+ .min_step = 23, | |
+ .max_step = 24 | |
+ }, | |
+ { | |
+ .enable = 1, | |
+ .led_state = FL_MODE_FLASH, | |
+ .current_ma = 750, | |
+ .lumen_value = 745, | |
+ .min_step = 0, | |
+ .max_step = 22 | |
+ }, | |
+ | |
+ { | |
+ .enable = 2, | |
+ .led_state = FL_MODE_FLASH_LEVEL2, | |
+ .current_ma = 200, | |
+ .lumen_value = 250, | |
+ .min_step = 0, | |
+ .max_step = 270 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_OFF, | |
+ .current_ma = 0, | |
+ .lumen_value = 0, | |
+ .min_step = 0, | |
+ .max_step = 0 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_TORCH, | |
+ .current_ma = 150, | |
+ .lumen_value = 150, | |
+ .min_step = 0, | |
+ .max_step = 0 | |
+ }, | |
+ { | |
+ .enable = 2, | |
+ .led_state = FL_MODE_FLASH, | |
+ .current_ma = 750, | |
+ .lumen_value = 745, | |
+ .min_step = 271, | |
+ .max_step = 317 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_FLASH_LEVEL5, | |
+ .current_ma = 500, | |
+ .lumen_value = 500, | |
+ .min_step = 25, | |
+ .max_step = 26 | |
+ }, | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_FLASH, | |
+ .current_ma = 750, | |
+ .lumen_value = 750, | |
+ .min_step = 271, | |
+ .max_step = 325 | |
+ }, | |
+ | |
+ { | |
+ .enable = 0, | |
+ .led_state = FL_MODE_TORCH_LEVEL_2, | |
+ .current_ma = 200, | |
+ .lumen_value = 75, | |
+ .min_step = 0, | |
+ .max_step = 40 | |
+ },}; | |
+ | |
+static struct camera_led_info msm_camera_sensor_ov8838_led_info = { | |
+ .enable = 1, | |
+ .low_limit_led_state = FL_MODE_TORCH, | |
+ .max_led_current_ma = 750, | |
+ .num_led_est_table = ARRAY_SIZE(msm_camera_sensor_ov8838_led_table), | |
+}; | |
+ | |
+static struct camera_flash_info msm_camera_sensor_ov8838_flash_info = { | |
+ .led_info = &msm_camera_sensor_ov8838_led_info, | |
+ .led_est_table = msm_camera_sensor_ov8838_led_table, | |
+}; | |
+ | |
+static struct camera_flash_cfg msm_camera_sensor_ov8838_flash_cfg = { | |
+ .low_temp_limit = 5, | |
+ .low_cap_limit = 15, | |
+ .low_cap_limit_dual = 0, | |
+ .flash_info = &msm_camera_sensor_ov8838_flash_info, | |
+}; | |
+ | |
+static struct msm_camera_sensor_flash_data flash_ov8838 = { | |
+ .flash_type = MSM_CAMERA_FLASH_LED, | |
+#ifdef CONFIG_MSM_CAMERA_FLASH | |
+ .flash_src = &msm_camera_flash_src, | |
+#endif | |
+ | |
+}; | |
+ | |
+#ifdef CONFIG_OV8838 | |
+#if defined(CONFIG_AD5823_ACT) || defined(CONFIG_TI201_ACT) || defined(CONFIG_AD5816_ACT) | |
+static struct msm_actuator_info *ov8838_actuator_table[] = { | |
+#if defined(CONFIG_AD5823_ACT) | |
+ &ad5823_actuator_info, | |
+#endif | |
+#if defined(CONFIG_TI201_ACT) | |
+ &ti201_actuator_info, | |
+#endif | |
+#if defined(CONFIG_AD5816_ACT) | |
+ &ad5816_actuator_info, | |
+#endif | |
+}; | |
+#endif | |
+#endif | |
+ | |
+static struct msm_camera_sensor_info msm_camera_sensor_ov8838_data = { | |
+ .sensor_name = "ov8838", | |
+ .camera_power_on = impression_j_imx175_ov8838_vreg_on, | |
+ .camera_power_off = impression_j_imx175_ov8838_vreg_off, | |
+ .pdata = &impression_j_msm_camera_csi_device_data[0], | |
+ .flash_data = &flash_ov8838, | |
+ .sensor_platform_info = &sensor_ov8838_board_info, | |
+ .gpio_conf = &ov8838_back_cam_gpio_conf, | |
+ .csi_if = 1, | |
+ .camera_type = BACK_CAMERA_2D, | |
+#if defined(CONFIG_AD5823_ACT) || defined(CONFIG_TI201_ACT) || defined(CONFIG_AD5816_ACT) | |
+ .num_actuator_info_table = ARRAY_SIZE(ov8838_actuator_table), | |
+ .actuator_info_table = &ov8838_actuator_table[0], | |
+#endif | |
+#ifdef CONFIG_TI201_ACT | |
+ .actuator_info = &ti201_actuator_info, | |
+#endif | |
+ .use_rawchip = 1, | |
+ .flash_cfg = &msm_camera_sensor_ov8838_flash_cfg, | |
+}; | |
+#endif | |
+ | |
+ | |
+ | |
+#endif | |
+ | |
+#endif | |
+static struct platform_device msm_camera_server = { | |
+ .name = "msm_cam_server", | |
+ .id = 0, | |
+}; | |
+ | |
+struct i2c_board_info impression_j_camera_i2c_boardinfo_imx175_ar0260[] = { | |
+#ifdef CONFIG_IMX175 | |
+ { | |
+ I2C_BOARD_INFO("imx175", 0x20 >> 1), | |
+ .platform_data = &msm_camera_sensor_imx175_data, | |
+ }, | |
+#endif | |
+ | |
+#ifdef CONFIG_AR0260 | |
+ { | |
+ I2C_BOARD_INFO("ar0260", 0x90 >> 1), | |
+ .platform_data = &msm_camera_sensor_ar0260_data, | |
+ }, | |
+#endif | |
+}; | |
+ | |
+struct i2c_board_info impression_j_camera_i2c_boardinfo_imx175_ov2722[] = { | |
+#ifdef CONFIG_IMX175 | |
+ { | |
+ I2C_BOARD_INFO("imx175", 0x20 >> 1), | |
+ .platform_data = &msm_camera_sensor_imx175_data, | |
+ }, | |
+#endif | |
+ | |
+#ifdef CONFIG_OV2722 | |
+ { | |
+ I2C_BOARD_INFO("ov2722", 0x6c >> 1), | |
+ .platform_data = &msm_camera_sensor_ov2722_data, | |
+ }, | |
+#endif | |
+ | |
+}; | |
+ | |
+struct i2c_board_info impression_j_camera_i2c_boardinfo_ov8838_ar0260[] = { | |
+ | |
+#ifdef CONFIG_OV8838 | |
+ { | |
+ I2C_BOARD_INFO("ov8838", 0x20 >> 1), | |
+ .platform_data = &msm_camera_sensor_ov8838_data, | |
+ }, | |
+#endif | |
+ | |
+#ifdef CONFIG_AR0260 | |
+ { | |
+ I2C_BOARD_INFO("ar0260", 0x90 >> 1), | |
+ .platform_data = &msm_camera_sensor_ar0260_data, | |
+ }, | |
+#endif | |
+}; | |
+ | |
+struct i2c_board_info impression_j_camera_i2c_boardinfo_ov8838_ov2722[] = { | |
+ | |
+#ifdef CONFIG_OV8838 | |
+ { | |
+ I2C_BOARD_INFO("ov8838", 0x20 >> 1), | |
+ .platform_data = &msm_camera_sensor_ov8838_data, | |
+ }, | |
+#endif | |
+ | |
+#ifdef CONFIG_OV2722 | |
+ { | |
+ I2C_BOARD_INFO("ov2722", 0x6c >> 1), | |
+ .platform_data = &msm_camera_sensor_ov2722_data, | |
+ }, | |
+#endif | |
+}; | |
+ | |
+int impression_j_main_camera_id(int* id) | |
+{ | |
+ int rc=0; | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "CAM_PIN_GPIO_V_CAM1_IO1V8_EN"); | |
+ if (rc) { | |
+ pr_err("CAM_PIN_GPIO_V_CAM1_IO1V8_EN(\"gpio %d\", 1.2V) FAILED %d\n",CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ return rc; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(1); | |
+ | |
+ rc = gpio_request(CAM_PIN_MAIN_CAMERA_ID, "CAM_PIN_MAIN_CAMERA_ID"); | |
+ if (rc) { | |
+ pr_err("read cam id fail %d\n", rc); | |
+ return rc; | |
+ } | |
+ *id = gpio_get_value(CAM_PIN_MAIN_CAMERA_ID); | |
+ pr_info("camera id = %d\n", *id); | |
+ gpio_free(CAM_PIN_MAIN_CAMERA_ID); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "CAM_PIN_GPIO_V_CAM1_IO1V8_EN"); | |
+ if (rc) { | |
+ pr_err("CAM_PIN_GPIO_V_CAM1_IO1V8_EN(\"gpio %d\", 1.2V) FAILED %d\n",CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ return rc; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ | |
+ | |
+ return rc; | |
+} | |
+ | |
+#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \ | |
+_func, _inv, _disable) \ | |
+{ \ | |
+.config = { \ | |
+.direction = _dir, \ | |
+.output_buffer = _buf, \ | |
+.output_value = _val, \ | |
+.pull = _pull, \ | |
+.vin_sel = _vin, \ | |
+.out_strength = _out_strength, \ | |
+.function = _func, \ | |
+.inv_int_pol = _inv, \ | |
+.disable_pin = _disable, \ | |
+} \ | |
+} | |
+ | |
+struct pm8xxx_gpio_init { | |
+unsigned gpio; | |
+struct pm_gpio config; | |
+}; | |
+ | |
+int impression_j_front_camera_id(int* id) | |
+{ | |
+ int rc=0; | |
+ struct pm8xxx_gpio_init gpio[] = { | |
+ PM8XXX_GPIO_INIT(NC_PMGPIO_4, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+ }; | |
+ pm8xxx_gpio_config(gpio[0].gpio, | |
+ &gpio[0].config); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "CAM_PIN_GPIO_V_CAM1_IO1V8_EN"); | |
+ if (rc) { | |
+ pr_err("CAM_PIN_GPIO_V_CAM1_IO1V8_EN(\"gpio %d\", 1.2V) FAILED %d\n",CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ return rc; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 1); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ mdelay(10); | |
+ | |
+ rc = gpio_request(CAM_PIN_FRONT_CAMERA_ID, "CAM_PIN_FRONT_CAMERA_ID"); | |
+ if (rc) { | |
+ pr_err("read front cam id fail %d\n", rc); | |
+ return rc; | |
+ } | |
+ *id = gpio_get_value(CAM_PIN_FRONT_CAMERA_ID); | |
+ pr_info("front camera id = %d\n", *id); | |
+ | |
+ | |
+ gpio_free(CAM_PIN_FRONT_CAMERA_ID); | |
+ | |
+ | |
+ rc = gpio_request(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, "CAM_PIN_GPIO_V_CAM1_IO1V8_EN"); | |
+ if (rc) { | |
+ pr_err("CAM_PIN_GPIO_V_CAM1_IO1V8_EN(\"gpio %d\", 1.2V) FAILED %d\n",CAM_PIN_GPIO_V_RAW_1V8_EN, rc); | |
+ return rc; | |
+ } | |
+ gpio_direction_output(CAM_PIN_GPIO_V_CAM1_IO1V8_EN, 0); | |
+ gpio_free(CAM_PIN_GPIO_V_CAM1_IO1V8_EN); | |
+ | |
+ | |
+ return rc; | |
+} | |
+ | |
+ | |
+#include <linux/i2c.h> | |
+#include <linux/i2c/sx150x.h> | |
+ | |
+ | |
+void __init impression_j_init_cam(void) | |
+{ | |
+ int main_camera_id=0; | |
+ int front_camera_id=0; | |
+ int rc=0; | |
+ | |
+ pr_info("%s", __func__); | |
+ | |
+ msm_gpiomux_install(impression_j_cam_common_configs, | |
+ ARRAY_SIZE(impression_j_cam_common_configs)); | |
+ | |
+ platform_device_register(&msm_camera_server); | |
+ | |
+ platform_device_register(&msm8960_device_i2c_mux_gsbi4); | |
+ platform_device_register(&msm8960_device_csiphy0); | |
+ platform_device_register(&msm8960_device_csiphy1); | |
+ platform_device_register(&msm8960_device_csid0); | |
+ platform_device_register(&msm8960_device_csid1); | |
+ platform_device_register(&msm8960_device_ispif); | |
+ platform_device_register(&msm8960_device_vfe); | |
+ platform_device_register(&msm8960_device_vpe); | |
+ | |
+#ifdef CONFIG_I2C | |
+ | |
+ rc = impression_j_main_camera_id (&main_camera_id); | |
+ if (rc<0) | |
+ { | |
+ pr_info("can't read main camera id\n"); | |
+ return; | |
+ } | |
+ | |
+ rc = impression_j_front_camera_id (&front_camera_id); | |
+ if (rc<0) | |
+ { | |
+ pr_info("can't read front camera id\n"); | |
+ return; | |
+ } | |
+ | |
+ pr_info("main/front camera id = %d/%d\n",main_camera_id,front_camera_id); | |
+ | |
+ | |
+ if (main_camera_id == 0 && front_camera_id == 0) { | |
+ | |
+ i2c_register_board_info(MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ impression_j_camera_i2c_boardinfo_imx175_ar0260, | |
+ ARRAY_SIZE(impression_j_camera_i2c_boardinfo_imx175_ar0260)); | |
+ } | |
+ else if (main_camera_id == 0 && front_camera_id == 1) { | |
+ | |
+ i2c_register_board_info(MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ impression_j_camera_i2c_boardinfo_imx175_ov2722, | |
+ ARRAY_SIZE(impression_j_camera_i2c_boardinfo_imx175_ov2722)); | |
+ } | |
+ else if (main_camera_id == 1 && front_camera_id == 0) { | |
+ | |
+ i2c_register_board_info(MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ impression_j_camera_i2c_boardinfo_ov8838_ar0260, | |
+ ARRAY_SIZE(impression_j_camera_i2c_boardinfo_ov8838_ar0260)); | |
+ } | |
+ else if (main_camera_id == 1 && front_camera_id == 1) { | |
+ | |
+ i2c_register_board_info(MSM_8960_GSBI4_QUP_I2C_BUS_ID, | |
+ impression_j_camera_i2c_boardinfo_ov8838_ov2722, | |
+ ARRAY_SIZE(impression_j_camera_i2c_boardinfo_ov8838_ov2722)); | |
+ } | |
+ | |
+#endif | |
+} | |
+ | |
+ | |
+ | |
+#endif | |
+ | |
+ | |
+ | |
diff --git arch/arm/mach-msm/board-impression_j-display.c arch/arm/mach-msm/board-impression_j-display.c | |
new file mode 100644 | |
index 0000000..aa85587 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-display.c | |
@@ -0,0 +1,1463 @@ | |
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <linux/init.h> | |
+#include <linux/ioport.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/bootmem.h> | |
+#include <linux/ion.h> | |
+#include <asm/mach-types.h> | |
+#include <mach/msm_memtypes.h> | |
+#include <mach/board.h> | |
+#include <mach/gpio.h> | |
+#include <mach/gpiomux.h> | |
+#include <mach/ion.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/panel_id.h> | |
+#include <mach/debug_display.h> | |
+#include "devices.h" | |
+#include "board-impression_j.h" | |
+#include <linux/mfd/pm8xxx/pm8921.h> | |
+#include <mach/gpio.h> | |
+#include <mach/gpiomux.h> | |
+#include "../../../../drivers/video/msm/msm_fb.h" | |
+#include "../../../../drivers/video/msm/mipi_dsi.h" | |
+#include "../../../../drivers/video/msm/mdp4.h" | |
+#include <mach/msm_xo.h> | |
+ | |
+#define hr_msleep(x) msleep(x) | |
+ | |
+#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER | |
+#define MSM_FB_PRIM_BUF_SIZE (1280 * ALIGN(720, 32) * 4 * 3) | |
+#else | |
+#define MSM_FB_PRIM_BUF_SIZE (1280 * ALIGN(720, 32) * 4 * 2) | |
+#endif | |
+ | |
+#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE, 4096) | |
+ | |
+#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK | |
+#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1920 * 1080 * 3 * 2), 4096) | |
+#else | |
+#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0) | |
+#endif | |
+ | |
+#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK | |
+#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096) | |
+#else | |
+#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0) | |
+#endif | |
+ | |
+static struct resource msm_fb_resources[] = { | |
+ { | |
+ .flags = IORESOURCE_DMA, | |
+ } | |
+}; | |
+struct msm_xo_voter *wa_xo; | |
+ | |
+#define MIPI_NOVATEK_PANEL_NAME "mipi_cmd_novatek_qhd" | |
+#define MIPI_RENESAS_PANEL_NAME "mipi_video_renesas_fiwvga" | |
+#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga" | |
+#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga" | |
+#define HDMI_PANEL_NAME "hdmi_msm" | |
+#define TVOUT_PANEL_NAME "tvout_msm" | |
+ | |
+static int impression_j_detect_panel(const char *name) | |
+{ | |
+#if 0 | |
+ if (panel_type == PANEL_ID_DLX_SONY_RENESAS) { | |
+ if (!strncmp(name, MIPI_RENESAS_PANEL_NAME, | |
+ strnlen(MIPI_RENESAS_PANEL_NAME, | |
+ PANEL_NAME_MAX_LEN))){ | |
+ PR_DISP_INFO("impression_j_%s\n", name); | |
+ return 0; | |
+ } | |
+ } else if (panel_type == PANEL_ID_DLX_SHARP_RENESAS) { | |
+ if (!strncmp(name, MIPI_RENESAS_PANEL_NAME, | |
+ strnlen(MIPI_RENESAS_PANEL_NAME, | |
+ PANEL_NAME_MAX_LEN))){ | |
+ PR_DISP_INFO("impression_j_%s\n", name); | |
+ return 0; | |
+ } | |
+ } | |
+#endif | |
+ if (!strncmp(name, HDMI_PANEL_NAME, | |
+ strnlen(HDMI_PANEL_NAME, | |
+ PANEL_NAME_MAX_LEN))) | |
+ return 0; | |
+ | |
+ return -ENODEV; | |
+} | |
+ | |
+static struct msm_fb_platform_data msm_fb_pdata = { | |
+ .detect_client = impression_j_detect_panel, | |
+}; | |
+ | |
+static struct platform_device msm_fb_device = { | |
+ .name = "msm_fb", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(msm_fb_resources), | |
+ .resource = msm_fb_resources, | |
+ .dev.platform_data = &msm_fb_pdata, | |
+}; | |
+ | |
+void __init impression_j_allocate_fb_region(void) | |
+{ | |
+ void *addr; | |
+ unsigned long size; | |
+ | |
+ size = MSM_FB_SIZE; | |
+ addr = alloc_bootmem_align(size, 0x1000); | |
+ msm_fb_resources[0].start = __pa(addr); | |
+ msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1; | |
+ pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", | |
+ size, addr, __pa(addr)); | |
+} | |
+ | |
+#define MDP_VSYNC_GPIO 0 | |
+ | |
+#ifdef CONFIG_MSM_BUS_SCALING | |
+static struct msm_bus_vectors mdp_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors mdp_ui_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 577474560 * 2, | |
+ .ib = 721843200 * 2, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors mdp_vga_vectors[] = { | |
+ | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 605122560 * 2, | |
+ .ib = 756403200 * 2, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors mdp_720p_vectors[] = { | |
+ | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 660418560 * 2, | |
+ .ib = 825523200 * 2, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors mdp_1080p_vectors[] = { | |
+ | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 764098560 * 2, | |
+ .ib = 955123200 * 2, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths mdp_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(mdp_init_vectors), | |
+ mdp_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(mdp_ui_vectors), | |
+ mdp_ui_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(mdp_ui_vectors), | |
+ mdp_ui_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(mdp_vga_vectors), | |
+ mdp_vga_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(mdp_720p_vectors), | |
+ mdp_720p_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(mdp_1080p_vectors), | |
+ mdp_1080p_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata mdp_bus_scale_pdata = { | |
+ mdp_bus_scale_usecases, | |
+ ARRAY_SIZE(mdp_bus_scale_usecases), | |
+ .name = "mdp", | |
+}; | |
+ | |
+static struct msm_bus_vectors dtv_bus_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors dtv_bus_def_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_MDP_PORT0, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 566092800 * 2, | |
+ .ib = 707616000 * 2, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths dtv_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(dtv_bus_init_vectors), | |
+ dtv_bus_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(dtv_bus_def_vectors), | |
+ dtv_bus_def_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata dtv_bus_scale_pdata = { | |
+ dtv_bus_scale_usecases, | |
+ ARRAY_SIZE(dtv_bus_scale_usecases), | |
+ .name = "dtv", | |
+}; | |
+ | |
+static struct lcdc_platform_data dtv_pdata = { | |
+ .bus_scale_table = &dtv_bus_scale_pdata, | |
+}; | |
+#endif | |
+ | |
+static int mdp_core_clk_rate_table[] = { | |
+ 200000000, | |
+ 200000000, | |
+ 200000000, | |
+ 200000000, | |
+}; | |
+ | |
+struct mdp_reg *mdp_gamma = NULL; | |
+int mdp_gamma_count = 0; | |
+struct mdp_reg mdp_gamma_novatek[] = { | |
+ {0x94800, 0x000000, 0x0}, | |
+ {0x94804, 0x010101, 0x0}, | |
+ {0x94808, 0x020202, 0x0}, | |
+ {0x9480C, 0x030303, 0x0}, | |
+ {0x94810, 0x040404, 0x0}, | |
+ {0x94814, 0x050505, 0x0}, | |
+ {0x94818, 0x060606, 0x0}, | |
+ {0x9481C, 0x070707, 0x0}, | |
+ {0x94820, 0x080808, 0x0}, | |
+ {0x94824, 0x090909, 0x0}, | |
+ {0x94828, 0x0A0A0A, 0x0}, | |
+ {0x9482C, 0x0B0B0B, 0x0}, | |
+ {0x94830, 0x0C0C0C, 0x0}, | |
+ {0x94834, 0x0D0D0D, 0x0}, | |
+ {0x94838, 0x0E0E0E, 0x0}, | |
+ {0x9483C, 0x0F0F0F, 0x0}, | |
+ {0x94840, 0x101010, 0x0}, | |
+ {0x94844, 0x111111, 0x0}, | |
+ {0x94848, 0x121212, 0x0}, | |
+ {0x9484C, 0x131313, 0x0}, | |
+ {0x94850, 0x141414, 0x0}, | |
+ {0x94854, 0x151515, 0x0}, | |
+ {0x94858, 0x161616, 0x0}, | |
+ {0x9485C, 0x171717, 0x0}, | |
+ {0x94860, 0x181818, 0x0}, | |
+ {0x94864, 0x191919, 0x0}, | |
+ {0x94868, 0x1A1A1A, 0x0}, | |
+ {0x9486C, 0x1B1B1B, 0x0}, | |
+ {0x94870, 0x1C1C1C, 0x0}, | |
+ {0x94874, 0x1D1D1D, 0x0}, | |
+ {0x94878, 0x1E1E1E, 0x0}, | |
+ {0x9487C, 0x1F1F1F, 0x0}, | |
+ {0x94880, 0x202020, 0x0}, | |
+ {0x94884, 0x212121, 0x0}, | |
+ {0x94888, 0x222222, 0x0}, | |
+ {0x9488C, 0x232323, 0x0}, | |
+ {0x94890, 0x242424, 0x0}, | |
+ {0x94894, 0x252525, 0x0}, | |
+ {0x94898, 0x262626, 0x0}, | |
+ {0x9489C, 0x262727, 0x0}, | |
+ {0x948A0, 0x272828, 0x0}, | |
+ {0x948A4, 0x282929, 0x0}, | |
+ {0x948A8, 0x292A2A, 0x0}, | |
+ {0x948AC, 0x2A2B2B, 0x0}, | |
+ {0x948B0, 0x2B2C2C, 0x0}, | |
+ {0x948B4, 0x2C2D2D, 0x0}, | |
+ {0x948B8, 0x2D2E2E, 0x0}, | |
+ {0x948BC, 0x2E2F2F, 0x0}, | |
+ {0x948C0, 0x2F3030, 0x0}, | |
+ {0x948C4, 0x303131, 0x0}, | |
+ {0x948C8, 0x313232, 0x0}, | |
+ {0x948CC, 0x323333, 0x0}, | |
+ {0x948D0, 0x333434, 0x0}, | |
+ {0x948D4, 0x343535, 0x0}, | |
+ {0x948D8, 0x353636, 0x0}, | |
+ {0x948DC, 0x363737, 0x0}, | |
+ {0x948E0, 0x373838, 0x0}, | |
+ {0x948E4, 0x383939, 0x0}, | |
+ {0x948E8, 0x393A3A, 0x0}, | |
+ {0x948EC, 0x3A3B3B, 0x0}, | |
+ {0x948F0, 0x3B3C3C, 0x0}, | |
+ {0x948F4, 0x3C3D3D, 0x0}, | |
+ {0x948F8, 0x3D3E3E, 0x0}, | |
+ {0x948FC, 0x3E3F3F, 0x0}, | |
+ {0x94900, 0x3F4040, 0x0}, | |
+ {0x94904, 0x404141, 0x0}, | |
+ {0x94908, 0x414242, 0x0}, | |
+ {0x9490C, 0x424343, 0x0}, | |
+ {0x94910, 0x434444, 0x0}, | |
+ {0x94914, 0x444545, 0x0}, | |
+ {0x94918, 0x454646, 0x0}, | |
+ {0x9491C, 0x464747, 0x0}, | |
+ {0x94920, 0x474848, 0x0}, | |
+ {0x94924, 0x484949, 0x0}, | |
+ {0x94928, 0x494A4A, 0x0}, | |
+ {0x9492C, 0x4A4B4B, 0x0}, | |
+ {0x94930, 0x4B4C4C, 0x0}, | |
+ {0x94934, 0x4C4D4D, 0x0}, | |
+ {0x94938, 0x4D4E4E, 0x0}, | |
+ {0x9493C, 0x4E4F4F, 0x0}, | |
+ {0x94940, 0x4F5050, 0x0}, | |
+ {0x94944, 0x505151, 0x0}, | |
+ {0x94948, 0x515252, 0x0}, | |
+ {0x9494C, 0x525353, 0x0}, | |
+ {0x94950, 0x535454, 0x0}, | |
+ {0x94954, 0x545555, 0x0}, | |
+ {0x94958, 0x555656, 0x0}, | |
+ {0x9495C, 0x565757, 0x0}, | |
+ {0x94960, 0x575858, 0x0}, | |
+ {0x94964, 0x585959, 0x0}, | |
+ {0x94968, 0x595A5A, 0x0}, | |
+ {0x9496C, 0x5A5B5B, 0x0}, | |
+ {0x94970, 0x5B5C5C, 0x0}, | |
+ {0x94974, 0x5C5D5D, 0x0}, | |
+ {0x94978, 0x5D5E5E, 0x0}, | |
+ {0x9497C, 0x5E5F5F, 0x0}, | |
+ {0x94980, 0x5F6060, 0x0}, | |
+ {0x94984, 0x606161, 0x0}, | |
+ {0x94988, 0x616262, 0x0}, | |
+ {0x9498C, 0x626363, 0x0}, | |
+ {0x94990, 0x636464, 0x0}, | |
+ {0x94994, 0x646565, 0x0}, | |
+ {0x94998, 0x656666, 0x0}, | |
+ {0x9499C, 0x666767, 0x0}, | |
+ {0x949A0, 0x676868, 0x0}, | |
+ {0x949A4, 0x686969, 0x0}, | |
+ {0x949A8, 0x686A6A, 0x0}, | |
+ {0x949AC, 0x696B6B, 0x0}, | |
+ {0x949B0, 0x6A6C6C, 0x0}, | |
+ {0x949B4, 0x6B6D6D, 0x0}, | |
+ {0x949B8, 0x6C6E6E, 0x0}, | |
+ {0x949BC, 0x6D6F6F, 0x0}, | |
+ {0x949C0, 0x6E7070, 0x0}, | |
+ {0x949C4, 0x6F7171, 0x0}, | |
+ {0x949C8, 0x707272, 0x0}, | |
+ {0x949CC, 0x717373, 0x0}, | |
+ {0x949D0, 0x727474, 0x0}, | |
+ {0x949D4, 0x737575, 0x0}, | |
+ {0x949D8, 0x747676, 0x0}, | |
+ {0x949DC, 0x757777, 0x0}, | |
+ {0x949E0, 0x767878, 0x0}, | |
+ {0x949E4, 0x777979, 0x0}, | |
+ {0x949E8, 0x787A7A, 0x0}, | |
+ {0x949EC, 0x797B7B, 0x0}, | |
+ {0x949F0, 0x7A7C7C, 0x0}, | |
+ {0x949F4, 0x7B7D7D, 0x0}, | |
+ {0x949F8, 0x7C7E7E, 0x0}, | |
+ {0x949FC, 0x7D7F7F, 0x0}, | |
+ {0x94A00, 0x7E8080, 0x0}, | |
+ {0x94A04, 0x7F8181, 0x0}, | |
+ {0x94A08, 0x808282, 0x0}, | |
+ {0x94A0C, 0x818383, 0x0}, | |
+ {0x94A10, 0x828484, 0x0}, | |
+ {0x94A14, 0x838585, 0x0}, | |
+ {0x94A18, 0x848686, 0x0}, | |
+ {0x94A1C, 0x858787, 0x0}, | |
+ {0x94A20, 0x868888, 0x0}, | |
+ {0x94A24, 0x878989, 0x0}, | |
+ {0x94A28, 0x888A8A, 0x0}, | |
+ {0x94A2C, 0x898B8B, 0x0}, | |
+ {0x94A30, 0x8A8C8C, 0x0}, | |
+ {0x94A34, 0x8B8D8D, 0x0}, | |
+ {0x94A38, 0x8C8E8E, 0x0}, | |
+ {0x94A3C, 0x8D8F8F, 0x0}, | |
+ {0x94A40, 0x8E9090, 0x0}, | |
+ {0x94A44, 0x8F9191, 0x0}, | |
+ {0x94A48, 0x909292, 0x0}, | |
+ {0x94A4C, 0x919393, 0x0}, | |
+ {0x94A50, 0x929494, 0x0}, | |
+ {0x94A54, 0x939595, 0x0}, | |
+ {0x94A58, 0x949696, 0x0}, | |
+ {0x94A5C, 0x959797, 0x0}, | |
+ {0x94A60, 0x969898, 0x0}, | |
+ {0x94A64, 0x979999, 0x0}, | |
+ {0x94A68, 0x989A9A, 0x0}, | |
+ {0x94A6C, 0x999B9B, 0x0}, | |
+ {0x94A70, 0x9A9C9C, 0x0}, | |
+ {0x94A74, 0x9B9D9D, 0x0}, | |
+ {0x94A78, 0x9C9E9E, 0x0}, | |
+ {0x94A7C, 0x9D9F9F, 0x0}, | |
+ {0x94A80, 0x9EA0A0, 0x0}, | |
+ {0x94A84, 0x9FA1A1, 0x0}, | |
+ {0x94A88, 0xA0A2A2, 0x0}, | |
+ {0x94A8C, 0xA1A3A3, 0x0}, | |
+ {0x94A90, 0xA2A4A4, 0x0}, | |
+ {0x94A94, 0xA3A5A5, 0x0}, | |
+ {0x94A98, 0xA4A6A6, 0x0}, | |
+ {0x94A9C, 0xA5A7A7, 0x0}, | |
+ {0x94AA0, 0xA6A8A8, 0x0}, | |
+ {0x94AA4, 0xA7A9A9, 0x0}, | |
+ {0x94AA8, 0xA8AAAA, 0x0}, | |
+ {0x94AAC, 0xA9ABAB, 0x0}, | |
+ {0x94AB0, 0xAAACAC, 0x0}, | |
+ {0x94AB4, 0xABADAD, 0x0}, | |
+ {0x94AB8, 0xACAEAE, 0x0}, | |
+ {0x94ABC, 0xADAFAF, 0x0}, | |
+ {0x94AC0, 0xAEB0B0, 0x0}, | |
+ {0x94AC4, 0xAFB1B1, 0x0}, | |
+ {0x94AC8, 0xB0B2B2, 0x0}, | |
+ {0x94ACC, 0xB1B3B3, 0x0}, | |
+ {0x94AD0, 0xB2B4B4, 0x0}, | |
+ {0x94AD4, 0xB3B5B5, 0x0}, | |
+ {0x94AD8, 0xB4B6B6, 0x0}, | |
+ {0x94ADC, 0xB5B7B7, 0x0}, | |
+ {0x94AE0, 0xB6B8B8, 0x0}, | |
+ {0x94AE4, 0xB7B9B9, 0x0}, | |
+ {0x94AE8, 0xB8BABA, 0x0}, | |
+ {0x94AEC, 0xB9BBBB, 0x0}, | |
+ {0x94AF0, 0xBABCBC, 0x0}, | |
+ {0x94AF4, 0xBBBDBD, 0x0}, | |
+ {0x94AF8, 0xBCBEBE, 0x0}, | |
+ {0x94AFC, 0xBDBFBF, 0x0}, | |
+ {0x94B00, 0xBEC0C0, 0x0}, | |
+ {0x94B04, 0xBFC1C1, 0x0}, | |
+ {0x94B08, 0xC0C2C2, 0x0}, | |
+ {0x94B0C, 0xC1C3C3, 0x0}, | |
+ {0x94B10, 0xC2C4C4, 0x0}, | |
+ {0x94B14, 0xC3C5C5, 0x0}, | |
+ {0x94B18, 0xC4C6C6, 0x0}, | |
+ {0x94B1C, 0xC5C7C7, 0x0}, | |
+ {0x94B20, 0xC6C8C8, 0x0}, | |
+ {0x94B24, 0xC7C9C9, 0x0}, | |
+ {0x94B28, 0xC8CACA, 0x0}, | |
+ {0x94B2C, 0xC9CBCB, 0x0}, | |
+ {0x94B30, 0xCACCCC, 0x0}, | |
+ {0x94B34, 0xCBCDCD, 0x0}, | |
+ {0x94B38, 0xCCCECE, 0x0}, | |
+ {0x94B3C, 0xCDCFCF, 0x0}, | |
+ {0x94B40, 0xCED0D0, 0x0}, | |
+ {0x94B44, 0xCFD1D1, 0x0}, | |
+ {0x94B48, 0xD0D2D2, 0x0}, | |
+ {0x94B4C, 0xD1D3D3, 0x0}, | |
+ {0x94B50, 0xD2D4D4, 0x0}, | |
+ {0x94B54, 0xD3D5D5, 0x0}, | |
+ {0x94B58, 0xD4D6D6, 0x0}, | |
+ {0x94B5C, 0xD4D7D7, 0x0}, | |
+ {0x94B60, 0xD5D8D8, 0x0}, | |
+ {0x94B64, 0xD6D9D9, 0x0}, | |
+ {0x94B68, 0xD7DADA, 0x0}, | |
+ {0x94B6C, 0xD8DBDB, 0x0}, | |
+ {0x94B70, 0xD9DCDC, 0x0}, | |
+ {0x94B74, 0xDADDDD, 0x0}, | |
+ {0x94B78, 0xDBDEDE, 0x0}, | |
+ {0x94B7C, 0xDCDFDF, 0x0}, | |
+ {0x94B80, 0xDDE0E0, 0x0}, | |
+ {0x94B84, 0xDEE1E1, 0x0}, | |
+ {0x94B88, 0xDFE2E2, 0x0}, | |
+ {0x94B8C, 0xE0E3E3, 0x0}, | |
+ {0x94B90, 0xE1E4E4, 0x0}, | |
+ {0x94B94, 0xE2E5E5, 0x0}, | |
+ {0x94B98, 0xE3E6E6, 0x0}, | |
+ {0x94B9C, 0xE4E7E7, 0x0}, | |
+ {0x94BA0, 0xE5E8E8, 0x0}, | |
+ {0x94BA4, 0xE6E9E9, 0x0}, | |
+ {0x94BA8, 0xE7EAEA, 0x0}, | |
+ {0x94BAC, 0xE8EBEB, 0x0}, | |
+ {0x94BB0, 0xE9ECEC, 0x0}, | |
+ {0x94BB4, 0xEAEDED, 0x0}, | |
+ {0x94BB8, 0xEBEEEE, 0x0}, | |
+ {0x94BBC, 0xECEFEF, 0x0}, | |
+ {0x94BC0, 0xEDF0F0, 0x0}, | |
+ {0x94BC4, 0xEEF1F1, 0x0}, | |
+ {0x94BC8, 0xEFF2F2, 0x0}, | |
+ {0x94BCC, 0xF0F3F3, 0x0}, | |
+ {0x94BD0, 0xF1F4F4, 0x0}, | |
+ {0x94BD4, 0xF2F5F5, 0x0}, | |
+ {0x94BD8, 0xF3F6F6, 0x0}, | |
+ {0x94BDC, 0xF4F7F7, 0x0}, | |
+ {0x94BE0, 0xF5F8F8, 0x0}, | |
+ {0x94BE4, 0xF6F9F9, 0x0}, | |
+ {0x94BE8, 0xF7FAFA, 0x0}, | |
+ {0x94BEC, 0xF8FBFB, 0x0}, | |
+ {0x94BF0, 0xF9FCFC, 0x0}, | |
+ {0x94BF4, 0xFAFDFD, 0x0}, | |
+ {0x94BF8, 0xFBFEFE, 0x0}, | |
+ {0x94BFC, 0xFCFFFF, 0x0}, | |
+ {0x90070, 0x0F, 0x0}, | |
+}; | |
+ | |
+int impression_mdp_gamma(void) | |
+{ | |
+ if (mdp_gamma == NULL) | |
+ return 0; | |
+ | |
+ mdp_color_enhancement(mdp_gamma, mdp_gamma_count); | |
+ return 0; | |
+} | |
+ | |
+static struct msm_panel_common_pdata mdp_pdata = { | |
+ .gpio = MDP_VSYNC_GPIO, | |
+ .mdp_core_clk_rate = 200000000, | |
+ .mdp_core_clk_table = mdp_core_clk_rate_table, | |
+ .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table), | |
+#ifdef CONFIG_MSM_BUS_SCALING | |
+ .mdp_bus_scale_table = &mdp_bus_scale_pdata, | |
+#endif | |
+ .mdp_rev = MDP_REV_44, | |
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+ .mem_hid = BIT(ION_CP_MM_HEAP_ID), | |
+#else | |
+ .mem_hid = MEMTYPE_EBI1, | |
+#endif | |
+ .cont_splash_enabled = 0x00, | |
+ .mdp_gamma = impression_mdp_gamma, | |
+ .mdp_iommu_split_domain = 1, | |
+ .mdp_max_clk = 200000000, | |
+}; | |
+ | |
+void __init impression_j_mdp_writeback(struct memtype_reserve* reserve_table) | |
+{ | |
+ mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE; | |
+ mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE; | |
+#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION) | |
+ reserve_table[mdp_pdata.mem_hid].size += | |
+ mdp_pdata.ov0_wb_size; | |
+ reserve_table[mdp_pdata.mem_hid].size += | |
+ mdp_pdata.ov1_wb_size; | |
+#endif | |
+} | |
+static int first_init = 1; | |
+static bool dsi_power_on; | |
+struct dcs_cmd_req cmdreq; | |
+uint32_t cfg_panel_te_active[] = {GPIO_CFG(LCD_TE, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA)}; | |
+uint32_t cfg_panel_te_sleep[] = {GPIO_CFG(LCD_TE, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)}; | |
+static struct dsi_cmd_desc nvt_LowTemp_wrkr_enter[] = { | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0xEE}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 1, 2, (char[]){0x26, 0x08}}, | |
+}; | |
+ | |
+static struct dsi_cmd_desc nvt_LowTemp_wrkr_exit[] = { | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x26, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 10, 2, (char[]){0xFF, 0x00}}, | |
+}; | |
+ | |
+ | |
+static int mipi_dsi_panel_power(int on) | |
+{ | |
+ static struct regulator *reg_lvs5, *reg_l10, *reg_l2; | |
+ static int gpio11; | |
+ int rc; | |
+ | |
+ PR_DISP_INFO("%s: on=%d\n", __func__, on); | |
+ | |
+ if (!dsi_power_on) { | |
+ reg_lvs5 = regulator_get(&msm_mipi_dsi1_device.dev, | |
+ "dsi1_vddio"); | |
+ if (IS_ERR_OR_NULL(reg_lvs5)) { | |
+ pr_err("could not get 8921_lvs5, rc = %ld\n", | |
+ PTR_ERR(reg_lvs5)); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev, | |
+ "dsi1_pll_vdda"); | |
+ if (IS_ERR_OR_NULL(reg_l2)) { | |
+ pr_err("could not get 8921_l2, rc = %ld\n", | |
+ PTR_ERR(reg_l2)); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_set_voltage(reg_l2, 1200000, 1200000); | |
+ if (rc) { | |
+ pr_err("set_voltage l2 failed, rc=%d\n", rc); | |
+ return -EINVAL; | |
+ } | |
+ | |
+ reg_l10 = regulator_get(&msm_mipi_dsi1_device.dev, | |
+ "dsi1_avdd"); | |
+ if (IS_ERR_OR_NULL(reg_l10)) { | |
+ pr_err("could not get 8921_l10, rc = %ld\n", | |
+ PTR_ERR(reg_l10)); | |
+ return -ENODEV; | |
+ } | |
+ rc = regulator_set_voltage(reg_l10, 3000000, 3000000); | |
+ if (rc) { | |
+ pr_err("set_voltage l10 failed, rc=%d\n", rc); | |
+ return -EINVAL; | |
+ } | |
+ | |
+ gpio11 = PM8921_GPIO_PM_TO_SYS(LCD_RSTz); | |
+ rc = gpio_request(gpio11, "LCD_RSTz"); | |
+ if (rc) { | |
+ pr_err("request gpio 11 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ dsi_power_on = true; | |
+ } | |
+ | |
+ if (on) { | |
+ if (!first_init) { | |
+ rc = regulator_enable(reg_lvs5); | |
+ if (rc) { | |
+ pr_err("enable lvs5 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ msleep(5); | |
+ rc = regulator_set_optimum_mode(reg_l10, 110000); | |
+ if (rc < 0) { | |
+ pr_err("set_optimum_mode l10 failed, rc=%d\n", rc); | |
+ return -EINVAL; | |
+ } | |
+ rc = regulator_enable(reg_l10); | |
+ if (rc) { | |
+ pr_err("enable l10 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_set_optimum_mode(reg_l2, 100000); | |
+ if (rc < 0) { | |
+ pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); | |
+ return -EINVAL; | |
+ } | |
+ rc = regulator_enable(reg_l2); | |
+ if (rc) { | |
+ pr_err("enable l2 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ msm_xo_mode_vote(wa_xo, MSM_XO_MODE_ON); | |
+ | |
+ msleep(20); | |
+ gpio_set_value_cansleep(gpio11, 1); | |
+ msleep(1); | |
+ if (panel_type == PANEL_ID_IMN_SHARP_NT) { | |
+ cmdreq.cmds = nvt_LowTemp_wrkr_enter; | |
+ cmdreq.cmds_cnt = ARRAY_SIZE(nvt_LowTemp_wrkr_enter); | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ | |
+ cmdreq.cmds = nvt_LowTemp_wrkr_exit; | |
+ cmdreq.cmds_cnt = ARRAY_SIZE(nvt_LowTemp_wrkr_exit); | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ | |
+ msleep(10); | |
+ } | |
+ gpio_set_value_cansleep(gpio11, 0); | |
+ udelay(10); | |
+ gpio_set_value_cansleep(gpio11, 1); | |
+ msleep(20); | |
+ | |
+ msm_xo_mode_vote(wa_xo, MSM_XO_MODE_OFF); | |
+ } else { | |
+ | |
+ rc = regulator_enable(reg_lvs5); | |
+ if (rc) { | |
+ pr_err("enable lvs5 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_set_optimum_mode(reg_l10, 110000); | |
+ if (rc < 0) { | |
+ pr_err("set_optimum_mode l10 failed, rc=%d\n", rc); | |
+ return -EINVAL; | |
+ } | |
+ rc = regulator_enable(reg_l10); | |
+ if (rc) { | |
+ pr_err("enable l10 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_set_optimum_mode(reg_l2, 100000); | |
+ if (rc < 0) { | |
+ pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); | |
+ return -EINVAL; | |
+ } | |
+ rc = regulator_enable(reg_l2); | |
+ if (rc) { | |
+ pr_err("enable l2 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ msm_xo_mode_vote(wa_xo, MSM_XO_MODE_ON); | |
+ msleep(10); | |
+ msm_xo_mode_vote(wa_xo, MSM_XO_MODE_OFF); | |
+ } | |
+ rc = gpio_tlmm_config(cfg_panel_te_active[0], GPIO_CFG_ENABLE); | |
+ if (rc) { | |
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n", __func__, | |
+ cfg_panel_te_active[0], rc); | |
+ } | |
+ | |
+ } else { | |
+ rc = gpio_tlmm_config(cfg_panel_te_sleep[0], GPIO_CFG_ENABLE); | |
+ if (rc) { | |
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n", __func__, | |
+ cfg_panel_te_sleep[0], rc); | |
+ } | |
+ | |
+ gpio_set_value_cansleep(gpio11, 0); | |
+ | |
+ msleep(10); | |
+ rc = regulator_disable(reg_l2); | |
+ if (rc) { | |
+ pr_err("disable reg_l2 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_disable(reg_l10); | |
+ if (rc) { | |
+ pr_err("disable reg_l10 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_disable(reg_lvs5); | |
+ if (rc) { | |
+ pr_err("disable reg_lvs5 failed, rc=%d\n", rc); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ } | |
+ | |
+ return 0; | |
+} | |
+ | |
+static struct mipi_dsi_platform_data mipi_dsi_pdata = { | |
+ .vsync_gpio = LCD_TE, | |
+ .dsi_power_save = mipi_dsi_panel_power, | |
+}; | |
+ | |
+static struct mipi_dsi_panel_platform_data *mipi_impression_j_pdata; | |
+ | |
+static struct dsi_buf impression_j_panel_tx_buf; | |
+static struct dsi_buf impression_j_panel_rx_buf; | |
+static struct dsi_cmd_desc *cmd_on_cmds = NULL; | |
+static int cmd_on_cmds_count = 0; | |
+ | |
+static char enter_sleep[2] = {0x10, 0x00}; | |
+static char exit_sleep[2] = {0x11, 0x00}; | |
+static char display_off[2] = {0x28, 0x00}; | |
+static char display_on[2] = {0x29, 0x00}; | |
+ | |
+static char led_pwm1[2] = {0x51, 0xff}; | |
+static char led_pwm2[2] = {0x53, 0x24}; | |
+static char led_pwm3[2] = {0x55, 0x03}; | |
+ | |
+static struct dsi_cmd_desc backlight_cmds[] = { | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 0, sizeof(led_pwm1), led_pwm1}, | |
+}; | |
+static struct dsi_cmd_desc display_on_cmds[] = { | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 0, sizeof(display_on), display_on}, | |
+}; | |
+ | |
+static char himax_password[4] = {0xB9, 0xFF, 0x83, 0x92}; | |
+static char himax_ba[8] = {0xBA, 0x12, 0x83, 0x00, 0xD6, 0xC6, 0x00, 0x0A}; | |
+static char himax_c0[3] = {0xC0, 0x01, 0x94}; | |
+static char himax_c6[8] = {0xC6, 0x35, 0x00, 0x00, 0x04}; | |
+ | |
+static char himax_d4[2] = {0xD4, 0x00}; | |
+static char himax_d5[4] = {0xD5, 0x00, 0x00, 0x02}; | |
+static char himax_bf[4] = {0xBF, 0x05, 0x60, 0x02}; | |
+#if 1 | |
+static char himax_e0[35] = { | |
+ 0xE0,0x00,0x04,0x09, | |
+ 0x30,0x30,0x3F,0x16, | |
+ 0x31,0x06,0x0D,0x0D, | |
+ 0x12,0x15,0x12,0x13, | |
+ 0x0A,0x1A,0x00,0x04, | |
+ 0x09,0x30,0x30,0x3F, | |
+ 0x16,0x31,0x06,0x0D, | |
+ 0x0D,0x12,0x15,0x12, | |
+ 0x13,0x0A,0x1A}; | |
+static char himax_e1[35] = { | |
+ 0xE1,0x00,0x07,0x0A, | |
+ 0x30,0x30,0x3F,0x17, | |
+ 0x34,0x04,0x0A,0x0C, | |
+ 0x11,0x14,0x11,0x11, | |
+ 0x0A,0x17,0x00,0x07, | |
+ 0x0A,0x30,0x30,0x3F, | |
+ 0x17,0x34,0x04,0x0A, | |
+ 0x0C,0x11,0x14,0x11, | |
+ 0x11,0x0A,0x17}; | |
+static char himax_e2[35] = { | |
+ 0xE2,0x00,0x08,0x0D, | |
+ 0x30,0x30,0x3F,0x18, | |
+ 0x35,0x04,0x0B,0x0B, | |
+ 0x11,0x14,0x11,0x10, | |
+ 0x0A,0x1F,0x00,0x08, | |
+ 0x0D,0x30,0x30,0x3F, | |
+ 0x18,0x35,0x04,0x0B, | |
+ 0x0B,0x11,0x14,0x11, | |
+ 0x10,0x0A,0x1F}; | |
+#endif | |
+static char himax_e3[2] = {0xE3, 0x11}; | |
+static char himax_e5[] = { 0xE5, 0x00, 0x15, 0x0B, | |
+ 0x09, 0x05, 0x00, 0x80, | |
+ 0x20, 0x80, 0x10, 0x00, | |
+ 0x07, 0x07, 0x07, 0x07, | |
+ 0x07, 0x80, 0x0A}; | |
+ | |
+static char himax_35[2] = {0x35, 0x00}; | |
+static char pwm_freq[] = {0xC9,0x1F,0x01,0x0E,0x3F,0x00,0x80}; | |
+static char himax_ca[] = { 0xCA, 0x28, 0x26, 0x24, | |
+ 0x23, 0x22, 0x21, 0x20, | |
+ 0x20,0x20}; | |
+ | |
+static struct dsi_cmd_desc sharp_cmd_on_cmds[] = { | |
+ {DTYPE_DCS_WRITE, 1, 0, 0, 120, sizeof(exit_sleep), exit_sleep}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_password), himax_password}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(himax_d4), himax_d4}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_ba), himax_ba}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_c0), himax_c0}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_c6), himax_c6}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_d5), himax_d5}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_bf), himax_bf}, | |
+ | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_e0), himax_e0}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_e1), himax_e1}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_e2), himax_e2}, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(himax_e3), himax_e3}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_e5), himax_e5}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(himax_35), himax_35}, | |
+ | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(led_pwm2), led_pwm2}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(led_pwm3), led_pwm3}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(pwm_freq), pwm_freq}, | |
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(himax_ca), himax_ca}, | |
+ | |
+ | |
+}; | |
+static char set_threelane[2] = {0xBA, 0x02}; | |
+static char display_mode_cmd[2] = {0xC2, 0x08}; | |
+static char enable_te[2] = {0x35, 0x00}; | |
+struct dsi_cmd_desc sharp_nt_cmd_on_cmds[] = { | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, sizeof(display_mode_cmd), display_mode_cmd}, | |
+#if 1 | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x03}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFE, 0x08}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x18, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x19, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x1A, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x25, 0x66}}, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x00, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x01, 0x07}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x02, 0x0B}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x03, 0x11}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x04, 0x18}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x05, 0x20}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x06, 0x27}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x07, 0x2A}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x08, 0x2E}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x09, 0x2F}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0A, 0x2C}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0B, 0x24}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0C, 0x1B}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0D, 0x13}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0E, 0x0C}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0F, 0x07}}, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFE, 0x01}}, | |
+#endif | |
+#if 0 | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x01}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, sizeof(swr01), swr01}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, sizeof(swr02), swr02}, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x01}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x02}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x04}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x09, 0x20}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0A, 0x09}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01}}, | |
+ | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00} }, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x05} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x28, 0x01} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x2F, 0x02} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00} }, | |
+#endif | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x04}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x0A, 0x0E}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01}}, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00} }, | |
+ {DTYPE_DCS_WRITE, 1, 0, 0, 100, sizeof(exit_sleep), exit_sleep}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, sizeof(set_threelane), set_threelane}, | |
+ | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0xEE} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x12, 0x50} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x13, 0x02} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x6A, 0x60} }, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00} }, | |
+ | |
+#if 1 | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0xEE} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x16, 0x08} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x05} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFB, 0x01} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x72, 0x21} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x73, 0x00} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x74, 0x22} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x75, 0x01} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x76, 0x1C} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00} }, | |
+ | |
+#endif | |
+ | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x04} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x05, 0x2D} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x21, 0xFF} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x22, 0xF7} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x23, 0xEF} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x24, 0xE7} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x25, 0xDF} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x26, 0xD7} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x27, 0xCF} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x28, 0xC7} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x29, 0xBF} }, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x2A, 0xB7} }, | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0xFF, 0x00}}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, sizeof(enable_te), enable_te}, | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x5E, 0x06}}, | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x55,0x83}}, | |
+ | |
+ | |
+ | |
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0, 2, (char[]){0x53, 0x24}}, | |
+}; | |
+ | |
+static struct dsi_cmd_desc display_off_cmds[] = { | |
+ {DTYPE_DCS_WRITE, 1, 0, 0, 0, | |
+ sizeof(display_off), display_off}, | |
+ {DTYPE_DCS_WRITE, 1, 0, 0, 120, | |
+ sizeof(enter_sleep), enter_sleep} | |
+}; | |
+ | |
+#if 0 | |
+static char manufacture_id[2] = {0x04, 0x00}; | |
+ | |
+static struct dsi_cmd_desc renesas_manufacture_id_cmd = { | |
+ DTYPE_DCS_READ, 1, 0, 1, 5, sizeof(manufacture_id), manufacture_id}; | |
+ | |
+static uint32 mipi_renesas_manufacture_id(struct msm_fb_data_type *mfd) | |
+{ | |
+ struct dsi_buf *rp, *tp; | |
+ struct dsi_cmd_desc *cmd; | |
+ uint32 *lp; | |
+ | |
+ tp = &impression_j_panel_tx_buf; | |
+ rp = &impression_j_panel_rx_buf; | |
+ cmd = &renesas_manufacture_id_cmd; | |
+ mipi_dsi_cmds_rx(mfd, tp, rp, cmd, 3); | |
+ lp = (uint32 *)rp->data; | |
+ pr_info("%s: manufacture_id=%x", __func__, *lp); | |
+ return *lp; | |
+} | |
+#endif | |
+ | |
+static int impression_j_lcd_on(struct platform_device *pdev) | |
+{ | |
+ struct msm_fb_data_type *mfd; | |
+ struct mipi_panel_info *mipi; | |
+ | |
+ mfd = platform_get_drvdata(pdev); | |
+ if (!mfd) | |
+ return -ENODEV; | |
+ if (mfd->key != MFD_KEY) | |
+ return -EINVAL; | |
+ | |
+ mipi = &mfd->panel_info.mipi; | |
+ if (!first_init) { | |
+ cmdreq.cmds = cmd_on_cmds; | |
+ cmdreq.cmds_cnt = cmd_on_cmds_count; | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ } | |
+ first_init = 0; | |
+ | |
+ | |
+ PR_DISP_INFO("%s done\n", __func__); | |
+ return 0; | |
+} | |
+ | |
+static int impression_j_lcd_off(struct platform_device *pdev) | |
+{ | |
+ struct msm_fb_data_type *mfd; | |
+ | |
+ mfd = platform_get_drvdata(pdev); | |
+ | |
+ if (!mfd) | |
+ return -ENODEV; | |
+ if (mfd->key != MFD_KEY) | |
+ return -EINVAL; | |
+ | |
+ cmdreq.cmds = display_off_cmds; | |
+ cmdreq.cmds_cnt = ARRAY_SIZE(display_off_cmds); | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ | |
+ PR_DISP_INFO("%s done\n", __func__); | |
+ return 0; | |
+} | |
+static int __devinit impression_j_lcd_probe(struct platform_device *pdev) | |
+{ | |
+ if (pdev->id == 0) { | |
+ mipi_impression_j_pdata = pdev->dev.platform_data; | |
+ return 0; | |
+ } | |
+ | |
+ msm_fb_add_device(pdev); | |
+ | |
+ PR_DISP_INFO("%s done\n", __func__); | |
+ return 0; | |
+} | |
+ | |
+static int impression_j_display_on(struct platform_device *pdev) | |
+{ | |
+ struct msm_fb_data_type *mfd; | |
+ | |
+ mfd = platform_get_drvdata(pdev); | |
+ | |
+ /* It needs 120ms when LP to HS for renesas */ | |
+ msleep(120); | |
+ | |
+ PR_DISP_DEBUG("%s: turning on the display.\n", __func__); | |
+ | |
+ cmdreq.cmds = display_on_cmds; | |
+ cmdreq.cmds_cnt = 1; | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ | |
+ PR_DISP_INFO("%s\n", __func__); | |
+ return 0; | |
+} | |
+ | |
+static int impression_j_display_off(struct platform_device *pdev) | |
+{ | |
+ struct msm_fb_data_type *mfd; | |
+ | |
+ mfd = platform_get_drvdata(pdev); | |
+ | |
+ cmdreq.cmds = display_off_cmds; | |
+ cmdreq.cmds_cnt = 1; | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ | |
+ PR_DISP_INFO("%s\n", __func__); | |
+ return 0; | |
+} | |
+ | |
+#define PWM_MIN 6 | |
+#define PWM_DEFAULT 80 | |
+#define PWM_MAX 255 | |
+ | |
+#define BRI_SETTING_MIN 30 | |
+#define BRI_SETTING_DEF 143 | |
+#define BRI_SETTING_MAX 255 | |
+ | |
+static unsigned char impression_j_shrink_pwm(int val) | |
+{ | |
+ unsigned char shrink_br = BRI_SETTING_MAX; | |
+ | |
+ if (val <= 0) { | |
+ shrink_br = 0; | |
+ } else if (val > 0 && (val < BRI_SETTING_MIN)) { | |
+ shrink_br = PWM_MIN; | |
+ } else if ((val >= BRI_SETTING_MIN) && (val <= BRI_SETTING_DEF)) { | |
+ shrink_br = (val - BRI_SETTING_MIN) * (PWM_DEFAULT - PWM_MIN) / | |
+ (BRI_SETTING_DEF - BRI_SETTING_MIN) + PWM_MIN; | |
+ } else if (val > BRI_SETTING_DEF && val <= BRI_SETTING_MAX) { | |
+ shrink_br = (val - BRI_SETTING_DEF) * (PWM_MAX - PWM_DEFAULT) / | |
+ (BRI_SETTING_MAX - BRI_SETTING_DEF) + PWM_DEFAULT; | |
+ } else if (val > BRI_SETTING_MAX) | |
+ shrink_br = PWM_MAX; | |
+ | |
+ PR_DISP_INFO("brightness orig=%d, transformed=%d\n", val, shrink_br); | |
+ | |
+ return shrink_br; | |
+} | |
+ | |
+static void impression_j_set_backlight(struct msm_fb_data_type *mfd) | |
+{ | |
+ struct mipi_panel_info *mipi; | |
+ | |
+ mipi = &mfd->panel_info.mipi; | |
+#if 0 | |
+ mutex_lock(&mfd->dma->ov_mutex); | |
+ if (mdp4_overlay_dsi_state_get() <= ST_DSI_SUSPEND) { | |
+ mutex_unlock(&mfd->dma->ov_mutex); | |
+ return; | |
+ } | |
+ | |
+ led_pwm1[1] = impression_j_shrink_pwm((unsigned char)(mfd->bl_level)); | |
+ | |
+ mipi_dsi_cmds_tx(&impression_j_panel_tx_buf, backlight_cmds, | |
+ ARRAY_SIZE(backlight_cmds)); | |
+ mutex_unlock(&mfd->dma->ov_mutex); | |
+#endif | |
+ led_pwm1[1] = impression_j_shrink_pwm((unsigned char)(mfd->bl_level)); | |
+ | |
+ cmdreq.cmds = backlight_cmds; | |
+ cmdreq.cmds_cnt = 1; | |
+ cmdreq.flags = CMD_REQ_COMMIT; | |
+ cmdreq.rlen = 0; | |
+ cmdreq.cb = NULL; | |
+ | |
+ mipi_dsi_cmdlist_put(&cmdreq); | |
+ | |
+ return; | |
+} | |
+ | |
+static struct platform_driver this_driver = { | |
+ .probe = impression_j_lcd_probe, | |
+ .driver = { | |
+ .name = "mipi_impression_j", | |
+ }, | |
+}; | |
+ | |
+static struct msm_fb_panel_data impression_j_panel_data = { | |
+ .on = impression_j_lcd_on, | |
+ .off = impression_j_lcd_off, | |
+ .set_backlight = impression_j_set_backlight, | |
+ .late_init = impression_j_display_on, | |
+ .early_off = impression_j_display_off, | |
+}; | |
+ | |
+static struct msm_panel_info pinfo; | |
+static int ch_used[3] = {0}; | |
+ | |
+static int mipi_impression_j_device_register(struct msm_panel_info *pinfo, | |
+ u32 channel, u32 panel) | |
+{ | |
+ struct platform_device *pdev = NULL; | |
+ int ret; | |
+ | |
+ if ((channel >= 3) || ch_used[channel]) | |
+ return -ENODEV; | |
+ | |
+ ch_used[channel] = TRUE; | |
+ | |
+ pdev = platform_device_alloc("mipi_impression_j", (panel << 8)|channel); | |
+ if (!pdev) | |
+ return -ENOMEM; | |
+ | |
+ impression_j_panel_data.panel_info = *pinfo; | |
+ | |
+ ret = platform_device_add_data(pdev, &impression_j_panel_data, | |
+ sizeof(impression_j_panel_data)); | |
+ if (ret) { | |
+ pr_err("%s: platform_device_add_data failed!\n", __func__); | |
+ goto err_device_put; | |
+ } | |
+ | |
+ ret = platform_device_add(pdev); | |
+ if (ret) { | |
+ pr_err("%s: platform_device_register failed!\n", __func__); | |
+ goto err_device_put; | |
+ } | |
+ return 0; | |
+ | |
+err_device_put: | |
+ platform_device_put(pdev); | |
+ return ret; | |
+} | |
+ | |
+static struct mipi_dsi_phy_ctrl phy_ctrl_720p_id311100 = { | |
+ | |
+ | |
+ {0x03, 0x0A, 0x04, 0x00, 0x20}, | |
+ | |
+ {0x96, 0x36, 0x17, 0x00, 0x4A, 0x54, 0x1B, | |
+ 0x39, 0x27, 0x03, 0x04, 0xA0}, | |
+ | |
+ {0x5f, 0x00, 0x00, 0x10}, | |
+ | |
+ {0xFF, 0x00, 0x06, 0x00}, | |
+ | |
+ {0x0, 0x11, 0xB1, 0xDA, 0x00, 0x50, 0x48, 0x63, | |
+ 0x40, 0x07, 0x00, | |
+ 0x00, 0x14, 0x03, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01 }, | |
+}; | |
+static struct mipi_dsi_phy_ctrl mipi_dsi_sharp_panel_idA1B100_phy_ctrl_720p = { | |
+ | |
+ | |
+ {0x03, 0x08, 0x05, 0x00, 0x20}, | |
+ | |
+ {0x9B, 0x38, 0x18, 0x00, 0x4B, 0x51, 0x1C, | |
+ 0x3B, 0x29, 0x03, 0x04, 0xA0}, | |
+ | |
+ {0x5F, 0x00, 0x00, 0x10}, | |
+ | |
+ {0xFF, 0x00, 0x06, 0x00}, | |
+ | |
+ {0x0, 0x38, 0x32, 0xDA, 0x00, 0x10, 0x0F, 0x61, | |
+ 0x41, 0x0F, 0x01, | |
+ 0x00, 0x1A, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x02 }, | |
+}; | |
+ | |
+static int __init mipi_cmd_sharp_init(void) | |
+{ | |
+ int ret; | |
+ | |
+ pinfo.xres = 720; | |
+ pinfo.yres = 1280; | |
+ pinfo.type = MIPI_CMD_PANEL; | |
+ pinfo.pdest = DISPLAY_1; | |
+ pinfo.wait_cycle = 0; | |
+ pinfo.bpp = 24; | |
+ pinfo.width = 58; | |
+ pinfo.height = 103; | |
+ pinfo.camera_backlight = 183; | |
+ | |
+ pinfo.lcdc.h_back_porch = 116; | |
+ pinfo.lcdc.h_front_porch = 184; | |
+ pinfo.lcdc.h_pulse_width = 24; | |
+ pinfo.lcdc.v_back_porch = 4; | |
+ pinfo.lcdc.v_front_porch = 24; | |
+ pinfo.lcdc.v_pulse_width = 2; | |
+ | |
+ pinfo.lcd.v_back_porch = 4; | |
+ pinfo.lcd.v_front_porch = 24; | |
+ pinfo.lcd.v_pulse_width = 2; | |
+ | |
+ pinfo.lcdc.border_clr = 0; | |
+ pinfo.lcdc.underflow_clr = 0xff; | |
+ pinfo.lcdc.hsync_skew = 0; | |
+ pinfo.bl_max = 255; | |
+ pinfo.bl_min = 1; | |
+ pinfo.fb_num = 2; | |
+ pinfo.clk_rate = 548000000; | |
+ | |
+ pinfo.is_3d_panel = FB_TYPE_3D_PANEL; | |
+ pinfo.lcd.vsync_enable = TRUE; | |
+ pinfo.lcd.hw_vsync_mode = TRUE; | |
+ pinfo.lcd.refx100 = 6000; | |
+ | |
+ pinfo.mipi.mode = DSI_CMD_MODE; | |
+ pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888; | |
+ pinfo.mipi.vc = 0; | |
+ | |
+ pinfo.mipi.data_lane0 = TRUE; | |
+ pinfo.mipi.data_lane1 = TRUE; | |
+ pinfo.mipi.data_lane2 = TRUE; | |
+ pinfo.mipi.tx_eot_append = TRUE; | |
+ pinfo.mipi.t_clk_post = 10; | |
+ pinfo.mipi.t_clk_pre = 164; | |
+ pinfo.mipi.stream = 0; | |
+ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE; | |
+ pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; | |
+ pinfo.mipi.te_sel = 1; | |
+ pinfo.mipi.interleave_max = 1; | |
+ pinfo.mipi.insert_dcs_cmd = TRUE; | |
+ pinfo.mipi.wr_mem_continue = 0x3c; | |
+ pinfo.mipi.wr_mem_start = 0x2c; | |
+ | |
+ pinfo.mipi.frame_rate = 58; | |
+ pinfo.mipi.dsi_phy_db = &phy_ctrl_720p_id311100; | |
+ | |
+ ret = mipi_impression_j_device_register(&pinfo, MIPI_DSI_PRIM, | |
+ MIPI_DSI_PANEL_FWVGA_PT); | |
+ if (ret) | |
+ pr_err("%s: failed to register device!\n", __func__); | |
+ | |
+ cmd_on_cmds = sharp_cmd_on_cmds; | |
+ cmd_on_cmds_count = ARRAY_SIZE(sharp_cmd_on_cmds); | |
+ | |
+ PR_DISP_INFO("%s\n", __func__); | |
+ return ret; | |
+} | |
+static int __init mipi_video_sharp_nt_720p_pt_init(void) | |
+{ | |
+ int ret; | |
+ | |
+ pinfo.type = MIPI_CMD_PANEL; | |
+ pinfo.mipi.mode = DSI_CMD_MODE; | |
+ pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888; | |
+ | |
+ pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW; | |
+ | |
+ pinfo.lcd.vsync_enable = TRUE; | |
+ pinfo.lcd.hw_vsync_mode = TRUE; | |
+ pinfo.lcd.refx100 = 6096; | |
+ pinfo.mipi.te_sel = 1; | |
+ pinfo.mipi.interleave_max = 1; | |
+ pinfo.mipi.insert_dcs_cmd = TRUE; | |
+ pinfo.mipi.wr_mem_continue = 0x3c; | |
+ pinfo.mipi.wr_mem_start = 0x2c; | |
+ | |
+ pinfo.xres = 720; | |
+ pinfo.yres = 1280; | |
+ | |
+ pinfo.pdest = DISPLAY_1; | |
+ pinfo.wait_cycle = 0; | |
+ pinfo.bpp = 24; | |
+ pinfo.width = 58; | |
+ pinfo.height = 103; | |
+ pinfo.camera_backlight = 183; | |
+ | |
+ pinfo.lcdc.h_back_porch = 125; | |
+ pinfo.lcdc.h_front_porch = 122; | |
+ pinfo.lcdc.h_pulse_width = 1; | |
+ pinfo.lcdc.v_back_porch = 2; | |
+ pinfo.lcdc.v_front_porch = 6; | |
+ pinfo.lcdc.v_pulse_width = 1; | |
+ | |
+ pinfo.lcd.v_back_porch = 2; | |
+ pinfo.lcd.v_front_porch = 6; | |
+ pinfo.lcd.v_pulse_width = 1; | |
+ | |
+ pinfo.lcdc.border_clr = 0; | |
+ pinfo.lcdc.underflow_clr = 0xff; | |
+ pinfo.lcdc.hsync_skew = 0; | |
+ pinfo.bl_max = 255; | |
+ pinfo.bl_min = 1; | |
+ pinfo.fb_num = 2; | |
+ | |
+ pinfo.clk_rate = 569000000; | |
+ | |
+ pinfo.mipi.vc = 0; | |
+ pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; | |
+ pinfo.mipi.data_lane0 = TRUE; | |
+ pinfo.mipi.data_lane1 = TRUE; | |
+ pinfo.mipi.data_lane2 = TRUE; | |
+ pinfo.mipi.tx_eot_append = TRUE; | |
+ pinfo.mipi.t_clk_post = 0x10; | |
+ pinfo.mipi.t_clk_pre = 0x21; | |
+ pinfo.mipi.stream = 0; | |
+ | |
+ pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW; | |
+ pinfo.mipi.frame_rate = 57; | |
+ pinfo.mipi.dsi_phy_db = &mipi_dsi_sharp_panel_idA1B100_phy_ctrl_720p; | |
+ | |
+ ret = mipi_impression_j_device_register(&pinfo, MIPI_DSI_PRIM, MIPI_DSI_PANEL_WVGA_PT); | |
+ | |
+ if (ret) | |
+ PR_DISP_ERR("%s: failed to register device!\n", __func__); | |
+ | |
+ cmd_on_cmds = sharp_nt_cmd_on_cmds; | |
+ cmd_on_cmds_count = ARRAY_SIZE(sharp_nt_cmd_on_cmds); | |
+ | |
+ mdp_gamma = mdp_gamma_novatek; | |
+ mdp_gamma_count = ARRAY_SIZE(mdp_gamma_novatek); | |
+ | |
+ PR_DISP_INFO("%s\n", __func__); | |
+ return ret; | |
+} | |
+ | |
+void __init impression_j_init_fb(void) | |
+{ | |
+ | |
+ platform_device_register(&msm_fb_device); | |
+ | |
+ if(panel_type != PANEL_ID_NONE) { | |
+ msm_fb_register_device("mdp", &mdp_pdata); | |
+ msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata); | |
+ wa_xo = msm_xo_get(MSM_XO_TCXO_D0, "mipi"); | |
+ } | |
+ msm_fb_register_device("dtv", &dtv_pdata); | |
+} | |
+ | |
+static int __init impression_j_panel_init(void) | |
+{ | |
+ | |
+ if(panel_type == PANEL_ID_NONE) { | |
+ PR_DISP_INFO("%s panel ID = PANEL_ID_NONE\n", __func__); | |
+ return 0; | |
+ } | |
+ | |
+ mipi_dsi_buf_alloc(&impression_j_panel_tx_buf, DSI_BUF_SIZE); | |
+ mipi_dsi_buf_alloc(&impression_j_panel_rx_buf, DSI_BUF_SIZE); | |
+ | |
+ if (panel_type == PANEL_ID_IMN_SHARP_HX) { | |
+ mipi_cmd_sharp_init(); | |
+ PR_DISP_INFO("%s panel ID = PANEL_ID_IMN_SHARP_HX\n", __func__); | |
+ } else if (panel_type == PANEL_ID_IMN_SHARP_NT) { | |
+ mipi_video_sharp_nt_720p_pt_init(); | |
+ PR_DISP_INFO("%s panel ID = PANEL_ID_IMN_SHARP_NT\n", __func__); | |
+ | |
+ } else { | |
+ PR_DISP_ERR("%s: panel not supported!!\n", __func__); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ PR_DISP_INFO("%s\n", __func__); | |
+ | |
+ return platform_driver_register(&this_driver); | |
+} | |
+late_initcall(impression_j_panel_init); | |
diff --git arch/arm/mach-msm/board-impression_j-gpiomux.c arch/arm/mach-msm/board-impression_j-gpiomux.c | |
new file mode 100644 | |
index 0000000..b323675 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-gpiomux.c | |
@@ -0,0 +1,921 @@ | |
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <linux/init.h> | |
+#include <linux/ioport.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/bootmem.h> | |
+#include <asm/mach-types.h> | |
+#include <asm/mach/mmc.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/board.h> | |
+#include <mach/gpio.h> | |
+#include <mach/gpiomux.h> | |
+#include <mach/socinfo.h> | |
+#include "devices.h" | |
+#include "board-impression_j.h" | |
+ | |
+ | |
+static struct gpiomux_setting mi2s_rx_sclk = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting mi2s_rx_ws = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting mi2s_rx_dout0 = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+ | |
+static struct gpiomux_setting mi2s_rx_dout3 = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct msm_gpiomux_config msm8960_mi2s_rx_configs[] __initdata = { | |
+ { | |
+ .gpio = 27, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &mi2s_rx_ws, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 28, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &mi2s_rx_sclk, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 29, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &mi2s_rx_dout3, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 32, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &mi2s_rx_dout0, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct gpiomux_setting pri_i2s[] = { | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_OUT_LOW, | |
+ }, | |
+}; | |
+ | |
+static struct msm_gpiomux_config msm8960_i2s_tx_configs[] __initdata = { | |
+ { | |
+ .gpio = 35, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_i2s[0], | |
+ [GPIOMUX_ACTIVE] = &pri_i2s[1], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 36, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_i2s[0], | |
+ [GPIOMUX_ACTIVE] = &pri_i2s[1], | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 37, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_i2s[0], | |
+ [GPIOMUX_ACTIVE] = &pri_i2s[1], | |
+ }, | |
+ }, | |
+}; | |
+ | |
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) | |
+ | |
+static struct gpiomux_setting gpio_spi_config = { | |
+ .func = GPIOMUX_FUNC_2, | |
+ .drv = GPIOMUX_DRV_12MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+#if 0 | |
+static struct gpiomux_setting gpio_spi_cs2_config = { | |
+ .func = GPIOMUX_FUNC_3, | |
+ .drv = GPIOMUX_DRV_12MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+#endif | |
+static struct gpiomux_setting gpio_spi_cs_config = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_12MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+struct msm_gpiomux_config impression_j_ethernet_configs[] = { | |
+}; | |
+#endif | |
+ | |
+ | |
+static struct gpiomux_setting pri_aux_pcm[] = { | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+ }, | |
+ | |
+ { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ }, | |
+}; | |
+ | |
+struct msm_gpiomux_config monarudo_aux_pcm_configs[] = { | |
+ { | |
+ .gpio = 43, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_aux_pcm[0], | |
+ [GPIOMUX_ACTIVE] = &pri_aux_pcm[1], | |
+ } | |
+ }, | |
+ { | |
+ .gpio = 44, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_aux_pcm[0], | |
+ [GPIOMUX_ACTIVE] = &pri_aux_pcm[1], | |
+ } | |
+ }, | |
+ { | |
+ .gpio = 45, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_aux_pcm[0], | |
+ [GPIOMUX_ACTIVE] = &pri_aux_pcm[1], | |
+ } | |
+ }, | |
+ { | |
+ .gpio = 46, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &pri_aux_pcm[0], | |
+ [GPIOMUX_ACTIVE] = &pri_aux_pcm[1], | |
+ } | |
+ }, | |
+}; | |
+ | |
+static struct gpiomux_setting gpio_i2c_config = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_KEEPER, | |
+}; | |
+ | |
+static struct gpiomux_setting gpio_i2c_config_sus = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_KEEPER, | |
+}; | |
+ | |
+static struct gpiomux_setting gpio_i2c_config_sus_2 = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_KEEPER, | |
+}; | |
+ | |
+static struct gpiomux_setting cdc_mclk = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting wdc_intr = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+#if 0 | |
+static struct gpiomux_setting wcnss_5wire_suspend_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct gpiomux_setting wcnss_5wire_active_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+#endif | |
+ | |
+static struct gpiomux_setting slimbus = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_KEEPER, | |
+}; | |
+ | |
+#if 0 | |
+static struct gpiomux_setting ext_regulator_config = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .dir = GPIOMUX_OUT_LOW, | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_SERIAL_IRDA | |
+static struct gpiomux_setting gsbi3_func1_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+#endif | |
+ | |
+static struct gpiomux_setting gsbi7_func1_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct gpiomux_setting gsbi7_func2_cfg = { | |
+ .func = GPIOMUX_FUNC_2, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting gsbi3_suspended_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting gsbi3_active_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting gsbi4_suspended_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_KEEPER, | |
+}; | |
+ | |
+static struct gpiomux_setting gsbi4_active_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+#ifdef CONFIG_USB_EHCI_MSM_HSIC | |
+static struct gpiomux_setting hsic_act_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting hsic_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_OUT_LOW, | |
+}; | |
+ | |
+static struct gpiomux_setting hsic_wakeup_act_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+}; | |
+ | |
+static struct gpiomux_setting hsic_wakeup_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+ .dir = GPIOMUX_IN, | |
+}; | |
+ | |
+ | |
+#if 0 | |
+static struct gpiomux_setting cyts_resout_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+static struct gpiomux_setting cyts_resout_act_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct gpiomux_setting cyts_sleep_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting cyts_sleep_act_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting cyts_int_act_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct gpiomux_setting cyts_int_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct msm_gpiomux_config cyts_gpio_configs[] __initdata = { | |
+ { | |
+ .gpio = 6, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cyts_int_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &cyts_int_sus_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 33, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cyts_sleep_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &cyts_sleep_sus_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 7, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &cyts_resout_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &cyts_resout_sus_cfg, | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+static struct msm_gpiomux_config impression_j_hsic_configs[] = { | |
+ { | |
+ .gpio = 88, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &hsic_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &hsic_sus_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 89, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &hsic_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &hsic_sus_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 47, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &hsic_wakeup_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &hsic_wakeup_sus_cfg, | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+#if 0 | |
+static struct gpiomux_setting mxt_reset_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting mxt_reset_act_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct gpiomux_setting mxt_int_sus_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting mxt_int_act_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL | |
+static struct gpiomux_setting mhl_i2c_suspend_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting mhl_i2c_active_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct msm_gpiomux_config mhl_i2c_configs[] __initdata = { | |
+ { | |
+ .gpio = I2C2_DATA_SENS, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &mhl_i2c_active_cfg, | |
+ [GPIOMUX_SUSPENDED] = &mhl_i2c_suspend_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = I2C2_CLK_SENS, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &mhl_i2c_active_cfg, | |
+ [GPIOMUX_SUSPENDED] = &mhl_i2c_suspend_cfg, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct gpiomux_setting mhl_suspend_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting mhl_active_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct msm_gpiomux_config mhl_configs[] __initdata = { | |
+ { | |
+ .gpio = MHL_INT, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &mhl_active_cfg, | |
+ [GPIOMUX_SUSPENDED] = &mhl_suspend_cfg, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct gpiomux_setting hdmi_suspend_pd_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting hdmi_suspend_np_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting hdmi_active_1_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_6MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+}; | |
+ | |
+static struct gpiomux_setting hdmi_active_2_cfg = { | |
+ .func = GPIOMUX_FUNC_1, | |
+ .drv = GPIOMUX_DRV_16MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct msm_gpiomux_config hdmi_configs[] __initdata = { | |
+ { | |
+ .gpio = HDMI_DDC_CLK, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg, | |
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_np_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = HDMI_DDC_DATA, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg, | |
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_np_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = HDMI_HPLG_DET, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg, | |
+ [GPIOMUX_SUSPENDED] = &hdmi_suspend_pd_cfg, | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+static struct msm_gpiomux_config impression_j_gsbi_configs[] __initdata = { | |
+ { | |
+ .gpio = 21, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config_sus_2, | |
+ [GPIOMUX_ACTIVE] = &gpio_i2c_config, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 20, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config_sus_2, | |
+ [GPIOMUX_ACTIVE] = &gpio_i2c_config, | |
+ }, | |
+ }, | |
+ | |
+ { | |
+ .gpio = 25, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config_sus, | |
+ [GPIOMUX_ACTIVE] = &gpio_i2c_config, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 24, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_i2c_config_sus, | |
+ [GPIOMUX_ACTIVE] = &gpio_i2c_config, | |
+ }, | |
+ }, | |
+ | |
+#ifdef CONFIG_SERIAL_IRDA | |
+ { | |
+ .gpio = 6, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi3_func1_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 7, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi3_func1_cfg, | |
+ }, | |
+ }, | |
+#endif | |
+ | |
+ { | |
+ .gpio = 8, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi3_suspended_cfg, | |
+ [GPIOMUX_ACTIVE] = &gsbi3_active_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 9, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi3_suspended_cfg, | |
+ [GPIOMUX_ACTIVE] = &gsbi3_active_cfg, | |
+ }, | |
+ }, | |
+ | |
+ { | |
+ .gpio = 10, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi4_suspended_cfg, | |
+ [GPIOMUX_ACTIVE] = &gsbi4_active_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 11, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi4_suspended_cfg, | |
+ [GPIOMUX_ACTIVE] = &gsbi4_active_cfg, | |
+ }, | |
+ }, | |
+#if 0 | |
+ { | |
+ .gpio = 18, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi1_uart_config, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 19, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi1_uart_config, | |
+ }, | |
+ }, | |
+#endif | |
+ | |
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) | |
+ { | |
+ .gpio = 51, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 52, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 53, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config, | |
+ }, | |
+ }, | |
+#if 0 | |
+ { | |
+ .gpio = 31, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_cs2_config, | |
+ }, | |
+ }, | |
+#endif | |
+ { | |
+ .gpio = 54, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config, | |
+ }, | |
+ }, | |
+#endif | |
+#if 0 | |
+ { | |
+ .gpio = 30, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_cs_config, | |
+ }, | |
+ }, | |
+#endif | |
+#if 0 | |
+ { | |
+ .gpio = 32, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_cs_config, | |
+ }, | |
+ }, | |
+#endif | |
+ { | |
+ .gpio = 53, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_spi_cs_config, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 82, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi7_func2_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 83, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gsbi7_func1_cfg, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct msm_gpiomux_config impression_j_slimbus_config[] __initdata = { | |
+ { | |
+ .gpio = 40, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &slimbus, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 41, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &slimbus, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct msm_gpiomux_config impression_j_audio_codec_configs[] __initdata = { | |
+ { | |
+ .gpio = 39, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &cdc_mclk, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 42, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &wdc_intr, | |
+ }, | |
+ }, | |
+ | |
+}; | |
+ | |
+#if 0 | |
+static struct msm_gpiomux_config impression_j_ext_regulator_configs[] __initdata = { | |
+ { | |
+ .gpio = impression_j_EXT_3P3V_REG_EN_GPIO, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &ext_regulator_config, | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#if 0 | |
+static struct gpiomux_setting ap2mdm_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting mdm2ap_status_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_NONE, | |
+}; | |
+ | |
+static struct gpiomux_setting mdm2ap_errfatal_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_16MA, | |
+ .pull = GPIOMUX_PULL_DOWN, | |
+}; | |
+ | |
+static struct gpiomux_setting ap2mdm_pon_reset_n_cfg = { | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .pull = GPIOMUX_PULL_UP, | |
+ .dir = GPIOMUX_OUT_HIGH, | |
+}; | |
+ | |
+static struct msm_gpiomux_config mdm_configs[] __initdata = { | |
+ | |
+ { | |
+ .gpio = 48, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &ap2mdm_cfg, | |
+ } | |
+ }, | |
+ | |
+ { | |
+ .gpio = 49, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &mdm2ap_status_cfg, | |
+ } | |
+ }, | |
+ | |
+ { | |
+ .gpio = 19, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &mdm2ap_errfatal_cfg, | |
+ } | |
+ }, | |
+ | |
+ { | |
+ .gpio = 18, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &ap2mdm_cfg, | |
+ } | |
+ }, | |
+ | |
+ { | |
+ .gpio = 59, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &ap2mdm_pon_reset_n_cfg, | |
+ } | |
+ }, | |
+}; | |
+#endif | |
+ | |
+static struct gpiomux_setting gpio_rotate_key_act_config = { | |
+ .pull = GPIOMUX_PULL_UP, | |
+ .drv = GPIOMUX_DRV_8MA, | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+}; | |
+ | |
+static struct gpiomux_setting gpio_rotate_key_sus_config = { | |
+ .pull = GPIOMUX_PULL_NONE, | |
+ .drv = GPIOMUX_DRV_2MA, | |
+ .func = GPIOMUX_FUNC_GPIO, | |
+}; | |
+ | |
+struct msm_gpiomux_config impression_j_rotate_key_config[] = { | |
+ { | |
+ .gpio = 46, | |
+ .settings = { | |
+ [GPIOMUX_SUSPENDED] = &gpio_rotate_key_sus_config, | |
+ [GPIOMUX_ACTIVE] = &gpio_rotate_key_act_config, | |
+ } | |
+ }, | |
+}; | |
+#if 0 | |
+static struct msm_gpiomux_config impression_j_mxt_configs[] __initdata = { | |
+ { | |
+ .gpio = 6, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &mxt_int_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &mxt_int_sus_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 33, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &mxt_reset_act_cfg, | |
+ [GPIOMUX_SUSPENDED] = &mxt_reset_sus_cfg, | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+#if 0 | |
+static struct msm_gpiomux_config wcnss_5wire_interface[] = { | |
+ { | |
+ .gpio = 64, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, | |
+ [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 65, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, | |
+ [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, | |
+ }, | |
+ }, | |
+ { | |
+ .gpio = 68, | |
+ .settings = { | |
+ [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, | |
+ [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, | |
+ }, | |
+ }, | |
+}; | |
+#endif | |
+void __init impression_j_init_gpiomux(void) | |
+{ | |
+ int rc; | |
+ | |
+ rc = msm_gpiomux_init(NR_GPIO_IRQS); | |
+ if (rc) { | |
+ pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc); | |
+ return; | |
+ } | |
+ | |
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) | |
+ msm_gpiomux_install(impression_j_ethernet_configs, | |
+ ARRAY_SIZE(impression_j_ethernet_configs)); | |
+#endif | |
+#if 0 | |
+ msm_gpiomux_install(wcnss_5wire_interface, | |
+ ARRAY_SIZE(wcnss_5wire_interface)); | |
+#endif | |
+ msm_gpiomux_install(impression_j_gsbi_configs, | |
+ ARRAY_SIZE(impression_j_gsbi_configs)); | |
+ | |
+ msm_gpiomux_install(impression_j_slimbus_config, | |
+ ARRAY_SIZE(impression_j_slimbus_config)); | |
+ | |
+ msm_gpiomux_install(impression_j_audio_codec_configs, | |
+ ARRAY_SIZE(impression_j_audio_codec_configs)); | |
+ | |
+ msm_gpiomux_install(msm8960_mi2s_rx_configs, | |
+ ARRAY_SIZE(msm8960_mi2s_rx_configs)); | |
+ | |
+ msm_gpiomux_install(msm8960_i2s_tx_configs, | |
+ ARRAY_SIZE(msm8960_i2s_tx_configs)); | |
+ msm_gpiomux_install(monarudo_aux_pcm_configs, | |
+ ARRAY_SIZE(monarudo_aux_pcm_configs)); | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL | |
+ msm_gpiomux_install(mhl_i2c_configs, | |
+ ARRAY_SIZE(mhl_i2c_configs)); | |
+ msm_gpiomux_install(hdmi_configs, | |
+ ARRAY_SIZE(hdmi_configs)); | |
+ msm_gpiomux_install(mhl_configs, | |
+ ARRAY_SIZE(mhl_configs)); | |
+#endif | |
+ | |
+ | |
+#if 0 | |
+ msm_gpiomux_install(mdm_configs, | |
+ ARRAY_SIZE(mdm_configs)); | |
+#endif | |
+ | |
+#ifdef CONFIG_USB_EHCI_MSM_HSIC | |
+ msm_gpiomux_install(impression_j_hsic_configs, | |
+ ARRAY_SIZE(impression_j_hsic_configs)); | |
+#endif | |
+ | |
+} | |
diff --git arch/arm/mach-msm/board-impression_j-gpu.c arch/arm/mach-msm/board-impression_j-gpu.c | |
new file mode 100644 | |
index 0000000..fb5e08d | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-gpu.c | |
@@ -0,0 +1,298 @@ | |
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <linux/init.h> | |
+#include <linux/platform_device.h> | |
+#include <mach/kgsl.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/board.h> | |
+#include <mach/msm_dcvs.h> | |
+#include <mach/socinfo.h> | |
+ | |
+#include "devices.h" | |
+#include "board-impression_j.h" | |
+ | |
+#ifdef CONFIG_MSM_DCVS | |
+static struct msm_dcvs_freq_entry grp3d_freq[] = { | |
+ {0, 900, 0, 0, 0}, | |
+ {0, 950, 0, 0, 0}, | |
+ {0, 950, 0, 0, 0}, | |
+ {0, 1200, 1, 100, 100}, | |
+}; | |
+ | |
+static struct msm_dcvs_core_info grp3d_core_info = { | |
+ .freq_tbl = &grp3d_freq[0], | |
+ .num_cores = 1, | |
+ .sensors = (int[]){0}, | |
+ .thermal_poll_ms = 60000, | |
+ .core_param = { | |
+ .core_type = MSM_DCVS_CORE_TYPE_GPU, | |
+ }, | |
+ .algo_param = { | |
+ .disable_pc_threshold = 0, | |
+ .em_win_size_min_us = 100000, | |
+ .em_win_size_max_us = 300000, | |
+ .em_max_util_pct = 97, | |
+ .group_id = 0, | |
+ .max_freq_chg_time_us = 100000, | |
+ .slack_mode_dynamic = 0, | |
+ .slack_time_min_us = 39000, | |
+ .slack_time_max_us = 39000, | |
+ .ss_win_size_min_us = 1000000, | |
+ .ss_win_size_max_us = 1000000, | |
+ .ss_util_pct = 95, | |
+ .ss_no_corr_below_freq = 0, | |
+ }, | |
+ | |
+ .energy_coeffs = { | |
+ .leakage_coeff_a = -17720, | |
+ .leakage_coeff_b = 37, | |
+ .leakage_coeff_c = 3329, | |
+ .leakage_coeff_d = -277, | |
+ | |
+ .active_coeff_a = 2492, | |
+ .active_coeff_b = 0, | |
+ .active_coeff_c = 0 | |
+ }, | |
+ | |
+ .power_param = { | |
+ .current_temp = 25, | |
+ .num_freq = ARRAY_SIZE(grp3d_freq), | |
+ } | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_MSM_BUS_SCALING | |
+static struct msm_bus_vectors grp3d_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors grp3d_low_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(1000), | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(1000), | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors grp3d_nominal_low_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(2000), | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(2000), | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors grp3d_nominal_high_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(2656), | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(2656), | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors grp3d_max_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(4264), | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = KGSL_CONVERT_TO_MBPS(4264), | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths grp3d_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(grp3d_init_vectors), | |
+ grp3d_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(grp3d_low_vectors), | |
+ grp3d_low_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(grp3d_nominal_low_vectors), | |
+ grp3d_nominal_low_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(grp3d_nominal_high_vectors), | |
+ grp3d_nominal_high_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(grp3d_max_vectors), | |
+ grp3d_max_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata grp3d_bus_scale_pdata = { | |
+ grp3d_bus_scale_usecases, | |
+ ARRAY_SIZE(grp3d_bus_scale_usecases), | |
+ .name = "grp3d", | |
+}; | |
+#endif | |
+ | |
+static struct resource kgsl_3d0_resources[] = { | |
+ { | |
+ .name = KGSL_3D0_REG_MEMORY, | |
+ .start = 0x04300000, /* GFX3D address */ | |
+ .end = 0x0430ffff, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ { | |
+ .name = KGSL_3D0_SHADER_MEMORY, | |
+ .start = 0x04310000, /* Shader Mem address */ | |
+ .end = 0x0431ffff, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ { | |
+ .name = KGSL_3D0_IRQ, | |
+ .start = GFX3D_IRQ, | |
+ .end = GFX3D_IRQ, | |
+ .flags = IORESOURCE_IRQ, | |
+ }, | |
+}; | |
+ | |
+static const struct kgsl_iommu_ctx kgsl_3d0_iommu0_ctxs[] = { | |
+ { "gfx3d_user", 0 }, | |
+ { "gfx3d_priv", 1 }, | |
+}; | |
+ | |
+ | |
+static const struct kgsl_iommu_ctx kgsl_3d0_iommu1_ctxs[] = { | |
+ { "gfx3d1_user", 0 }, | |
+ { "gfx3d1_priv", 1 }, | |
+}; | |
+ | |
+static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = { | |
+ { | |
+ .iommu_ctxs = kgsl_3d0_iommu0_ctxs, | |
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu0_ctxs), | |
+ .physstart = 0x07C00000, | |
+ .physend = 0x07C00000 + SZ_1M - 1, | |
+ }, | |
+ { | |
+ .iommu_ctxs = kgsl_3d0_iommu1_ctxs, | |
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu1_ctxs), | |
+ .physstart = 0x07D00000, | |
+ .physend = 0x07D00000 + SZ_1M - 1, | |
+ }, | |
+}; | |
+ | |
+static struct kgsl_device_platform_data kgsl_3d0_pdata = { | |
+ .pwrlevel = { | |
+ { | |
+ .gpu_freq = 400000000, | |
+ .bus_freq = 4, | |
+ .io_fraction = 0, | |
+ }, | |
+ { | |
+ .gpu_freq = 325000000, | |
+ .bus_freq = 3, | |
+ .io_fraction = 33, | |
+ }, | |
+ { | |
+ .gpu_freq = 200000000, | |
+ .bus_freq = 2, | |
+ .io_fraction = 100, | |
+ }, | |
+ { | |
+ .gpu_freq = 128000000, | |
+ .bus_freq = 1, | |
+ .io_fraction = 100, | |
+ }, | |
+ { | |
+ .gpu_freq = 27000000, | |
+ .bus_freq = 0, | |
+ }, | |
+ }, | |
+ .init_level = 1, | |
+ .num_levels = 5, | |
+ .set_grp_async = NULL, | |
+ .idle_timeout = HZ/10, | |
+ .strtstp_sleepwake = true, | |
+ .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE, | |
+#ifdef CONFIG_MSM_BUS_SCALING | |
+ .bus_scale_table = &grp3d_bus_scale_pdata, | |
+#endif | |
+ .iommu_data = kgsl_3d0_iommu_data, | |
+ .iommu_count = ARRAY_SIZE(kgsl_3d0_iommu_data), | |
+#ifdef CONFIG_MSM_DCVS | |
+ .core_info = &grp3d_core_info, | |
+#endif | |
+}; | |
+ | |
+static struct platform_device device_kgsl_3d0 = { | |
+ .name = "kgsl-3d0", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(kgsl_3d0_resources), | |
+ .resource = kgsl_3d0_resources, | |
+ .dev = { | |
+ .platform_data = &kgsl_3d0_pdata, | |
+ }, | |
+}; | |
+ | |
+void __init impression_j_init_gpu(void) | |
+{ | |
+ unsigned int version = socinfo_get_version(); | |
+ | |
+ if (cpu_is_apq8064ab()) | |
+ kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 450000000; | |
+ if (SOCINFO_VERSION_MAJOR(version) == 2) { | |
+ kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 2); | |
+ } else { | |
+ if ((SOCINFO_VERSION_MAJOR(version) == 1) && | |
+ (SOCINFO_VERSION_MINOR(version) == 1)) | |
+ kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 1); | |
+ else | |
+ kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 0); | |
+ } | |
+ | |
+ platform_device_register(&device_kgsl_3d0); | |
+} | |
diff --git arch/arm/mach-msm/board-impression_j-keypad.c arch/arm/mach-msm/board-impression_j-keypad.c | |
new file mode 100644 | |
index 0000000..8a9b945 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-keypad.c | |
@@ -0,0 +1,121 @@ | |
+/* arch/arm/mach-msm/board-impression_j-keypad.c | |
+ * Copyright (C) 2010 HTC Corporation. | |
+ * | |
+ * This software is licensed under the terms of the GNU General Public | |
+ * License version 2, as published by the Free Software Foundation, and | |
+ * may be copied, distributed, and modified under those terms. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+*/ | |
+ | |
+#include <linux/platform_device.h> | |
+#include <linux/input.h> | |
+#include <linux/interrupt.h> | |
+#include <linux/gpio_event.h> | |
+#include <linux/gpio.h> | |
+#include <linux/keyreset.h> | |
+#include <asm/mach-types.h> | |
+#include <mach/board_htc.h> | |
+#include <mach/gpio.h> | |
+#include <linux/mfd/pm8xxx/pm8921.h> | |
+#include "board-impression_j.h" | |
+ | |
+#undef MODULE_PARAM_PREFIX | |
+#define MODULE_PARAM_PREFIX "board_impression_j." | |
+ | |
+ | |
+static struct gpio_event_direct_entry impression_j_keypad_map[] = { | |
+ { | |
+ .gpio = PWR_KEY_MSMz, | |
+ .code = KEY_POWER, | |
+ }, | |
+ { | |
+ .gpio = VOL_DOWNz, | |
+ .code = KEY_VOLUMEDOWN, | |
+ }, | |
+ { | |
+ .gpio = VOL_UPz, | |
+ .code = KEY_VOLUMEUP, | |
+ }, | |
+ { | |
+ .gpio = PM8921_GPIO_PM_TO_SYS(MODEz), | |
+ .code = KEY_F1, | |
+ }, | |
+}; | |
+ | |
+static uint32_t matirx_inputs_gpio_table[] = { | |
+ GPIO_CFG(PWR_KEY_MSMz, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, | |
+ GPIO_CFG_2MA), | |
+ GPIO_CFG(VOL_DOWNz, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, | |
+ GPIO_CFG_2MA), | |
+ GPIO_CFG(VOL_UPz, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, | |
+ GPIO_CFG_2MA), | |
+}; | |
+ | |
+static void impression_j_direct_inputs_gpio(void) | |
+{ | |
+ gpio_tlmm_config(matirx_inputs_gpio_table[0], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(matirx_inputs_gpio_table[1], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(matirx_inputs_gpio_table[2], GPIO_CFG_ENABLE); | |
+ | |
+ return; | |
+} | |
+ | |
+static struct gpio_event_input_info impression_j_keypad_power_info = { | |
+ .info.func = gpio_event_input_func, | |
+ .flags = GPIOEDF_PRINT_KEYS, | |
+ .type = EV_KEY, | |
+#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) | |
+ .debounce_time.tv.nsec = 20 * NSEC_PER_MSEC, | |
+# else | |
+ .debounce_time.tv64 = 20 * NSEC_PER_MSEC, | |
+# endif | |
+ .keymap = impression_j_keypad_map, | |
+ .keymap_size = ARRAY_SIZE(impression_j_keypad_map), | |
+ .setup_input_gpio = impression_j_direct_inputs_gpio, | |
+}; | |
+ | |
+static struct gpio_event_info *impression_j_keypad_info[] = { | |
+ &impression_j_keypad_power_info.info, | |
+}; | |
+ | |
+static struct gpio_event_platform_data impression_j_keypad_data = { | |
+ .name = "keypad_8960", | |
+ .info = impression_j_keypad_info, | |
+ .info_count = ARRAY_SIZE(impression_j_keypad_info), | |
+}; | |
+ | |
+static struct platform_device impression_j_keypad_device = { | |
+ .name = GPIO_EVENT_DEV_NAME, | |
+ .id = 0, | |
+ .dev = { | |
+ .platform_data = &impression_j_keypad_data, | |
+ }, | |
+}; | |
+ | |
+static struct keyreset_platform_data impression_j_reset_keys_pdata = { | |
+ | |
+ .keys_down = { | |
+ KEY_POWER, | |
+ KEY_VOLUMEDOWN, | |
+ KEY_VOLUMEUP, | |
+ 0 | |
+ }, | |
+}; | |
+ | |
+static struct platform_device impression_j_reset_keys_device = { | |
+ .name = KEYRESET_NAME, | |
+ .dev.platform_data = &impression_j_reset_keys_pdata, | |
+}; | |
+ | |
+int __init impression_j_init_keypad(void) | |
+{ | |
+ if (platform_device_register(&impression_j_reset_keys_device)) | |
+ printk(KERN_WARNING "%s: register reset key fail\n", __func__); | |
+ | |
+ return platform_device_register(&impression_j_keypad_device); | |
+} | |
+ | |
diff --git arch/arm/mach-msm/board-impression_j-pmic.c arch/arm/mach-msm/board-impression_j-pmic.c | |
new file mode 100644 | |
index 0000000..5d8953a | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-pmic.c | |
@@ -0,0 +1,569 @@ | |
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <linux/init.h> | |
+#include <linux/ioport.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/bootmem.h> | |
+#include <linux/mfd/pm8xxx/pm8921.h> | |
+#include <linux/leds.h> | |
+#include <linux/leds-pm8xxx.h> | |
+#include <linux/mfd/pm8xxx/pm8xxx-adc.h> | |
+#include <asm/mach-types.h> | |
+#include <asm/mach/mmc.h> | |
+#include <asm/setup.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/board.h> | |
+#include <mach/gpio.h> | |
+#include <mach/gpiomux.h> | |
+#include <mach/restart.h> | |
+#include "devices.h" | |
+#include "board-impression_j.h" | |
+ | |
+void impression_j_pm8xxx_adc_device_register(void); | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+#include "linux/i2c/smb349.h" | |
+#endif | |
+ | |
+struct pm8xxx_gpio_init { | |
+ unsigned gpio; | |
+ struct pm_gpio config; | |
+}; | |
+ | |
+struct pm8xxx_mpp_init { | |
+ unsigned mpp; | |
+ struct pm8xxx_mpp_config_data config; | |
+}; | |
+ | |
+#define PM8921_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \ | |
+ _func, _inv, _disable) \ | |
+{ \ | |
+ .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \ | |
+ .config = { \ | |
+ .direction = _dir, \ | |
+ .output_buffer = _buf, \ | |
+ .output_value = _val, \ | |
+ .pull = _pull, \ | |
+ .vin_sel = _vin, \ | |
+ .out_strength = _out_strength, \ | |
+ .function = _func, \ | |
+ .inv_int_pol = _inv, \ | |
+ .disable_pin = _disable, \ | |
+ } \ | |
+} | |
+ | |
+#define PM8921_MPP_INIT(_mpp, _type, _level, _control) \ | |
+{ \ | |
+ .mpp = PM8921_MPP_PM_TO_SYS(_mpp), \ | |
+ .config = { \ | |
+ .type = PM8XXX_MPP_TYPE_##_type, \ | |
+ .level = _level, \ | |
+ .control = PM8XXX_MPP_##_control, \ | |
+ } \ | |
+} | |
+ | |
+#define PM8821_MPP_INIT(_mpp, _type, _level, _control) \ | |
+{ \ | |
+ .mpp = PM8821_MPP_PM_TO_SYS(_mpp), \ | |
+ .config = { \ | |
+ .type = PM8XXX_MPP_TYPE_##_type, \ | |
+ .level = _level, \ | |
+ .control = PM8XXX_MPP_##_control, \ | |
+ } \ | |
+} | |
+ | |
+#define PM8921_GPIO_DISABLE(_gpio) \ | |
+ PM8921_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, 0, 0, 0, PM_GPIO_VIN_S4, \ | |
+ 0, 0, 0, 1) | |
+ | |
+#define PM8921_GPIO_OUTPUT(_gpio, _val, _strength) \ | |
+ PM8921_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \ | |
+ PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_##_strength, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0) | |
+ | |
+#define PM8921_GPIO_OUTPUT_BUFCONF(_gpio, _val, _strength, _bufconf) \ | |
+ PM8921_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT,\ | |
+ PM_GPIO_OUT_BUF_##_bufconf, _val, \ | |
+ PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_##_strength, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0) | |
+ | |
+#define PM8921_GPIO_INPUT(_gpio, _pull) \ | |
+ PM8921_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, PM_GPIO_OUT_BUF_CMOS, 0, \ | |
+ _pull, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_NO, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0) | |
+ | |
+#define PM8921_GPIO_OUTPUT_FUNC(_gpio, _val, _func) \ | |
+ PM8921_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \ | |
+ PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_HIGH, \ | |
+ _func, 0, 0) | |
+ | |
+#define PM8921_GPIO_OUTPUT_VIN(_gpio, _val, _vin) \ | |
+ PM8921_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \ | |
+ PM_GPIO_PULL_NO, _vin, \ | |
+ PM_GPIO_STRENGTH_HIGH, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0) | |
+ | |
+static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = { | |
+ | |
+ PM8921_GPIO_OUTPUT(34, 1, MED), | |
+}; | |
+ | |
+static struct pm8xxx_gpio_init pm8921_cdp_kp_gpios[] __initdata = { | |
+ | |
+}; | |
+ | |
+ | |
+static struct pm8xxx_mpp_init pm8xxx_mpps[] __initdata = { | |
+ PM8921_MPP_INIT(3, D_OUTPUT, PM8921_MPP_DIG_LEVEL_VPH, DOUT_CTRL_LOW), | |
+ | |
+ PM8921_MPP_INIT(7, D_OUTPUT, PM8921_MPP_DIG_LEVEL_VPH, DOUT_CTRL_LOW), | |
+ PM8921_MPP_INIT(PM8XXX_AMUX_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5, AOUT_CTRL_DISABLE), | |
+#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL | |
+ PM8921_MPP_INIT(PM8XXX_AMUX_MPP_1, D_BI_DIR, PM8921_MPP_DIG_LEVEL_S4, BI_PULLUP_10KOHM), | |
+ PM8921_MPP_INIT(PM8XXX_AMUX_MPP_2, D_BI_DIR, PM8921_MPP_DIG_LEVEL_L17, BI_PULLUP_10KOHM), | |
+ PM8921_MPP_INIT(PM8XXX_AMUX_MPP_3, D_BI_DIR, PM8921_MPP_DIG_LEVEL_S4, BI_PULLUP_10KOHM), | |
+ PM8921_MPP_INIT(PM8XXX_AMUX_MPP_4, D_BI_DIR, PM8921_MPP_DIG_LEVEL_L17, BI_PULLUP_10KOHM), | |
+#endif | |
+}; | |
+ | |
+void __init impression_j_pm8xxx_gpio_mpp_init(void) | |
+{ | |
+ int i, rc; | |
+ | |
+ for (i = 0; i < ARRAY_SIZE(pm8921_gpios); i++) { | |
+ rc = pm8xxx_gpio_config(pm8921_gpios[i].gpio, | |
+ &pm8921_gpios[i].config); | |
+ if (rc) { | |
+ pr_err("%s: pm8xxx_gpio_config: rc=%d\n", __func__, rc); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ for (i = 0; i < ARRAY_SIZE(pm8921_cdp_kp_gpios); i++) { | |
+ rc = pm8xxx_gpio_config(pm8921_cdp_kp_gpios[i].gpio, | |
+ &pm8921_cdp_kp_gpios[i].config); | |
+ if (rc) { | |
+ pr_err("%s: pm8xxx_gpio_config: rc=%d\n", | |
+ __func__, rc); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ for (i = 0; i < ARRAY_SIZE(pm8xxx_mpps); i++) { | |
+ rc = pm8xxx_mpp_config(pm8xxx_mpps[i].mpp, | |
+ &pm8xxx_mpps[i].config); | |
+ if (rc) { | |
+ pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ | |
+} | |
+ | |
+static struct pm8xxx_pwrkey_platform_data impression_j_pm8921_pwrkey_pdata = { | |
+ .pull_up = 1, | |
+ .kpd_trigger_delay_us = 15625, | |
+ .wakeup = 1, | |
+}; | |
+ | |
+static struct pm8xxx_misc_platform_data impression_j_pm8921_misc_pdata = { | |
+ .priority = 0, | |
+}; | |
+ | |
+#define PM8921_LC_LED_MAX_CURRENT 4 | |
+#define PM8921_LC_LED_LOW_CURRENT 1 | |
+#define PM8XXX_LED_PWM_PERIOD 1000 | |
+#define PM8XXX_LED_PWM_DUTY_MS 20 | |
+#define PM8XXX_PWM_CHANNEL_NONE -1 | |
+ | |
+static struct pm8xxx_led_configure pm8921_led_info[] = { | |
+ [0] = { | |
+ .name = "button-backlight", | |
+ .flags = PM8XXX_ID_LED_0, | |
+ .function_flags = LED_PWM_FUNCTION | LED_BRETH_FUNCTION, | |
+ .period_us = USEC_PER_SEC / 1000, | |
+ .start_index = 0, | |
+ .duites_size = 8, | |
+ .duty_time_ms = 64, | |
+ .lut_flag = PM_PWM_LUT_RAMP_UP | PM_PWM_LUT_PAUSE_HI_EN, | |
+ .out_current = 3, | |
+ .duties = {0, 15, 30, 45, 60, 75, 90, 100, | |
+ 100, 90, 75, 60, 45, 30, 15, 0, | |
+ 0, 0, 0, 0, 0, 0, 0, 0, | |
+ 0, 0, 0, 0, 0, 0, 0, 0, | |
+ 0, 0, 0, 0, 0, 0, 0, 0, | |
+ 0, 0, 0, 0, 0, 0, 0, 0, | |
+ 0, 0, 0, 0, 0, 0, 0, 0, | |
+ 0, 0, 0, 0, 0, 0, 0, 0}, | |
+ }, | |
+}; | |
+ | |
+static struct pm8xxx_led_platform_data impression_j_pm8921_leds_pdata = { | |
+ .num_leds = ARRAY_SIZE(pm8921_led_info), | |
+ .leds = pm8921_led_info, | |
+}; | |
+ | |
+static struct pm8xxx_vibrator_platform_data pm8xxx_vib_pdata = { | |
+ .initial_vibrate_ms = 0, | |
+ .max_timeout_ms = 15000, | |
+ .level_mV = 3100, | |
+}; | |
+ | |
+static struct pm8xxx_adc_amux impression_j_pm8921_adc_channels_data[] = { | |
+ {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"dcin", CHANNEL_DCIN, CHAN_PATH_SCALING4, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"ichg", CHANNEL_ICHG, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"ibat", CHANNEL_IBAT, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM}, | |
+ {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"usbin", CHANNEL_USBIN, CHAN_PATH_SCALING3, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM}, | |
+ {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"chg_temp", CHANNEL_CHG_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"xo_therm", CHANNEL_MUXOFF, CHAN_PATH_SCALING1, AMUX_RSV0, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_XOTHERM}, | |
+ {"mpp_amux6", ADC_MPP_1_AMUX6, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+ {"amux_in", ADC_MPP_1_AMUX4, CHAN_PATH_SCALING1, AMUX_RSV1, | |
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT}, | |
+}; | |
+ | |
+static struct pm8xxx_adc_properties impression_j_pm8921_adc_data = { | |
+ .adc_vdd_reference = 1800, | |
+ .bitresolution = 15, | |
+ .bipolar = 0, | |
+}; | |
+static const struct pm8xxx_adc_map_pt impression_j_adcmap_btm_table[] = { | |
+ {-200, 1671}, | |
+ {-190, 1663}, | |
+ {-180, 1654}, | |
+ {-170, 1646}, | |
+ {-160, 1636}, | |
+ {-150, 1627}, | |
+ {-140, 1617}, | |
+ {-130, 1606}, | |
+ {-120, 1595}, | |
+ {-110, 1584}, | |
+ {-100, 1572}, | |
+ {-90, 1560}, | |
+ {-80, 1548}, | |
+ {-70, 1534}, | |
+ {-60, 1521}, | |
+ {-50, 1507}, | |
+ {-40, 1492}, | |
+ {-30, 1477}, | |
+ {-20, 1462}, | |
+ {-10, 1446}, | |
+ {-0, 1430}, | |
+ {10, 1413}, | |
+ {20, 1396}, | |
+ {30, 1379}, | |
+ {40, 1361}, | |
+ {50, 1343}, | |
+ {60, 1325}, | |
+ {70, 1306}, | |
+ {80, 1287}, | |
+ {90, 1267}, | |
+ {100, 1248}, | |
+ {110, 1228}, | |
+ {120, 1208}, | |
+ {130, 1188}, | |
+ {140, 1168}, | |
+ {150, 1147}, | |
+ {160, 1127}, | |
+ {170, 1106}, | |
+ {180, 1086}, | |
+ {190, 1065}, | |
+ {200, 1044}, | |
+ {210, 1024}, | |
+ {220, 1004}, | |
+ {230, 983}, | |
+ {240, 963}, | |
+ {250, 943}, | |
+ {260, 923}, | |
+ {270, 903}, | |
+ {280, 884}, | |
+ {290, 864}, | |
+ {300, 845}, | |
+ {310, 827}, | |
+ {320, 808}, | |
+ {330, 790}, | |
+ {340, 772}, | |
+ {350, 755}, | |
+ {360, 738}, | |
+ {370, 721}, | |
+ {380, 704}, | |
+ {390, 688}, | |
+ {400, 672}, | |
+ {410, 657}, | |
+ {420, 642}, | |
+ {430, 627}, | |
+ {440, 613}, | |
+ {450, 599}, | |
+ {460, 585}, | |
+ {470, 572}, | |
+ {480, 559}, | |
+ {490, 547}, | |
+ {500, 535}, | |
+ {510, 523}, | |
+ {520, 511}, | |
+ {530, 500}, | |
+ {540, 489}, | |
+ {550, 479}, | |
+ {560, 469}, | |
+ {570, 459}, | |
+ {580, 449}, | |
+ {590, 440}, | |
+ {600, 431}, | |
+ {610, 423}, | |
+ {620, 414}, | |
+ {630, 406}, | |
+ {640, 398}, | |
+ {650, 390}, | |
+ {660, 383}, | |
+ {670, 376}, | |
+ {680, 369}, | |
+ {690, 363}, | |
+ {700, 356}, | |
+ {710, 350}, | |
+ {720, 344}, | |
+ {730, 338}, | |
+ {740, 333}, | |
+ {750, 327}, | |
+ {760, 322}, | |
+ {770, 317}, | |
+ {780, 312}, | |
+ {790, 308} | |
+}; | |
+ | |
+static struct pm8xxx_adc_map_table pm8xxx_adcmap_btm_table = { | |
+ .table = impression_j_adcmap_btm_table, | |
+ .size = ARRAY_SIZE(impression_j_adcmap_btm_table), | |
+}; | |
+ | |
+static struct pm8xxx_adc_platform_data impression_j_pm8921_adc_pdata = { | |
+ .adc_channel = impression_j_pm8921_adc_channels_data, | |
+ .adc_num_board_channel = ARRAY_SIZE(impression_j_pm8921_adc_channels_data), | |
+ .adc_prop = &impression_j_pm8921_adc_data, | |
+ .adc_mpp_base = PM8921_MPP_PM_TO_SYS(1), | |
+ .adc_map_btm_table = &pm8xxx_adcmap_btm_table, | |
+ .pm8xxx_adc_device_register = impression_j_pm8xxx_adc_device_register, | |
+}; | |
+ | |
+static struct pm8xxx_mpp_platform_data | |
+impression_j_pm8921_mpp_pdata __devinitdata = { | |
+ .mpp_base = PM8921_MPP_PM_TO_SYS(1), | |
+}; | |
+ | |
+static struct pm8xxx_gpio_platform_data | |
+impression_j_pm8921_gpio_pdata __devinitdata = { | |
+ .gpio_base = PM8921_GPIO_PM_TO_SYS(1), | |
+}; | |
+ | |
+static struct pm8xxx_irq_platform_data | |
+impression_j_pm8921_irq_pdata __devinitdata = { | |
+ .irq_base = PM8921_IRQ_BASE, | |
+ .devirq = MSM_GPIO_TO_INT(PM8921_APC_USR_IRQ_N), | |
+ .irq_trigger_flag = IRQF_TRIGGER_LOW, | |
+ .dev_id = 0, | |
+}; | |
+ | |
+static struct pm8xxx_rtc_platform_data | |
+impression_j_pm8921_rtc_pdata = { | |
+ .rtc_write_enable = true, | |
+ .rtc_alarm_powerup = false, | |
+}; | |
+ | |
+static int impression_j_pm8921_therm_mitigation[] = { | |
+ 1100, | |
+ 700, | |
+ 600, | |
+ 225, | |
+}; | |
+ | |
+ | |
+static struct htc_charger | |
+smb_icharger = { | |
+ .name = "smb349", | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ .get_charging_source = smb349_get_charging_src, | |
+ .is_charging_enabled = smb349_is_charging_enabled, | |
+ .get_charging_enabled = smb349_get_charging_enabled, | |
+ .set_charger_enable = smb349_enable_charging, | |
+ .event_notify = smb349_event_notify, | |
+ .set_pwrsrc_enable = smb349_enable_pwrsrc, | |
+ .set_pwrsrc_and_charger_enable = smb349_set_pwrsrc_and_charger_enable, | |
+ .set_limit_charge_enable = smb349_limit_charge_enable, | |
+ .is_ovp = smb349_is_charger_overvoltage, | |
+ .is_batt_temp_fault_disable_chg = smb349_is_batt_temp_fault_disable_chg, | |
+ .charger_change_notifier_register = cable_detect_register_notifier, | |
+ .dump_all = smb349_dump_all, | |
+ .get_attr_text = smb349_charger_get_attr_text, | |
+#endif | |
+}; | |
+ | |
+static struct ext_usb_chg_pm8921 | |
+smb_ext_chg = { | |
+ .name = "smb349", | |
+ .ctx = NULL, | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ .start_charging = smb349_start_charging, | |
+ .stop_charging = smb349_stop_charging, | |
+ .is_trickle = smb349_is_trickle_charging, | |
+#endif | |
+ .ichg = &smb_icharger, | |
+}; | |
+ | |
+#define MAX_VOLTAGE_MV 4200 | |
+static struct pm8921_charger_platform_data | |
+pm8921_chg_pdata __devinitdata = { | |
+ .safety_time = 510, | |
+ .update_time = 60000, | |
+ .max_voltage = MAX_VOLTAGE_MV, | |
+ .min_voltage = 3200, | |
+ .resume_voltage_delta = 50, | |
+ .term_current = 50, | |
+ .cool_temp = 0, | |
+ .warm_temp = 48, | |
+ .temp_check_period = 1, | |
+ .max_bat_chg_current = 1025, | |
+ .cool_bat_chg_current = 1025, | |
+ .warm_bat_chg_current = 1025, | |
+ .cool_bat_voltage = 4200, | |
+ .warm_bat_voltage = 4000, | |
+ .mbat_in_gpio = MBAT_IN, | |
+ .thermal_mitigation = impression_j_pm8921_therm_mitigation, | |
+ .thermal_levels = ARRAY_SIZE(impression_j_pm8921_therm_mitigation), | |
+ .cold_thr = PM_SMBC_BATT_TEMP_COLD_THR__HIGH, | |
+ .hot_thr = PM_SMBC_BATT_TEMP_HOT_THR__LOW, | |
+ .ext_usb = &smb_ext_chg, | |
+}; | |
+ | |
+static struct pm8xxx_ccadc_platform_data | |
+impression_j_pm8xxx_ccadc_pdata = { | |
+ .r_sense = 10, | |
+ .calib_delay_ms = 600000, | |
+}; | |
+ | |
+static struct pm8921_bms_platform_data | |
+pm8921_bms_pdata __devinitdata = { | |
+ .r_sense = 10, | |
+ .i_test = 2000, | |
+ .v_failure = 3000, | |
+ .max_voltage_uv = MAX_VOLTAGE_MV * 1000, | |
+ .rconn_mohm = 0, | |
+}; | |
+ | |
+static int __init check_dq_setup(char *str) | |
+{ | |
+ if (!strcmp(str, "PASS")) { | |
+ pr_info("[BATT] overwrite HV battery config\n"); | |
+ pm8921_chg_pdata.max_voltage = 4340; | |
+ pm8921_chg_pdata.cool_bat_voltage = 4340; | |
+ pm8921_bms_pdata.max_voltage_uv = 4340 * 1000; | |
+ } else { | |
+ pr_info("[BATT] use default battery config\n"); | |
+ pm8921_chg_pdata.max_voltage = 4200; | |
+ pm8921_chg_pdata.cool_bat_voltage = 4200; | |
+ pm8921_bms_pdata.max_voltage_uv = 4200 * 1000; | |
+ } | |
+ return 1; | |
+} | |
+__setup("androidboot.dq=", check_dq_setup); | |
+ | |
+static struct pm8921_platform_data | |
+impression_j_pm8921_platform_data __devinitdata = { | |
+ .regulator_pdatas = impression_j_pm8921_regulator_pdata, | |
+ .irq_pdata = &impression_j_pm8921_irq_pdata, | |
+ .gpio_pdata = &impression_j_pm8921_gpio_pdata, | |
+ .mpp_pdata = &impression_j_pm8921_mpp_pdata, | |
+ .rtc_pdata = &impression_j_pm8921_rtc_pdata, | |
+ .pwrkey_pdata = &impression_j_pm8921_pwrkey_pdata, | |
+ .misc_pdata = &impression_j_pm8921_misc_pdata, | |
+ .leds_pdata = &impression_j_pm8921_leds_pdata, | |
+ .adc_pdata = &impression_j_pm8921_adc_pdata, | |
+ .charger_pdata = &pm8921_chg_pdata, | |
+ .bms_pdata = &pm8921_bms_pdata, | |
+ .ccadc_pdata = &impression_j_pm8xxx_ccadc_pdata, | |
+ .vibrator_pdata = &pm8xxx_vib_pdata, | |
+}; | |
+ | |
+static struct pm8xxx_irq_platform_data | |
+impression_j_pm8821_irq_pdata __devinitdata = { | |
+ .irq_base = PM8821_IRQ_BASE, | |
+ .devirq = PM8821_SEC_IRQ_N, | |
+ .irq_trigger_flag = IRQF_TRIGGER_HIGH, | |
+ .dev_id = 1, | |
+}; | |
+ | |
+static struct pm8xxx_mpp_platform_data | |
+impression_j_pm8821_mpp_pdata __devinitdata = { | |
+ .mpp_base = PM8821_MPP_PM_TO_SYS(1), | |
+}; | |
+ | |
+static struct pm8821_platform_data | |
+impression_j_pm8821_platform_data __devinitdata = { | |
+ .irq_pdata = &impression_j_pm8821_irq_pdata, | |
+ .mpp_pdata = &impression_j_pm8821_mpp_pdata, | |
+}; | |
+ | |
+static struct msm_ssbi_platform_data impression_j_ssbi_pm8921_pdata __devinitdata = { | |
+ .controller_type = MSM_SBI_CTRL_PMIC_ARBITER, | |
+ .slave = { | |
+ .name = "pm8921-core", | |
+ .platform_data = &impression_j_pm8921_platform_data, | |
+ }, | |
+}; | |
+ | |
+static struct msm_ssbi_platform_data impression_j_ssbi_pm8821_pdata __devinitdata = { | |
+ .controller_type = MSM_SBI_CTRL_PMIC_ARBITER, | |
+ .slave = { | |
+ .name = "pm8821-core", | |
+ .platform_data = &impression_j_pm8821_platform_data, | |
+ }, | |
+}; | |
+ | |
+void __init impression_j_init_pmic(void) | |
+{ | |
+ pmic_reset_irq = PM8921_IRQ_BASE + PM8921_RESOUT_IRQ; | |
+ | |
+ apq8064_device_ssbi_pmic1.dev.platform_data = | |
+ &impression_j_ssbi_pm8921_pdata; | |
+ apq8064_device_ssbi_pmic2.dev.platform_data = | |
+ &impression_j_ssbi_pm8821_pdata; | |
+ impression_j_pm8921_platform_data.num_regulators = | |
+ impression_j_pm8921_regulator_pdata_len; | |
+ | |
+} | |
diff --git arch/arm/mach-msm/board-impression_j-regulator.c arch/arm/mach-msm/board-impression_j-regulator.c | |
new file mode 100644 | |
index 0000000..33af104 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-regulator.c | |
@@ -0,0 +1,560 @@ | |
+/* | |
+ * Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ */ | |
+ | |
+#include <linux/regulator/pm8xxx-regulator.h> | |
+ | |
+#include "board-impression_j.h" | |
+ | |
+#define VREG_CONSUMERS(_id) \ | |
+ static struct regulator_consumer_supply vreg_consumers_##_id[] | |
+ | |
+VREG_CONSUMERS(L1) = { | |
+ REGULATOR_SUPPLY("8921_l1", NULL), | |
+}; | |
+VREG_CONSUMERS(L2) = { | |
+ REGULATOR_SUPPLY("8921_l2", NULL), | |
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csiphy.0"), | |
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csiphy.1"), | |
+ REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csiphy.2"), | |
+ REGULATOR_SUPPLY("lvds_pll_vdda", "lvds.0"), | |
+ REGULATOR_SUPPLY("dsi1_pll_vdda", "mipi_dsi.1"), | |
+ REGULATOR_SUPPLY("dsi_pll_vdda", "mdp.0"), | |
+}; | |
+VREG_CONSUMERS(L3) = { | |
+ REGULATOR_SUPPLY("8921_l3", NULL), | |
+ REGULATOR_SUPPLY("HSUSB_3p3", "msm_otg"), | |
+ REGULATOR_SUPPLY("HSUSB_3p3", "msm_ehci_host.0"), | |
+ REGULATOR_SUPPLY("HSUSB_3p3", "msm_ehci_host.1"), | |
+}; | |
+VREG_CONSUMERS(L4) = { | |
+ REGULATOR_SUPPLY("8921_l4", NULL), | |
+ REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"), | |
+ REGULATOR_SUPPLY("HSUSB_1p8", "msm_ehci_host.0"), | |
+ REGULATOR_SUPPLY("HSUSB_1p8", "msm_ehci_host.1"), | |
+ REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"), | |
+}; | |
+VREG_CONSUMERS(L5) = { | |
+ REGULATOR_SUPPLY("8921_l5", NULL), | |
+ REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"), | |
+}; | |
+VREG_CONSUMERS(L6) = { | |
+ REGULATOR_SUPPLY("8921_l6", NULL), | |
+ REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.3"), | |
+}; | |
+VREG_CONSUMERS(L7) = { | |
+ REGULATOR_SUPPLY("8921_l7", NULL), | |
+ REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.3"), | |
+}; | |
+VREG_CONSUMERS(L8) = { | |
+ REGULATOR_SUPPLY("8921_l8", NULL), | |
+ REGULATOR_SUPPLY("cam_vana", "4-001a"), | |
+ REGULATOR_SUPPLY("cam_vana", "4-006c"), | |
+}; | |
+VREG_CONSUMERS(L9) = { | |
+ REGULATOR_SUPPLY("8921_l9", NULL), | |
+ REGULATOR_SUPPLY("vdd", "3-0024"), | |
+}; | |
+VREG_CONSUMERS(L10) = { | |
+ REGULATOR_SUPPLY("8921_l10", NULL), | |
+ REGULATOR_SUPPLY("iris_vddpa", "wcnss_wlan.0"), | |
+ REGULATOR_SUPPLY("dsi1_avdd", "mipi_dsi.1"), | |
+}; | |
+VREG_CONSUMERS(L11) = { | |
+ REGULATOR_SUPPLY("8921_l11", NULL), | |
+}; | |
+VREG_CONSUMERS(L12) = { | |
+ REGULATOR_SUPPLY("cam_vdig", "4-001a"), | |
+ REGULATOR_SUPPLY("cam_vdig", "4-006c"), | |
+ REGULATOR_SUPPLY("8921_l12", NULL), | |
+}; | |
+VREG_CONSUMERS(L14) = { | |
+ REGULATOR_SUPPLY("8921_l14", NULL), | |
+}; | |
+VREG_CONSUMERS(L15) = { | |
+ REGULATOR_SUPPLY("8921_l15", NULL), | |
+}; | |
+VREG_CONSUMERS(L16) = { | |
+ REGULATOR_SUPPLY("8921_l16", NULL), | |
+ REGULATOR_SUPPLY("cam_vaf", "4-001a"), | |
+ REGULATOR_SUPPLY("cam_vaf", "4-006c"), | |
+}; | |
+VREG_CONSUMERS(L17) = { | |
+ REGULATOR_SUPPLY("8921_l17", NULL), | |
+}; | |
+VREG_CONSUMERS(L18) = { | |
+ REGULATOR_SUPPLY("8921_l18", NULL), | |
+}; | |
+VREG_CONSUMERS(L21) = { | |
+ REGULATOR_SUPPLY("8921_l21", NULL), | |
+}; | |
+VREG_CONSUMERS(L22) = { | |
+ REGULATOR_SUPPLY("8921_l22", NULL), | |
+}; | |
+VREG_CONSUMERS(L23) = { | |
+ REGULATOR_SUPPLY("8921_l23", NULL), | |
+ REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.1"), | |
+ REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.2"), | |
+ | |
+}; | |
+VREG_CONSUMERS(L24) = { | |
+ REGULATOR_SUPPLY("8921_l24", NULL), | |
+ REGULATOR_SUPPLY("riva_vddmx", "wcnss_wlan.0"), | |
+}; | |
+VREG_CONSUMERS(L25) = { | |
+ REGULATOR_SUPPLY("8921_l25", NULL), | |
+ REGULATOR_SUPPLY("VDDD_CDC_D", "tabla-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla-slim"), | |
+ REGULATOR_SUPPLY("VDDD_CDC_D", "tabla2x-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla2x-slim"), | |
+}; | |
+VREG_CONSUMERS(L26) = { | |
+ REGULATOR_SUPPLY("8921_l26", NULL), | |
+ REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.0"), | |
+}; | |
+VREG_CONSUMERS(L27) = { | |
+ REGULATOR_SUPPLY("8921_l27", NULL), | |
+ REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.2"), | |
+}; | |
+VREG_CONSUMERS(L28) = { | |
+ REGULATOR_SUPPLY("8921_l28", NULL), | |
+ REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.1"), | |
+}; | |
+VREG_CONSUMERS(L29) = { | |
+ REGULATOR_SUPPLY("8921_l29", NULL), | |
+}; | |
+VREG_CONSUMERS(S1) = { | |
+ REGULATOR_SUPPLY("8921_s1", NULL), | |
+}; | |
+VREG_CONSUMERS(S2) = { | |
+ REGULATOR_SUPPLY("8921_s2", NULL), | |
+ REGULATOR_SUPPLY("iris_vddrfa", "wcnss_wlan.0"), | |
+}; | |
+VREG_CONSUMERS(S3) = { | |
+ REGULATOR_SUPPLY("8921_s3", NULL), | |
+ REGULATOR_SUPPLY("HSUSB_VDDCX", "msm_otg"), | |
+ REGULATOR_SUPPLY("HSUSB_VDDCX", "msm_ehci_host.0"), | |
+ REGULATOR_SUPPLY("HSUSB_VDDCX", "msm_ehci_host.1"), | |
+ REGULATOR_SUPPLY("HSIC_VDDCX", "msm_hsic_host"), | |
+ REGULATOR_SUPPLY("riva_vddcx", "wcnss_wlan.0"), | |
+}; | |
+VREG_CONSUMERS(S4) = { | |
+ REGULATOR_SUPPLY("8921_s4", NULL), | |
+ REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.1"), | |
+ REGULATOR_SUPPLY("VDDIO_CDC", "tabla-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDD_CP", "tabla-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla-slim"), | |
+ REGULATOR_SUPPLY("VDDIO_CDC", "tabla2x-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDD_CP", "tabla2x-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla2x-slim"), | |
+ REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla2x-slim"), | |
+ REGULATOR_SUPPLY("riva_vddpx", "wcnss_wlan.0"), | |
+ REGULATOR_SUPPLY("vcc_i2c", "3-005b"), | |
+ REGULATOR_SUPPLY("vcc_i2c", "3-0024"), | |
+ REGULATOR_SUPPLY("vddp", "0-0048"), | |
+}; | |
+VREG_CONSUMERS(S5) = { | |
+ REGULATOR_SUPPLY("8921_s5", NULL), | |
+ REGULATOR_SUPPLY("krait0", NULL), | |
+}; | |
+VREG_CONSUMERS(S6) = { | |
+ REGULATOR_SUPPLY("8921_s6", NULL), | |
+ REGULATOR_SUPPLY("krait1", NULL), | |
+}; | |
+VREG_CONSUMERS(S7) = { | |
+ REGULATOR_SUPPLY("8921_s7", NULL), | |
+}; | |
+VREG_CONSUMERS(S8) = { | |
+ REGULATOR_SUPPLY("8921_s8", NULL), | |
+}; | |
+VREG_CONSUMERS(LVS1) = { | |
+ REGULATOR_SUPPLY("8921_lvs1", NULL), | |
+ REGULATOR_SUPPLY("iris_vddio", "wcnss_wlan.0"), | |
+}; | |
+VREG_CONSUMERS(LVS2) = { | |
+ REGULATOR_SUPPLY("8921_lvs2", NULL), | |
+ REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"), | |
+}; | |
+VREG_CONSUMERS(LVS3) = { | |
+ REGULATOR_SUPPLY("8921_lvs3", NULL), | |
+}; | |
+VREG_CONSUMERS(LVS4) = { | |
+ REGULATOR_SUPPLY("8921_lvs4", NULL), | |
+}; | |
+VREG_CONSUMERS(LVS5) = { | |
+ REGULATOR_SUPPLY("8921_lvs5", NULL), | |
+ REGULATOR_SUPPLY("cam_vio", "4-001a"), | |
+ REGULATOR_SUPPLY("cam_vio", "4-006c"), | |
+ REGULATOR_SUPPLY("dsi1_vddio", "mipi_dsi.1"), | |
+}; | |
+VREG_CONSUMERS(LVS6) = { | |
+ REGULATOR_SUPPLY("8921_lvs6", NULL), | |
+}; | |
+VREG_CONSUMERS(LVS7) = { | |
+ REGULATOR_SUPPLY("8921_lvs7", NULL), | |
+ REGULATOR_SUPPLY("pll_vdd", "pil_riva"), | |
+ REGULATOR_SUPPLY("lvds_vdda", "lvds.0"), | |
+ REGULATOR_SUPPLY("dsi_pll_vddio", "mdp.0"), | |
+}; | |
+VREG_CONSUMERS(USB_OTG) = { | |
+ REGULATOR_SUPPLY("8921_usb_otg", NULL), | |
+ REGULATOR_SUPPLY("vbus_otg", "msm_otg"), | |
+}; | |
+VREG_CONSUMERS(HDMI_MVS) = { | |
+ REGULATOR_SUPPLY("8921_hdmi_mvs", NULL), | |
+}; | |
+VREG_CONSUMERS(NCP) = { | |
+ REGULATOR_SUPPLY("8921_ncp", NULL), | |
+}; | |
+VREG_CONSUMERS(8821_S0) = { | |
+ REGULATOR_SUPPLY("8821_s0", NULL), | |
+ REGULATOR_SUPPLY("krait2", NULL), | |
+}; | |
+VREG_CONSUMERS(8821_S1) = { | |
+ REGULATOR_SUPPLY("8821_s1", NULL), | |
+ REGULATOR_SUPPLY("krait3", NULL), | |
+}; | |
+VREG_CONSUMERS(EXT_5V) = { | |
+ REGULATOR_SUPPLY("ext_5v", NULL), | |
+}; | |
+VREG_CONSUMERS(EXT_MPP8) = { | |
+ REGULATOR_SUPPLY("ext_mpp8", NULL), | |
+}; | |
+#if 0 | |
+VREG_CONSUMERS(EXT_3P3V) = { | |
+ REGULATOR_SUPPLY("ext_3p3v", NULL), | |
+ REGULATOR_SUPPLY("vdd_io", "spi0.2"), | |
+ REGULATOR_SUPPLY("mhl_ext_3p3v", "msm_otg"), | |
+ REGULATOR_SUPPLY("lvds_vccs_3p3v", "lvds.0"), | |
+ REGULATOR_SUPPLY("dsi1_vccs_3p3v", "mipi_dsi.1"), | |
+}; | |
+#endif | |
+#if 0 | |
+VREG_CONSUMERS(EXT_TS_SW) = { | |
+ REGULATOR_SUPPLY("ext_ts_sw", NULL), | |
+ REGULATOR_SUPPLY("vdd_ana", "3-005b"), | |
+}; | |
+#endif | |
+ | |
+#define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \ | |
+ _apply_uV, _pull_down, _always_on, _supply_regulator, \ | |
+ _system_uA, _enable_time, _reg_id) \ | |
+ { \ | |
+ .init_data = { \ | |
+ .constraints = { \ | |
+ .valid_modes_mask = _modes, \ | |
+ .valid_ops_mask = _ops, \ | |
+ .min_uV = _min_uV, \ | |
+ .max_uV = _max_uV, \ | |
+ .input_uV = _max_uV, \ | |
+ .apply_uV = _apply_uV, \ | |
+ .always_on = _always_on, \ | |
+ .name = _name, \ | |
+ }, \ | |
+ .num_consumer_supplies = \ | |
+ ARRAY_SIZE(vreg_consumers_##_id), \ | |
+ .consumer_supplies = vreg_consumers_##_id, \ | |
+ .supply_regulator = _supply_regulator, \ | |
+ }, \ | |
+ .id = _reg_id, \ | |
+ .pull_down_enable = _pull_down, \ | |
+ .system_uA = _system_uA, \ | |
+ .enable_time = _enable_time, \ | |
+ } | |
+ | |
+#define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \ | |
+ _enable_time, _supply_regulator, _system_uA, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ | |
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \ | |
+ REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ | |
+ REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \ | |
+ _supply_regulator, _system_uA, _enable_time, _reg_id) | |
+ | |
+#define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \ | |
+ _max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ | |
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \ | |
+ REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ | |
+ REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \ | |
+ _supply_regulator, _system_uA, _enable_time, _reg_id) | |
+ | |
+#define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \ | |
+ _enable_time, _supply_regulator, _system_uA, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ | |
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \ | |
+ REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ | |
+ REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \ | |
+ _supply_regulator, _system_uA, _enable_time, _reg_id) | |
+ | |
+#define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \ | |
+ _enable_time, _supply_regulator, _system_uA, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \ | |
+ REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \ | |
+ | REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \ | |
+ _supply_regulator, _system_uA, _enable_time, _reg_id) | |
+ | |
+#define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \ | |
+ _supply_regulator, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \ | |
+ _pull_down, _always_on, _supply_regulator, 0, _enable_time, \ | |
+ _reg_id) | |
+ | |
+#define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \ | |
+ _supply_regulator, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \ | |
+ _pull_down, _always_on, _supply_regulator, 0, _enable_time, \ | |
+ _reg_id) | |
+ | |
+#define PM8XXX_NCP(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \ | |
+ _supply_regulator, _reg_id) \ | |
+ PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \ | |
+ REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \ | |
+ _always_on, _supply_regulator, 0, _enable_time, _reg_id) | |
+ | |
+#define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \ | |
+ _supply_regulator, _reg_id) \ | |
+ { \ | |
+ .init_data = { \ | |
+ .constraints = { \ | |
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ | |
+ .always_on = _always_on, \ | |
+ .name = _name, \ | |
+ }, \ | |
+ .num_consumer_supplies = \ | |
+ ARRAY_SIZE(vreg_consumers_##_id##_PC), \ | |
+ .consumer_supplies = vreg_consumers_##_id##_PC, \ | |
+ .supply_regulator = _supply_regulator, \ | |
+ }, \ | |
+ .id = _reg_id, \ | |
+ .pin_fn = PM8XXX_VREG_PIN_FN_##_pin_fn, \ | |
+ .pin_ctrl = _pin_ctrl, \ | |
+ } | |
+ | |
+#define GPIO_VREG(_id, _reg_name, _gpio_label, _gpio, _supply_regulator) \ | |
+ [GPIO_VREG_ID_##_id] = { \ | |
+ .init_data = { \ | |
+ .constraints = { \ | |
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ | |
+ }, \ | |
+ .num_consumer_supplies = \ | |
+ ARRAY_SIZE(vreg_consumers_##_id), \ | |
+ .consumer_supplies = vreg_consumers_##_id, \ | |
+ .supply_regulator = _supply_regulator, \ | |
+ }, \ | |
+ .regulator_name = _reg_name, \ | |
+ .gpio_label = _gpio_label, \ | |
+ .gpio = _gpio, \ | |
+ } | |
+ | |
+#define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \ | |
+ { \ | |
+ .constraints = { \ | |
+ .name = _name, \ | |
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, \ | |
+ .min_uV = _min_uV, \ | |
+ .max_uV = _max_uV, \ | |
+ }, \ | |
+ .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_##_id), \ | |
+ .consumer_supplies = vreg_consumers_##_id, \ | |
+ } | |
+ | |
+#define RPM_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, _default_uV, \ | |
+ _peak_uA, _avg_uA, _pull_down, _pin_ctrl, _freq, _pin_fn, \ | |
+ _force_mode, _sleep_set_force_mode, _power_mode, _state, \ | |
+ _sleep_selectable, _always_on, _supply_regulator, _system_uA) \ | |
+ { \ | |
+ .init_data = { \ | |
+ .constraints = { \ | |
+ .valid_modes_mask = _modes, \ | |
+ .valid_ops_mask = _ops, \ | |
+ .min_uV = _min_uV, \ | |
+ .max_uV = _max_uV, \ | |
+ .input_uV = _min_uV, \ | |
+ .apply_uV = _apply_uV, \ | |
+ .always_on = _always_on, \ | |
+ }, \ | |
+ .num_consumer_supplies = \ | |
+ ARRAY_SIZE(vreg_consumers_##_id), \ | |
+ .consumer_supplies = vreg_consumers_##_id, \ | |
+ .supply_regulator = _supply_regulator, \ | |
+ }, \ | |
+ .id = RPM_VREG_ID_PM8921_##_id, \ | |
+ .default_uV = _default_uV, \ | |
+ .peak_uA = _peak_uA, \ | |
+ .avg_uA = _avg_uA, \ | |
+ .pull_down_enable = _pull_down, \ | |
+ .pin_ctrl = _pin_ctrl, \ | |
+ .freq = RPM_VREG_FREQ_##_freq, \ | |
+ .pin_fn = _pin_fn, \ | |
+ .force_mode = _force_mode, \ | |
+ .sleep_set_force_mode = _sleep_set_force_mode, \ | |
+ .power_mode = _power_mode, \ | |
+ .state = _state, \ | |
+ .sleep_selectable = _sleep_selectable, \ | |
+ .system_uA = _system_uA, \ | |
+ } | |
+ | |
+#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \ | |
+ _supply_regulator, _system_uA, _init_peak_uA) \ | |
+ RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ | |
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \ | |
+ | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \ | |
+ | REGULATOR_CHANGE_DRMS, 0, _max_uV, _init_peak_uA, 0, _pd, \ | |
+ RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_NONE, RPM_VREG_POWER_MODE_8960_PWM, \ | |
+ RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ | |
+ _supply_regulator, _system_uA) | |
+ | |
+#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \ | |
+ _supply_regulator, _system_uA, _freq, _force_mode, \ | |
+ _sleep_set_force_mode) \ | |
+ RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ | |
+ | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \ | |
+ | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \ | |
+ | REGULATOR_CHANGE_DRMS, 0, _max_uV, _system_uA, 0, _pd, \ | |
+ RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_##_force_mode, \ | |
+ RPM_VREG_FORCE_MODE_8960_##_sleep_set_force_mode, \ | |
+ RPM_VREG_POWER_MODE_8960_PWM, RPM_VREG_STATE_OFF, \ | |
+ _sleep_selectable, _always_on, _supply_regulator, _system_uA) | |
+ | |
+#define RPM_VS(_id, _always_on, _pd, _sleep_selectable, _supply_regulator) \ | |
+ RPM_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, 0, 1000, 1000, _pd, \ | |
+ RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_NONE, RPM_VREG_POWER_MODE_8960_PWM, \ | |
+ RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ | |
+ _supply_regulator, 0) | |
+ | |
+#define RPM_NCP(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \ | |
+ _supply_regulator, _freq) \ | |
+ RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \ | |
+ | REGULATOR_CHANGE_STATUS, 0, _max_uV, 1000, 1000, 0, \ | |
+ RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_NONE, \ | |
+ RPM_VREG_FORCE_MODE_8960_NONE, RPM_VREG_POWER_MODE_8960_PWM, \ | |
+ RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ | |
+ _supply_regulator, 0) | |
+ | |
+#define RPM_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \ | |
+ { \ | |
+ .init_data = { \ | |
+ .constraints = { \ | |
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ | |
+ .always_on = _always_on, \ | |
+ }, \ | |
+ .num_consumer_supplies = \ | |
+ ARRAY_SIZE(vreg_consumers_##_id##_PC), \ | |
+ .consumer_supplies = vreg_consumers_##_id##_PC, \ | |
+ .supply_regulator = _supply_regulator, \ | |
+ }, \ | |
+ .id = RPM_VREG_ID_PM8921_##_id##_PC, \ | |
+ .pin_fn = RPM_VREG_PIN_FN_8960_##_pin_fn, \ | |
+ .pin_ctrl = _pin_ctrl, \ | |
+ } | |
+ | |
+struct gpio_regulator_platform_data | |
+impression_j_gpio_regulator_pdata[] __devinitdata = { | |
+ | |
+ GPIO_VREG(EXT_5V, "ext_5v", "ext_5v_en", PM8921_MPP_PM_TO_SYS(7), NULL), | |
+ | |
+ | |
+ | |
+ | |
+ GPIO_VREG(EXT_MPP8, "ext_mpp8", "ext_mpp8_en", | |
+ PM8921_MPP_PM_TO_SYS(8), NULL), | |
+}; | |
+ | |
+struct regulator_init_data impression_j_saw_regulator_pdata_8921_s5 = | |
+ | |
+ SAW_VREG_INIT(S5, "8921_s5", 850000, 1300000); | |
+struct regulator_init_data impression_j_saw_regulator_pdata_8921_s6 = | |
+ SAW_VREG_INIT(S6, "8921_s6", 850000, 1300000); | |
+ | |
+struct regulator_init_data impression_j_saw_regulator_pdata_8821_s0 = | |
+ | |
+ SAW_VREG_INIT(8821_S0, "8821_s0", 850000, 1300000); | |
+struct regulator_init_data impression_j_saw_regulator_pdata_8821_s1 = | |
+ SAW_VREG_INIT(8821_S1, "8821_s1", 850000, 1300000); | |
+ | |
+struct pm8xxx_regulator_platform_data | |
+impression_j_pm8921_regulator_pdata[] __devinitdata = { | |
+ PM8XXX_NLDO1200(L26, "8921_l26", 0, 1, 375000, 1050000, 200, "8921_s7", | |
+ 0, 1), | |
+ | |
+ | |
+ PM8XXX_VS300(USB_OTG, "8921_usb_otg", 0, 0, 0, "ext_5v", 2), | |
+ PM8XXX_VS300(HDMI_MVS, "8921_hdmi_mvs", 0, 1, 0, "ext_5v", 3), | |
+}; | |
+ | |
+static struct rpm_regulator_init_data | |
+impression_j_rpm_regulator_init_data[] __devinitdata = { | |
+ | |
+ RPM_SMPS(S1, 1, 1, 0, 1225000, 1225000, NULL, 100000, 3p20, NONE, NONE), | |
+ RPM_SMPS(S2, 0, 0, 0, 1300000, 1300000, NULL, 0, 1p60, NONE, NONE), | |
+ RPM_SMPS(S3, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80, NONE, NONE), | |
+ RPM_SMPS(S4, 1, 1, 0, 1800000, 1800000, NULL, 100000, 1p60, AUTO, AUTO), | |
+ RPM_SMPS(S7, 0, 0, 0, 1300000, 1300000, NULL, 100000, 3p20, NONE, NONE), | |
+ RPM_SMPS(S8, 0, 1, 0, 2200000, 2200000, NULL, 0, 1p60, NONE, NONE), | |
+ | |
+ | |
+ RPM_LDO(L1, 1, 1, 0, 1100000, 1100000, "8921_s4", 0, 1000), | |
+ RPM_LDO(L2, 0, 1, 0, 1200000, 1200000, "8921_s4", 0, 0), | |
+ RPM_LDO(L3, 0, 1, 0, 3075000, 3075000, NULL, 0, 0), | |
+ RPM_LDO(L4, 1, 1, 0, 1800000, 1800000, NULL, 0, 10000), | |
+ RPM_LDO(L5, 0, 1, 0, 2950000, 2950000, NULL, 0, 0), | |
+ RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0), | |
+ RPM_LDO(L7, 0, 1, 0, 1850000, 2950000, NULL, 0, 0), | |
+ RPM_LDO(L8, 0, 1, 0, 2800000, 2800000, NULL, 0, 0), | |
+ RPM_LDO(L9, 0, 1, 0, 2800000, 2800000, NULL, 0, 0), | |
+ RPM_LDO(L10, 0, 1, 0, 3000000, 3000000, NULL, 0, 0), | |
+ RPM_LDO(L11, 0, 1, 0, 3300000, 3300000, NULL, 0, 0), | |
+ RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8921_s4", 0, 0), | |
+ RPM_LDO(L14, 0, 1, 0, 1800000, 1800000, NULL, 0, 0), | |
+ RPM_LDO(L15, 0, 1, 0, 1800000, 2950000, NULL, 0, 0), | |
+ RPM_LDO(L16, 0, 1, 0, 3300000, 3300000, NULL, 0, 0), | |
+ RPM_LDO(L17, 0, 1, 0, 2000000, 2000000, NULL, 0, 0), | |
+ RPM_LDO(L18, 1, 1, 0, 1300000, 1300000, "8921_s4", 0, 0), | |
+ RPM_LDO(L21, 0, 1, 0, 1050000, 1050000, NULL, 0, 0), | |
+ RPM_LDO(L22, 0, 1, 0, 2600000, 2600000, NULL, 0, 0), | |
+ RPM_LDO(L23, 0, 1, 0, 1850000, 1850000, NULL, 0, 0), | |
+ RPM_LDO(L24, 0, 1, 1, 750000, 1150000, "8921_s1", 10000, 10000), | |
+ RPM_LDO(L25, 1, 1, 0, 1250000, 1250000, "8921_s1", 10000, 10000), | |
+ RPM_LDO(L27, 0, 0, 0, 1100000, 1100000, "8921_s7", 0, 0), | |
+ RPM_LDO(L28, 0, 1, 0, 1050000, 1200000, "8921_s7", 0, 0), | |
+ RPM_LDO(L29, 0, 1, 0, 2000000, 2000000, NULL, 0, 0), | |
+ | |
+ | |
+ RPM_VS(LVS1, 0, 1, 0, "8921_s4"), | |
+ RPM_VS(LVS2, 0, 1, 0, "8921_s1"), | |
+ RPM_VS(LVS3, 0, 1, 0, "8921_s4"), | |
+ RPM_VS(LVS4, 0, 1, 0, "8921_s4"), | |
+ RPM_VS(LVS5, 0, 1, 0, "8921_s4"), | |
+ RPM_VS(LVS6, 0, 1, 0, "8921_s4"), | |
+ RPM_VS(LVS7, 0, 1, 1, "8921_s4"), | |
+ | |
+ | |
+ RPM_NCP(NCP, 0, 0, 1800000, 1800000, "8921_l6", 1p60), | |
+}; | |
+ | |
+int impression_j_pm8921_regulator_pdata_len __devinitdata = | |
+ ARRAY_SIZE(impression_j_pm8921_regulator_pdata); | |
+ | |
+struct rpm_regulator_platform_data impression_j_rpm_regulator_pdata __devinitdata = { | |
+ .init_data = impression_j_rpm_regulator_init_data, | |
+ .num_regulators = ARRAY_SIZE(impression_j_rpm_regulator_init_data), | |
+ .version = RPM_VREG_VERSION_8960, | |
+ .vreg_id_vdd_mem = RPM_VREG_ID_PM8921_L24, | |
+ .vreg_id_vdd_dig = RPM_VREG_ID_PM8921_S3, | |
+}; | |
diff --git arch/arm/mach-msm/board-impression_j-rfkill.c arch/arm/mach-msm/board-impression_j-rfkill.c | |
new file mode 100644 | |
index 0000000..40a933a | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-rfkill.c | |
@@ -0,0 +1,280 @@ | |
+/* | |
+ * Copyright (C) 2009 Google, Inc. | |
+ * Copyright (C) 2009-2011 HTC Corporation. | |
+ * | |
+ * This software is licensed under the terms of the GNU General Public | |
+ * License version 2, as published by the Free Software Foundation, and | |
+ * may be copied, distributed, and modified under those terms. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <linux/delay.h> | |
+#include <linux/device.h> | |
+#include <linux/module.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/rfkill.h> | |
+#include <linux/gpio.h> | |
+#include <asm/mach-types.h> | |
+#include <linux/mfd/pm8xxx/pm8921.h> | |
+ | |
+#include "board-impression_j.h" | |
+ | |
+static struct rfkill *bt_rfk; | |
+static const char bt_name[] = "bcm4334"; | |
+ | |
+struct pm8xxx_gpio_init { | |
+ unsigned gpio; | |
+ struct pm_gpio config; | |
+}; | |
+ | |
+#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \ | |
+ _func, _inv, _disable) \ | |
+{ \ | |
+ .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \ | |
+ .config = { \ | |
+ .direction = _dir, \ | |
+ .output_buffer = _buf, \ | |
+ .output_value = _val, \ | |
+ .pull = _pull, \ | |
+ .vin_sel = _vin, \ | |
+ .out_strength = _out_strength, \ | |
+ .function = _func, \ | |
+ .inv_int_pol = _inv, \ | |
+ .disable_pin = _disable, \ | |
+ } \ | |
+} | |
+ | |
+struct pm8xxx_gpio_init impression_j_bt_pmic_gpio[] = { | |
+ PM8XXX_GPIO_INIT(BT_REG_ON, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, 0, \ | |
+ PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_LOW, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+ PM8XXX_GPIO_INIT(BT_WAKE, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, 0, \ | |
+ PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_LOW, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+ PM8XXX_GPIO_INIT(BT_HOST_WAKE, PM_GPIO_DIR_IN, PM_GPIO_OUT_BUF_CMOS, 0, \ | |
+ PM_GPIO_PULL_DN, PM_GPIO_VIN_S4, \ | |
+ PM_GPIO_STRENGTH_NO, \ | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+ | |
+static uint32_t impression_j_GPIO_bt_on_table[] = { | |
+ | |
+ | |
+ GPIO_CFG(BT_UART_RTSz, | |
+ 2, | |
+ GPIO_CFG_OUTPUT, | |
+ GPIO_CFG_NO_PULL, | |
+ GPIO_CFG_8MA), | |
+ | |
+ GPIO_CFG(BT_UART_CTSz, | |
+ 2, | |
+ GPIO_CFG_INPUT, | |
+ GPIO_CFG_PULL_UP, | |
+ GPIO_CFG_8MA), | |
+ | |
+ GPIO_CFG(BT_UART_RX, | |
+ 2, | |
+ GPIO_CFG_INPUT, | |
+ GPIO_CFG_PULL_UP, | |
+ GPIO_CFG_8MA), | |
+ | |
+ GPIO_CFG(BT_UART_TX, | |
+ 2, | |
+ GPIO_CFG_OUTPUT, | |
+ GPIO_CFG_NO_PULL, | |
+ GPIO_CFG_8MA), | |
+}; | |
+ | |
+static uint32_t impression_j_GPIO_bt_off_table[] = { | |
+ | |
+ | |
+ GPIO_CFG(BT_UART_RTSz, | |
+ 0, | |
+ GPIO_CFG_INPUT, | |
+ GPIO_CFG_PULL_DOWN, | |
+ GPIO_CFG_8MA), | |
+ | |
+ GPIO_CFG(BT_UART_CTSz, | |
+ 0, | |
+ GPIO_CFG_INPUT, | |
+ GPIO_CFG_PULL_DOWN, | |
+ GPIO_CFG_8MA), | |
+ | |
+ GPIO_CFG(BT_UART_RX, | |
+ 0, | |
+ GPIO_CFG_INPUT, | |
+ GPIO_CFG_PULL_DOWN, | |
+ GPIO_CFG_8MA), | |
+ | |
+ GPIO_CFG(BT_UART_TX, | |
+ 0, | |
+ GPIO_CFG_INPUT, | |
+ GPIO_CFG_PULL_DOWN, | |
+ GPIO_CFG_8MA), | |
+}; | |
+ | |
+static void config_bt_table(uint32_t *table, int len) | |
+{ | |
+ int n, rc; | |
+ for (n = 0; n < len; n++) { | |
+ rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE); | |
+ if (rc) { | |
+ pr_err("[BT]%s: gpio_tlmm_config(%#x)=%d\n", | |
+ __func__, table[n], rc); | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static void impression_j_GPIO_config_bt_on(void) | |
+{ | |
+ printk(KERN_INFO "[BT]== R ON ==\n"); | |
+ | |
+ | |
+ config_bt_table(impression_j_GPIO_bt_on_table, | |
+ ARRAY_SIZE(impression_j_GPIO_bt_on_table)); | |
+ mdelay(2); | |
+ | |
+ | |
+ | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(BT_REG_ON), 0); | |
+ mdelay(5); | |
+ | |
+ | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(BT_WAKE), 0); | |
+ | |
+ mdelay(5); | |
+ | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(BT_REG_ON), 1); | |
+ | |
+ mdelay(1); | |
+ | |
+} | |
+ | |
+static void impression_j_GPIO_config_bt_off(void) | |
+{ | |
+ | |
+ | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(BT_REG_ON), 0); | |
+ mdelay(1); | |
+ | |
+ | |
+ config_bt_table(impression_j_GPIO_bt_off_table, | |
+ ARRAY_SIZE(impression_j_GPIO_bt_off_table)); | |
+ mdelay(2); | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(BT_WAKE), 0); | |
+ | |
+ printk(KERN_INFO "[BT]== R OFF ==\n"); | |
+} | |
+ | |
+static int bluetooth_set_power(void *data, bool blocked) | |
+{ | |
+ if (!blocked) | |
+ impression_j_GPIO_config_bt_on(); | |
+ else | |
+ impression_j_GPIO_config_bt_off(); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static struct rfkill_ops impression_j_rfkill_ops = { | |
+ .set_block = bluetooth_set_power, | |
+}; | |
+ | |
+static int impression_j_rfkill_probe(struct platform_device *pdev) | |
+{ | |
+ int rc = 0; | |
+ bool default_state = true; | |
+ int i=0; | |
+ | |
+ | |
+ | |
+ mdelay(2); | |
+ | |
+ for( i = 0; i < ARRAY_SIZE(impression_j_bt_pmic_gpio); i++) { | |
+ rc = pm8xxx_gpio_config(impression_j_bt_pmic_gpio[i].gpio, | |
+ &impression_j_bt_pmic_gpio[i].config); | |
+ if (rc) | |
+ pr_info("[bt] %s: Config ERROR: GPIO=%u, rc=%d\n", | |
+ __func__, impression_j_bt_pmic_gpio[i].gpio, rc); | |
+ } | |
+ | |
+ bluetooth_set_power(NULL, default_state); | |
+ | |
+ bt_rfk = rfkill_alloc(bt_name, &pdev->dev, RFKILL_TYPE_BLUETOOTH, | |
+ &impression_j_rfkill_ops, NULL); | |
+ if (!bt_rfk) { | |
+ rc = -ENOMEM; | |
+ goto err_rfkill_alloc; | |
+ } | |
+ | |
+ rfkill_set_states(bt_rfk, default_state, false); | |
+ | |
+ | |
+ | |
+ rc = rfkill_register(bt_rfk); | |
+ if (rc) | |
+ goto err_rfkill_reg; | |
+ | |
+ return 0; | |
+ | |
+err_rfkill_reg: | |
+ rfkill_destroy(bt_rfk); | |
+err_rfkill_alloc: | |
+ return rc; | |
+} | |
+ | |
+static int impression_j_rfkill_remove(struct platform_device *dev) | |
+{ | |
+ rfkill_unregister(bt_rfk); | |
+ rfkill_destroy(bt_rfk); | |
+ return 0; | |
+} | |
+ | |
+static struct platform_driver impression_j_rfkill_driver = { | |
+ .probe = impression_j_rfkill_probe, | |
+ .remove = impression_j_rfkill_remove, | |
+ .driver = { | |
+ .name = "impression_j_rfkill", | |
+ .owner = THIS_MODULE, | |
+ }, | |
+}; | |
+ | |
+static int __init impression_j_rfkill_init(void) | |
+{ | |
+ return platform_driver_register(&impression_j_rfkill_driver); | |
+} | |
+ | |
+static void __exit impression_j_rfkill_exit(void) | |
+{ | |
+ platform_driver_unregister(&impression_j_rfkill_driver); | |
+} | |
+ | |
+module_init(impression_j_rfkill_init); | |
+module_exit(impression_j_rfkill_exit); | |
+MODULE_DESCRIPTION("impression_j rfkill"); | |
+MODULE_AUTHOR("htc_ssdbt <htc_ssdbt@htc.com>"); | |
+MODULE_LICENSE("GPL"); | |
diff --git arch/arm/mach-msm/board-impression_j-storage.c arch/arm/mach-msm/board-impression_j-storage.c | |
new file mode 100644 | |
index 0000000..be39454 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-storage.c | |
@@ -0,0 +1,497 @@ | |
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#include <linux/init.h> | |
+#include <linux/io.h> | |
+#include <linux/ioport.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/bootmem.h> | |
+#include <linux/export.h> | |
+#include <asm/mach-types.h> | |
+#include <asm/mach/mmc.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/msm_iomap.h> | |
+#include <mach/board.h> | |
+#include <mach/gpio.h> | |
+#include <mach/gpiomux.h> | |
+#include "devices.h" | |
+#include "board-impression_j.h" | |
+#include "board-storage-common-a.h" | |
+ | |
+ | |
+enum sdcc_controllers { | |
+ SDCC1, | |
+ SDCC2, | |
+ SDCC3, | |
+ SDCC4, | |
+ MAX_SDCC_CONTROLLER | |
+}; | |
+ | |
+static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = { | |
+ | |
+ [SDCC1] = { | |
+ .name = "sdc_vdd", | |
+ .high_vol_level = 2950000, | |
+ .low_vol_level = 2950000, | |
+ .always_on = 1, | |
+ .lpm_sup = 1, | |
+ .lpm_uA = 9000, | |
+ .hpm_uA = 200000, | |
+ }, | |
+ | |
+ [SDCC3] = { | |
+ .name = "sdc_vdd", | |
+ .high_vol_level = 2950000, | |
+ .low_vol_level = 2950000, | |
+ .hpm_uA = 600000, | |
+ } | |
+}; | |
+ | |
+static struct msm_mmc_reg_data mmc_vdd_io_reg_data[MAX_SDCC_CONTROLLER] = { | |
+ | |
+ [SDCC1] = { | |
+ .name = "sdc_vdd_io", | |
+ .always_on = 1, | |
+ .high_vol_level = 1800000, | |
+ .low_vol_level = 1800000, | |
+ .hpm_uA = 200000, | |
+ }, | |
+ | |
+ [SDCC3] = { | |
+ .name = "sdc_vdd_io", | |
+ .high_vol_level = 2950000, | |
+ .low_vol_level = 1850000, | |
+ .always_on = 1, | |
+ .lpm_sup = 1, | |
+ | |
+ .hpm_uA = 16000, | |
+ .lpm_uA = 2000, | |
+ } | |
+}; | |
+ | |
+static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = { | |
+ | |
+ [SDCC1] = { | |
+ .vdd_data = &mmc_vdd_reg_data[SDCC1], | |
+ .vdd_io_data = &mmc_vdd_io_reg_data[SDCC1], | |
+ }, | |
+ | |
+ [SDCC3] = { | |
+ .vdd_data = &mmc_vdd_reg_data[SDCC3], | |
+ .vdd_io_data = &mmc_vdd_io_reg_data[SDCC3], | |
+ } | |
+}; | |
+ | |
+static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = { | |
+ {TLMM_HDRV_SDC1_CLK, GPIO_CFG_6MA}, | |
+ {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA}, | |
+ {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA} | |
+}; | |
+ | |
+static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = { | |
+ {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA}, | |
+ {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA}, | |
+ {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA} | |
+}; | |
+ | |
+static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = { | |
+ {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL}, | |
+ {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP}, | |
+ {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP} | |
+}; | |
+ | |
+static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = { | |
+ {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL}, | |
+ {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP}, | |
+ {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP} | |
+}; | |
+ | |
+static struct msm_mmc_pad_drv sdc3_pad_drv_on_cfg[] = { | |
+ {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA}, | |
+ {TLMM_HDRV_SDC3_CMD, GPIO_CFG_6MA}, | |
+ {TLMM_HDRV_SDC3_DATA, GPIO_CFG_6MA} | |
+}; | |
+ | |
+static struct msm_mmc_pad_drv sdc3_pad_drv_off_cfg[] = { | |
+ {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA}, | |
+ {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA}, | |
+ {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA} | |
+}; | |
+ | |
+static struct msm_mmc_pad_pull sdc3_pad_pull_on_cfg[] = { | |
+ {TLMM_PULL_SDC3_CLK, GPIO_CFG_NO_PULL}, | |
+ {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP}, | |
+ {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP} | |
+}; | |
+ | |
+static struct msm_mmc_pad_pull sdc3_pad_pull_off_cfg[] = { | |
+ {TLMM_PULL_SDC3_CLK, GPIO_CFG_NO_PULL}, | |
+ {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP}, | |
+ {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP} | |
+}; | |
+ | |
+static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = { | |
+ [SDCC1] = { | |
+ .on = sdc1_pad_pull_on_cfg, | |
+ .off = sdc1_pad_pull_off_cfg, | |
+ .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg) | |
+ }, | |
+ [SDCC3] = { | |
+ .on = sdc3_pad_pull_on_cfg, | |
+ .off = sdc3_pad_pull_off_cfg, | |
+ .size = ARRAY_SIZE(sdc3_pad_pull_on_cfg) | |
+ }, | |
+}; | |
+ | |
+static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = { | |
+ [SDCC1] = { | |
+ .on = sdc1_pad_drv_on_cfg, | |
+ .off = sdc1_pad_drv_off_cfg, | |
+ .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg) | |
+ }, | |
+ [SDCC3] = { | |
+ .on = sdc3_pad_drv_on_cfg, | |
+ .off = sdc3_pad_drv_off_cfg, | |
+ .size = ARRAY_SIZE(sdc3_pad_drv_on_cfg) | |
+ }, | |
+}; | |
+ | |
+static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = { | |
+ [SDCC1] = { | |
+ .pull = &mmc_pad_pull_data[SDCC1], | |
+ .drv = &mmc_pad_drv_data[SDCC1] | |
+ }, | |
+ [SDCC3] = { | |
+ .pull = &mmc_pad_pull_data[SDCC3], | |
+ .drv = &mmc_pad_drv_data[SDCC3] | |
+ }, | |
+}; | |
+ | |
+static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = { | |
+ [SDCC1] = { | |
+ .pad_data = &mmc_pad_data[SDCC1], | |
+ }, | |
+ [SDCC3] = { | |
+ .pad_data = &mmc_pad_data[SDCC3], | |
+ }, | |
+}; | |
+ | |
+#define MSM_MPM_PIN_SDC1_DAT1 17 | |
+#define MSM_MPM_PIN_SDC3_DAT1 21 | |
+ | |
+#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
+static unsigned int sdc1_sup_clk_rates[] = { | |
+ 400000, 24000000, 48000000, 96000000 | |
+}; | |
+ | |
+static unsigned int dlxj_sdc1_slot_type = MMC_TYPE_MMC; | |
+static struct mmc_platform_data sdc1_data = { | |
+ .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
+#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT | |
+ .mmc_bus_width = MMC_CAP_8_BIT_DATA, | |
+#else | |
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
+#endif | |
+ .sup_clk_table = sdc1_sup_clk_rates, | |
+ .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates), | |
+ .slot_type = &dlxj_sdc1_slot_type, | |
+ .pin_data = &mmc_slot_pin_data[SDCC1], | |
+ .vreg_data = &mmc_slot_vreg_data[SDCC1], | |
+ .nonremovable = 1, | |
+ .hc_erase_group_def =1, | |
+ .uhs_caps = MMC_CAP_1_8V_DDR | MMC_CAP_UHS_DDR50, | |
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC1_DAT1, | |
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data, | |
+ .bkops_support = 1, | |
+ .prealloc_size = 6 * 1024 * 1024, | |
+}; | |
+static struct mmc_platform_data *impression_j_sdc1_pdata = &sdc1_data; | |
+#else | |
+static struct mmc_platform_data *impression_j_sdc1_pdata; | |
+#endif | |
+ | |
+#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
+static unsigned int sdc3_sup_clk_rates[] = { | |
+ 400000, 24000000, 48000000, 96000000, 192000000 | |
+}; | |
+ | |
+static unsigned int imnj_sdc3_slot_type = MMC_TYPE_SD; | |
+static struct mmc_platform_data sdc3_data = { | |
+ .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
+ .sup_clk_table = sdc3_sup_clk_rates, | |
+ .sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates), | |
+ .pin_data = &mmc_slot_pin_data[SDCC3], | |
+ .vreg_data = &mmc_slot_vreg_data[SDCC3], | |
+ .status_gpio = PM8921_GPIO_PM_TO_SYS(SDC3_CDz), | |
+ .status_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, SDC3_CDz), | |
+ .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | |
+ .is_status_gpio_active_low = 1, | |
+ .slot_type = &imnj_sdc3_slot_type, | |
+#if 0 | |
+ .xpc_cap = 1, | |
+ .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | | |
+ MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 | | |
+ MMC_CAP_UHS_SDR104 | MMC_CAP_MAX_CURRENT_800), | |
+#endif | |
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data, | |
+}; | |
+static struct mmc_platform_data *impression_j_sdc3_pdata = &sdc3_data; | |
+#else | |
+static struct mmc_platform_data *impression_j_sdc3_pdata; | |
+#endif | |
+ | |
+#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \ | |
+ _func, _inv, _disable) \ | |
+{ \ | |
+ .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \ | |
+ .config = { \ | |
+ .direction = _dir, \ | |
+ .output_buffer = _buf, \ | |
+ .output_value = _val, \ | |
+ .pull = _pull, \ | |
+ .vin_sel = _vin, \ | |
+ .out_strength = _out_strength, \ | |
+ .function = _func, \ | |
+ .inv_int_pol = _inv, \ | |
+ .disable_pin = _disable, \ | |
+ } \ | |
+} | |
+ | |
+struct pm8xxx_gpio_init { | |
+ unsigned gpio; | |
+ struct pm_gpio config; | |
+}; | |
+ | |
+static struct pm8xxx_gpio_init wifi_on_pm_gpio_table[] = { | |
+ PM8XXX_GPIO_INIT(WL_HOST_WAKE, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static struct pm8xxx_gpio_init wifi_off_pm_gpio_table[] = { | |
+ PM8XXX_GPIO_INIT(WL_HOST_WAKE, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_DN, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static struct pm8xxx_gpio_init wl_reg_on_gpio = | |
+ PM8XXX_GPIO_INIT(WL_REG_ON, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0); | |
+ | |
+static struct pm8xxx_gpio_init wl_dev_wake_gpio = | |
+ PM8XXX_GPIO_INIT(WL_DEV_WAKE, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0); | |
+ | |
+static void config_pm_gpio_table(struct pm8xxx_gpio_init *table, int len) | |
+{ | |
+ int n, rc; | |
+ for (n = 0; n < len; n++) { | |
+ rc = pm8xxx_gpio_config(table[n].gpio, &table[n].config); | |
+ if (rc) { | |
+ pr_err("%s: pm8xxx_gpio_config(%u)=%d\n", __func__, table[n].gpio, rc); | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static uint32_t wifi_on_gpio_table[] = { | |
+ GPIO_CFG(WIFI_SD_D3, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_D2, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_D1, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_D0, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_CMD, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_CLK, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+}; | |
+ | |
+static uint32_t wifi_off_gpio_table[] = { | |
+ GPIO_CFG(WIFI_SD_D3, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_D2, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_D1, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_D0, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_CMD, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(WIFI_SD_CLK, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+}; | |
+ | |
+static void config_gpio_table(uint32_t *table, int len) | |
+{ | |
+ int n, rc; | |
+ for (n = 0; n < len; n++) { | |
+ rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE); | |
+ if (rc) { | |
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n", __func__, table[n], rc); | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static struct embedded_sdio_data impression_j_wifi_emb_data = { | |
+ .cccr = { | |
+ .sdio_vsn = 2, | |
+ .multi_block = 1, | |
+ .low_speed = 0, | |
+ .wide_bus = 0, | |
+ .high_power = 1, | |
+ .high_speed = 1, | |
+ } | |
+}; | |
+ | |
+static void (*wifi_status_cb)(int card_present, void *dev_id); | |
+static void *wifi_status_cb_devid; | |
+ | |
+static int | |
+impression_j_wifi_status_register(void (*callback)(int card_present, void *dev_id), | |
+ void *dev_id) | |
+{ | |
+ if (wifi_status_cb) | |
+ return -EAGAIN; | |
+ | |
+ wifi_status_cb = callback; | |
+ wifi_status_cb_devid = dev_id; | |
+ return 0; | |
+} | |
+ | |
+static int impression_j_wifi_cd; | |
+ | |
+static unsigned int impression_j_wifi_status(struct device *dev) | |
+{ | |
+ return impression_j_wifi_cd; | |
+} | |
+ | |
+static unsigned int impression_j_wifislot_type = MMC_TYPE_SDIO_WIFI; | |
+static unsigned int wifi_sup_clk_rates[] = { | |
+ 400000, 24000000, 48000000 | |
+}; | |
+static struct mmc_platform_data impression_j_wifi_data = { | |
+ .ocr_mask = MMC_VDD_28_29, | |
+ .status = impression_j_wifi_status, | |
+ .register_status_notify = impression_j_wifi_status_register, | |
+ .embedded_sdio = &impression_j_wifi_emb_data, | |
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
+ .slot_type = &impression_j_wifislot_type, | |
+ .sup_clk_table = wifi_sup_clk_rates, | |
+ .sup_clk_cnt = ARRAY_SIZE(wifi_sup_clk_rates), | |
+ .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | | |
+ MMC_CAP_UHS_SDR50), | |
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data, | |
+ .nonremovable = 0, | |
+}; | |
+ | |
+ | |
+int impression_j_wifi_set_carddetect(int val) | |
+{ | |
+ printk(KERN_INFO "%s: %d\n", __func__, val); | |
+ impression_j_wifi_cd = val; | |
+ if (wifi_status_cb) | |
+ wifi_status_cb(val, wifi_status_cb_devid); | |
+ else | |
+ printk(KERN_WARNING "%s: Nobody to notify\n", __func__); | |
+ return 0; | |
+} | |
+EXPORT_SYMBOL(impression_j_wifi_set_carddetect); | |
+ | |
+#define BIT_HDRIV_PULL_NO 0 | |
+#define BIT_HDRIV_PULL_DOWN 1 | |
+#define BIT_HDRIV_PULL_KEEP 2 | |
+#define BIT_HDRIV_PULL_UP 3 | |
+#define HDRIV_STR_2MA 0 | |
+#define HDRIV_STR_4MA 1 | |
+#define HDRIV_STR_6MA 2 | |
+#define HDRIV_STR_8MA 3 | |
+#define HDRIV_STR_10MA 4 | |
+#define HDRIV_STR_12MA 5 | |
+#define HDRIV_STR_14MA 6 | |
+#define HDRIV_STR_16MA 7 | |
+#define HDRV_SDC_CMD_PULL_SHIFT 11 | |
+#define HDRV_SDC_DATA_PULL_SHIFT 9 | |
+#define HDRV_SDC_CLK_HDRV_SHIFT 6 | |
+#define HDRV_SDC_CMD_HDRV_SHIFT 3 | |
+#define HDRV_SDC_DATA_HDRV_SHIFT 0 | |
+ | |
+int sdc_pad_gpio_config(unsigned int pad_addr, unsigned cmd_pull, unsigned data_pull, unsigned clk_str, unsigned cmd_str, unsigned data_str) | |
+{ | |
+ unsigned long value = 0x0; | |
+ value = (cmd_pull << HDRV_SDC_CMD_PULL_SHIFT) | \ | |
+ (data_pull << HDRV_SDC_DATA_PULL_SHIFT)| \ | |
+ (clk_str << HDRV_SDC_CLK_HDRV_SHIFT) | \ | |
+ (cmd_str << HDRV_SDC_CMD_HDRV_SHIFT) | \ | |
+ (data_str << HDRV_SDC_DATA_HDRV_SHIFT); | |
+ | |
+ writel(value, pad_addr); | |
+ return 1; | |
+} | |
+ | |
+int impression_j_wifi_power(int on) | |
+{ | |
+ printk(KERN_INFO "%s: %d\n", __func__, on); | |
+ | |
+ if (on) { | |
+ config_gpio_table(wifi_on_gpio_table, | |
+ ARRAY_SIZE(wifi_on_gpio_table)); | |
+ config_pm_gpio_table(wifi_on_pm_gpio_table, | |
+ ARRAY_SIZE(wifi_on_pm_gpio_table)); | |
+ } else { | |
+ config_gpio_table(wifi_off_gpio_table, | |
+ ARRAY_SIZE(wifi_off_gpio_table)); | |
+ config_pm_gpio_table(wifi_off_pm_gpio_table, | |
+ ARRAY_SIZE(wifi_off_pm_gpio_table)); | |
+ } | |
+ | |
+ mdelay(1); | |
+ wl_reg_on_gpio.config.output_value = on? 1: 0; | |
+ pm8xxx_gpio_config(wl_reg_on_gpio.gpio, &wl_reg_on_gpio.config); | |
+ | |
+ mdelay(1); | |
+ wl_dev_wake_gpio.config.output_value = on? 1: 0; | |
+ pm8xxx_gpio_config(wl_dev_wake_gpio.gpio, &wl_dev_wake_gpio.config); | |
+ | |
+ mdelay(120); | |
+ return 0; | |
+} | |
+EXPORT_SYMBOL(impression_j_wifi_power); | |
+ | |
+int impression_j_wifi_reset(int on) | |
+{ | |
+ printk(KERN_INFO "%s: do nothing\n", __func__); | |
+ return 0; | |
+} | |
+ | |
+extern uint32_t msm_rpm_get_swfi_latency(void); | |
+ | |
+void __init impression_j_init_mmc(void) | |
+{ | |
+ wifi_status_cb = NULL; | |
+ | |
+ printk(KERN_INFO "impression_j: %s\n", __func__); | |
+ | |
+ | |
+ wl_reg_on_gpio.config.output_value = 0; | |
+ pm8xxx_gpio_config(wl_reg_on_gpio.gpio, &wl_reg_on_gpio.config); | |
+ | |
+ wl_dev_wake_gpio.config.output_value = 0; | |
+ pm8xxx_gpio_config(wl_dev_wake_gpio.gpio, &wl_dev_wake_gpio.config); | |
+ | |
+ | |
+ impression_j_wifi_data.cpu_dma_latency = msm_rpm_get_swfi_latency(); | |
+ | |
+ apq8064_add_sdcc(1, impression_j_sdc1_pdata); | |
+ apq8064_add_sdcc(3, impression_j_sdc3_pdata); | |
+ apq8064_add_sdcc(4, &impression_j_wifi_data); | |
+ apq8064_add_uio(); | |
+} | |
diff --git arch/arm/mach-msm/board-impression_j-wifi.c arch/arm/mach-msm/board-impression_j-wifi.c | |
new file mode 100644 | |
index 0000000..6c79ade | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-wifi.c | |
@@ -0,0 +1,311 @@ | |
+#include <linux/kernel.h> | |
+#include <linux/init.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/delay.h> | |
+#include <linux/err.h> | |
+#include <asm/mach-types.h> | |
+#include <asm/gpio.h> | |
+#include <asm/io.h> | |
+#include <linux/skbuff.h> | |
+#include <linux/wifi_tiwlan.h> | |
+#include <mach/msm_bus_board.h> | |
+ | |
+#include "board-impression_j.h" | |
+#include "board-impression_j-wifi.h" | |
+ | |
+int impression_j_wifi_power(int on); | |
+int impression_j_wifi_reset(int on); | |
+int impression_j_wifi_set_carddetect(int on); | |
+int impression_j_wifi_get_mac_addr(unsigned char *buf); | |
+ | |
+#define PREALLOC_WLAN_NUMBER_OF_SECTIONS 4 | |
+#define PREALLOC_WLAN_NUMBER_OF_BUFFERS 160 | |
+#define PREALLOC_WLAN_SECTION_HEADER 24 | |
+ | |
+#define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_NUMBER_OF_BUFFERS * 128) | |
+#define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_NUMBER_OF_BUFFERS * 128) | |
+#define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_NUMBER_OF_BUFFERS * 512) | |
+#define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_NUMBER_OF_BUFFERS * 1024) | |
+ | |
+#define WLAN_SKB_BUF_NUM 16 | |
+ | |
+#define HW_OOB 1 | |
+ | |
+static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM]; | |
+ | |
+typedef struct wifi_mem_prealloc_struct { | |
+ void *mem_ptr; | |
+ unsigned long size; | |
+} wifi_mem_prealloc_t; | |
+ | |
+static wifi_mem_prealloc_t wifi_mem_array[PREALLOC_WLAN_NUMBER_OF_SECTIONS] = { | |
+ { NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER) }, | |
+ { NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER) }, | |
+ { NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER) }, | |
+ { NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER) } | |
+}; | |
+ | |
+static void *impression_j_wifi_mem_prealloc(int section, unsigned long size) | |
+{ | |
+ if (section == PREALLOC_WLAN_NUMBER_OF_SECTIONS) | |
+ return wlan_static_skb; | |
+ if ((section < 0) || (section > PREALLOC_WLAN_NUMBER_OF_SECTIONS)) | |
+ return NULL; | |
+ if (wifi_mem_array[section].size < size) | |
+ return NULL; | |
+ return wifi_mem_array[section].mem_ptr; | |
+} | |
+ | |
+int __init impression_j_init_wifi_mem(void) | |
+{ | |
+ int i; | |
+ | |
+ for (i = 0; (i < WLAN_SKB_BUF_NUM); i++) { | |
+ if (i < (WLAN_SKB_BUF_NUM/2)) | |
+ wlan_static_skb[i] = dev_alloc_skb(PAGE_SIZE*2); | |
+ else | |
+ wlan_static_skb[i] = dev_alloc_skb(PAGE_SIZE*4); | |
+ } | |
+ for (i = 0; (i < PREALLOC_WLAN_NUMBER_OF_SECTIONS); i++) { | |
+ wifi_mem_array[i].mem_ptr = kmalloc(wifi_mem_array[i].size, | |
+ GFP_KERNEL); | |
+ if (wifi_mem_array[i].mem_ptr == NULL) | |
+ return -ENOMEM; | |
+ } | |
+ return 0; | |
+} | |
+ | |
+static struct resource impression_j_wifi_resources[] = { | |
+ [0] = { | |
+ .name = "bcmdhd_wlan_irq", | |
+ .start = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, WL_HOST_WAKE), | |
+ .end = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, WL_HOST_WAKE), | |
+#ifdef HW_OOB | |
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | IORESOURCE_IRQ_SHAREABLE, | |
+#else | |
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
+#endif | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors wlan_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors wlan_max_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 60000000, | |
+ .ib = 960000000, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths wlan_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(wlan_init_vectors), | |
+ wlan_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(wlan_max_vectors), | |
+ wlan_max_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata wlan_bus_scale_pdata = { | |
+ wlan_bus_scale_usecases, | |
+ ARRAY_SIZE(wlan_bus_scale_usecases), | |
+ .name = "wlan", | |
+}; | |
+ | |
+static struct wifi_platform_data impression_j_wifi_control = { | |
+ .set_power = impression_j_wifi_power, | |
+ .set_reset = impression_j_wifi_reset, | |
+ .set_carddetect = impression_j_wifi_set_carddetect, | |
+ .mem_prealloc = impression_j_wifi_mem_prealloc, | |
+ .get_mac_addr = impression_j_wifi_get_mac_addr, | |
+ .bus_scale_table = &wlan_bus_scale_pdata, | |
+}; | |
+ | |
+static struct platform_device impression_j_wifi_device = { | |
+ .name = "bcmdhd_wlan", | |
+ .id = 1, | |
+ .num_resources = ARRAY_SIZE(impression_j_wifi_resources), | |
+ .resource = impression_j_wifi_resources, | |
+ .dev = { | |
+ .platform_data = &impression_j_wifi_control, | |
+ }, | |
+}; | |
+ | |
+static unsigned impression_j_wifi_update_nvs(char *str) | |
+{ | |
+#define NVS_LEN_OFFSET 0x0C | |
+#define NVS_DATA_OFFSET 0x40 | |
+ unsigned char *ptr; | |
+ unsigned len; | |
+ | |
+ if (!str) | |
+ return -EINVAL; | |
+ ptr = get_wifi_nvs_ram(); | |
+ | |
+ memcpy(&len, ptr + NVS_LEN_OFFSET, sizeof(len)); | |
+ | |
+ | |
+ if (ptr[NVS_DATA_OFFSET + len - 1] == 0) | |
+ len -= 1; | |
+ | |
+ if (ptr[NVS_DATA_OFFSET + len - 1] != '\n') { | |
+ len += 1; | |
+ ptr[NVS_DATA_OFFSET + len - 1] = '\n'; | |
+ } | |
+ | |
+ strcpy(ptr + NVS_DATA_OFFSET + len, str); | |
+ len += strlen(str); | |
+ memcpy(ptr + NVS_LEN_OFFSET, &len, sizeof(len)); | |
+ return 0; | |
+} | |
+ | |
+#ifdef HW_OOB | |
+static unsigned strip_nvs_param(char *param) | |
+{ | |
+ unsigned char *nvs_data; | |
+ | |
+ unsigned param_len; | |
+ int start_idx, end_idx; | |
+ | |
+ unsigned char *ptr; | |
+ unsigned len; | |
+ | |
+ if (!param) | |
+ return -EINVAL; | |
+ ptr = get_wifi_nvs_ram(); | |
+ | |
+ memcpy(&len, ptr + NVS_LEN_OFFSET, sizeof(len)); | |
+ | |
+ | |
+ if (ptr[NVS_DATA_OFFSET + len - 1] == 0) | |
+ len -= 1; | |
+ | |
+ nvs_data = ptr + NVS_DATA_OFFSET; | |
+ | |
+ param_len = strlen(param); | |
+ | |
+ | |
+ for (start_idx = 0; start_idx < len - param_len; start_idx++) { | |
+ if (memcmp(&nvs_data[start_idx], param, param_len) == 0) | |
+ break; | |
+ } | |
+ | |
+ end_idx = 0; | |
+ if (start_idx < len - param_len) { | |
+ | |
+ for (end_idx = start_idx + param_len; end_idx < len; end_idx++) { | |
+ if (nvs_data[end_idx] == '\n' || nvs_data[end_idx] == 0) | |
+ break; | |
+ } | |
+ } | |
+ | |
+ if (start_idx < end_idx) { | |
+ | |
+ for (; end_idx + 1 < len; start_idx++, end_idx++) | |
+ nvs_data[start_idx] = nvs_data[end_idx+1]; | |
+ | |
+ len = len - (end_idx - start_idx + 1); | |
+ memcpy(ptr + NVS_LEN_OFFSET, &len, sizeof(len)); | |
+ } | |
+ return 0; | |
+} | |
+#endif | |
+ | |
+#define WIFI_MAC_PARAM_STR "macaddr=" | |
+#define WIFI_MAX_MAC_LEN 17 | |
+ | |
+static uint | |
+get_mac_from_wifi_nvs_ram(char *buf, unsigned int buf_len) | |
+{ | |
+ unsigned char *nvs_ptr; | |
+ unsigned char *mac_ptr; | |
+ uint len = 0; | |
+ | |
+ if (!buf || !buf_len) | |
+ return 0; | |
+ | |
+ nvs_ptr = get_wifi_nvs_ram(); | |
+ if (nvs_ptr) | |
+ nvs_ptr += NVS_DATA_OFFSET; | |
+ | |
+ mac_ptr = strstr(nvs_ptr, WIFI_MAC_PARAM_STR); | |
+ if (mac_ptr) { | |
+ mac_ptr += strlen(WIFI_MAC_PARAM_STR); | |
+ | |
+ | |
+ while (mac_ptr[0] == ' ') | |
+ mac_ptr++; | |
+ | |
+ | |
+ len = 0; | |
+ while (mac_ptr[len] != '\r' && mac_ptr[len] != '\n' && | |
+ mac_ptr[len] != '\0') { | |
+ len++; | |
+ } | |
+ | |
+ if (len > buf_len) | |
+ len = buf_len; | |
+ | |
+ memcpy(buf, mac_ptr, len); | |
+ } | |
+ | |
+ return len; | |
+} | |
+ | |
+#define ETHER_ADDR_LEN 6 | |
+int impression_j_wifi_get_mac_addr(unsigned char *buf) | |
+{ | |
+ static u8 ether_mac_addr[] = {0x00, 0x11, 0x22, 0x33, 0x44, 0xFF}; | |
+ char mac[WIFI_MAX_MAC_LEN]; | |
+ unsigned mac_len; | |
+ unsigned int macpattern[ETHER_ADDR_LEN]; | |
+ int i; | |
+ | |
+ mac_len = get_mac_from_wifi_nvs_ram(mac, WIFI_MAX_MAC_LEN); | |
+ if (mac_len > 0) { | |
+ | |
+ sscanf(mac, "%02x:%02x:%02x:%02x:%02x:%02x", | |
+ &macpattern[0], &macpattern[1], &macpattern[2], | |
+ &macpattern[3], &macpattern[4], &macpattern[5] | |
+ ); | |
+ | |
+ for (i = 0; i < ETHER_ADDR_LEN; i++) | |
+ ether_mac_addr[i] = (u8)macpattern[i]; | |
+ } | |
+ | |
+ memcpy(buf, ether_mac_addr, sizeof(ether_mac_addr)); | |
+ | |
+ printk(KERN_INFO"impression_j_wifi_get_mac_addr = %02x %02x %02x %02x %02x %02x \n", | |
+ ether_mac_addr[0], ether_mac_addr[1], ether_mac_addr[2], ether_mac_addr[3], ether_mac_addr[4], ether_mac_addr[5]); | |
+ | |
+ return 0; | |
+} | |
+ | |
+int __init impression_j_wifi_init(void) | |
+{ | |
+ int ret; | |
+ | |
+ printk(KERN_INFO "%s: start\n", __func__); | |
+#ifdef HW_OOB | |
+ strip_nvs_param("sd_oobonly"); | |
+#else | |
+ impression_j_wifi_update_nvs("sd_oobonly=1\n"); | |
+#endif | |
+ impression_j_wifi_update_nvs("btc_params80=0\n"); | |
+ impression_j_wifi_update_nvs("btc_params6=30\n"); | |
+ impression_j_init_wifi_mem(); | |
+ ret = platform_device_register(&impression_j_wifi_device); | |
+ return ret; | |
+} | |
+ | |
diff --git arch/arm/mach-msm/board-impression_j-wifi.h arch/arm/mach-msm/board-impression_j-wifi.h | |
new file mode 100644 | |
index 0000000..c6c19ba | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j-wifi.h | |
@@ -0,0 +1,15 @@ | |
+/* linux/arch/arm/mach-msm/board-impression_j-wifi.h | |
+ * | |
+ * Copyright (C) 2008 HTC Corporation. | |
+ * | |
+ * This software is licensed under the terms of the GNU General Public | |
+ * License version 2, as published by the Free Software Foundation, and | |
+ * may be copied, distributed, and modified under those terms. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ */ | |
+ | |
+extern unsigned char *get_wifi_nvs_ram(void); | |
diff --git arch/arm/mach-msm/board-impression_j.c arch/arm/mach-msm/board-impression_j.c | |
new file mode 100644 | |
index 0000000..4ad0a34 | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j.c | |
@@ -0,0 +1,5783 @@ | |
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+#include <linux/kernel.h> | |
+#include <linux/platform_device.h> | |
+#include <linux/io.h> | |
+#include <linux/irq.h> | |
+#include <linux/i2c.h> | |
+#include <linux/mpu.h> | |
+#include <linux/r3gd20.h> | |
+#include <linux/akm8963.h> | |
+#include <linux/bma250.h> | |
+#include <linux/slimbus/slimbus.h> | |
+#include <linux/mfd/wcd9xxx/core.h> | |
+#include <linux/mfd/wcd9xxx/pdata.h> | |
+#include <linux/mfd/pm8xxx/misc.h> | |
+#include <linux/msm_ssbi.h> | |
+#include <linux/spi/spi.h> | |
+#include <linux/dma-contiguous.h> | |
+#include <linux/dma-mapping.h> | |
+#include <linux/platform_data/qcom_crypto_device.h> | |
+#include <linux/msm_ion.h> | |
+#include <linux/memory.h> | |
+#include <linux/memblock.h> | |
+#include <linux/msm_thermal.h> | |
+#include <linux/i2c/atmel_mxt_ts.h> | |
+#include <linux/cyttsp.h> | |
+#include <linux/i2c/isa1200.h> | |
+#include <linux/gpio_keys.h> | |
+#include <linux/proc_fs.h> | |
+#include <asm/mach-types.h> | |
+#include <asm/mach/arch.h> | |
+#include <asm/hardware/gic.h> | |
+#include <asm/mach/mmc.h> | |
+#include <linux/platform_data/qcom_wcnss_device.h> | |
+#include <linux/synaptics_i2c_rmi.h> | |
+#include <linux/max11871.h> | |
+#include <linux/htc_flashlight.h> | |
+#include <mach/board.h> | |
+#include <mach/restart.h> | |
+#include <mach/msm_iomap.h> | |
+#include <mach/ion.h> | |
+ | |
+#include <linux/usb/msm_hsusb.h> | |
+#include <mach/htc_usb.h> | |
+#include <linux/usb/android_composite.h> | |
+#include <mach/socinfo.h> | |
+#include <mach/msm_spi.h> | |
+#include "timer.h" | |
+#include "devices.h" | |
+#include <mach/gpio.h> | |
+#include <mach/gpiomux.h> | |
+#include <mach/rpm.h> | |
+#ifdef CONFIG_ANDROID_PMEM | |
+#include <linux/android_pmem.h> | |
+#endif | |
+#include <mach/msm_memtypes.h> | |
+#include <linux/bootmem.h> | |
+#include <asm/setup.h> | |
+#include <mach/dma.h> | |
+#include <mach/msm_dsps.h> | |
+#include <mach/msm_bus_board.h> | |
+#include <mach/cpuidle.h> | |
+#include <mach/mdm2.h> | |
+#include <linux/msm_tsens.h> | |
+#include <mach/msm_xo.h> | |
+#include <mach/msm_rtb.h> | |
+#include <linux/fmem.h> | |
+#include <mach/htc_headset_mgr.h> | |
+#include <mach/htc_headset_pmic.h> | |
+#include <mach/htc_headset_one_wire.h> | |
+#include <mach/htc_ramdump.h> | |
+ | |
+#ifdef CONFIG_PERFLOCK | |
+#include <mach/perflock.h> | |
+#endif | |
+ | |
+ | |
+#ifdef CONFIG_BT | |
+#include <mach/msm_serial_hs.h> | |
+#include <mach/htc_bdaddress.h> | |
+#endif | |
+ | |
+#include <mach/msm_watchdog.h> | |
+#include "board-impression_j.h" | |
+#include "acpuclock.h" | |
+#include "spm.h" | |
+#include <mach/mpm.h> | |
+#include "rpm_resources.h" | |
+#include "pm.h" | |
+#include "pm-boot.h" | |
+#include <mach/board_htc.h> | |
+#include <mach/htc_util.h> | |
+#include <mach/cable_detect.h> | |
+#include "devices-msm8x60.h" | |
+#include <linux/cm3629.h> | |
+#include <linux/pn544.h> | |
+#include <mach/tfa9887.h> | |
+#include <mach/tpa6185.h> | |
+#include <mach/rt5501.h> | |
+#include <mach/ADP5585_ioextender.h> | |
+#include <linux/leds.h> | |
+#include <linux/leds-lp5521_htc.h> | |
+#ifdef CONFIG_HTC_BATT_8960 | |
+#include "mach/htc_battery_8960.h" | |
+#include "mach/htc_battery_cell.h" | |
+#include "linux/mfd/pm8xxx/pm8921-charger.h" | |
+#endif | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+#include "linux/i2c/smb349.h" | |
+#endif | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+#include <mach/mhl.h> | |
+#endif | |
+ | |
+#ifdef CONFIG_TSIF | |
+#include <mach/msm_tsif.h> | |
+#endif | |
+ | |
+#ifdef CONFIG_SUPPORT_USB_SPEAKER | |
+#include <linux/pm_qos.h> | |
+#endif | |
+#if defined(CONFIG_SERIAL_IRDA) || defined(CONFIG_SERIAL_CIR) | |
+#include <linux/htc_irda.h> | |
+#endif | |
+ | |
+ | |
+#define MSM_PMEM_ADSP_SIZE 0x4700000 | |
+#define MSM_PMEM_AUDIO_SIZE 0x4CF000 | |
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY | |
+#define MSM_PMEM_SIZE 0x4000000 | |
+#else | |
+#define MSM_PMEM_SIZE 0x4000000 | |
+#endif | |
+ | |
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+#define HOLE_SIZE 0x20000 | |
+#ifdef CONFIG_MSM_IOMMU | |
+#define MSM_PMEM_KERNEL_EBI1_SIZE 0x280000 | |
+#else | |
+#define MSM_PMEM_KERNEL_EBI1_SIZE 0x6400000 | |
+#endif | |
+ | |
+#define MSM_ION_MM_FW_SIZE (0x200000 - HOLE_SIZE) | |
+#define MSM_ION_MM_SIZE MSM_PMEM_ADSP_SIZE | |
+#define MSM_ION_QSECOM_SIZE 0x600000 | |
+#define MSM_ION_MFC_SIZE SZ_8K | |
+#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE | |
+#define MSM_ION_HEAP_NUM 7 | |
+#else | |
+#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000 | |
+#define MSM_ION_HEAP_NUM 1 | |
+#endif | |
+ | |
+#define APQ8064_FIXED_AREA_START (0xa0000000 - (MSM_ION_MM_FW_SIZE + HOLE_SIZE)) | |
+#define MAX_FIXED_AREA_SIZE 0x10000000 | |
+#define MSM_MM_FW_SIZE (0x200000 - HOLE_SIZE) | |
+#define APQ8064_FW_START APQ8064_FIXED_AREA_START | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+static int hdmi_enable_5v(int on); | |
+static int hdmi_core_power(int on, int show); | |
+extern void hdmi_hpd_feature(int enable); | |
+#endif | |
+ | |
+#ifdef CONFIG_FELICA_CXD2235_DD | |
+#include <linux/platform_device.h> | |
+#include <linux/felica_cxd2235.h> | |
+#endif | |
+ | |
+#define TFA9887_I2C_SLAVE_ADDR (0x68 >> 1) | |
+#define TPA6185_I2C_SLAVE_ADDR (0xC6 >> 1) | |
+#define RT5501_I2C_SLAVE_ADDR (0xF0 >> 1) | |
+ | |
+#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \ | |
+ _func, _inv, _disable) \ | |
+{ \ | |
+ .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \ | |
+ .config = { \ | |
+ .direction = _dir, \ | |
+ .output_buffer = _buf, \ | |
+ .output_value = _val, \ | |
+ .pull = _pull, \ | |
+ .vin_sel = _vin, \ | |
+ .out_strength = _out_strength, \ | |
+ .function = _func, \ | |
+ .inv_int_pol = _inv, \ | |
+ .disable_pin = _disable, \ | |
+ } \ | |
+} | |
+ | |
+struct pm8xxx_gpio_init { | |
+ unsigned gpio; | |
+ struct pm_gpio config; | |
+}; | |
+ | |
+struct tpa6185_platform_data tpa6185_data={ | |
+ .gpio_tpa6185_spk_en = PM8921_GPIO_PM_TO_SYS(10), | |
+ | |
+}; | |
+ | |
+struct rt5501_platform_data rt5501_data={ | |
+ .gpio_rt5501_spk_en = PM8921_GPIO_PM_TO_SYS(10), | |
+ | |
+}; | |
+ | |
+static struct i2c_board_info msm_i2c_gsbi1_tpa6185_info[] = { | |
+ { | |
+ I2C_BOARD_INFO(TPA6185_I2C_NAME, TPA6185_I2C_SLAVE_ADDR), | |
+ .platform_data = &tpa6185_data, | |
+ }, | |
+}; | |
+ | |
+ | |
+static struct i2c_board_info msm_i2c_gsbi1_rt5501_info[] = { | |
+ { | |
+ I2C_BOARD_INFO( RT5501_I2C_NAME, RT5501_I2C_SLAVE_ADDR), | |
+ .platform_data = &rt5501_data, | |
+ }, | |
+}; | |
+ | |
+static struct i2c_board_info msm_i2c_gsbi1_tfa9887_info[] = { | |
+ { | |
+ I2C_BOARD_INFO(TFA9887_I2C_NAME, TFA9887_I2C_SLAVE_ADDR) | |
+ }, | |
+}; | |
+ | |
+#define GPIO_EXPANDER_IRQ_BASE (PM8821_IRQ_BASE + PM8821_NR_IRQS) | |
+#define GPIO_EXPANDER_GPIO_BASE (PM8821_MPP_BASE + PM8821_NR_MPPS) | |
+#define GPIO_EPM_EXPANDER_BASE GPIO_EXPANDER_GPIO_BASE | |
+ | |
+#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) | |
+static struct platform_device nm32x_62x_tsi_device = { | |
+ .name = "nm32x_62x-tsi", | |
+}; | |
+ | |
+#endif | |
+ | |
+ | |
+enum { | |
+ SX150X_EPM, | |
+}; | |
+ | |
+#ifdef CONFIG_CPU_FREQ_GOV_ONDEMAND_2_PHASE | |
+int set_two_phase_freq(int cpufreq); | |
+#endif | |
+ | |
+#ifdef CONFIG_KERNEL_PMEM_EBI_REGION | |
+static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE; | |
+static int __init pmem_kernel_ebi1_size_setup(char *p) | |
+{ | |
+ pmem_kernel_ebi1_size = memparse(p, NULL); | |
+ return 0; | |
+} | |
+early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup); | |
+#endif | |
+ | |
+#ifdef CONFIG_ANDROID_PMEM | |
+static unsigned pmem_size = MSM_PMEM_SIZE; | |
+static int __init pmem_size_setup(char *p) | |
+{ | |
+ pmem_size = memparse(p, NULL); | |
+ return 0; | |
+} | |
+early_param("pmem_size", pmem_size_setup); | |
+ | |
+static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE; | |
+ | |
+static int __init pmem_adsp_size_setup(char *p) | |
+{ | |
+ pmem_adsp_size = memparse(p, NULL); | |
+ return 0; | |
+} | |
+early_param("pmem_adsp_size", pmem_adsp_size_setup); | |
+ | |
+static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE; | |
+ | |
+static int __init pmem_audio_size_setup(char *p) | |
+{ | |
+ pmem_audio_size = memparse(p, NULL); | |
+ return 0; | |
+} | |
+early_param("pmem_audio_size", pmem_audio_size_setup); | |
+#endif | |
+ | |
+#ifdef CONFIG_ANDROID_PMEM | |
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+static struct android_pmem_platform_data android_pmem_pdata = { | |
+ .name = "pmem", | |
+ .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING, | |
+ .cached = 1, | |
+ .memory_type = MEMTYPE_EBI1, | |
+}; | |
+ | |
+static struct platform_device impression_j_android_pmem_device = { | |
+ .name = "android_pmem", | |
+ .id = 0, | |
+ .dev = {.platform_data = &android_pmem_pdata}, | |
+}; | |
+ | |
+static struct android_pmem_platform_data android_pmem_adsp_pdata = { | |
+ .name = "pmem_adsp", | |
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
+ .cached = 0, | |
+ .memory_type = MEMTYPE_EBI1, | |
+}; | |
+static struct platform_device impression_j_android_pmem_adsp_device = { | |
+ .name = "android_pmem", | |
+ .id = 2, | |
+ .dev = { .platform_data = &android_pmem_adsp_pdata }, | |
+}; | |
+ | |
+ | |
+static struct android_pmem_platform_data impression_j_android_pmem_audio_pdata = { | |
+ .name = "pmem_audio", | |
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
+ .cached = 0, | |
+ .memory_type = MEMTYPE_EBI1, | |
+}; | |
+ | |
+static struct platform_device android_pmem_audio_device = { | |
+ .name = "android_pmem", | |
+ .id = 4, | |
+ .dev = { .platform_data = &android_pmem_audio_pdata }, | |
+}; | |
+#endif | |
+#endif | |
+ | |
+struct fmem_platform_data apq8064_fmem_pdata = { | |
+}; | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+static struct smb349_platform_data smb349_data = { | |
+ .chg_susp_gpio = 7, | |
+ .chg_current_ma = 0, | |
+ .chg_stat_gpio = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, CHARGER_STAT), | |
+}; | |
+ | |
+#ifdef CONFIG_SUPPORT_DQ_BATTERY | |
+static int __init check_dq_setup(char *str) | |
+{ | |
+ if (!strcmp(str, "PASS")) | |
+ smb349_data.dq_result = 1; | |
+ else | |
+ smb349_data.dq_result = 0; | |
+ | |
+ return 1; | |
+} | |
+__setup("androidboot.dq=", check_dq_setup); | |
+#endif | |
+ | |
+static struct i2c_board_info msm_smb_349_boardinfo[] __initdata = { | |
+ { | |
+ I2C_BOARD_INFO("smb349", 0xD4 >> 1), | |
+ .platform_data = &smb349_data, | |
+ }, | |
+}; | |
+ | |
+#endif | |
+ | |
+ | |
+static struct memtype_reserve apq8064_reserve_table[] __initdata = { | |
+ [MEMTYPE_SMI] = { | |
+ }, | |
+ [MEMTYPE_EBI0] = { | |
+ .flags = MEMTYPE_FLAGS_1M_ALIGN, | |
+ }, | |
+ [MEMTYPE_EBI1] = { | |
+ .flags = MEMTYPE_FLAGS_1M_ALIGN, | |
+ }, | |
+}; | |
+ | |
+#if defined(CONFIG_MSM_RTB) | |
+static struct msm_rtb_platform_data impression_j_rtb_pdata = { | |
+ .buffer_start_addr = MSM_RTB_PHYS, | |
+ .size = MSM_RTB_BUFFER_SIZE, | |
+}; | |
+ | |
+static int __init msm_rtb_set_buffer_size(char *p) | |
+{ | |
+ int s; | |
+ | |
+ s = memparse(p, NULL); | |
+ impression_j_rtb_pdata.size = ALIGN(s, SZ_4K); | |
+ return 0; | |
+} | |
+early_param("msm_rtb_size", msm_rtb_set_buffer_size); | |
+ | |
+ | |
+static struct platform_device impression_j_rtb_device = { | |
+ .name = "msm_rtb", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &impression_j_rtb_pdata, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_I2C | |
+#define MSM8064_GSBI2_QUP_I2C_BUS_ID 2 | |
+#define MSM8064_GSBI3_QUP_I2C_BUS_ID 3 | |
+ | |
+#ifdef CONFIG_VIDEO_NMI | |
+static struct i2c_board_info nmi625_i2c_info[] = { | |
+ { | |
+ I2C_BOARD_INFO("nmi625", 0x61), | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#endif | |
+ | |
+ | |
+static void __init size_pmem_devices(void) | |
+{ | |
+#ifdef CONFIG_ANDROID_PMEM | |
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+ android_pmem_adsp_pdata.size = pmem_adsp_size; | |
+ android_pmem_pdata.size = pmem_size; | |
+ android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE; | |
+#endif | |
+#endif | |
+} | |
+ | |
+#ifdef CONFIG_ANDROID_PMEM | |
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+static void __init reserve_memory_for(struct android_pmem_platform_data *p) | |
+{ | |
+ apq8064_reserve_table[p->memory_type].size += p->size; | |
+} | |
+#endif | |
+#endif | |
+ | |
+static void __init reserve_pmem_memory(void) | |
+{ | |
+#ifdef CONFIG_ANDROID_PMEM | |
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+ reserve_memory_for(&android_pmem_adsp_pdata); | |
+ reserve_memory_for(&android_pmem_pdata); | |
+ reserve_memory_for(&android_pmem_audio_pdata); | |
+#endif | |
+ apq8064_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size; | |
+#endif | |
+} | |
+ | |
+static int impression_j_paddr_to_memtype(unsigned int paddr) | |
+{ | |
+ return MEMTYPE_EBI1; | |
+} | |
+ | |
+#define FMEM_ENABLED 0 | |
+ | |
+#ifdef CONFIG_ION_MSM | |
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+static struct ion_cp_heap_pdata cp_mm_impression_j_ion_pdata = { | |
+ .permission_type = IPT_TYPE_MM_CARVEOUT, | |
+ .align = PAGE_SIZE, | |
+ .reusable = FMEM_ENABLED, | |
+ .mem_is_fmem = FMEM_ENABLED, | |
+ .fixed_position = FIXED_MIDDLE, | |
+}; | |
+ | |
+static struct ion_cp_heap_pdata cp_mfc_impression_j_ion_pdata = { | |
+ .permission_type = IPT_TYPE_MFC_SHAREDMEM, | |
+ .align = PAGE_SIZE, | |
+ .reusable = 0, | |
+ .mem_is_fmem = FMEM_ENABLED, | |
+ .fixed_position = FIXED_HIGH, | |
+}; | |
+ | |
+static struct ion_co_heap_pdata co_impression_j_ion_pdata = { | |
+ .adjacent_mem_id = INVALID_HEAP_ID, | |
+ .align = PAGE_SIZE, | |
+ .mem_is_fmem = 0, | |
+}; | |
+ | |
+static struct ion_co_heap_pdata fw_co_impression_j_ion_pdata = { | |
+ .adjacent_mem_id = ION_CP_MM_HEAP_ID, | |
+ .align = SZ_128K, | |
+ .mem_is_fmem = FMEM_ENABLED, | |
+ .fixed_position = FIXED_LOW, | |
+}; | |
+#endif | |
+ | |
+static u64 msm_dmamask = DMA_BIT_MASK(32); | |
+ | |
+static struct platform_device ion_mm_heap_device = { | |
+ .name = "ion-mm-heap-device", | |
+ .id = -1, | |
+ .dev = { | |
+ .dma_mask = &msm_dmamask, | |
+ .coherent_dma_mask = DMA_BIT_MASK(32), | |
+ } | |
+}; | |
+ | |
+#ifdef CONFIG_CMA | |
+static struct platform_device ion_adsp_heap_device = { | |
+ .name = "ion-adsp-heap-device", | |
+ .id = -1, | |
+ .dev = { | |
+ .dma_mask = &msm_dmamask, | |
+ .coherent_dma_mask = DMA_BIT_MASK(32), | |
+ } | |
+}; | |
+#endif | |
+ | |
+struct ion_platform_heap apq8064_heaps[] = { | |
+ { | |
+ .id = ION_SYSTEM_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_SYSTEM, | |
+ .name = ION_VMALLOC_HEAP_NAME, | |
+ }, | |
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+ { | |
+ .id = ION_CP_MM_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_CP, | |
+ .name = ION_MM_HEAP_NAME, | |
+ .size = MSM_ION_MM_SIZE, | |
+ .memory_type = ION_EBI_TYPE, | |
+ .extra_data = (void *) &cp_mm_impression_j_ion_pdata, | |
+ .priv = &ion_mm_heap_device.dev | |
+ }, | |
+ { | |
+ .id = ION_MM_FIRMWARE_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_CARVEOUT, | |
+ .name = ION_MM_FIRMWARE_HEAP_NAME, | |
+ .size = MSM_ION_MM_FW_SIZE, | |
+ .memory_type = ION_EBI_TYPE, | |
+ .extra_data = (void *) &fw_co_impression_j_ion_pdata, | |
+ }, | |
+ { | |
+ .id = ION_CP_MFC_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_CP, | |
+ .name = ION_MFC_HEAP_NAME, | |
+ .size = MSM_ION_MFC_SIZE, | |
+ .memory_type = ION_EBI_TYPE, | |
+ .extra_data = (void *) &cp_mfc_impression_j_ion_pdata, | |
+ }, | |
+#ifndef CONFIG_MSM_IOMMU | |
+ { | |
+ .id = ION_SF_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_CARVEOUT, | |
+ .name = ION_SF_HEAP_NAME, | |
+ .size = MSM_ION_SF_SIZE, | |
+ .memory_type = ION_EBI_TYPE, | |
+ .extra_data = (void *) &co_impression_j_ion_pdata, | |
+ }, | |
+#endif | |
+ { | |
+ .id = ION_IOMMU_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_IOMMU, | |
+ .name = ION_IOMMU_HEAP_NAME, | |
+ }, | |
+ { | |
+ .id = ION_QSECOM_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_CARVEOUT, | |
+ .name = ION_QSECOM_HEAP_NAME, | |
+ .size = MSM_ION_QSECOM_SIZE, | |
+ .memory_type = ION_EBI_TYPE, | |
+ .extra_data = (void *) &co_impression_j_ion_pdata, | |
+ }, | |
+ { | |
+ .id = ION_AUDIO_HEAP_ID, | |
+ .type = ION_HEAP_TYPE_CARVEOUT, | |
+ .name = ION_AUDIO_HEAP_NAME, | |
+ .size = MSM_ION_AUDIO_SIZE, | |
+ .memory_type = ION_EBI_TYPE, | |
+ .extra_data = (void *) &co_impression_j_ion_pdata, | |
+ }, | |
+#endif | |
+}; | |
+ | |
+static struct ion_platform_data apq8064_ion_pdata = { | |
+ .nr = MSM_ION_HEAP_NUM, | |
+ .heaps = apq8064_heaps, | |
+}; | |
+ | |
+static struct platform_device impression_j_ion_dev = { | |
+ .name = "ion-msm", | |
+ .id = 1, | |
+ .dev = { .platform_data = &apq8064_ion_pdata }, | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_TSIF | |
+ | |
+#define MSM_TSIF0_PHYS (0x18200000) | |
+#define MSM_TSIF1_PHYS (0x18201000) | |
+#define MSM_TSIF_SIZE (0x200) | |
+ | |
+#define TSIF_0_CLK GPIO_CFG(TS_CLK, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) | |
+#define TSIF_0_EN GPIO_CFG(TS_EN, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) | |
+#define TSIF_0_DATA GPIO_CFG(TS_DATA, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) | |
+#define TSIF_0_SYNC GPIO_CFG(TS_SYNC, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) | |
+ | |
+#define TSIF_1_CLK GPIO_CFG(TS_CLK, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA) | |
+#define TSIF_1_EN GPIO_CFG(TS_EN, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA) | |
+#define TSIF_1_DATA GPIO_CFG(TS_DATA, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA) | |
+#define TSIF_1_SYNC GPIO_CFG(TS_SYNC, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA) | |
+ | |
+static const struct msm_gpio tsif0_gpios[] = { | |
+}; | |
+ | |
+static const struct msm_gpio tsif1_gpios[] = { | |
+ { .gpio_cfg = TSIF_1_CLK, .label = "tsif_clk", }, | |
+ { .gpio_cfg = TSIF_1_EN, .label = "tsif_en", }, | |
+ { .gpio_cfg = TSIF_1_DATA, .label = "tsif_data", }, | |
+ { .gpio_cfg = TSIF_1_SYNC, .label = "tsif_sync", }, | |
+}; | |
+ | |
+static void tsif_release(struct device *dev) | |
+{ | |
+} | |
+ | |
+struct msm_tsif_platform_data tsif1_platform_data = { | |
+ .num_gpios = ARRAY_SIZE(tsif1_gpios), | |
+ .gpios = tsif1_gpios, | |
+ .tsif_pclk = "tsif_pclk", | |
+ .tsif_ref_clk = "tsif_ref_clk", | |
+ .init = 0 | |
+}; | |
+ | |
+struct resource tsif1_resources[] = { | |
+ [0] = { | |
+ .flags = IORESOURCE_IRQ, | |
+ .start = TSIF2_IRQ, | |
+ .end = TSIF2_IRQ, | |
+ }, | |
+ [1] = { | |
+ .flags = IORESOURCE_MEM, | |
+ .start = MSM_TSIF1_PHYS, | |
+ .end = MSM_TSIF1_PHYS + MSM_TSIF_SIZE - 1, | |
+ }, | |
+ [2] = { | |
+ .flags = IORESOURCE_DMA, | |
+ .start = DMOV_TSIF_CHAN, | |
+ .end = DMOV_TSIF_CRCI, | |
+ }, | |
+}; | |
+ | |
+struct msm_tsif_platform_data tsif0_platform_data = { | |
+ .num_gpios = ARRAY_SIZE(tsif0_gpios), | |
+ .gpios = tsif0_gpios, | |
+ .tsif_pclk = "tsif_pclk", | |
+ .tsif_ref_clk = "tsif_ref_clk", | |
+ .init = 0 | |
+}; | |
+struct resource tsif0_resources[] = { | |
+ [0] = { | |
+ .flags = IORESOURCE_IRQ, | |
+ .start = TSIF1_IRQ, | |
+ .end = TSIF1_IRQ, | |
+ }, | |
+ [1] = { | |
+ .flags = IORESOURCE_MEM, | |
+ .start = MSM_TSIF0_PHYS, | |
+ .end = MSM_TSIF0_PHYS + MSM_TSIF_SIZE - 1, | |
+ }, | |
+ [2] = { | |
+ .flags = IORESOURCE_DMA, | |
+ .start = DMOV_TSIF_CHAN, | |
+ .end = DMOV_TSIF_CRCI, | |
+ }, | |
+}; | |
+ | |
+struct platform_device msm_device_tsif[2] = { | |
+ { | |
+ .name = "msm_tsif", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(tsif0_resources), | |
+ .resource = tsif0_resources, | |
+ .dev = { | |
+ .release = tsif_release, | |
+ .platform_data = &tsif0_platform_data | |
+ }, | |
+ }, | |
+ { | |
+ .name = "msm_tsif", | |
+ .id = 1, | |
+ .num_resources = ARRAY_SIZE(tsif1_resources), | |
+ .resource = tsif1_resources, | |
+ .dev = { | |
+ .release = tsif_release, | |
+ .platform_data = &tsif1_platform_data | |
+ }, | |
+ } | |
+}; | |
+#endif | |
+ | |
+static struct platform_device apq8064_fmem_device = { | |
+ .name = "fmem", | |
+ .id = 1, | |
+ .dev = { .platform_data = &apq8064_fmem_pdata }, | |
+}; | |
+ | |
+static void __init reserve_mem_for_ion(enum ion_memory_types mem_type, | |
+ unsigned long size) | |
+{ | |
+ apq8064_reserve_table[mem_type].size += size; | |
+} | |
+ | |
+static void __init apq8064_reserve_fixed_area(unsigned long fixed_area_size) | |
+{ | |
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION) | |
+ int ret; | |
+ | |
+ if (fixed_area_size > MAX_FIXED_AREA_SIZE) | |
+ panic("fixed area size is larger than %dM\n", | |
+ MAX_FIXED_AREA_SIZE >> 20); | |
+ | |
+ reserve_info->fixed_area_size = fixed_area_size; | |
+ reserve_info->fixed_area_start = APQ8064_FW_START; | |
+ | |
+ ret = memblock_remove(reserve_info->fixed_area_start, | |
+ reserve_info->fixed_area_size); | |
+ BUG_ON(ret); | |
+#endif | |
+} | |
+ | |
+static void __init reserve_ion_memory(void) | |
+{ | |
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION) | |
+ unsigned int i; | |
+ unsigned int ret; | |
+ unsigned int fixed_size = 0; | |
+ unsigned int fixed_low_size, fixed_middle_size, fixed_high_size; | |
+ unsigned long fixed_low_start, fixed_middle_start, fixed_high_start; | |
+ unsigned long cma_alignment; | |
+ unsigned int low_use_cma = 0; | |
+ unsigned int middle_use_cma = 0; | |
+ unsigned int high_use_cma = 0; | |
+ | |
+ fixed_low_size = 0; | |
+ fixed_middle_size = 0; | |
+ fixed_high_size = 0; | |
+ | |
+ cma_alignment = PAGE_SIZE << max(MAX_ORDER, pageblock_order); | |
+ | |
+ for (i = 0; i < apq8064_ion_pdata.nr; ++i) { | |
+ struct ion_platform_heap *heap = | |
+ &(apq8064_ion_pdata.heaps[i]); | |
+ int use_cma = 0; | |
+ | |
+ if (heap->extra_data) { | |
+ int fixed_position = NOT_FIXED; | |
+ | |
+ switch ((int)heap->type) { | |
+ case ION_HEAP_TYPE_CP: | |
+ if (((struct ion_cp_heap_pdata *) | |
+ heap->extra_data)->is_cma) { | |
+ heap->size = ALIGN(heap->size, | |
+ cma_alignment); | |
+ use_cma = 1; | |
+ } | |
+ fixed_position = ((struct ion_cp_heap_pdata *) | |
+ heap->extra_data)->fixed_position; | |
+ break; | |
+ case ION_HEAP_TYPE_DMA: | |
+ use_cma = 1; | |
+ /* Purposely fall through here */ | |
+ case ION_HEAP_TYPE_CARVEOUT: | |
+ fixed_position = ((struct ion_co_heap_pdata *) | |
+ heap->extra_data)->fixed_position; | |
+ break; | |
+ default: | |
+ break; | |
+ } | |
+ | |
+ if (fixed_position != NOT_FIXED) | |
+ fixed_size += heap->size; | |
+ else if (!use_cma) | |
+ reserve_mem_for_ion(MEMTYPE_EBI1, heap->size); | |
+ | |
+ if (fixed_position == FIXED_LOW) { | |
+ fixed_low_size += heap->size; | |
+ low_use_cma = use_cma; | |
+ } else if (fixed_position == FIXED_MIDDLE) { | |
+ fixed_middle_size += heap->size; | |
+ middle_use_cma = use_cma; | |
+ } else if (fixed_position == FIXED_HIGH) { | |
+ fixed_high_size += heap->size; | |
+ | |
+ high_use_cma = use_cma; | |
+ } else if (use_cma) { | |
+ /* | |
+ * Heaps that use CMA but are not part of the | |
+ * fixed set. Create wherever. | |
+ */ | |
+ dma_declare_contiguous( | |
+ heap->priv, | |
+ heap->size, | |
+ 0, | |
+ 0xb0000000); | |
+ } | |
+ } | |
+ } | |
+ | |
+ if (!fixed_size) | |
+ return; | |
+ | |
+ fixed_low_start = APQ8064_FIXED_AREA_START; | |
+ if (low_use_cma) { | |
+ BUG_ON(!IS_ALIGNED(fixed_low_size + HOLE_SIZE, cma_alignment)); | |
+ BUG_ON(!IS_ALIGNED(fixed_low_start, cma_alignment)); | |
+ } else { | |
+ BUG_ON(!IS_ALIGNED(fixed_low_size + HOLE_SIZE, SECTION_SIZE)); | |
+ ret = memblock_remove(fixed_low_start, | |
+ fixed_low_size + HOLE_SIZE); | |
+ pr_info("mem_map: fixed_low_area reserved at 0x%lx with size \ | |
+ 0x%x\n", fixed_low_start, | |
+ fixed_low_size + HOLE_SIZE); | |
+ BUG_ON(ret); | |
+ } | |
+ fixed_middle_start = fixed_low_start + fixed_low_size + HOLE_SIZE; | |
+ if (middle_use_cma) { | |
+ BUG_ON(!IS_ALIGNED(fixed_middle_start, cma_alignment)); | |
+ BUG_ON(!IS_ALIGNED(fixed_middle_size, cma_alignment)); | |
+ } else { | |
+ BUG_ON(!IS_ALIGNED(fixed_middle_size, SECTION_SIZE)); | |
+ ret = memblock_remove(fixed_middle_start, fixed_middle_size); | |
+ pr_info("mem_map: fixed_middle_area reserved at 0x%lx with \ | |
+ size 0x%x\n", fixed_middle_start, | |
+ fixed_middle_size); | |
+ BUG_ON(ret); | |
+ } | |
+ fixed_high_start = fixed_middle_start + fixed_middle_size; | |
+ if (high_use_cma) { | |
+ fixed_high_size = ALIGN(fixed_high_size, cma_alignment); | |
+ BUG_ON(!IS_ALIGNED(fixed_high_start, cma_alignment)); | |
+ } else { | |
+ /* This is the end of the fixed area so it's okay to round up */ | |
+ fixed_high_size = ALIGN(fixed_high_size, SECTION_SIZE); | |
+ ret = memblock_remove(fixed_high_start, fixed_high_size); | |
+ pr_info("mem_map: fixed_high_area reserved at 0x%lx with size \ | |
+ 0x%x\n", fixed_high_start, | |
+ fixed_high_size); | |
+ BUG_ON(ret); | |
+ } | |
+ | |
+ for (i = 0; i < apq8064_ion_pdata.nr; ++i) { | |
+ struct ion_platform_heap *heap = &(apq8064_ion_pdata.heaps[i]); | |
+ | |
+ if (heap->extra_data) { | |
+ int fixed_position = NOT_FIXED; | |
+ struct ion_cp_heap_pdata *pdata = NULL; | |
+ | |
+ switch ((int) heap->type) { | |
+ case ION_HEAP_TYPE_CP: | |
+ pdata = | |
+ (struct ion_cp_heap_pdata *)heap->extra_data; | |
+ fixed_position = pdata->fixed_position; | |
+ break; | |
+ case ION_HEAP_TYPE_CARVEOUT: | |
+ case ION_HEAP_TYPE_DMA: | |
+ fixed_position = ((struct ion_co_heap_pdata *) | |
+ heap->extra_data)->fixed_position; | |
+ break; | |
+ default: | |
+ break; | |
+ } | |
+ | |
+ switch (fixed_position) { | |
+ case FIXED_LOW: | |
+ heap->base = fixed_low_start; | |
+ break; | |
+ case FIXED_MIDDLE: | |
+ heap->base = fixed_middle_start; | |
+ if (middle_use_cma) { | |
+ ret = dma_declare_contiguous( | |
+ heap->priv, | |
+ heap->size, | |
+ fixed_middle_start, | |
+ 0xa0000000); | |
+ WARN_ON(ret); | |
+ } | |
+ pdata->secure_base = fixed_middle_start | |
+ - HOLE_SIZE; | |
+ pdata->secure_size = HOLE_SIZE + heap->size; | |
+ break; | |
+ case FIXED_HIGH: | |
+ heap->base = fixed_high_start; | |
+ break; | |
+ default: | |
+ break; | |
+ } | |
+ } | |
+ } | |
+#endif | |
+} | |
+ | |
+static struct resource mdm_resources[] = { | |
+ { | |
+ .start = MDM2AP_ERR_FATAL, | |
+ .end = MDM2AP_ERR_FATAL, | |
+ .name = "MDM2AP_ERRFATAL", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = AP2MDM_ERR_FATAL, | |
+ .end = AP2MDM_ERR_FATAL, | |
+ .name = "AP2MDM_ERRFATAL", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = MDM2AP_STATUS, | |
+ .end = MDM2AP_STATUS, | |
+ .name = "MDM2AP_STATUS", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = AP2MDM_STATUS, | |
+ .end = AP2MDM_STATUS, | |
+ .name = "AP2MDM_STATUS", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = AP2MDM_PON_RESET_N, | |
+ .end = AP2MDM_PON_RESET_N, | |
+ .name = "AP2MDM_PMIC_RESET_N", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = MDM2AP_HSIC_READY, | |
+ .end = MDM2AP_HSIC_READY, | |
+ .name = "MDM2AP_HSIC_READY", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = AP2MDM_WAKEUP, | |
+ .end = AP2MDM_WAKEUP, | |
+ .name = "AP2MDM_WAKEUP", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+ { | |
+ .start = APQ2MDM_IPC1, | |
+ .end = APQ2MDM_IPC1, | |
+ .name = "AP2MDM_IPC1", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+}; | |
+ | |
+static struct platform_device mdm_8064_device = { | |
+ .name = "mdm2_modem", | |
+ .id = -1, | |
+ .num_resources = ARRAY_SIZE(mdm_resources), | |
+ .resource = mdm_resources, | |
+}; | |
+ | |
+#ifdef CONFIG_BT | |
+static struct msm_serial_hs_platform_data msm_uart_dm6_pdata = { | |
+ .inject_rx_on_wakeup = 0, | |
+ | |
+ | |
+ .bt_wakeup_pin = PM8921_GPIO_PM_TO_SYS(BT_WAKE), | |
+ .host_wakeup_pin = PM8921_GPIO_PM_TO_SYS(BT_HOST_WAKE), | |
+}; | |
+ | |
+static struct platform_device impression_j_rfkill = { | |
+ .name = "impression_j_rfkill", | |
+ .id = -1, | |
+}; | |
+#endif | |
+ | |
+static void __init reserve_mdp_memory(void) | |
+{ | |
+ impression_j_mdp_writeback(apq8064_reserve_table); | |
+} | |
+ | |
+static void __init impression_j_calculate_reserve_sizes(void) | |
+{ | |
+ size_pmem_devices(); | |
+ reserve_pmem_memory(); | |
+ reserve_ion_memory(); | |
+ reserve_mdp_memory(); | |
+} | |
+ | |
+static struct reserve_info impression_j_reserve_info __initdata = { | |
+ .memtype_reserve_table = apq8064_reserve_table, | |
+ .calculate_reserve_sizes = impression_j_calculate_reserve_sizes, | |
+ .reserve_fixed_area = apq8064_reserve_fixed_area, | |
+ .paddr_to_memtype = impression_j_paddr_to_memtype, | |
+}; | |
+ | |
+static int impression_j_memory_bank_size(void) | |
+{ | |
+ return 1<<29; | |
+} | |
+ | |
+static void __init locate_unstable_memory(void) | |
+{ | |
+ struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1]; | |
+ unsigned long bank_size; | |
+ unsigned long low, high; | |
+ | |
+ bank_size = impression_j_memory_bank_size(); | |
+ low = meminfo.bank[0].start; | |
+ high = mb->start + mb->size; | |
+ | |
+ | |
+ if (high < mb->start) | |
+ high = -PAGE_SIZE; | |
+ | |
+ low &= ~(bank_size - 1); | |
+ | |
+ if (high - low <= bank_size) | |
+ goto no_dmm; | |
+ | |
+#ifdef CONFIG_ENABLE_DMM | |
+ impression_j_reserve_info.low_unstable_address = mb->start - | |
+ MIN_MEMORY_BLOCK_SIZE + mb->size; | |
+ impression_j_reserve_info.max_unstable_size = MIN_MEMORY_BLOCK_SIZE; | |
+ | |
+ impression_j_reserve_info.bank_size = bank_size; | |
+ pr_info("low unstable address %lx max size %lx bank size %lx\n", | |
+ impression_j_reserve_info.low_unstable_address, | |
+ impression_j_reserve_info.max_unstable_size, | |
+ impression_j_reserve_info.bank_size); | |
+ return; | |
+#endif | |
+no_dmm: | |
+ impression_j_reserve_info.low_unstable_address = high; | |
+ impression_j_reserve_info.max_unstable_size = 0; | |
+} | |
+ | |
+int __init parse_tag_memsize(const struct tag *tags); | |
+static unsigned int mem_size_mb; | |
+ | |
+static void __init impression_j_reserve(void) | |
+{ | |
+ | |
+ msm_reserve(); | |
+ if (apq8064_fmem_pdata.size) { | |
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION) | |
+ if (reserve_info->fixed_area_size) { | |
+ apq8064_fmem_pdata.phys = | |
+ reserve_info->fixed_area_start + MSM_MM_FW_SIZE; | |
+ pr_info("mm fw at %lx (fixed) size %x\n", | |
+ reserve_info->fixed_area_start, MSM_MM_FW_SIZE); | |
+ pr_info("fmem start %lx (fixed) size %lx\n", | |
+ apq8064_fmem_pdata.phys, | |
+ apq8064_fmem_pdata.size); | |
+ } | |
+#endif | |
+ } | |
+} | |
+ | |
+static void __init place_movable_zone(void) | |
+{ | |
+#ifdef CONFIG_ENABLE_DMM | |
+ movable_reserved_start = impression_j_reserve_info.low_unstable_address; | |
+ movable_reserved_size = impression_j_reserve_info.max_unstable_size; | |
+ pr_info("movable zone start %lx size %lx\n", | |
+ movable_reserved_start, movable_reserved_size); | |
+#endif | |
+} | |
+ | |
+static void __init impression_j_early_reserve(void) | |
+{ | |
+ reserve_info = &impression_j_reserve_info; | |
+ locate_unstable_memory(); | |
+ place_movable_zone(); | |
+} | |
+ | |
+ | |
+ | |
+#ifdef CONFIG_HTC_BATT_8960 | |
+static int critical_alarm_voltage_mv[] = {3000, 3100, 3200, 3400}; | |
+ | |
+static struct htc_battery_platform_data htc_battery_pdev_data = { | |
+ .guage_driver = 0, | |
+ .chg_limit_active_mask = HTC_BATT_CHG_LIMIT_BIT_TALK | | |
+ HTC_BATT_CHG_LIMIT_BIT_NAVI | | |
+ HTC_BATT_CHG_LIMIT_BIT_THRML, | |
+ .critical_low_voltage_mv = 3100, | |
+ .critical_alarm_vol_ptr = critical_alarm_voltage_mv, | |
+ .critical_alarm_vol_cols = sizeof(critical_alarm_voltage_mv) / sizeof(int), | |
+ .overload_vol_thr_mv = 4000, | |
+ .overload_curr_thr_ma = 0, | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ .icharger.name = "smb349", | |
+ .icharger.sw_safetytimer = 1, | |
+ .icharger.set_limit_charge_enable = smb349_limit_charge_enable, | |
+ .icharger.get_attr_text = pm8921_charger_get_attr_text_with_ext_charger, | |
+ .icharger.enable_5v_output = smb349_enable_5v_output, | |
+#else | |
+ .icharger.name = "pm8921", | |
+ .icharger.sw_safetytimer = 0, | |
+ .icharger.set_limit_charge_enable = pm8921_limit_charge_enable, | |
+ .icharger.get_attr_text = pm8921_charger_get_attr_text, | |
+ .icharger.enable_5v_output = NULL, | |
+#endif | |
+ .icharger.get_charging_source = pm8921_get_charging_source, | |
+ .icharger.get_charging_enabled = pm8921_get_charging_enabled, | |
+ .icharger.set_charger_enable = pm8921_charger_enable, | |
+ .icharger.set_pwrsrc_enable = pm8921_pwrsrc_enable, | |
+ .icharger.set_pwrsrc_and_charger_enable = | |
+ pm8921_set_pwrsrc_and_charger_enable, | |
+ .icharger.is_ovp = pm8921_is_charger_ovp, | |
+ .icharger.is_batt_temp_fault_disable_chg = | |
+ pm8921_is_batt_temp_fault_disable_chg, | |
+ .icharger.charger_change_notifier_register = | |
+ cable_detect_register_notifier, | |
+ .icharger.dump_all = pm8921_dump_all, | |
+ | |
+ | |
+ | |
+ .igauge.name = "pm8921", | |
+ .igauge.get_battery_voltage = pm8921_get_batt_voltage, | |
+ .igauge.set_chg_ovp = pm8921_set_chg_ovp, | |
+ .igauge.get_battery_current = pm8921_bms_get_batt_current, | |
+ .igauge.get_battery_temperature = pm8921_get_batt_temperature, | |
+ .igauge.get_battery_id = pm8921_get_batt_id, | |
+ .igauge.get_battery_soc = pm8921_bms_get_batt_soc, | |
+ .igauge.get_battery_cc = pm8921_bms_get_batt_cc, | |
+ .igauge.is_battery_temp_fault = pm8921_is_batt_temperature_fault, | |
+ .igauge.is_battery_full = pm8921_is_batt_full, | |
+ .igauge.get_attr_text = pm8921_gauge_get_attr_text, | |
+ .igauge.register_lower_voltage_alarm_notifier = | |
+ pm8xxx_batt_lower_alarm_register_notifier, | |
+ .igauge.enable_lower_voltage_alarm = pm8xxx_batt_lower_alarm_enable, | |
+ .igauge.set_lower_voltage_alarm_threshold = | |
+ pm8xxx_batt_lower_alarm_threshold_set, | |
+}; | |
+static struct platform_device htc_battery_pdev = { | |
+ .name = "htc_battery", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &htc_battery_pdev_data, | |
+ }, | |
+}; | |
+ | |
+static struct pm8921_charger_batt_param chg_batt_params[] = { | |
+ | |
+ [0] = { | |
+ .max_voltage = 4200, | |
+ .cool_bat_voltage = 4200, | |
+ .warm_bat_voltage = 4000, | |
+ }, | |
+ | |
+ [1] = { | |
+ .max_voltage = 4340, | |
+ .cool_bat_voltage = 4340, | |
+ .warm_bat_voltage = 4000, | |
+ }, | |
+ | |
+ [2] = { | |
+ .max_voltage = 4300, | |
+ .cool_bat_voltage = 4300, | |
+ .warm_bat_voltage = 4000, | |
+ }, | |
+ | |
+ [3] = { | |
+ .max_voltage = 4350, | |
+ .cool_bat_voltage = 4350, | |
+ .warm_bat_voltage = 4000, | |
+ }, | |
+}; | |
+ | |
+static struct single_row_lut fcc_temp_id_1 = { | |
+ .x = {-20,-10, 0, 10, 20, 30, 40}, | |
+ .y = {1820, 1980, 2000, 2010, 2020, 2025, 2050}, | |
+ .cols = 7 | |
+}; | |
+ | |
+static struct single_row_lut fcc_sf_id_1 = { | |
+ .x = {0}, | |
+ .y = {100}, | |
+ .cols = 1, | |
+}; | |
+ | |
+static struct sf_lut pc_sf_id_1 = { | |
+ .rows = 1, | |
+ .cols = 1, | |
+ | |
+ .row_entries = {0}, | |
+ .percent = {100}, | |
+ .sf = { | |
+ {100} | |
+ }, | |
+}; | |
+ | |
+static struct sf_lut rbatt_sf_id_1 = { | |
+ .rows = 19, | |
+ .cols = 7, | |
+ | |
+ .row_entries = {-20,-10, 0, 10, 20, 30, 40}, | |
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35, 30, 25, 20, 15, 10}, | |
+ .sf = { | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ {269,186,163,150,100,65,65,}, | |
+ } | |
+}; | |
+ | |
+static struct pc_temp_ocv_lut pc_temp_ocv_id_1 = { | |
+ .rows = 29, | |
+ .cols = 7, | |
+ .temp = {-20,-10, 0, 10, 20, 30, 40}, | |
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, | |
+ .ocv = { | |
+ {4340,4336,4335,4334,4330,4328,4325 }, | |
+ {4255,4271,4271,4270,4268,4267,4266 }, | |
+ {4186,4214,4213,4213,4211,4211,4210 }, | |
+ {4129,4160,4159,4159,4157,4156,4155 }, | |
+ {4079,4109,4108,4107,4105,4103,4104 }, | |
+ {4011,4062,4061,4060,4058,4055,4055 }, | |
+ {3966,4010,4010,4010,4010,4008,4009 }, | |
+ {3928,3958,3960,3963,3963,3962,3964 }, | |
+ {3891,3909,3909,3909,3910,3906,3910 }, | |
+ {3861,3871,3871,3870,3871,3869,3872 }, | |
+ {3838,3844,3843,3843,3844,3842,3844 }, | |
+ {3822,3821,3821,3821,3821,3819,3821 }, | |
+ {3809,3801,3801,3802,3800,3797,3798 }, | |
+ {3794,3784,3784,3783,3775,3769,3767 }, | |
+ {3779,3765,3759,3754,3744,3735,3735 }, | |
+ {3762,3725,3717,3709,3700,3693,3692 }, | |
+ {3745,3701,3698,3694,3687,3683,3679 }, | |
+ {3723,3683,3672,3661,3650,3634,3639 }, | |
+ {3692,3596,3578,3559,3548,3548,3537 }, | |
+ {3681,3565,3548,3530,3521,3521,3511 }, | |
+ {3670,3534,3518,3502,3493,3493,3485 }, | |
+ {3659,3503,3488,3473,3466,3466,3459 }, | |
+ {3648,3471,3458,3444,3439,3439,3433 }, | |
+ {3638,3440,3428,3415,3411,3411,3407 }, | |
+ {3619,3400,3376,3352,3346,3346,3340 }, | |
+ {3600,3361,3324,3288,3280,3280,3273 }, | |
+ {3581,3321,3273,3224,3215,3215,3206 }, | |
+ {3562,3281,3221,3160,3150,3150,3139 }, | |
+ {3544,3242,3169,3097,3084,3084,3072 } | |
+ } | |
+}; | |
+ | |
+struct pm8921_bms_battery_data bms_battery_data_id_1 = { | |
+ .fcc = 2100, | |
+ .fcc_temp_lut = &fcc_temp_id_1, | |
+ .fcc_sf_lut = &fcc_sf_id_1, | |
+ .pc_temp_ocv_lut = &pc_temp_ocv_id_1, | |
+ .pc_sf_lut = &pc_sf_id_1, | |
+ .rbatt_sf_lut = &rbatt_sf_id_1, | |
+ .default_rbatt_mohm =220, | |
+ .delta_rbatt_mohm = 0, | |
+}; | |
+ | |
+ | |
+static struct single_row_lut fcc_temp_id_2 = { | |
+ .x = {-20,-10, 0, 10, 20, 30, 40}, | |
+ .y = {1960, 2000, 2000, 2020, 2020, 2020, 2020}, | |
+ .cols = 7 | |
+}; | |
+ | |
+static struct single_row_lut fcc_sf_id_2 = { | |
+ .x = {0}, | |
+ .y = {100}, | |
+ .cols = 1 | |
+}; | |
+ | |
+static struct sf_lut pc_sf_id_2 = { | |
+ .rows = 1, | |
+ .cols = 1, | |
+ | |
+ .row_entries = {0}, | |
+ .percent = {100}, | |
+ .sf = { | |
+ {100} | |
+ } | |
+}; | |
+ | |
+static struct sf_lut rbatt_sf_id_2 = { | |
+ .rows = 19, | |
+ .cols = 7, | |
+ | |
+ .row_entries = {-20,-10, 0, 10, 20, 30, 40}, | |
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35, 30, 25, 20, 15, 10}, | |
+ .sf = { | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ {224,210,195,174,100,91,85,}, | |
+ } | |
+}; | |
+ | |
+static struct pc_temp_ocv_lut pc_temp_ocv_id_2 = { | |
+ .rows = 29, | |
+ .cols = 7, | |
+ .temp = {-20,-10, 0, 10, 20, 30, 40}, | |
+ .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, | |
+ .ocv = { | |
+ {4250,4250,4250,4250,4250,4250,4250}, | |
+ {4174,4200,4207,4209,4209,4208,4207}, | |
+ {4108,4142,4152,4156,4156,4155,4154}, | |
+ {4047,4094,4102,4106,4107,4106,4105}, | |
+ {3982,4038,4054,4061,4062,4062,4060}, | |
+ {3938,3981,3998,4008,4013,4015,4015}, | |
+ {3901,3939,3952,3961,3970,3976,3977}, | |
+ {3865,3904,3916,3923,3930,3937,3940}, | |
+ {3834,3870,3881,3887,3893,3898,3901}, | |
+ {3808,3842,3852,3857,3861,3863,3863}, | |
+ {3784,3818,3828,3832,3835,3836,3736}, | |
+ {3768,3797,3807,3811,3814,3815,3815}, | |
+ {3751,3782,3789,3794,3797,3799,3799}, | |
+ {3733,3770,3777,3780,3783,3785,3785}, | |
+ {3713,3758,3767,3769,3771,3771,3772}, | |
+ {3690,3742,3754,3756,3755,3750,3744}, | |
+ {3665,3719,3735,3738,3736,3732,3726}, | |
+ {3632,3687,3704,3710,3711,3707,3701}, | |
+ {3590,3646,3666,3673,3678,3678,3673}, | |
+ {3576,3633,3656,3661,3669,3668,3663}, | |
+ {3563,3621,3646,3650,3659,3658,3653}, | |
+ {3550,3609,3636,3639,3649,3649,3642}, | |
+ {3536,3597,3626,3628,3639,3639,3632}, | |
+ {3523,3584,3617,3616,3629,3629,3621}, | |
+ {3500,3527,3554,3521,3540,3543,3533}, | |
+ {3478,3469,3491,3426,3452,3456,3445}, | |
+ {3456,3412,3428,3332,3363,3370,3357}, | |
+ {3433,3354,3365,3237,3274,3283,3270}, | |
+ {3411,3300,3300,3200,3200,3200,3200} | |
+ }, | |
+}; | |
+ | |
+struct pm8921_bms_battery_data bms_battery_data_id_2 = { | |
+ .fcc = 2000, | |
+ .fcc_temp_lut = &fcc_temp_id_2, | |
+ .fcc_sf_lut = &fcc_sf_id_2, | |
+ .pc_temp_ocv_lut = &pc_temp_ocv_id_2, | |
+ .pc_sf_lut = &pc_sf_id_2, | |
+ .rbatt_sf_lut = &rbatt_sf_id_2, | |
+ .default_rbatt_mohm = 250, | |
+ .delta_rbatt_mohm = 0, | |
+}; | |
+ | |
+static struct htc_battery_cell htc_battery_cells[] = { | |
+ [0] = { | |
+ .model_name = "BJ83100", | |
+ .capacity = 2000, | |
+ .id = 1, | |
+ .id_raw_min = 73, | |
+ .id_raw_max = 204, | |
+ .type = HTC_BATTERY_CELL_TYPE_HV, | |
+ .voltage_max = 4350, | |
+ .voltage_min = 3200, | |
+ .chg_param = &chg_batt_params[3], | |
+ .gauge_param = &bms_battery_data_id_1, | |
+ }, | |
+ [1] = { | |
+ .model_name = "BJ83100", | |
+ .capacity = 2000, | |
+ .id = 2, | |
+ .id_raw_min = 205, | |
+ .id_raw_max = 385, | |
+ .type = HTC_BATTERY_CELL_TYPE_HV, | |
+ .voltage_max = 4350, | |
+ .voltage_min = 3200, | |
+ .chg_param = &chg_batt_params[3], | |
+ .gauge_param = &bms_battery_data_id_2, | |
+ }, | |
+ [2] = { | |
+ .model_name = "UNKNOWN", | |
+ .capacity = 2000, | |
+ .id = 255, | |
+ .id_raw_min = INT_MIN, | |
+ .id_raw_max = INT_MAX, | |
+ .type = HTC_BATTERY_CELL_TYPE_NORMAL, | |
+ .voltage_max = 4200, | |
+ .voltage_min = 3200, | |
+ .chg_param = &chg_batt_params[0], | |
+ .gauge_param = NULL, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#define _GET_REGULATOR(var, name) do { \ | |
+ var = regulator_get(NULL, name); \ | |
+ if (IS_ERR(var)) { \ | |
+ pr_err("'%s' regulator not found, rc=%ld\n", \ | |
+ name, IS_ERR(var)); \ | |
+ var = NULL; \ | |
+ return -ENODEV; \ | |
+ } \ | |
+} while (0) | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+ | |
+static struct pm8xxx_gpio_init switch_to_usb_pmic_gpio_table[] = { | |
+ PM8XXX_GPIO_INIT(USBz_AUDIO_SW, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static struct pm8xxx_gpio_init switch_to_mhl_pmic_gpio_table[] = { | |
+ PM8XXX_GPIO_INIT(USBz_AUDIO_SW, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 1, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static void config_gpio_table(uint32_t *table, int len) | |
+{ | |
+ int n, rc; | |
+ for (n = 0; n < len; n++) { | |
+ rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE); | |
+ if (rc) { | |
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n", | |
+ __func__, table[n], rc); | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static void impression_j_usb_dpdn_switch(int path) | |
+{ | |
+ switch (path) { | |
+ case PATH_USB: | |
+ pm8xxx_gpio_config(switch_to_usb_pmic_gpio_table[0].gpio, &switch_to_usb_pmic_gpio_table[0].config); | |
+ break; | |
+ case PATH_MHL: | |
+ pm8xxx_gpio_config(switch_to_mhl_pmic_gpio_table[0].gpio, &switch_to_mhl_pmic_gpio_table[0].config); | |
+ break; | |
+ } | |
+ | |
+ sii9234_change_usb_owner((path == PATH_MHL) ? 1 : 0); | |
+} | |
+ | |
+static struct regulator *reg_8921_l12; | |
+static struct regulator *reg_8921_s4; | |
+static struct regulator *reg_8921_l11; | |
+ | |
+uint32_t msm_hdmi_off_gpio[] = { | |
+ GPIO_CFG(HDMI_DDC_CLK, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA), | |
+ GPIO_CFG(HDMI_DDC_DATA, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA), | |
+ GPIO_CFG(HDMI_HPLG_DET, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), | |
+}; | |
+ | |
+uint32_t msm_hdmi_on_gpio[] = { | |
+ GPIO_CFG(HDMI_DDC_CLK, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA), | |
+ GPIO_CFG(HDMI_DDC_DATA, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA), | |
+ GPIO_CFG(HDMI_HPLG_DET, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA), | |
+}; | |
+ | |
+static void mhl_sii9234_1v2_power(bool enable) | |
+{ | |
+ static bool prev_on = false; | |
+ | |
+ if (enable == prev_on) | |
+ return; | |
+ | |
+ if (enable) { | |
+ config_gpio_table(msm_hdmi_on_gpio, ARRAY_SIZE(msm_hdmi_on_gpio)); | |
+ hdmi_hpd_feature(1); | |
+ pr_info("%s(on): success\n", __func__); | |
+ } else { | |
+ config_gpio_table(msm_hdmi_off_gpio, ARRAY_SIZE(msm_hdmi_off_gpio)); | |
+ hdmi_hpd_feature(0); | |
+ pr_info("%s(off): success\n", __func__); | |
+ } | |
+ | |
+ prev_on = enable; | |
+} | |
+ | |
+static int mhl_sii9234_all_power(bool enable) | |
+{ | |
+ static bool prev_on = false; | |
+ int rc; | |
+ if (enable == prev_on) | |
+ return 0; | |
+ | |
+ if (!reg_8921_s4) | |
+ _GET_REGULATOR(reg_8921_s4, "8921_s4"); | |
+ if (!reg_8921_l11) | |
+ _GET_REGULATOR(reg_8921_l11, "8921_l11"); | |
+ if (!reg_8921_l12) | |
+ _GET_REGULATOR(reg_8921_l12, "8921_l12"); | |
+ | |
+ if (enable) { | |
+ rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000); | |
+ if (rc) { | |
+ pr_err("%s: regulator_set_voltage reg_8921_s4 failed rc=%d\n", | |
+ __func__, rc); | |
+ return rc; | |
+ } | |
+ rc = regulator_set_voltage(reg_8921_l11, 3300000, 3300000); | |
+ if (rc) { | |
+ pr_err("%s: regulator_set_voltage reg_8921_l11 failed rc=%d\n", | |
+ __func__, rc); | |
+ return rc; | |
+ } | |
+ rc = regulator_set_voltage(reg_8921_l12, 1200000, 1200000); | |
+ if (rc) { | |
+ pr_err("%s: regulator_set_voltage reg_8921_l12 failed rc=%d\n", | |
+ __func__, rc); | |
+ return rc; | |
+ } | |
+ rc = regulator_enable(reg_8921_s4); | |
+ | |
+ if (rc) { | |
+ pr_err("'%s' regulator enable failed, rc=%d\n", | |
+ "reg_8921_s4", rc); | |
+ return rc; | |
+ } | |
+ rc = regulator_enable(reg_8921_l11); | |
+ if (rc) { | |
+ pr_err("'%s' regulator enable failed, rc=%d\n", | |
+ "reg_8921_l11", rc); | |
+ return rc; | |
+ } | |
+ rc = regulator_enable(reg_8921_l12); | |
+ if (rc) { | |
+ pr_err("'%s' regulator enable failed, rc=%d\n", | |
+ "reg_8921_l12", rc); | |
+ return rc; | |
+ } | |
+ pr_info("%s(on): success\n", __func__); | |
+ } else { | |
+ rc = regulator_disable(reg_8921_s4); | |
+ if (rc) | |
+ pr_warning("'%s' regulator disable failed, rc=%d\n", | |
+ "reg_8921_s4", rc); | |
+ rc = regulator_disable(reg_8921_l11); | |
+ if (rc) | |
+ pr_warning("'%s' regulator disable failed, rc=%d\n", | |
+ "reg_8921_l11", rc); | |
+ rc = regulator_disable(reg_8921_l12); | |
+ if (rc) | |
+ pr_warning("'%s' regulator disable failed, rc=%d\n", | |
+ "reg_8921_l12", rc); | |
+ pr_info("%s(off): success\n", __func__); | |
+ } | |
+ | |
+ prev_on = enable; | |
+ | |
+ return 0; | |
+} | |
+ | |
+static struct regulator *vreg_8921_l18; | |
+static DEFINE_SPINLOCK(L18_LPM_lock); | |
+static int impression_j_L18_LPM(void) | |
+{ | |
+ int rc = 0; | |
+ unsigned long irqflags; | |
+ | |
+ spin_lock_irqsave(&L18_LPM_lock, irqflags); | |
+ | |
+ if (!vreg_8921_l18) | |
+ _GET_REGULATOR(vreg_8921_l18, "8921_l18"); | |
+ | |
+ printk(KERN_DEBUG "[Reegulator] %s, vreg_8921_l18 = 0x%p\n", | |
+ __func__, vreg_8921_l18); | |
+ rc = regulator_set_optimum_mode(vreg_8921_l18, 100); | |
+ if (rc < 0) { | |
+ pr_err("[Regulator] set_optimum_mode L18 to LPM" | |
+ " failed, rc = %d\n", rc); | |
+ spin_unlock_irqrestore(&L18_LPM_lock, irqflags); | |
+ return -EINVAL; | |
+ } | |
+ rc = regulator_enable(vreg_8921_l18); | |
+ if (rc) { | |
+ pr_err("'%s' regulator enable failed, rc=%d\n", | |
+ "vreg_8921_l18", rc); | |
+ spin_unlock_irqrestore(&L18_LPM_lock, irqflags); | |
+ return rc; | |
+ } | |
+ printk(KERN_DEBUG "[Reegulator] %s, Set L18 to Low Power" | |
+ " Mode\n", __func__); | |
+ spin_unlock_irqrestore(&L18_LPM_lock, irqflags); | |
+ return 0; | |
+} | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL_SII9234 | |
+static uint32_t mhl_gpio_table[] = { | |
+ GPIO_CFG(MHL_INT, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA), | |
+}; | |
+ | |
+static struct pm8xxx_gpio_init mhl_pmic_gpio[] = { | |
+ PM8XXX_GPIO_INIT(MHL_RSTz, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static int mhl_sii9234_power(int on) | |
+{ | |
+ int rc = 0; | |
+ | |
+ switch (on) { | |
+ case 0: | |
+ mhl_sii9234_1v2_power(false); | |
+ break; | |
+ case 1: | |
+ mhl_sii9234_all_power(true); | |
+ config_gpio_table(mhl_gpio_table, ARRAY_SIZE(mhl_gpio_table)); | |
+ pm8xxx_gpio_config(mhl_pmic_gpio[0].gpio, | |
+ &mhl_pmic_gpio[0].config); | |
+ break; | |
+ default: | |
+ pr_warning("%s(%d) got unsupport parameter!!!\n", __func__, on); | |
+ break; | |
+ } | |
+ return rc; | |
+} | |
+ | |
+static T_MHL_PLATFORM_DATA mhl_sii9234_device_data = { | |
+ .gpio_intr = MHL_INT, | |
+ .ci2ca = 0, | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+ .mhl_usb_switch = impression_j_usb_dpdn_switch, | |
+ .mhl_1v2_power = mhl_sii9234_1v2_power, | |
+ .enable_5v = hdmi_enable_5v, | |
+#endif | |
+ .power = mhl_sii9234_power, | |
+}; | |
+ | |
+static struct i2c_board_info msm_i2c_mhl_sii9234_info[] = | |
+{ | |
+ { | |
+ I2C_BOARD_INFO(MHL_SII9234_I2C_NAME, 0x72 >> 1), | |
+ .platform_data = &mhl_sii9234_device_data, | |
+ .irq = MHL_INT | |
+ }, | |
+}; | |
+#endif | |
+#endif | |
+ | |
+#ifdef CONFIG_USB_EHCI_MSM_HSIC | |
+ | |
+static struct msm_bus_vectors hsic_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_SPS, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors hsic_max_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 60000000, | |
+ .ib = 960000000, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_SPS, | |
+ .ab = 0, | |
+ .ib = 512000000, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths hsic_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(hsic_init_vectors), | |
+ hsic_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(hsic_max_vectors), | |
+ hsic_max_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata hsic_bus_scale_pdata = { | |
+ hsic_bus_scale_usecases, | |
+ ARRAY_SIZE(hsic_bus_scale_usecases), | |
+ .name = "hsic", | |
+}; | |
+ | |
+ static struct msm_hsic_host_platform_data msm_hsic_pdata = { | |
+ .strobe = 88, | |
+ .data = 89, | |
+ .bus_scale_table = &hsic_bus_scale_pdata, | |
+ }; | |
+#else | |
+static struct msm_hsic_host_platform_data msm_hsic_pdata; | |
+#endif | |
+ | |
+#define PID_MAGIC_ID 0x71432909 | |
+#define SERIAL_NUM_MAGIC_ID 0x61945374 | |
+#define SERIAL_NUMBER_LENGTH 127 | |
+#define DLOAD_USB_BASE_ADD 0x2A03F0C8 | |
+ | |
+struct magic_num_struct { | |
+ uint32_t pid; | |
+ uint32_t serial_num; | |
+}; | |
+ | |
+struct dload_struct { | |
+ uint32_t reserved1; | |
+ uint32_t reserved2; | |
+ uint32_t reserved3; | |
+ uint16_t reserved4; | |
+ uint16_t pid; | |
+ char serial_number[SERIAL_NUMBER_LENGTH]; | |
+ uint16_t reserved5; | |
+ struct magic_num_struct magic_struct; | |
+}; | |
+ | |
+static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum) | |
+{ | |
+ struct dload_struct __iomem *dload = 0; | |
+ | |
+ dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload)); | |
+ if (!dload) { | |
+ pr_err("%s: cannot remap I/O memory region: %08x\n", | |
+ __func__, DLOAD_USB_BASE_ADD); | |
+ return -ENXIO; | |
+ } | |
+ | |
+ pr_debug("%s: dload:%p pid:%x serial_num:%s\n", | |
+ __func__, dload, pid, snum); | |
+ | |
+ dload->magic_struct.pid = PID_MAGIC_ID; | |
+ dload->pid = pid; | |
+ | |
+ | |
+ dload->magic_struct.serial_num = 0; | |
+ if (!snum) { | |
+ memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH); | |
+ goto out; | |
+ } | |
+ | |
+ dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID; | |
+ strlcpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH); | |
+out: | |
+ iounmap(dload); | |
+ return 0; | |
+} | |
+ | |
+static struct android_usb_platform_data android_usb_pdata = { | |
+ .vendor_id = 0x0BB4, | |
+ | |
+ .product_id = 0x0de9, | |
+ .version = 0x0100, | |
+ .product_name = "Android Phone", | |
+ .manufacturer_name = "HTC", | |
+ .num_products = ARRAY_SIZE(usb_products), | |
+ .products = usb_products, | |
+ .num_functions = ARRAY_SIZE(usb_functions_all), | |
+ .functions = usb_functions_all, | |
+ .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num, | |
+ .usb_id_pin_gpio = USB1_HS_ID_GPIO, | |
+ .usb_rmnet_interface = "HSIC,HSIC", | |
+ .usb_diag_interface = "diag,diag_mdm", | |
+ .fserial_init_string = "HSIC:modem,tty,tty:autobot,tty:serial,tty:autobot", | |
+ .serial_number = "000000000000", | |
+ .nluns = 1, | |
+}; | |
+ | |
+static struct platform_device android_usb_device = { | |
+ .name = "android_usb", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &android_usb_pdata, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors usb_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 0, | |
+ .ib = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors usb_max_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ab = 60000000, | |
+ .ib = 960000000, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths usb_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(usb_init_vectors), | |
+ usb_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(usb_max_vectors), | |
+ usb_max_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata usb_bus_scale_pdata = { | |
+ usb_bus_scale_usecases, | |
+ ARRAY_SIZE(usb_bus_scale_usecases), | |
+ .name = "usb", | |
+}; | |
+ | |
+static int phy_init_seq[] = { | |
+ 0x38, 0x81, | |
+ 0x3c, 0x82, | |
+ -1 | |
+}; | |
+ | |
+#ifdef CONFIG_SUPPORT_USB_SPEAKER | |
+struct pm_qos_request pm_qos_req_dma; | |
+void msm_hsusb_setup_gpio(enum usb_otg_state state) | |
+{ | |
+ switch (state) { | |
+ case OTG_STATE_UNDEFINED: | |
+ headset_ext_detect(USB_NO_HEADSET); | |
+ pm_qos_update_request(&pm_qos_req_dma, PM_QOS_DEFAULT_VALUE); | |
+ break; | |
+ case OTG_STATE_A_HOST: | |
+ pm_qos_update_request(&pm_qos_req_dma, 3); | |
+ break; | |
+ default: | |
+ break; | |
+ } | |
+} | |
+#endif | |
+ | |
+static uint32_t uart_tx_gpio_tbl[] = { | |
+ GPIO_CFG(UART_TX, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+ GPIO_CFG(UART_TX, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+}; | |
+static uint32_t uart_rx_gpio_tbl[] = { | |
+ GPIO_CFG(UART_RX, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+ GPIO_CFG(UART_RX, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+}; | |
+ | |
+static int msm_hsusb_vbus_power(bool on) | |
+{ | |
+ static int prev_on; | |
+ | |
+ if (on == prev_on) | |
+ return 0; | |
+ | |
+ if (on) { | |
+ | |
+ gpio_tlmm_config(uart_tx_gpio_tbl[1], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(uart_rx_gpio_tbl[1], GPIO_CFG_ENABLE); | |
+ gpio_set_value(UART_TX, 0); | |
+ gpio_set_value(UART_RX, 0); | |
+ } else { | |
+ | |
+ gpio_tlmm_config(uart_tx_gpio_tbl[0], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(uart_rx_gpio_tbl[0], GPIO_CFG_ENABLE); | |
+ } | |
+ | |
+ pr_info("%s(%s): success\n", __func__, on?"on":"off"); | |
+ | |
+ prev_on = on; | |
+ | |
+ return 0; | |
+} | |
+ | |
+#define PMIC_GPIO_DP 27 /* PMIC GPIO for D+ change */ | |
+#define PMIC_GPIO_DP_IRQ PM8921_GPIO_IRQ(PM8921_IRQ_BASE, PMIC_GPIO_DP) | |
+#define MSM_MPM_PIN_USB1_OTGSESSVLD 40 | |
+ | |
+static struct msm_otg_platform_data msm_otg_pdata = { | |
+ .mode = USB_OTG, | |
+ .otg_control = OTG_PMIC_CONTROL, | |
+ .phy_type = SNPS_28NM_INTEGRATED_PHY, | |
+ .vbus_power = msm_hsusb_vbus_power, | |
+ .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE), | |
+ .power_budget = 300, | |
+ .bus_scale_table = &usb_bus_scale_pdata, | |
+ .phy_init_seq = phy_init_seq, | |
+#ifdef CONFIG_SUPPORT_USB_SPEAKER | |
+ .setup_gpio = msm_hsusb_setup_gpio, | |
+#endif | |
+ .mpm_otgsessvld_int = MSM_MPM_PIN_USB1_OTGSESSVLD, | |
+}; | |
+ | |
+static struct msm_usb_host_platform_data msm_ehci_host_pdata3 = { | |
+ .power_budget = 300, | |
+}; | |
+ | |
+#ifdef CONFIG_USB_EHCI_MSM_HOST4 | |
+static struct msm_usb_host_platform_data msm_ehci_host_pdata4; | |
+#endif | |
+ | |
+static void __init apq8064_ehci_host_init(void) | |
+{ | |
+ if (machine_is_apq8064_liquid() || machine_is_mpq8064_cdp() || | |
+ machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv()) { | |
+ if (machine_is_apq8064_liquid()) | |
+ msm_ehci_host_pdata3.dock_connect_irq = | |
+ PM8921_MPP_IRQ(PM8921_IRQ_BASE, 9); | |
+ else | |
+ msm_ehci_host_pdata3.pmic_gpio_dp_irq = | |
+ PMIC_GPIO_DP_IRQ; | |
+ | |
+ apq8064_device_ehci_host3.dev.platform_data = | |
+ &msm_ehci_host_pdata3; | |
+ platform_device_register(&apq8064_device_ehci_host3); | |
+ | |
+#ifdef CONFIG_USB_EHCI_MSM_HOST4 | |
+ apq8064_device_ehci_host4.dev.platform_data = | |
+ &msm_ehci_host_pdata4; | |
+ platform_device_register(&apq8064_device_ehci_host4); | |
+#endif | |
+ } | |
+} | |
+ | |
+static int64_t impression_j_get_usbid_adc(void) | |
+{ | |
+ struct pm8xxx_adc_chan_result result; | |
+ int err = 0, adc =0; | |
+ err = pm8xxx_adc_read(ADC_MPP_1_AMUX4, &result); | |
+ | |
+ if (err) { | |
+ pr_info("[CABLE] %s: get adc fail, err %d\n", __func__, err); | |
+ return err; | |
+ } | |
+ adc = result.physical; | |
+ adc /= 1000; | |
+ pr_info("[CABLE] chan=%d, adc_code=%d, measurement=%lld, \ | |
+ physical=%lld translate voltage %d\n", result.chan, result.adc_code, | |
+ result.measurement, result.physical,adc); | |
+ return adc; | |
+} | |
+ | |
+struct pm8xxx_gpio_init usb_id_pmic_gpio[] = { | |
+ PM8XXX_GPIO_INIT(USB1_HS_ID_GPIO, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_HIGH, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static void impression_j_config_usb_id_gpios(bool output) | |
+{ | |
+ int rc; | |
+ rc = pm8xxx_gpio_config(usb_id_pmic_gpio[0].gpio, &usb_id_pmic_gpio[0].config); | |
+ if (rc) | |
+ pr_info("[USB BOARD] %s: Config ERROR: GPIO=%u, rc=%d\n", | |
+ __func__, usb_id_pmic_gpio[0].gpio, rc); | |
+ | |
+ if (output) { | |
+ gpio_direction_output(PM8921_GPIO_PM_TO_SYS(USB1_HS_ID_GPIO),1); | |
+ pr_info("[CABLE] %s: %d output high\n", __func__, USB1_HS_ID_GPIO); | |
+ } else { | |
+ gpio_direction_input(PM8921_GPIO_PM_TO_SYS(USB1_HS_ID_GPIO)); | |
+ pr_info("[CABLE] %s: %d input none pull\n", __func__, USB1_HS_ID_GPIO); | |
+ } | |
+} | |
+ | |
+static struct pm8xxx_gpio_init three_pogo_dock_id_pullup[] = { | |
+ PM8XXX_GPIO_INIT(POGO_ID, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_UP_1P5, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_HIGH, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+ | |
+static struct pm8xxx_gpio_init three_pogo_dock_id_pulldown[] = { | |
+ PM8XXX_GPIO_INIT(POGO_ID, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_DN, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_HIGH, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static int impression_j_detect_three_pogo_dock(void) | |
+{ | |
+ int ret; | |
+ | |
+ ret = pm8xxx_gpio_config(three_pogo_dock_id_pullup[0].gpio, &three_pogo_dock_id_pullup[0].config); | |
+ if (ret) { | |
+ printk(KERN_ERR "[CABLE] %s, fail to config pmic gpio 1\n",__func__); | |
+ return 0; | |
+ } | |
+ msleep(150); | |
+ if (!gpio_get_value_cansleep(PM8921_GPIO_PM_TO_SYS(POGO_ID))) | |
+ return 1; | |
+ | |
+ ret = pm8xxx_gpio_config(three_pogo_dock_id_pulldown[0].gpio, &three_pogo_dock_id_pulldown[0].config); | |
+ if (ret) { | |
+ printk(KERN_ERR "[CABLE] %s, fail to config pmic gpio 1\n",__func__); | |
+ return 0; | |
+ } | |
+ msleep(150); | |
+ if (gpio_get_value_cansleep(PM8921_GPIO_PM_TO_SYS(POGO_ID))) | |
+ return 2; | |
+ return 0; | |
+} | |
+ | |
+static struct cable_detect_platform_data cable_detect_pdata = { | |
+ .detect_type = CABLE_TYPE_PMIC_ADC, | |
+ .usb_id_pin_gpio = USB1_HS_ID_GPIO, | |
+ .get_adc_cb = impression_j_get_usbid_adc, | |
+ .config_usb_id_gpios = impression_j_config_usb_id_gpios, | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+ .mhl_1v2_power = mhl_sii9234_1v2_power, | |
+ .usb_dpdn_switch = impression_j_usb_dpdn_switch, | |
+#endif | |
+ .detect_three_pogo_dock = impression_j_detect_three_pogo_dock, | |
+}; | |
+ | |
+static struct platform_device cable_detect_device = { | |
+ .name = "cable_detect", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &cable_detect_pdata, | |
+ }, | |
+}; | |
+ | |
+void impression_j_cable_detect_register(void) | |
+{ | |
+ int rc; | |
+ | |
+ rc = pm8xxx_gpio_config(usb_id_pmic_gpio[0].gpio, &usb_id_pmic_gpio[0].config); | |
+ if (rc) | |
+ pr_info("[USB BOARD] %s: Config ERROR: GPIO=%u, rc=%d\n", | |
+ __func__, usb_id_pmic_gpio[0].gpio, rc); | |
+ | |
+ cable_detect_pdata.usb_id_pin_gpio = PM8921_GPIO_PM_TO_SYS(USB1_HS_ID_GPIO); | |
+ cable_detect_pdata.mhl_reset_gpio = PM8921_GPIO_PM_TO_SYS(MHL_RSTz); | |
+ | |
+ platform_device_register(&cable_detect_device); | |
+} | |
+ | |
+void impression_j_pm8xxx_adc_device_register(void) | |
+{ | |
+ pr_info("%s: Register PM8XXX ADC device. rev: %d\n", | |
+ __func__, system_rev); | |
+ impression_j_cable_detect_register(); | |
+} | |
+ | |
+void impression_j_add_usb_devices(void) | |
+{ | |
+ printk(KERN_INFO "%s rev: %d\n", __func__, system_rev); | |
+ | |
+ android_usb_pdata.products[0].product_id = | |
+ android_usb_pdata.product_id; | |
+ | |
+ | |
+ if (get_radio_flag() & RADIO_FLAG_RESERVE_17) { | |
+ android_usb_pdata.diag_init = 1; | |
+ android_usb_pdata.modem_init = 1; | |
+ android_usb_pdata.rmnet_init = 1; | |
+ } | |
+ | |
+ | |
+ if (board_mfg_mode() == 0) { | |
+ android_usb_pdata.nluns = 2; | |
+ android_usb_pdata.cdrom_lun = 0x2; | |
+ } | |
+ android_usb_pdata.serial_number = board_serialno(); | |
+ | |
+ android_usb_pdata.usb_id_pin_gpio = PM8921_GPIO_PM_TO_SYS(USB1_HS_ID_GPIO); | |
+ | |
+ platform_device_register(&apq8064_device_gadget_peripheral); | |
+ platform_device_register(&android_usb_device); | |
+} | |
+ | |
+ | |
+struct pm8xxx_gpio_init headset_pmic_gpio_xa[] = { | |
+ PM8XXX_GPIO_INIT(V_AUD_HSMIC_2V85_EN, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+ PM8XXX_GPIO_INIT(AUD_UART_OEz, PM_GPIO_DIR_OUT, | |
+ PM_GPIO_OUT_BUF_CMOS, 1, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+ PM8XXX_GPIO_INIT(EARPHONE_DETz, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_NO, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_HIGH, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+static uint32_t headset_cpu_gpio_xa[] = { | |
+ GPIO_CFG(CPU_1WIRE_RX, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+ GPIO_CFG(CPU_1WIRE_TX, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+}; | |
+ | |
+static uint32_t headset_onewire_gpio[] = { | |
+ GPIO_CFG(CPU_1WIRE_RX, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+ GPIO_CFG(CPU_1WIRE_TX, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+ GPIO_CFG(CPU_1WIRE_RX, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+ GPIO_CFG(CPU_1WIRE_TX, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+}; | |
+ | |
+static void uart_tx_gpo(int mode) | |
+{ | |
+ switch (mode) { | |
+ case 0: | |
+ gpio_tlmm_config(headset_onewire_gpio[1], GPIO_CFG_ENABLE); | |
+ gpio_set_value_cansleep(CPU_1WIRE_TX, 0); | |
+ break; | |
+ case 1: | |
+ gpio_tlmm_config(headset_onewire_gpio[1], GPIO_CFG_ENABLE); | |
+ gpio_set_value_cansleep(CPU_1WIRE_TX, 1); | |
+ break; | |
+ case 2: | |
+ gpio_tlmm_config(headset_onewire_gpio[3], GPIO_CFG_ENABLE); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void uart_lv_shift_en(int enable) | |
+{ | |
+ gpio_set_value_cansleep(PM8921_GPIO_PM_TO_SYS(AUD_UART_OEz), enable); | |
+} | |
+ | |
+ | |
+ | |
+static void headset_init(void) | |
+{ | |
+ int i = 0; | |
+ int rc = 0; | |
+ | |
+ pr_info("[HS_BOARD] (%s) Headset initiation (system_rev=%d)\n", | |
+ __func__, system_rev); | |
+ gpio_tlmm_config(headset_cpu_gpio_xa[0], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(headset_cpu_gpio_xa[1], GPIO_CFG_ENABLE); | |
+ for( i = 0; i < ARRAY_SIZE(headset_pmic_gpio_xa); i++) { | |
+ | |
+ rc = pm8xxx_gpio_config(headset_pmic_gpio_xa[i].gpio, | |
+ &headset_pmic_gpio_xa[i].config); | |
+ if (rc) | |
+ pr_info("[HS_BOARD] %s: Config ERROR: GPIO=%u, rc=%d\n", | |
+ __func__, headset_pmic_gpio_xa[i].gpio, rc); | |
+ } | |
+} | |
+ | |
+ | |
+ | |
+static void headset_power(int enable) | |
+{ | |
+ | |
+ pr_info("[HS_BOARD] (%s) Set MIC bias %d\n", __func__, enable); | |
+ | |
+ if (enable) | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(V_AUD_HSMIC_2V85_EN), 1); | |
+ else | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(V_AUD_HSMIC_2V85_EN), 0); | |
+} | |
+ | |
+static struct htc_headset_pmic_platform_data htc_headset_pmic_data = { | |
+ .driver_flag = DRIVER_HS_PMIC_ADC, | |
+ .hpin_gpio = PM8921_GPIO_PM_TO_SYS(EARPHONE_DETz), | |
+ .hpin_irq = 0, | |
+ .key_gpio = CPU_1WIRE_RX, | |
+ .key_irq = 0, | |
+ .key_enable_gpio = 0, | |
+ .adc_mic = 0, | |
+ .adc_remote = {0, 57, 58, 147, 148, 339}, | |
+ .adc_mpp = PM8XXX_AMUX_MPP_11, | |
+ .adc_amux = ADC_MPP_1_AMUX6, | |
+ .hs_controller = 0, | |
+ .hs_switch = 0, | |
+}; | |
+ | |
+static struct platform_device htc_headset_pmic = { | |
+ .name = "HTC_HEADSET_PMIC", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &htc_headset_pmic_data, | |
+ }, | |
+}; | |
+ | |
+static struct htc_headset_1wire_platform_data htc_headset_1wire_data = { | |
+ .tx_level_shift_en = PM8921_GPIO_PM_TO_SYS(AUD_UART_OEz), | |
+ .uart_sw = 0, | |
+ .one_wire_remote ={0x7E, 0x7F, 0x7D, 0x7F, 0x7B, 0x7F}, | |
+ .remote_press = 0, | |
+ .onewire_tty_dev = "/dev/ttyHSL3", | |
+}; | |
+ | |
+static struct platform_device htc_headset_one_wire = { | |
+ .name = "HTC_HEADSET_1WIRE", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &htc_headset_1wire_data, | |
+ }, | |
+}; | |
+ | |
+static struct platform_device *headset_devices[] = { | |
+ &htc_headset_pmic, | |
+ &htc_headset_one_wire, | |
+ | |
+}; | |
+ | |
+static struct headset_adc_config htc_headset_mgr_config[] = { | |
+ { | |
+ .type = HEADSET_MIC, | |
+ .adc_max = 1530, | |
+ .adc_min = 1244, | |
+ }, | |
+ { | |
+ .type = HEADSET_BEATS, | |
+ .adc_max = 1243, | |
+ .adc_min = 916, | |
+ }, | |
+ { | |
+ .type = HEADSET_BEATS_SOLO, | |
+ .adc_max = 915, | |
+ .adc_min = 566, | |
+ }, | |
+ { | |
+ .type = HEADSET_MIC, | |
+ .adc_max = 565, | |
+ .adc_min = 255, | |
+ }, | |
+ { | |
+ .type = HEADSET_NO_MIC, | |
+ .adc_max = 254, | |
+ .adc_min = 0, | |
+ }, | |
+}; | |
+ | |
+static struct htc_headset_mgr_platform_data htc_headset_mgr_data = { | |
+ .driver_flag = DRIVER_HS_MGR_FLOAT_DET, | |
+ .headset_devices_num = ARRAY_SIZE(headset_devices), | |
+ .headset_devices = headset_devices, | |
+ .headset_config_num = ARRAY_SIZE(htc_headset_mgr_config), | |
+ .headset_config = htc_headset_mgr_config, | |
+ .headset_init = headset_init, | |
+ .headset_power = headset_power, | |
+ .uart_tx_gpo = uart_tx_gpo, | |
+ .uart_lv_shift_en = uart_lv_shift_en, | |
+ | |
+}; | |
+ | |
+static struct platform_device htc_headset_mgr = { | |
+ .name = "HTC_HEADSET_MGR", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &htc_headset_mgr_data, | |
+ }, | |
+}; | |
+ | |
+static void headset_device_register(void) | |
+{ | |
+ pr_info("[HS_BOARD] (%s) Headset device register (system_rev=%d)\n", | |
+ __func__, system_rev); | |
+ | |
+ platform_device_register(&htc_headset_mgr); | |
+} | |
+ | |
+#ifdef CONFIG_FELICA_CXD2235_DD | |
+static void impression_j_felica_pon_gpio_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ if (rwtype == GPIOWRITE) { | |
+ | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(FEL_PON), wvalue); | |
+ } | |
+ else if (rwtype == GPIOREAD) { | |
+ *rvalue = gpio_get_value(PM8921_GPIO_PM_TO_SYS(FEL_PON)); | |
+ | |
+ } | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_cen_dtyp_d_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ if (rwtype == GPIOWRITE) { | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(FEL_CEN), wvalue); | |
+ } | |
+ else if (rwtype == GPIOREAD) { | |
+ *rvalue = gpio_get_value(PM8921_GPIO_PM_TO_SYS(FEL_CEN)); | |
+ } | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_cen_dtyp_cp_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ if (rwtype == GPIOWRITE) { | |
+ gpio_set_value(PM8921_GPIO_PM_TO_SYS(FEL_LOCK), wvalue); | |
+ } | |
+ else if (rwtype == GPIOREAD) { | |
+ *rvalue = gpio_get_value(PM8921_GPIO_PM_TO_SYS(FEL_LOCK)); | |
+ } | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_cen_gpio_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ if (rwtype == GPIOWRITE) { | |
+ printk(KERN_INFO "[FELICA_DD] %s set cen[%x]\n", __func__, wvalue); | |
+ gpio_set_value_cansleep(PM8921_GPIO_PM_TO_SYS(FEL_LOCK), GPIO_VALUE_LOW); | |
+ gpio_set_value_cansleep(PM8921_GPIO_PM_TO_SYS(FEL_CEN), wvalue); | |
+ msleep(1); | |
+ gpio_set_value_cansleep(PM8921_GPIO_PM_TO_SYS(FEL_LOCK), GPIO_VALUE_HIGH); | |
+ msleep(1); | |
+ gpio_set_value_cansleep(PM8921_GPIO_PM_TO_SYS(FEL_LOCK), GPIO_VALUE_LOW); | |
+ msleep(1); | |
+ } | |
+ else if (rwtype == GPIOREAD) { | |
+ *rvalue = gpio_get_value(PM8921_GPIO_PM_TO_SYS(FEL_CENz))? FELICA_CEN_LOCK : FELICA_CEN_UNLOCK; | |
+ | |
+ } | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_rfs_gpio_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ if (rwtype == GPIOREAD) { | |
+ *rvalue = gpio_get_value(PM8921_GPIO_PM_TO_SYS(FEL_RFS)); | |
+ | |
+ } | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_int_gpio_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ if (rwtype == GPIOREAD) { | |
+ *rvalue = gpio_get_value(PM8921_GPIO_PM_TO_SYS(FEL_INT)); | |
+ printk(KERN_INFO "[FELICA_DD] %s int[%x]\n", __func__, *rvalue); | |
+ } | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_con_gpio_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_hsel_gpio_func(int rwtype, int wvalue, int *rvalue) | |
+{ | |
+ unsigned ret; | |
+ | |
+ struct pm8xxx_mpp_config_data hsel_mpp = { | |
+ .type = PM8XXX_MPP_TYPE_D_OUTPUT, | |
+ .level = PM8921_MPP_DIG_LEVEL_S4, | |
+ }; | |
+ | |
+ if (rwtype == GPIOWRITE) { | |
+ if (wvalue) { | |
+ | |
+ hsel_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH; | |
+ ret = pm8xxx_mpp_config(PM8921_MPP_PM_TO_SYS(8), | |
+ &hsel_mpp); | |
+ if (ret < 0) | |
+ pr_err("%s:MPP8 configuration failed\n", __func__); | |
+ } else { | |
+ | |
+ hsel_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW; | |
+ ret = pm8xxx_mpp_config(PM8921_MPP_PM_TO_SYS(8), | |
+ &hsel_mpp); | |
+ if (ret < 0) | |
+ pr_err("%s:MPP8 un config failed\n", __func__); | |
+ } | |
+ } | |
+} | |
+ | |
+static void impression_j_felica_suspend(void) | |
+{ | |
+ | |
+ return; | |
+} | |
+ | |
+static void impression_j_felica_resume(void) | |
+{ | |
+ | |
+ return; | |
+} | |
+ | |
+ | |
+static void impression_j_felica_setup_gpio(void) | |
+{ | |
+ return; | |
+} | |
+ | |
+static struct felica_platform_data impression_j_felica_data = { | |
+ .int_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, FEL_INT), | |
+ .int_gpio = PM8921_GPIO_PM_TO_SYS(FEL_INT), | |
+ .intu_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, FEL_INTU), | |
+ .intu_gpio = PM8921_GPIO_PM_TO_SYS(FEL_INTU), | |
+ .setup_gpio = impression_j_felica_setup_gpio, | |
+ .sleep_gpio = impression_j_felica_suspend, | |
+ .wakeup_gpio = impression_j_felica_resume, | |
+ .pon_gpio_func = impression_j_felica_pon_gpio_func, | |
+ .cen_dtyp_d_func = impression_j_felica_cen_dtyp_d_func, | |
+ .cen_dtyp_cp_func = impression_j_felica_cen_dtyp_cp_func, | |
+ .cen_gpio_func = impression_j_felica_cen_gpio_func, | |
+ .rfs_gpio_func = impression_j_felica_rfs_gpio_func, | |
+ .int_gpio_func = impression_j_felica_int_gpio_func, | |
+ .con_gpio_func = impression_j_felica_con_gpio_func, | |
+ .hsel_gpio_func = impression_j_felica_hsel_gpio_func, | |
+}; | |
+ | |
+static struct platform_device impression_j_felica_device = { | |
+ .name = "felica", | |
+ .id = 0, | |
+ .dev = { | |
+ .platform_data = &impression_j_felica_data, | |
+ }, | |
+}; | |
+ | |
+int __init impression_j_init_felica(void) | |
+{ | |
+ printk(KERN_INFO "[FELICA_DD] %s\n", __func__); | |
+ return platform_device_register(&impression_j_felica_device); | |
+} | |
+#endif | |
+ | |
+#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS) | |
+ | |
+static struct wcd9xxx_pdata impression_j_tabla_platform_data = { | |
+ .slimbus_slave_device = { | |
+ .name = "tabla-slave", | |
+ .e_addr = {0, 0, 0x10, 0, 0x17, 2}, | |
+ }, | |
+ .irq = MSM_GPIO_TO_INT(42), | |
+ .irq_base = TABLA_INTERRUPT_BASE, | |
+ .num_irqs = NR_WCD9XXX_IRQS, | |
+ .reset_gpio = PM8921_GPIO_PM_TO_SYS(34), | |
+ .micbias = { | |
+ .ldoh_v = TABLA_LDOH_2P85_V, | |
+ .cfilt1_mv = 1800, | |
+ .cfilt2_mv = 1800, | |
+ .cfilt3_mv = 1800, | |
+ .bias1_cfilt_sel = TABLA_CFILT1_SEL, | |
+ .bias2_cfilt_sel = TABLA_CFILT2_SEL, | |
+ .bias3_cfilt_sel = TABLA_CFILT3_SEL, | |
+ .bias4_cfilt_sel = TABLA_CFILT3_SEL, | |
+ }, | |
+ .regulator = { | |
+ { | |
+ .name = "CDC_VDD_CP", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "CDC_VDDA_RX", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "CDC_VDDA_TX", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "VDDIO_CDC", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "VDDD_CDC_D", | |
+ .min_uV = 1225000, | |
+ .max_uV = 1250000, | |
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "CDC_VDDA_A_1P2V", | |
+ .min_uV = 1225000, | |
+ .max_uV = 1250000, | |
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct slim_device impression_j_slim_tabla = { | |
+ .name = "tabla-slim", | |
+ .e_addr = {0, 1, 0x10, 0, 0x17, 2}, | |
+ .dev = { | |
+ .platform_data = &impression_j_tabla_platform_data, | |
+ }, | |
+}; | |
+ | |
+static struct wcd9xxx_pdata impression_j_tabla20_platform_data = { | |
+ .slimbus_slave_device = { | |
+ .name = "tabla-slave", | |
+ .e_addr = {0, 0, 0x60, 0, 0x17, 2}, | |
+ }, | |
+ .irq = MSM_GPIO_TO_INT(42), | |
+ .irq_base = TABLA_INTERRUPT_BASE, | |
+ .num_irqs = NR_WCD9XXX_IRQS, | |
+ .reset_gpio = PM8921_GPIO_PM_TO_SYS(34), | |
+ .micbias = { | |
+ .ldoh_v = TABLA_LDOH_2P85_V, | |
+ .cfilt1_mv = 1800, | |
+ .cfilt2_mv = 1800, | |
+ .cfilt3_mv = 1800, | |
+ .bias1_cfilt_sel = TABLA_CFILT1_SEL, | |
+ .bias2_cfilt_sel = TABLA_CFILT2_SEL, | |
+ .bias3_cfilt_sel = TABLA_CFILT3_SEL, | |
+ .bias4_cfilt_sel = TABLA_CFILT3_SEL, | |
+ }, | |
+ .amic_settings = { | |
+ .legacy_mode = 0x7F, | |
+ .use_pdata = 0x7F, | |
+ }, | |
+ .regulator = { | |
+ { | |
+ .name = "CDC_VDD_CP", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_CDC_VDDA_CP_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "CDC_VDDA_RX", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_CDC_VDDA_RX_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "CDC_VDDA_TX", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_CDC_VDDA_TX_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "VDDIO_CDC", | |
+ .min_uV = 1800000, | |
+ .max_uV = 1800000, | |
+ .optimum_uA = WCD9XXX_VDDIO_CDC_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "VDDD_CDC_D", | |
+ .min_uV = 1225000, | |
+ .max_uV = 1250000, | |
+ .optimum_uA = WCD9XXX_VDDD_CDC_D_CUR_MAX, | |
+ }, | |
+ { | |
+ .name = "CDC_VDDA_A_1P2V", | |
+ .min_uV = 1225000, | |
+ .max_uV = 1250000, | |
+ .optimum_uA = WCD9XXX_VDDD_CDC_A_CUR_MAX, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+static struct slim_device impression_j_slim_tabla20 = { | |
+ .name = "tabla2x-slim", | |
+ .e_addr = {0, 1, 0x60, 0, 0x17, 2}, | |
+ .dev = { | |
+ .platform_data = &impression_j_tabla20_platform_data, | |
+ }, | |
+}; | |
+ | |
+#define MAX11871_GPIO_ERROR(ret, gpio, op) \ | |
+ if (ret < 0) { \ | |
+ pr_err("%s: GPIO %d %s failed (%d)\n", __func__, gpio, op, \ | |
+ ret); \ | |
+ return ret; \ | |
+ } | |
+ | |
+static int max11871_init(struct max11871_pdata *pdata, int value) | |
+{ | |
+ int ret; | |
+ | |
+ if (value) { | |
+ ret = gpio_request(pdata->gpio_tirq, "max11871_tirq"); | |
+ MAX11871_GPIO_ERROR(ret, pdata->gpio_tirq, "request"); | |
+ ret = gpio_direction_input(pdata->gpio_tirq); | |
+ MAX11871_GPIO_ERROR(ret, pdata->gpio_tirq, "direction"); | |
+ | |
+ ret = gpio_request(pdata->gpio_reset, "max11871_reset"); | |
+ MAX11871_GPIO_ERROR(ret, pdata->gpio_reset, "request"); | |
+ ret = gpio_direction_output(pdata->gpio_reset, 1); | |
+ MAX11871_GPIO_ERROR(ret, pdata->gpio_reset, "direction"); | |
+ } else { | |
+ gpio_free(pdata->gpio_tirq); | |
+ gpio_free(pdata->gpio_reset); | |
+ } | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int max11871_reset(struct max11871_pdata *pdata, int value) | |
+{ | |
+ gpio_set_value(pdata->gpio_reset, !!value); | |
+ return 0; | |
+} | |
+ | |
+static int max11871_tirq(struct max11871_pdata *pdata) | |
+{ | |
+ return gpio_get_value(pdata->gpio_tirq); | |
+} | |
+ | |
+struct max11871_board_config max11871_config_data[] = { | |
+ { | |
+ .config_id = 0x0205, | |
+ .chip_id = 0x57, | |
+ .major_ver = 2, | |
+ .minor_ver = 41, | |
+ .protocol_ver = 7, | |
+ .vendor_pin = 0x2, | |
+ .coordinate_settings = MAX11871_SWAP_XY, | |
+ .coordinates = { | |
+ .panel_min_x = 0, | |
+ .panel_max_x = 719, | |
+ .panel_min_y = 0, | |
+ .panel_max_y = 1279, | |
+ .button_xy[0] = {.x = 190, .y = 1320, .size_x = 60, | |
+ .size_y = 60}, | |
+ .button_xy[1] = {.x = 360, .y = 1320, .size_x = 60, | |
+ .size_y = 60}, | |
+ .button_xy[2] = {.x = 530, .y = 1320, .size_x = 60, | |
+ .size_y = 60}, | |
+ .button_xy[3] = {.x = 700, .y = 1320, .size_x = 60, | |
+ .size_y = 60} | |
+ }, | |
+ .config_touch = { | |
+ 0x0205, 0x0C14, 0x0078, 0x001E, 0x0A01, 0x0400, 0x0B01, 0x130F, | |
+ 0x080D, 0x0C07, 0x0302, 0x1109, 0x0610, 0x1205, 0x0E0A, 0x0100, | |
+ 0x0302, 0x0504, 0x0706, 0x0908, 0x0B0A, 0xFFFF, 0xFFFF, 0xFFFF, | |
+ 0xFFFF, 0x04FF, 0x02CF, 0xC813, 0x0000, 0x0502, 0x03F2, 0x0320, | |
+ 0x04B0, 0x01A4, 0x00C8, 0x1600, 0x6405, 0x0384, 0x0190, 0x5E43, | |
+ 0x0007, 0x6D8C | |
+ }, | |
+ .config_cal = { | |
+ 0xFFF5, 0xFFEA, 0xFFDF, 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, | |
+ 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, 0x0003, | |
+ 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, | |
+ 0x0003, 0x0003, 0x0003, 0xFFFF, 0xFF08, 0x00FA, 0x010E, 0x010E, | |
+ 0x00F0, 0x010E, 0x0104, 0x0104, 0x012C, 0x012C, 0x0002, 0x0099, | |
+ 0x0088, 0x0077, 0x0066, 0x0055, 0x00DD, 0x0022, 0x0033, 0x00BB, | |
+ 0x00AA, 0x0EBD | |
+ }, | |
+ .config_private = { | |
+ 0x00C8, 0x006E, 0x0041, 0x0000, 0x60FF, 0xFFC8, 0x0032, 0x0190, | |
+ 0x03E8, 0x003C, 0x0078, 0x0018, 0x04E2, 0x0050, 0xFFFF, 0x997D, | |
+ 0xFE01, 0x01F7, 0x3201, 0x12C5, 0xF86E, 0x2DF4, 0x7282 | |
+ }, | |
+ .config_lin_x = { | |
+ 0x002C, 0x442C, 0x6C58, 0x8C7C, 0xAC9C, 0xCCBC, 0xECDC, 0xA360 | |
+ }, | |
+ .config_lin_y = { | |
+ 0x002C, 0x442C, 0x6C58, 0x8C7C, 0xAC9C, 0xCCBC, 0xECDC, 0xA360 | |
+ }, | |
+ .config_ifactor = { | |
+ 0x66A6, 0x59A9, 0x566A, 0x959A, 0x6566, 0x9959, 0xA656, 0x6995, | |
+ 0x9A65, 0x6699, 0x59A6, 0x9669, 0xA59A, 0xA966, 0x6A59, 0x9A96, | |
+ 0xA6A5, 0xA9A9, 0x6A6A, 0x9A9A, 0x9A65, 0x6699, 0x59A6, 0x9669, | |
+ 0xA59A, 0xA966, 0x6A59, 0x9A96, 0xA6A5, 0xA9A9, 0x6A6A, 0x9A9A, | |
+ 0x66A6, 0x59A9, 0x566A, 0x959A, 0x6566, 0x9959, 0xA656, 0x6995, | |
+ 0x00A5, 0x00A9, 0x006A, 0x009A, 0x00A6, 0x00A9, 0x006A, 0x009A, | |
+ 0x0066, 0x0059, 0x0056, 0x0095, 0x0065, 0x0099, 0x00A6, 0x0069, | |
+ 0x009A, 0x0066, 0x0059, 0x0096, 0xECAD, 0x0795, 0xF2CE, 0xE903, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, | |
+ 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, | |
+ 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF3B9, 0x0941, 0xF41F, 0xEDED, | |
+ 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, | |
+ 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0795, 0xF2CE, 0xE903, 0xEB60, | |
+ 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, | |
+ 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, | |
+ 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, | |
+ 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CE, 0x07CF, 0x084F, 0xF3B9, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, | |
+ 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, | |
+ 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xE710, 0xE6C0, 0xECAD, 0x0795, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, | |
+ 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, | |
+ 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0x084F, 0xF3B9, 0x0941, 0xF41F, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, | |
+ 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, | |
+ 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, | |
+ 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, | |
+ 0xECAD, 0x0795, 0xF2CE, 0xE903, 0x02A5, 0xF03C, 0x0E24, 0x05A0, | |
+ 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, | |
+ 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, | |
+ 0x084F, 0xF3B9, 0x0941, 0xF41F, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, | |
+ 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, | |
+ 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60 | |
+ }, | |
+ }, | |
+ { | |
+ .config_id = 0x0CFD, | |
+ .chip_id = 0x57, | |
+ .major_ver = 2, | |
+ .minor_ver = 40, | |
+ .protocol_ver = 7, | |
+ .vendor_pin = 0x2, | |
+ .coordinate_settings = MAX11871_SWAP_XY, | |
+ .coordinates = { | |
+ .panel_min_x = 0, | |
+ .panel_max_x = 720, | |
+ .panel_min_y = 0, | |
+ .panel_max_y = 1370, | |
+ .button_xy[0] = {.x = 190, .y = 1320, .size_x = 60, | |
+ .size_y = 60}, | |
+ .button_xy[1] = {.x = 360, .y = 1320, .size_x = 60, | |
+ .size_y = 60}, | |
+ .button_xy[2] = {.x = 530, .y = 1320, .size_x = 60, | |
+ .size_y = 60}, | |
+ .button_xy[3] = {.x = 700, .y = 1320, .size_x = 60, | |
+ .size_y = 60} | |
+ }, | |
+ .config_touch = { | |
+ 0x0CFD, 0x0C14, 0x0078, 0x001E, 0x0A01, 0x0400, 0x0B01, 0x130F, | |
+ 0x080D, 0x0C07, 0x0302, 0x1109, 0x0610, 0x1205, 0x0E0A, 0x0100, | |
+ 0x0302, 0x0504, 0x0706, 0x0908, 0x0B0A, 0xFFFF, 0xFFFF, 0xFFFF, | |
+ 0xFFFF, 0x055A, 0x02D0, 0xC813, 0x0000, 0x1402, 0x0834, 0x0708, | |
+ 0x0A28, 0x01A4, 0x00C8, 0x1600, 0x6405, 0x0384, 0x0190, 0xFFFF, | |
+ 0xFFFF, 0x3736, | |
+ }, | |
+ .config_cal = { | |
+ 0xFFF5, 0xFFEA, 0xFFDF, 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, | |
+ 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, 0x001F, 0x0002, | |
+ 0x0002, 0x0002, 0x0002, 0x0002, 0x0002, 0x0002, 0x0002, 0x0002, | |
+ 0x0002, 0x0002, 0x0002, 0xFFFF, 0xFF08, 0x0140, 0x012C, 0x012C, | |
+ 0x0118, 0x012C, 0x0118, 0x0118, 0x0140, 0x0140, 0x0002, 0x0099, | |
+ 0x0088, 0x0077, 0x0066, 0x0055, 0x00DD, 0x0022, 0x0033, 0x00BB, | |
+ 0x00AA, 0x0FC9, | |
+ }, | |
+ .config_private = { | |
+ 0x0096, 0x00DC, 0x0041, 0x0000, 0x60FF, 0xFFC8, 0x0032, 0x0190, | |
+ 0x03E8, 0x003C, 0x0078, 0x0018, 0x04E2, 0x0050, 0xFFFF, 0x997D, | |
+ 0x00FF, 0x00F5, 0x3202, 0x0A05, 0xF878, 0x2DF4, 0x6C05, | |
+ }, | |
+ .config_lin_x = { | |
+ 0x002C, 0x442C, 0x6C58, 0x8C7C, 0xAC9C, 0xCCBC, 0xECDC, 0xA360, | |
+ }, | |
+ .config_lin_y = { | |
+ 0x002C, 0x442C, 0x6C58, 0x8C7C, 0xAC9C, 0xCCBC, 0xECDC, 0xA360, | |
+ }, | |
+ .config_ifactor = { | |
+ 0x66A6, 0x59A9, 0x566A, 0x959A, 0x6566, 0x9959, 0xA656, 0x6995, | |
+ 0x9A65, 0x6699, 0x59A6, 0x9669, 0xA59A, 0xA966, 0x6A59, 0x9A96, | |
+ 0xA6A5, 0xA9A9, 0x6A6A, 0x9A9A, 0x9A65, 0x6699, 0x59A6, 0x9669, | |
+ 0xA59A, 0xA966, 0x6A59, 0x9A96, 0xA6A5, 0xA9A9, 0x6A6A, 0x9A9A, | |
+ 0x66A6, 0x59A9, 0x566A, 0x959A, 0x6566, 0x9959, 0xA656, 0x6995, | |
+ 0x00A5, 0x00A9, 0x006A, 0x009A, 0x00A6, 0x00A9, 0x006A, 0x009A, | |
+ 0x0066, 0x0059, 0x0056, 0x0095, 0x0065, 0x0099, 0x00A6, 0x0069, | |
+ 0x009A, 0x0066, 0x0059, 0x0096, 0xECAD, 0x0795, 0xF2CE, 0xE903, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, | |
+ 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, | |
+ 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF3B9, 0x0941, 0xF41F, 0xEDED, | |
+ 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, | |
+ 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0795, 0xF2CE, 0xE903, 0xEB60, | |
+ 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, | |
+ 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, | |
+ 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, | |
+ 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CE, 0x07CF, 0x084F, 0xF3B9, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, | |
+ 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, | |
+ 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xE710, 0xE6C0, 0xECAD, 0x0795, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, | |
+ 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, | |
+ 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0x084F, 0xF3B9, 0x0941, 0xF41F, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, | |
+ 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, | |
+ 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, 0x0795, | |
+ 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, | |
+ 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, | |
+ 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, | |
+ 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, | |
+ 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, | |
+ 0xECAD, 0x0795, 0xF2CE, 0xE903, 0x02A5, 0xF03C, 0x0E24, 0x05A0, | |
+ 0xE710, 0xE6C0, 0xECAD, 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, | |
+ 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, | |
+ 0x084F, 0xF3B9, 0x0941, 0xF41F, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, 0x00D0, 0xF84A, 0x07CE, 0x07CF, | |
+ 0x084F, 0xF3B9, 0x0941, 0xF41F, 0xEDED, 0x02A5, 0xF03C, 0x0E24, | |
+ 0x00D0, 0xF84A, 0x07CE, 0x07CF, 0x084F, 0xF3B9, 0x0941, 0xF41F, | |
+ 0xEDED, 0x02A5, 0xF03C, 0x0E24, 0x05A0, 0xE710, 0xE6C0, 0xECAD, | |
+ 0x0795, 0xF2CE, 0xE903, 0xEB60, | |
+ }, | |
+ }, | |
+ { | |
+ .config_id = 0, | |
+ .chip_id = 0x57, | |
+ .major_ver = 0, | |
+ .minor_ver = 0, | |
+ .coordinates = { | |
+ .panel_min_x = 0, | |
+ .panel_max_x = 719, | |
+ .panel_min_y = 0, | |
+ .panel_max_y = 1279, | |
+ }, | |
+ }, | |
+}; | |
+ | |
+struct max11871_config max11871_config = { | |
+ .chip_configs = 1, | |
+ .fw_mappings = 3, | |
+ .fw_mapping[0] = {.chip_id = 0x55, .fw_index = 0}, | |
+ .fw_mapping[1] = {.chip_id = 0x57, .fw_index = 1}, | |
+ .fw_mapping[2] = {.chip_id = 0x00, .fw_index = 2}, | |
+ .fw_image[0] = {.file_name = "max11871_RevE.bin", .length = 0x8000, | |
+ .config_boundary = 0x7A68}, | |
+ .fw_image[1] = {.file_name = "max11871_RevG.bin", .length = 0x8000, | |
+ .config_boundary = 0x7A68}, | |
+ .fw_image[2] = {.file_name = "max11871_RevG.bin", .length = 0x8000, | |
+ .config_boundary = 0x7A68}, | |
+ .default_chip_config = 0x0205, | |
+ .default_chip_id = 0x57, | |
+ .i2c_words = 125 , | |
+ .max_touches = 10, | |
+ .events_per_sec = 120, | |
+ .lcd_x = 720, | |
+ .lcd_y = 1280, | |
+ .buttons_enabled = 0, | |
+ .buttons_type = MAX11871_BUTTONS_XY, | |
+ .buttons = 4, | |
+ .button_code = {KEY_HOME, KEY_MENU, KEY_BACK, KEY_SEARCH}, | |
+ .input_protocol = MAX11871_PROTOCOL_B, | |
+ .update_feature = MAX11871_UPDATE_CONFIG, | |
+ .tw_mask = 0x6, | |
+}; | |
+struct max11871_pdata max11871_pdata = { | |
+ .config = &max11871_config, | |
+ .fw_config = max11871_config_data, | |
+ .gpio_reset = TP_RSTz, | |
+ .gpio_tirq = TP_ATTz, | |
+ .init = max11871_init, | |
+ .reset = max11871_reset, | |
+ .tirq = max11871_tirq, | |
+}; | |
+ | |
+static struct synaptics_i2c_rmi_platform_data syn_ts_3k_xb_data[] = { | |
+ { | |
+ .version = 0x3332, | |
+ .packrat_number = 1293981, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1080, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 1920, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 1, | |
+ .tw_pin_mask = 0x0080, | |
+ .psensor_detection = 1, | |
+ .reduce_report_level = {60, 60, 50, 0, 0}, | |
+ .config = {0x33, 0x32, 0x01, 0x06, 0x00, 0x7F, 0x03, 0x1E, | |
+ 0x05, 0x09, 0x00, 0x01, 0x01, 0x00, 0x10, 0x38, | |
+ 0x04, 0x80, 0x07, 0x02, 0x14, 0x1E, 0x05, 0x50, | |
+ 0xB1, 0x53, 0x79, 0x02, 0x01, 0x3C, 0x15, 0x02, | |
+ 0x18, 0x02, 0xDE, 0x48, 0x4A, 0x4C, 0x98, 0xB7, | |
+ 0x8C, 0xB9, 0x00, 0xC8, 0x00, 0x00, 0x00, 0x00, | |
+ 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x19, 0x01, 0x00, 0x0A, 0x16, 0x0D, 0x0A, | |
+ 0x00, 0x14, 0x0A, 0x40, 0x64, 0x07, 0xF4, 0x96, | |
+ 0xD2, 0x43, 0x2A, 0x05, 0x00, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x3C, 0x32, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x1E, 0x05, 0x00, 0x02, 0x00, | |
+ 0x01, 0x80, 0x03, 0x0E, 0x1F, 0x12, 0x5F, 0x00, | |
+ 0x13, 0x04, 0x1B, 0x00, 0x10, 0x64, 0x60, 0x68, | |
+ 0x40, 0x48, 0x40, 0x40, 0x28, 0x20, 0x29, 0x28, | |
+ 0x26, 0x25, 0x24, 0x23, 0x21, 0x20, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0xB8, | |
+ 0x0B, 0x00, 0x28, 0x00, 0xE8, 0x03, 0xB3, 0x0A, | |
+ 0xCD, 0xA0, 0x0F, 0x00, 0xC0, 0x19, 0x04, 0x07, | |
+ 0x03, 0x0B, 0x04, 0x03, 0x03, 0x03, 0x30, 0x50, | |
+ 0x20, 0x70, 0x20, 0x20, 0x20, 0x20, 0x60, 0x5F, | |
+ 0x5C, 0x5B, 0x4A, 0x66, 0x6A, 0x6E, 0x00, 0xC8, | |
+ 0x00, 0x10, 0x28, 0x00, 0x00, 0x01, 0x05, 0x0A, | |
+ 0x0F, 0x14, 0x19, 0x1F, 0x22, 0x00, 0x31, 0x04, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x51, 0x51, | |
+ 0x51, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, 0x04, | |
+ 0x00, 0x00, 0x0A, 0x01, 0x0F, 0x07, 0x12, 0x09, | |
+ 0x14, 0x0E, 0x15, 0x11, 0x02, 0x0B, 0x10, 0x16, | |
+ 0x08, 0x0C, 0x03, 0x06, 0x04, 0x0D, 0x05, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x02, 0x04, 0x05, | |
+ 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, | |
+ 0x0F, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x10, | |
+ 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x66, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, | |
+ 0x0F, 0x01, 0x6B, 0x73 | |
+ } | |
+ }, | |
+ { | |
+ .version = 0x3332, | |
+ .packrat_number = 1195020, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1080, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 1920, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 1, | |
+ .large_obj_check = 1, | |
+ .tw_pin_mask = 0x0080, | |
+ .multitouch_calibration = 1, | |
+ .psensor_detection = 1, | |
+ .reduce_report_level = {60, 60, 50, 0, 0}, | |
+ .config = {0x33, 0x32, 0x01, 0x04, 0x00, 0x7F, 0x03, 0x1E, | |
+ 0x05, 0x09, 0x00, 0x01, 0x01, 0x00, 0x10, 0x38, | |
+ 0x04, 0x80, 0x07, 0x02, 0x14, 0x1E, 0x05, 0x50, | |
+ 0xB1, 0x53, 0x79, 0x02, 0x01, 0x3C, 0x15, 0x02, | |
+ 0x18, 0x02, 0xDE, 0x48, 0x4A, 0x4C, 0x98, 0xB7, | |
+ 0x8C, 0xB9, 0x00, 0xC8, 0x00, 0x00, 0x00, 0x00, | |
+ 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x19, 0x01, 0x00, 0x0A, 0x16, 0x0D, 0x0A, | |
+ 0x00, 0x14, 0x0A, 0x40, 0x64, 0x07, 0xF4, 0x96, | |
+ 0xD2, 0x43, 0x2A, 0x05, 0x00, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x3C, 0x32, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x1E, 0x05, 0x00, 0x02, 0xF5, | |
+ 0x00, 0x66, 0x03, 0x0E, 0x1F, 0x12, 0x5F, 0x00, | |
+ 0x13, 0x04, 0x1B, 0x00, 0x10, 0x28, 0x60, 0x68, | |
+ 0x40, 0x48, 0x40, 0x40, 0x28, 0x20, 0x29, 0x28, | |
+ 0x26, 0x25, 0x24, 0x23, 0x21, 0x20, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0xB8, | |
+ 0x0B, 0x00, 0x28, 0x00, 0xE8, 0x03, 0xB3, 0x0A, | |
+ 0xCD, 0xA0, 0x0F, 0x00, 0xC0, 0x80, 0x04, 0x07, | |
+ 0x03, 0x0B, 0x04, 0x03, 0x03, 0x03, 0x30, 0x50, | |
+ 0x20, 0x70, 0x20, 0x20, 0x20, 0x20, 0x60, 0x5F, | |
+ 0x5C, 0x5B, 0x4A, 0x66, 0x6A, 0x6E, 0x00, 0xC8, | |
+ 0x00, 0x10, 0x28, 0x00, 0x00, 0x01, 0x05, 0x0A, | |
+ 0x0F, 0x14, 0x19, 0x1F, 0x22, 0x04, 0x31, 0x04, | |
+ 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x51, 0x51, | |
+ 0x51, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, 0x04, | |
+ 0x00, 0x00, 0x0A, 0x01, 0x0F, 0x07, 0x12, 0x09, | |
+ 0x14, 0x0E, 0x15, 0x11, 0x02, 0x0B, 0x10, 0x16, | |
+ 0x08, 0x0C, 0x03, 0x06, 0x04, 0x0D, 0x05, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x02, 0x04, 0x05, | |
+ 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, | |
+ 0x0F, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x10, | |
+ 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, | |
+ 0x0F, 0x00 | |
+ } | |
+ }, | |
+ { | |
+ .version = 0x3332, | |
+ .packrat_number = 1116012, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1080, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 1920, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 1, | |
+ .large_obj_check = 1, | |
+ .tw_pin_mask = 0x0080, | |
+ .multitouch_calibration = 1, | |
+ .config = {0x33, 0x32, 0x01, 0x00, 0x00, 0x7F, 0x03, 0x1E, | |
+ 0x05, 0x08, 0x00, 0x19, 0x19, 0x00, 0x10, 0x4C, | |
+ 0x04, 0x6C, 0x07, 0x02, 0x14, 0x1E, 0x05, 0x28, | |
+ 0xF5, 0x28, 0x1E, 0x05, 0x01, 0x3C, 0x30, 0x00, | |
+ 0x30, 0x00, 0x00, 0x48, 0x00, 0x48, 0xF0, 0xD2, | |
+ 0xF0, 0xD2, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, | |
+ 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x19, 0x01, 0x00, 0x0A, 0x16, 0x0D, 0x0A, | |
+ 0x00, 0x14, 0x0A, 0x40, 0x64, 0x07, 0x66, 0x64, | |
+ 0xC0, 0x43, 0x2A, 0x05, 0x00, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x3C, 0x32, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x1E, 0x05, 0x00, 0x02, 0x8A, | |
+ 0x01, 0x80, 0x02, 0x0E, 0x1F, 0x11, 0x65, 0x00, | |
+ 0x13, 0x04, 0x1B, 0x00, 0x10, 0x28, 0x40, 0x40, | |
+ 0x40, 0x40, 0x40, 0x20, 0x20, 0x20, 0x27, 0x26, | |
+ 0x25, 0x24, 0x23, 0x21, 0x20, 0x1F, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0xFF, | |
+ 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0x00, 0xFF, 0xFF, 0x00, 0xC0, 0x80, 0x07, 0x03, | |
+ 0x0B, 0x04, 0x03, 0x03, 0x03, 0x09, 0x50, 0x20, | |
+ 0x70, 0x20, 0x20, 0x20, 0x20, 0x50, 0x5F, 0x5C, | |
+ 0x5B, 0x4A, 0x66, 0x6A, 0x6E, 0x5F, 0x00, 0xFF, | |
+ 0xFF, 0x10, 0x28, 0x00, 0x00, 0x00, 0x04, 0x09, | |
+ 0x0E, 0x13, 0x19, 0x1F, 0x24, 0x04, 0x31, 0x04, | |
+ 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x51, 0x51, | |
+ 0x51, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, 0x04, | |
+ 0x00, 0x00, 0x0A, 0x01, 0x0F, 0x07, 0x12, 0x09, | |
+ 0x14, 0x0E, 0x15, 0x11, 0x02, 0x0B, 0x10, 0x16, | |
+ 0x08, 0x0C, 0x03, 0x06, 0x04, 0x0D, 0x05, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x02, 0x04, 0x05, | |
+ 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, | |
+ 0x0F, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x10, | |
+ 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00 | |
+ } | |
+ }, | |
+}; | |
+ | |
+static struct synaptics_i2c_rmi_platform_data syn_ts_3k_data[] = { | |
+ { | |
+ .version = 0x3332, | |
+ .packrat_number = 1293981, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1080, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 1920, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 1, | |
+ .tw_pin_mask = 0x0088, | |
+ .block_touch_time_near = 200, | |
+ .config = {0x33, 0x32, 0x00, 0x02, 0x00, 0x7F, 0x03, 0x1E, | |
+ 0x05, 0x08, 0x00, 0x19, 0x19, 0x00, 0x10, 0x38, | |
+ 0x04, 0x80, 0x07, 0x02, 0x14, 0x1E, 0x05, 0x50, | |
+ 0xB1, 0x53, 0x79, 0x02, 0x01, 0x3C, 0x15, 0x02, | |
+ 0x18, 0x02, 0xDE, 0x48, 0x4A, 0x4C, 0xD9, 0xBE, | |
+ 0x82, 0xC7, 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, | |
+ 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x19, 0x01, 0x00, 0x0A, 0x16, 0x0D, 0x0A, | |
+ 0x00, 0x14, 0x0A, 0x40, 0x64, 0x07, 0x66, 0x64, | |
+ 0xC0, 0x43, 0x2A, 0x05, 0x00, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x3C, 0x32, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x1E, 0x05, 0x00, 0x02, 0x3F, | |
+ 0x01, 0x80, 0x03, 0x0E, 0x1F, 0x12, 0x3B, 0x00, | |
+ 0x13, 0x04, 0x1B, 0x00, 0x10, 0x0A, 0x80, 0x88, | |
+ 0x80, 0x88, 0x88, 0x60, 0x68, 0x60, 0x39, 0x38, | |
+ 0x37, 0x36, 0x34, 0x33, 0x32, 0x30, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xFF, | |
+ 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0x00, 0xFF, 0xFF, 0x00, 0xC0, 0x19, 0x02, 0x02, | |
+ 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x20, 0x20, | |
+ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x5B, 0x5E, | |
+ 0x60, 0x62, 0x65, 0x68, 0x6B, 0x6E, 0x00, 0xFF, | |
+ 0xFF, 0x10, 0x28, 0x00, 0x00, 0x00, 0x02, 0x04, | |
+ 0x06, 0x09, 0x0C, 0x0F, 0x10, 0x04, 0x31, 0x04, | |
+ 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x51, 0x51, | |
+ 0x51, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, 0x04, | |
+ 0x00, 0x11, 0x14, 0x12, 0x0F, 0x0E, 0x09, 0x0A, | |
+ 0x07, 0x02, 0x01, 0x00, 0x08, 0x0C, 0x0D, 0x0B, | |
+ 0x15, 0x17, 0x16, 0x18, 0x19, 0x1A, 0x05, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x12, 0x0F, 0x10, 0x0E, | |
+ 0x08, 0x07, 0x0C, 0x01, 0x06, 0x02, 0x05, 0x04, | |
+ 0x0A, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x10, | |
+ 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, | |
+ 0x0F, 0x01, 0x4F, 0x53, | |
+ } | |
+ }, | |
+ { | |
+ .version = 0x3332, | |
+ .packrat_number = 1195020, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1080, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 1920, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 1, | |
+ .large_obj_check = 1, | |
+ .tw_pin_mask = 0x0088, | |
+ .multitouch_calibration = 1, | |
+ .config = {0x33, 0x32, 0x00, 0x02, 0x00, 0x7F, 0x03, 0x1E, | |
+ 0x05, 0x08, 0x00, 0x19, 0x19, 0x00, 0x10, 0x38, | |
+ 0x04, 0x80, 0x07, 0x02, 0x14, 0x1E, 0x05, 0x50, | |
+ 0xB1, 0x53, 0x79, 0x02, 0x01, 0x3C, 0x15, 0x02, | |
+ 0x18, 0x02, 0xDE, 0x48, 0x4A, 0x4C, 0xD9, 0xBE, | |
+ 0x82, 0xC7, 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, | |
+ 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x19, 0x01, 0x00, 0x0A, 0x16, 0x0D, 0x0A, | |
+ 0x00, 0x14, 0x0A, 0x40, 0x64, 0x07, 0x66, 0x64, | |
+ 0xC0, 0x43, 0x2A, 0x05, 0x00, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x3C, 0x32, 0x00, 0x00, 0x00, | |
+ 0x4C, 0x6C, 0x74, 0x1E, 0x05, 0x00, 0x02, 0x3F, | |
+ 0x01, 0x80, 0x03, 0x0E, 0x1F, 0x12, 0x3B, 0x00, | |
+ 0x13, 0x04, 0x1B, 0x00, 0x10, 0x28, 0x80, 0x88, | |
+ 0x80, 0x88, 0x88, 0x60, 0x68, 0x60, 0x39, 0x38, | |
+ 0x37, 0x36, 0x34, 0x33, 0x32, 0x30, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xFF, | |
+ 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0x00, 0xFF, 0xFF, 0x00, 0xC0, 0x80, 0x02, 0x02, | |
+ 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x20, 0x20, | |
+ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x5B, 0x5E, | |
+ 0x60, 0x62, 0x65, 0x68, 0x6B, 0x6E, 0x00, 0xFF, | |
+ 0xFF, 0x10, 0x28, 0x00, 0x00, 0x00, 0x02, 0x04, | |
+ 0x06, 0x09, 0x0C, 0x0F, 0x10, 0x04, 0x31, 0x04, | |
+ 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x51, 0x51, | |
+ 0x51, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, 0x04, | |
+ 0x00, 0x11, 0x14, 0x12, 0x0F, 0x0E, 0x09, 0x0A, | |
+ 0x07, 0x02, 0x01, 0x00, 0x08, 0x0C, 0x0D, 0x0B, | |
+ 0x15, 0x17, 0x16, 0x18, 0x19, 0x1A, 0x05, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x12, 0x0F, 0x10, 0x0E, | |
+ 0x08, 0x07, 0x0C, 0x01, 0x06, 0x02, 0x05, 0x04, | |
+ 0x0A, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x10, | |
+ 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, | |
+ 0x0F, 0x01 | |
+ } | |
+ }, | |
+ { | |
+ .version = 0x3332, | |
+ .packrat_number = 1116012, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1600, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 2710, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 1, | |
+ .large_obj_check = 1, | |
+ .multitouch_calibration = 1, | |
+ .config = {0x33, 0x32, 0x00, 0x03, 0x04, 0x7F, 0x03, 0x1E, | |
+ 0x05, 0x08, 0x00, 0x19, 0x19, 0x00, 0x10, 0x54, | |
+ 0x06, 0x40, 0x0B, 0x02, 0x14, 0x23, 0x05, 0x50, | |
+ 0x49, 0x19, 0xCD, 0x02, 0x01, 0x3C, 0x1D, 0x01, | |
+ 0x1A, 0x02, 0x14, 0x4E, 0x3D, 0x52, 0xCE, 0xD1, | |
+ 0x90, 0xD7, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, | |
+ 0x0C, 0x04, 0xB7, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x19, 0x01, 0x00, 0x0A, 0x17, 0x0D, 0x0A, | |
+ 0x00, 0x14, 0x0A, 0x40, 0x7D, 0x07, 0xF6, 0xDC, | |
+ 0xC0, 0x43, 0x2A, 0x05, 0x00, 0x00, 0x00, 0x00, | |
+ 0x54, 0x40, 0xB6, 0x3C, 0x32, 0x00, 0x00, 0x00, | |
+ 0x54, 0x40, 0xB6, 0x1E, 0x05, 0x20, 0x02, 0x44, | |
+ 0x01, 0x80, 0x03, 0x0E, 0x1F, 0x10, 0x73, 0x00, | |
+ 0x19, 0x04, 0x1B, 0x00, 0x10, 0xFF, 0x60, 0x68, | |
+ 0x60, 0x68, 0x60, 0x68, 0x40, 0x48, 0x30, 0x2F, | |
+ 0x2D, 0x2B, 0x2A, 0x28, 0x27, 0x25, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0x00, 0x7C, | |
+ 0x15, 0x00, 0x10, 0x27, 0xB0, 0x36, 0xCD, 0xFF, | |
+ 0xE6, 0xE0, 0x2E, 0x00, 0xC0, 0x80, 0x03, 0x02, | |
+ 0x02, 0x02, 0x02, 0x05, 0x02, 0x02, 0x20, 0x10, | |
+ 0x10, 0x10, 0x10, 0x20, 0x10, 0x10, 0x66, 0x50, | |
+ 0x53, 0x56, 0x59, 0x4A, 0x60, 0x64, 0x00, 0xC8, | |
+ 0x00, 0x10, 0x28, 0x00, 0x00, 0x00, 0x06, 0x0C, | |
+ 0x12, 0x18, 0x1F, 0x25, 0x28, 0x04, 0x31, 0x04, | |
+ 0x4D, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x51, 0x51, | |
+ 0x51, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, 0x04, | |
+ 0x00, 0x11, 0x14, 0x12, 0x0F, 0x0E, 0x09, 0x0A, | |
+ 0x07, 0x02, 0x01, 0x00, 0x03, 0x08, 0x0C, 0x0D, | |
+ 0x0B, 0x15, 0x17, 0x16, 0x18, 0x19, 0x1A, 0x1B, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0x12, 0x0F, 0x10, 0x0E, | |
+ 0x08, 0x07, 0x0C, 0x01, 0x06, 0x02, 0x05, 0x04, | |
+ 0x0A, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0x00, 0x10, | |
+ 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00} | |
+ }, | |
+ { | |
+ .version = 0x3330, | |
+ .packrat_number = 1100755, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1620, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 2680, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .report_type = SYN_AND_REPORT_TYPE_B, | |
+ .default_config = 2, | |
+ .large_obj_check = 1, | |
+ .block_touch_time_near = 200, | |
+ .multitouch_calibration = 1, | |
+ .config = {0x4D, 0x4F, 0x4F, 0x31, 0x04, 0x3F, 0x03, 0x1E, | |
+ 0x05, 0xB1, 0x08, 0x0B, 0x19, 0x19, 0x00, 0x00, | |
+ 0x54, 0x06, 0x40, 0x0B, 0x02, 0x14, 0x1E, 0x05, | |
+ 0x28, 0xF5, 0x28, 0x1E, 0x05, 0x01, 0x3C, 0x18, | |
+ 0x02, 0x1A, 0x01, 0xCD, 0x4C, 0x33, 0x53, 0xEB, | |
+ 0xD5, 0x5E, 0xDA, 0x00, 0x70, 0x00, 0x00, 0x00, | |
+ 0x00, 0x0A, 0x04, 0xC0, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x19, 0x01, 0x00, 0x0A, 0x00, 0x08, | |
+ 0xA2, 0x02, 0x32, 0x0A, 0x0A, 0x96, 0x17, 0x0D, | |
+ 0x00, 0x02, 0x0F, 0x01, 0x80, 0x03, 0x0E, 0x1F, | |
+ 0x12, 0x46, 0x00, 0x19, 0x04, 0x1B, 0x00, 0x10, | |
+ 0x28, 0x00, 0x11, 0x14, 0x12, 0x0F, 0x0E, 0x09, | |
+ 0x0A, 0x07, 0x02, 0x01, 0x00, 0x03, 0x08, 0x0C, | |
+ 0x0D, 0x0B, 0x15, 0x17, 0x16, 0x18, 0x19, 0x1A, | |
+ 0x1B, 0xFF, 0xFF, 0xFF, 0xFF, 0x12, 0x0F, 0x10, | |
+ 0x0E, 0x08, 0x07, 0x0C, 0x01, 0x06, 0x02, 0x05, | |
+ 0x04, 0x0A, 0xFF, 0xFF, 0xFF, 0xA0, 0xA0, 0xA0, | |
+ 0xA0, 0xA0, 0xA0, 0x80, 0x80, 0x44, 0x43, 0x41, | |
+ 0x40, 0x3E, 0x3D, 0x3B, 0x39, 0x00, 0x03, 0x06, | |
+ 0x09, 0x0C, 0x0F, 0x12, 0x17, 0x00, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, | |
+ 0xFF, 0xFF, 0x00, 0xC0, 0x80, 0x00, 0x10, 0x00, | |
+ 0x10, 0x00, 0x10, 0x00, 0x10, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, | |
+ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, | |
+ 0x6C, 0x70, 0x73, 0x76, 0x79, 0x7C, 0x7F, 0x58, | |
+ 0x00, 0xFF, 0xFF, 0x10, 0x28, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0xFF, 0x51, 0x51, 0x51, 0x51, 0xCD, 0x0D, | |
+ 0x04} | |
+ }, | |
+ { | |
+ .version = 0x3230, | |
+ .abs_x_min = 0, | |
+ .abs_x_max = 1620, | |
+ .abs_y_min = 0, | |
+ .abs_y_max = 2680, | |
+ .display_width = 720, | |
+ .display_height = 1280, | |
+ .gpio_irq = TP_ATTz, | |
+ .default_config = 2, | |
+ .config = {0x30, 0x32, 0x30, 0x30, 0x84, 0x0F, 0x03, 0x1E, | |
+ 0x05, 0x20, 0xB1, 0x00, 0x0B, 0x19, 0x19, 0x00, | |
+ 0x00, 0x54, 0x06, 0x40, 0x0B, 0x1E, 0x05, 0x2D, | |
+ 0xF6, 0x04, 0xEA, 0x01, 0x01, 0x19, 0x01, 0x15, | |
+ 0x01, 0x14, 0x4E, 0x0A, 0x53, 0xD8, 0xC4, 0x24, | |
+ 0xCD, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x0A, | |
+ 0x04, 0xC0, 0x00, 0x02, 0x1E, 0x01, 0x80, 0x01, | |
+ 0x0D, 0x1E, 0x00, 0x35, 0x00, 0x19, 0x04, 0x1E, | |
+ 0x00, 0x10, 0x0A, 0x00, 0x11, 0x14, 0x12, 0x0F, | |
+ 0x0E, 0x09, 0x0A, 0x07, 0x02, 0x01, 0x00, 0x03, | |
+ 0x08, 0x0C, 0x0D, 0x0B, 0x15, 0x17, 0x16, 0x18, | |
+ 0x19, 0x1A, 0x1B, 0xFF, 0xFF, 0xFF, 0xFF, 0x12, | |
+ 0x0F, 0x10, 0x0E, 0x08, 0x07, 0x0C, 0x01, 0x06, | |
+ 0x02, 0x05, 0x04, 0x0A, 0xFF, 0xFF, 0xFF, 0xC0, | |
+ 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, 0x60, | |
+ 0x5F, 0x5D, 0x5B, 0x59, 0x57, 0x56, 0x53, 0x00, | |
+ 0x02, 0x04, 0x06, 0x08, 0x0A, 0x0C, 0x0F, 0x00, | |
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
+ 0xFF, 0x00, 0xFF, 0xFF, 0x00, 0xC0, 0x80, 0x00, | |
+ 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, | |
+ 0x80, 0x80, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, | |
+ 0x02, 0x02, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, | |
+ 0x20, 0x20, 0x5B, 0x5E, 0x60, 0x62, 0x64, 0x66, | |
+ 0x68, 0x6B, 0x19, 0x15, 0x00, 0x1E, 0x19, 0x05, | |
+ 0x01, 0x01, 0x3D, 0x08} | |
+ }, | |
+ { | |
+ .version = 0x0000 | |
+ }, | |
+}; | |
+ | |
+static struct i2c_board_info msm_i2c_gsbi3_info[] = { | |
+ { | |
+ I2C_BOARD_INFO(SYNAPTICS_3200_NAME, 0x40 >> 1), | |
+ .platform_data = &syn_ts_3k_data, | |
+ .irq = MSM_GPIO_TO_INT(TP_ATTz) | |
+ }, | |
+ { | |
+ I2C_BOARD_INFO(MAX11871_NAME, 0x48), | |
+ .platform_data = &max11871_pdata, | |
+ .irq = MSM_GPIO_TO_INT(TP_ATTz) | |
+ }, | |
+}; | |
+ | |
+static ssize_t virtual_syn_keys_show(struct kobject *kobj, | |
+ struct kobj_attribute *attr, char *buf) | |
+{ | |
+ return sprintf(buf, | |
+ __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":156:2040:140:200" | |
+ ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":540:2040:140:200" | |
+ ":" __stringify(EV_KEY) ":" __stringify(KEY_APP_SWITCH) ":923:2040:150:200" | |
+ "\n"); | |
+ | |
+} | |
+ | |
+ | |
+ | |
+static struct kobj_attribute syn_virtual_keys_attr = { | |
+ .attr = { | |
+ .name = "virtualkeys.synaptics-rmi-touchscreen", | |
+ .mode = S_IRUGO, | |
+ }, | |
+ .show = &virtual_syn_keys_show, | |
+}; | |
+ | |
+ | |
+ | |
+static struct attribute *properties_attrs[] = { | |
+ &syn_virtual_keys_attr.attr, | |
+ NULL | |
+}; | |
+ | |
+ | |
+ | |
+static struct attribute_group properties_attr_group = { | |
+ .attrs = properties_attrs, | |
+}; | |
+ | |
+ | |
+static struct cm3629_platform_data cm36282_pdata = { | |
+ .model = CAPELLA_CM36282, | |
+ .ps_select = CM3629_PS1_ONLY, | |
+ .intr = PM8921_GPIO_PM_TO_SYS(PROXIMITY_INT), | |
+ .levels = { 1, 4, 150, 508, 786, 3531, 4967, 6000, 10478, 65535}, | |
+ .golden_adc = 0xDA0, | |
+ .power = NULL, | |
+ .cm3629_slave_address = 0xC0>>1, | |
+ .ps1_thd_set = 0x15, | |
+ .ps1_thd_no_cal = 0xF1, | |
+ .ps1_thd_with_cal = 0x11, | |
+ .ps_calibration_rule = 1, | |
+ .ps_conf1_val = CM3629_PS_DR_1_80 | CM3629_PS_IT_1_6T | | |
+ CM3629_PS1_PERS_3, | |
+ .ps_conf2_val = CM3629_PS_ITB_1 | CM3629_PS_ITR_1 | | |
+ CM3629_PS2_INT_DIS | CM3629_PS1_INT_DIS, | |
+ .ps_conf3_val = CM3629_PS2_PROL_32, | |
+ .dark_level = 3, | |
+}; | |
+ | |
+ | |
+static struct i2c_board_info i2c_CM36282_devices[] = { | |
+ { | |
+ I2C_BOARD_INFO(CM3629_I2C_NAME, 0xC0 >> 1), | |
+ .platform_data = &cm36282_pdata, | |
+ .irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, PROXIMITY_INT), | |
+ }, | |
+}; | |
+ | |
+static int ioext_set_reset_pin(int level) | |
+{ | |
+ unsigned ret; | |
+ | |
+ struct pm8xxx_mpp_config_data ioext_mpp = { | |
+ .type = PM8XXX_MPP_TYPE_D_OUTPUT, | |
+ .level = PM8921_MPP_DIG_LEVEL_S4, | |
+ }; | |
+ | |
+ if (level) { | |
+ ioext_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH; | |
+ ret = pm8xxx_mpp_config(PM8921_MPP_PM_TO_SYS(12), | |
+ &ioext_mpp); | |
+ if (ret < 0) | |
+ pr_err("%s:MPP2 configuration failed\n", __func__); | |
+ } else { | |
+ ioext_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW; | |
+ ret = pm8xxx_mpp_config(PM8921_MPP_PM_TO_SYS(12), | |
+ &ioext_mpp); | |
+ if (ret < 0) | |
+ pr_err("%s:MPP2 un config failed\n", __func__); | |
+ } | |
+ return ret; | |
+} | |
+ | |
+static void ioext_reset_chip(void) | |
+{ | |
+ uint8_t rdara[4]; | |
+ uint8_t wdata[4]={0}; | |
+ | |
+ printk(KERN_INFO "[IOEXT] %s START\n", __func__); | |
+ | |
+ ioext_set_reset_pin(1); | |
+ msleep(10); | |
+ ioext_set_reset_pin(0); | |
+ msleep(10); | |
+ ioext_set_reset_pin(1); | |
+ | |
+ msleep(100); | |
+ | |
+ | |
+ ioext_i2c_read(0x00, rdara, 1); | |
+ printk(KERN_INFO "[IOEXT] %s [R] ChipID(0x00) = 0x%x\n", __func__, rdara[0]); | |
+ | |
+ | |
+ | |
+ wdata[0] = 0x00; | |
+ wdata[1] = 0x00; | |
+ ioext_i2c_write(0x38, wdata, 2); | |
+ printk(KERN_INFO "[IOEXT] %s [W] PIN_CONFIG (0x38~0x39) Reg\n", __func__); | |
+ | |
+ | |
+ wdata[0] = 0xff; | |
+ wdata[1] = 0x03; | |
+ wdata[2] = 0xff; | |
+ wdata[3] = 0x03; | |
+ ioext_i2c_write(0x17, wdata, 4); | |
+ printk(KERN_INFO "[IOEXT] %s [W] RPULL_CONFIG_A (0x17~0x20) Reg\n", __func__); | |
+ | |
+ | |
+ wdata[0] = 0x1f; | |
+ wdata[1] = 0x1f; | |
+ ioext_i2c_write(0x27, wdata, 2); | |
+ printk(KERN_INFO "[IOEXT] %s [W] GPIO_DIRECTION (0x27~0x28) Reg\n", __func__); | |
+ | |
+ | |
+ wdata[0] = 0x00; | |
+ wdata[1] = 0x00; | |
+ ioext_i2c_write(0x25, wdata, 2); | |
+ printk(KERN_INFO "[IOEXT] %s [W] GPO_OUT_MODE (0x25~0x26) Reg\n", __func__); | |
+ | |
+ | |
+ wdata[0] = 0x00; | |
+ wdata[1] = 0x00; | |
+ ioext_i2c_write(0x25, wdata, 2); | |
+ printk(KERN_INFO "[IOEXT] %s [W] GPO_DATA_OUT (0x23~0x24) Reg\n", __func__); | |
+ | |
+ | |
+ printk(KERN_INFO "[IOEXT] %s END\n", __func__); | |
+ | |
+ return; | |
+} | |
+ | |
+ | |
+static struct platform_device ioext_devices[] = { | |
+}; | |
+ | |
+static struct ioext_i2c_platform_data ioext_data = { | |
+ .num_devices = ARRAY_SIZE(ioext_devices), | |
+ .ioext_devices = ioext_devices, | |
+ .reset_chip = ioext_reset_chip, | |
+}; | |
+ | |
+static struct i2c_board_info i2c_ioext_devices[] = { | |
+ { | |
+ I2C_BOARD_INFO(IOEXTENDER_I2C_NAME, 0x68 >> 1), | |
+ .platform_data = &ioext_data, | |
+ }, | |
+}; | |
+ | |
+#if 0 | |
+static uint32_t gsbi2_gpio_table[] = { | |
+ GPIO_CFG(I2C2_DATA_SENS, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(I2C2_CLK_SENS, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+}; | |
+ | |
+ | |
+static uint32_t gsbi3_gpio_table[] = { | |
+ GPIO_CFG(MONACO_GPIO_TP_I2C_DAT, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(MONACO_GPIO_TP_I2C_CLK, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+}; | |
+ | |
+static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type) { | |
+ | |
+ printk(KERN_INFO "%s(): adap_id = %d, config_type = %d \n", __func__, adap_id, config_type); | |
+ | |
+ if ((adap_id == MSM8064_GSBI2_QUP_I2C_BUS_ID) && (config_type == 1)) { | |
+ gpio_tlmm_config(gsbi2_gpio_table[0], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(gsbi2_gpio_table[1], GPIO_CFG_ENABLE); | |
+ } | |
+ | |
+ if ((adap_id == MSM8064_GSBI3_QUP_I2C_BUS_ID) && (config_type == 1)) { | |
+ gpio_tlmm_config(gsbi3_gpio_table[0], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(gsbi3_gpio_table[1], GPIO_CFG_ENABLE); | |
+ } | |
+} | |
+#endif | |
+ | |
+#define MSM_WCNSS_PHYS 0x03000000 | |
+#define MSM_WCNSS_SIZE 0x280000 | |
+ | |
+static struct resource resources_wcnss_wlan[] = { | |
+ { | |
+ .start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ, | |
+ .end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ, | |
+ .name = "wcnss_wlanrx_irq", | |
+ .flags = IORESOURCE_IRQ, | |
+ }, | |
+ { | |
+ .start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ, | |
+ .end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ, | |
+ .name = "wcnss_wlantx_irq", | |
+ .flags = IORESOURCE_IRQ, | |
+ }, | |
+ { | |
+ .start = MSM_WCNSS_PHYS, | |
+ .end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1, | |
+ .name = "wcnss_mmio", | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ { | |
+ .start = 64, | |
+ .end = 68, | |
+ .name = "wcnss_gpios_5wire", | |
+ .flags = IORESOURCE_IO, | |
+ }, | |
+}; | |
+ | |
+static struct qcom_wcnss_opts qcom_wcnss_pdata = { | |
+ .has_48mhz_xo = 1, | |
+}; | |
+ | |
+static struct platform_device msm_device_wcnss_wlan = { | |
+ .name = "wcnss_wlan", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(resources_wcnss_wlan), | |
+ .resource = resources_wcnss_wlan, | |
+ .dev = {.platform_data = &qcom_wcnss_pdata}, | |
+}; | |
+ | |
+#ifdef CONFIG_QSEECOM | |
+static struct msm_bus_vectors qseecom_clks_init_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ib = 0, | |
+ .ab = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_SPDM, | |
+ .dst = MSM_BUS_SLAVE_SPDM, | |
+ .ib = 0, | |
+ .ab = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors qseecom_enable_dfab_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ib = (492 * 8) * 1000000UL, | |
+ .ab = (492 * 8) * 100000UL, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_SPDM, | |
+ .dst = MSM_BUS_SLAVE_SPDM, | |
+ .ib = 0, | |
+ .ab = 0, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_vectors qseecom_enable_sfpb_vectors[] = { | |
+ { | |
+ .src = MSM_BUS_MASTER_SPS, | |
+ .dst = MSM_BUS_SLAVE_EBI_CH0, | |
+ .ib = 0, | |
+ .ab = 0, | |
+ }, | |
+ { | |
+ .src = MSM_BUS_MASTER_SPDM, | |
+ .dst = MSM_BUS_SLAVE_SPDM, | |
+ .ib = (64 * 8) * 1000000UL, | |
+ .ab = (64 * 8) * 100000UL, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_paths qseecom_hw_bus_scale_usecases[] = { | |
+ { | |
+ ARRAY_SIZE(qseecom_clks_init_vectors), | |
+ qseecom_clks_init_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(qseecom_enable_dfab_vectors), | |
+ qseecom_enable_sfpb_vectors, | |
+ }, | |
+ { | |
+ ARRAY_SIZE(qseecom_enable_sfpb_vectors), | |
+ qseecom_enable_sfpb_vectors, | |
+ }, | |
+}; | |
+ | |
+static struct msm_bus_scale_pdata qseecom_bus_pdata = { | |
+ qseecom_hw_bus_scale_usecases, | |
+ ARRAY_SIZE(qseecom_hw_bus_scale_usecases), | |
+ .name = "qsee", | |
+}; | |
+ | |
+static struct platform_device qseecom_device = { | |
+ .name = "qseecom", | |
+ .id = 0, | |
+ .dev = { | |
+ .platform_data = &qseecom_bus_pdata, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCEDEV) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE) | |
+ | |
+#define QCE_SIZE 0x10000 | |
+#define QCE_0_BASE 0x11000000 | |
+ | |
+#define QCE_HW_KEY_SUPPORT 0 | |
+#define QCE_SHA_HMAC_SUPPORT 1 | |
+#define QCE_SHARE_CE_RESOURCE 3 | |
+#define QCE_CE_SHARED 0 | |
+ | |
+static struct resource qcrypto_resources[] = { | |
+ [0] = { | |
+ .start = QCE_0_BASE, | |
+ .end = QCE_0_BASE + QCE_SIZE - 1, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ [1] = { | |
+ .name = "crypto_channels", | |
+ .start = DMOV8064_CE_IN_CHAN, | |
+ .end = DMOV8064_CE_OUT_CHAN, | |
+ .flags = IORESOURCE_DMA, | |
+ }, | |
+ [2] = { | |
+ .name = "crypto_crci_in", | |
+ .start = DMOV8064_CE_IN_CRCI, | |
+ .end = DMOV8064_CE_IN_CRCI, | |
+ .flags = IORESOURCE_DMA, | |
+ }, | |
+ [3] = { | |
+ .name = "crypto_crci_out", | |
+ .start = DMOV8064_CE_OUT_CRCI, | |
+ .end = DMOV8064_CE_OUT_CRCI, | |
+ .flags = IORESOURCE_DMA, | |
+ }, | |
+}; | |
+ | |
+static struct resource qcedev_resources[] = { | |
+ [0] = { | |
+ .start = QCE_0_BASE, | |
+ .end = QCE_0_BASE + QCE_SIZE - 1, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ [1] = { | |
+ .name = "crypto_channels", | |
+ .start = DMOV8064_CE_IN_CHAN, | |
+ .end = DMOV8064_CE_OUT_CHAN, | |
+ .flags = IORESOURCE_DMA, | |
+ }, | |
+ [2] = { | |
+ .name = "crypto_crci_in", | |
+ .start = DMOV8064_CE_IN_CRCI, | |
+ .end = DMOV8064_CE_IN_CRCI, | |
+ .flags = IORESOURCE_DMA, | |
+ }, | |
+ [3] = { | |
+ .name = "crypto_crci_out", | |
+ .start = DMOV8064_CE_OUT_CRCI, | |
+ .end = DMOV8064_CE_OUT_CRCI, | |
+ .flags = IORESOURCE_DMA, | |
+ }, | |
+}; | |
+ | |
+#endif | |
+ | |
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) | |
+ | |
+static struct msm_ce_hw_support qcrypto_ce_hw_suppport = { | |
+ .ce_shared = QCE_CE_SHARED, | |
+ .shared_ce_resource = QCE_SHARE_CE_RESOURCE, | |
+ .hw_key_support = QCE_HW_KEY_SUPPORT, | |
+ .sha_hmac = QCE_SHA_HMAC_SUPPORT, | |
+ .bus_scale_table = NULL, | |
+}; | |
+ | |
+static struct platform_device qcrypto_device = { | |
+ .name = "qcrypto", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(qcrypto_resources), | |
+ .resource = qcrypto_resources, | |
+ .dev = { | |
+ .coherent_dma_mask = DMA_BIT_MASK(32), | |
+ .platform_data = &qcrypto_ce_hw_suppport, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE) | |
+ | |
+static struct msm_ce_hw_support qcedev_ce_hw_suppport = { | |
+ .ce_shared = QCE_CE_SHARED, | |
+ .shared_ce_resource = QCE_SHARE_CE_RESOURCE, | |
+ .hw_key_support = QCE_HW_KEY_SUPPORT, | |
+ .sha_hmac = QCE_SHA_HMAC_SUPPORT, | |
+ .bus_scale_table = NULL, | |
+}; | |
+ | |
+static struct platform_device qcedev_device = { | |
+ .name = "qce", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(qcedev_resources), | |
+ .resource = qcedev_resources, | |
+ .dev = { | |
+ .coherent_dma_mask = DMA_BIT_MASK(32), | |
+ .platform_data = &qcedev_ce_hw_suppport, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+static struct mdm_platform_data mdm_platform_data = { | |
+ .mdm_version = "3.0", | |
+ .ramdump_delay_ms = 2000, | |
+ .peripheral_platform_device = &apq8064_device_hsic_host, | |
+}; | |
+ | |
+static struct tsens_platform_data apq_tsens_pdata = { | |
+ .tsens_factor = 1000, | |
+ .hw_type = APQ_8064, | |
+ .patherm0 = -1, | |
+ .patherm1 = -1, | |
+ .tsens_num_sensor = 11, | |
+ .slope = {1176, 1176, 1154, 1176, 1111, | |
+ 1132, 1132, 1199, 1132, 1199, 1132}, | |
+}; | |
+ | |
+static struct platform_device msm_tsens_device = { | |
+ .name = "tsens8960-tm", | |
+ .id = -1, | |
+}; | |
+ | |
+static struct msm_thermal_data msm_thermal_pdata = { | |
+ .sensor_id = 0, | |
+ .poll_ms = 1000, | |
+ .limit_temp = 51, | |
+ .temp_hysteresis = 10, | |
+ .limit_freq = 918000, | |
+}; | |
+ | |
+#define MSM_SHARED_RAM_PHYS 0x80000000 | |
+static void __init impression_j_map_io(void) | |
+{ | |
+ msm_shared_ram_phys = MSM_SHARED_RAM_PHYS; | |
+ msm_map_apq8064_io(); | |
+ if (socinfo_init() < 0) | |
+ pr_err("socinfo_init() failed!\n"); | |
+} | |
+ | |
+static void __init impression_j_init_irq(void) | |
+{ | |
+ struct msm_mpm_device_data *data = NULL; | |
+ | |
+#ifdef CONFIG_MSM_MPM | |
+ data = &apq8064_mpm_dev_data; | |
+#endif | |
+ | |
+ msm_mpm_irq_extn_init(data); | |
+ gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, | |
+ (void *)MSM_QGIC_CPU_BASE); | |
+} | |
+ | |
+static struct platform_device msm8064_device_saw_regulator_core0 = { | |
+ .name = "saw-regulator", | |
+ .id = 0, | |
+ .dev = { | |
+ .platform_data = &impression_j_saw_regulator_pdata_8921_s5, | |
+ }, | |
+}; | |
+ | |
+static struct platform_device msm8064_device_saw_regulator_core1 = { | |
+ .name = "saw-regulator", | |
+ .id = 1, | |
+ .dev = { | |
+ .platform_data = &impression_j_saw_regulator_pdata_8921_s6, | |
+ }, | |
+}; | |
+ | |
+static struct platform_device msm8064_device_saw_regulator_core2 = { | |
+ .name = "saw-regulator", | |
+ .id = 2, | |
+ .dev = { | |
+ .platform_data = &impression_j_saw_regulator_pdata_8821_s0, | |
+ }, | |
+}; | |
+ | |
+static struct platform_device msm8064_device_saw_regulator_core3 = { | |
+ .name = "saw-regulator", | |
+ .id = 3, | |
+ .dev = { | |
+ .platform_data = &impression_j_saw_regulator_pdata_8821_s1, | |
+ | |
+ }, | |
+}; | |
+ | |
+static struct msm_rpmrs_level msm_rpmrs_levels[] = { | |
+ { | |
+ MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT, | |
+ MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE), | |
+ true, | |
+ 1, 784, 180000, 100, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE, | |
+ MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE), | |
+ true, | |
+ 1300, 228, 1200000, 2152, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, | |
+ MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE), | |
+ false, | |
+ 2000, 138, 1208400, 9152, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, | |
+ MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH), | |
+ false, | |
+ 6000, 119, 1850300, 9152, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, | |
+ MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE), | |
+ false, | |
+ 9200, 68, 2839200, 16552, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, | |
+ MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE), | |
+ false, | |
+ 10300, 63, 3128000, 18352, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, | |
+ MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH), | |
+ false, | |
+ 18000, 10, 4602600, 27152, | |
+ }, | |
+ | |
+ { | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, | |
+ MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW), | |
+ false, | |
+ 20000, 2, 5752000, 32152, | |
+ }, | |
+}; | |
+ | |
+uint32_t msm_rpm_get_swfi_latency(void) | |
+{ | |
+ return msm_rpmrs_levels[0].latency_us; | |
+} | |
+EXPORT_SYMBOL(msm_rpm_get_swfi_latency); | |
+ | |
+static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = { | |
+ .mode = MSM_PM_BOOT_CONFIG_TZ, | |
+}; | |
+ | |
+static struct msm_rpmrs_platform_data msm_rpmrs_data __initdata = { | |
+ .levels = &msm_rpmrs_levels[0], | |
+ .num_levels = ARRAY_SIZE(msm_rpmrs_levels), | |
+ .vdd_mem_levels = { | |
+ [MSM_RPMRS_VDD_MEM_RET_LOW] = 750000, | |
+ [MSM_RPMRS_VDD_MEM_RET_HIGH] = 750000, | |
+ [MSM_RPMRS_VDD_MEM_ACTIVE] = 1050000, | |
+ [MSM_RPMRS_VDD_MEM_MAX] = 1150000, | |
+ }, | |
+ .vdd_dig_levels = { | |
+ [MSM_RPMRS_VDD_DIG_RET_LOW] = 500000, | |
+ [MSM_RPMRS_VDD_DIG_RET_HIGH] = 750000, | |
+ [MSM_RPMRS_VDD_DIG_ACTIVE] = 950000, | |
+ [MSM_RPMRS_VDD_DIG_MAX] = 1150000, | |
+ }, | |
+ .vdd_mask = 0x7FFFFF, | |
+ .rpmrs_target_id = { | |
+ [MSM_RPMRS_ID_PXO_CLK] = MSM_RPM_ID_PXO_CLK, | |
+ [MSM_RPMRS_ID_L2_CACHE_CTL] = MSM_RPM_ID_LAST, | |
+ [MSM_RPMRS_ID_VDD_DIG_0] = MSM_RPM_ID_PM8921_S3_0, | |
+ [MSM_RPMRS_ID_VDD_DIG_1] = MSM_RPM_ID_PM8921_S3_1, | |
+ [MSM_RPMRS_ID_VDD_MEM_0] = MSM_RPM_ID_PM8921_L24_0, | |
+ [MSM_RPMRS_ID_VDD_MEM_1] = MSM_RPM_ID_PM8921_L24_1, | |
+ [MSM_RPMRS_ID_RPM_CTL] = MSM_RPM_ID_RPM_CTL, | |
+ }, | |
+}; | |
+ | |
+#if 0 | |
+static struct msm_cpuidle_state msm_cstates[] __initdata = { | |
+ {0, 0, "C0", "WFI", | |
+ MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT}, | |
+ | |
+ {0, 1, "C1", "RETENTION", | |
+ MSM_PM_SLEEP_MODE_RETENTION}, | |
+ | |
+ {0, 2, "C2", "STANDALONE_POWER_COLLAPSE", | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE}, | |
+ | |
+ {0, 3, "C3", "POWER_COLLAPSE", | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE}, | |
+ | |
+ {1, 0, "C0", "WFI", | |
+ MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT}, | |
+ | |
+ {1, 1, "C1", "RETENTION", | |
+ MSM_PM_SLEEP_MODE_RETENTION}, | |
+ | |
+ {1, 2, "C2", "STANDALONE_POWER_COLLAPSE", | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE}, | |
+ | |
+ {2, 0, "C0", "WFI", | |
+ MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT}, | |
+ | |
+ {2, 1, "C1", "RETENTION", | |
+ MSM_PM_SLEEP_MODE_RETENTION}, | |
+ | |
+ {2, 2, "C2", "STANDALONE_POWER_COLLAPSE", | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE}, | |
+ | |
+ {3, 0, "C0", "WFI", | |
+ MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT}, | |
+ | |
+ {3, 1, "C1", "RETENTION", | |
+ MSM_PM_SLEEP_MODE_RETENTION}, | |
+ | |
+ {3, 2, "C2", "STANDALONE_POWER_COLLAPSE", | |
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE}, | |
+}; | |
+ | |
+static struct msm_pm_platform_data msm_pm_data[] = { | |
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_RETENTION)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 0, | |
+ .suspend_enabled = 0, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_RETENTION)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 0, | |
+ .suspend_enabled = 0, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(2, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(2, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(2, MSM_PM_SLEEP_MODE_RETENTION)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 0, | |
+ .suspend_enabled = 0, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(2, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(3, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(3, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(3, MSM_PM_SLEEP_MODE_RETENTION)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 0, | |
+ .suspend_enabled = 0, | |
+ }, | |
+ | |
+ [MSM_PM_MODE(3, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { | |
+ .idle_supported = 1, | |
+ .suspend_supported = 1, | |
+ .idle_enabled = 1, | |
+ .suspend_enabled = 1, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+static uint8_t spm_wfi_cmd_sequence[] __initdata = { | |
+ 0x03, 0x0f, | |
+}; | |
+ | |
+static uint8_t spm_power_collapse_without_rpm[] __initdata = { | |
+ 0x00, 0x24, 0x54, 0x10, | |
+ 0x09, 0x03, 0x01, | |
+ 0x10, 0x54, 0x30, 0x0C, | |
+ 0x24, 0x30, 0x0f, | |
+}; | |
+ | |
+static uint8_t spm_power_collapse_with_rpm[] __initdata = { | |
+ 0x00, 0x24, 0x54, 0x10, | |
+ 0x09, 0x07, 0x01, 0x0B, | |
+ 0x10, 0x54, 0x30, 0x0C, | |
+ 0x24, 0x30, 0x0f, | |
+}; | |
+ | |
+static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = { | |
+ [0] = { | |
+ .mode = MSM_SPM_MODE_CLOCK_GATING, | |
+ .notify_rpm = false, | |
+ .cmd = spm_wfi_cmd_sequence, | |
+ }, | |
+ [1] = { | |
+ .mode = MSM_SPM_MODE_POWER_COLLAPSE, | |
+ .notify_rpm = false, | |
+ .cmd = spm_power_collapse_without_rpm, | |
+ }, | |
+ [2] = { | |
+ .mode = MSM_SPM_MODE_POWER_COLLAPSE, | |
+ .notify_rpm = true, | |
+ .cmd = spm_power_collapse_with_rpm, | |
+ }, | |
+}; | |
+ | |
+#ifdef CONFIG_PERFLOCK | |
+static unsigned dlx_perf_acpu_table[] = { | |
+ 594000000, | |
+ 810000000, | |
+ 1026000000, | |
+ 1134000000, | |
+ 1512000000, | |
+}; | |
+ | |
+static struct perflock_data dlx_floor_data = { | |
+ .perf_acpu_table = dlx_perf_acpu_table, | |
+ .table_size = ARRAY_SIZE(dlx_perf_acpu_table), | |
+}; | |
+ | |
+static struct perflock_data dlx_cpufreq_ceiling_data = { | |
+ .perf_acpu_table = dlx_perf_acpu_table, | |
+ .table_size = ARRAY_SIZE(dlx_perf_acpu_table), | |
+}; | |
+ | |
+static struct perflock_pdata perflock_pdata = { | |
+ .perf_floor = &dlx_floor_data, | |
+ .perf_ceiling = &dlx_cpufreq_ceiling_data, | |
+}; | |
+ | |
+struct platform_device msm8064_device_perf_lock = { | |
+ .name = "perf_lock", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &perflock_pdata, | |
+ }, | |
+}; | |
+ | |
+#endif | |
+ | |
+static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = { | |
+ 0x00, 0x20, 0x03, 0x20, | |
+ 0x00, 0x0f, | |
+}; | |
+ | |
+static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = { | |
+ 0x00, 0x20, 0x34, 0x64, | |
+ 0x48, 0x07, 0x48, 0x20, | |
+ 0x50, 0x64, 0x04, 0x34, | |
+ 0x50, 0x0f, | |
+}; | |
+static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = { | |
+ 0x00, 0x10, 0x34, 0x64, | |
+ 0x48, 0x07, 0x48, 0x10, | |
+ 0x50, 0x64, 0x04, 0x34, | |
+ 0x50, 0x0F, | |
+}; | |
+ | |
+static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = { | |
+ [0] = { | |
+ .mode = MSM_SPM_L2_MODE_RETENTION, | |
+ .notify_rpm = false, | |
+ .cmd = l2_spm_wfi_cmd_sequence, | |
+ }, | |
+ [1] = { | |
+ .mode = MSM_SPM_L2_MODE_GDHS, | |
+ .notify_rpm = true, | |
+ .cmd = l2_spm_gdhs_cmd_sequence, | |
+ }, | |
+ [2] = { | |
+ .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE, | |
+ .notify_rpm = true, | |
+ .cmd = l2_spm_power_off_cmd_sequence, | |
+ }, | |
+}; | |
+ | |
+ | |
+static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = { | |
+ [0] = { | |
+ .reg_base_addr = MSM_SAW_L2_BASE, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020205, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020, | |
+ .modes = msm_spm_l2_seq_list, | |
+ .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list), | |
+ }, | |
+}; | |
+ | |
+static struct msm_spm_platform_data msm_spm_data[] __initdata = { | |
+ [0] = { | |
+ .reg_base_addr = MSM_SAW0_BASE, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F, | |
+#if defined(CONFIG_MSM_AVS_HW) | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00, | |
+#endif | |
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020205, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C, | |
+ .vctl_timeout_us = 50, | |
+ .num_modes = ARRAY_SIZE(msm_spm_seq_list), | |
+ .modes = msm_spm_seq_list, | |
+ }, | |
+ [1] = { | |
+ .reg_base_addr = MSM_SAW1_BASE, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F, | |
+#if defined(CONFIG_MSM_AVS_HW) | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00, | |
+#endif | |
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020205, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C, | |
+ .vctl_timeout_us = 50, | |
+ .num_modes = ARRAY_SIZE(msm_spm_seq_list), | |
+ .modes = msm_spm_seq_list, | |
+ }, | |
+ [2] = { | |
+ .reg_base_addr = MSM_SAW2_BASE, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F, | |
+#if defined(CONFIG_MSM_AVS_HW) | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00, | |
+#endif | |
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020205, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C, | |
+ .vctl_timeout_us = 50, | |
+ .num_modes = ARRAY_SIZE(msm_spm_seq_list), | |
+ .modes = msm_spm_seq_list, | |
+ }, | |
+ [3] = { | |
+ .reg_base_addr = MSM_SAW3_BASE, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F, | |
+#if defined(CONFIG_MSM_AVS_HW) | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00, | |
+#endif | |
+ .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020205, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C, | |
+ .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C, | |
+ .vctl_timeout_us = 50, | |
+ .num_modes = ARRAY_SIZE(msm_spm_seq_list), | |
+ .modes = msm_spm_seq_list, | |
+ }, | |
+}; | |
+ | |
+static struct led_i2c_config lp5521_led_config[] = { | |
+ { | |
+ .name = "indicator", | |
+ }, | |
+}; | |
+static struct led_i2c_platform_data led_data = { | |
+ .num_leds = ARRAY_SIZE(lp5521_led_config), | |
+ .led_config = lp5521_led_config, | |
+ .ena_gpio_io_ext = IOEXT_GPIO_2, | |
+}; | |
+static struct i2c_board_info i2c_led_devices[] = { | |
+ { | |
+ I2C_BOARD_INFO(LED_I2C_NAME, 0x32), | |
+ .platform_data = &led_data, | |
+ .irq = -1, | |
+ }, | |
+}; | |
+ | |
+ | |
+#ifdef CONFIG_FLASHLIGHT_TPS61310 | |
+#if 0 | |
+#ifdef CONFIG_MSM_CAMERA_FLASH | |
+int flashlight_control(int mode) | |
+{ | |
+pr_info("%s, linear led, mode=%d", __func__, mode); | |
+ return tps61310_flashlight_control(mode); | |
+} | |
+#endif | |
+#endif | |
+static void config_flashlight_gpios(void) | |
+{ | |
+ return; | |
+} | |
+ | |
+static struct TPS61310_flashlight_platform_data flashlight_data = { | |
+ .gpio_init = config_flashlight_gpios, | |
+ .tps61310_strb0 = PM8921_GPIO_PM_TO_SYS(DRIVER_EN), | |
+ .tps61310_strb1 = PM8921_GPIO_PM_TO_SYS(TORCH_FLASHz), | |
+ .flash_duration_ms = 600, | |
+ .led_count = 1, | |
+ .disable_tx_mask = 1, | |
+}; | |
+ | |
+static struct i2c_board_info i2c_tps61310_flashlight[] = { | |
+ { | |
+ I2C_BOARD_INFO("TPS61310_FLASHLIGHT", 0x66 >> 1), | |
+ .platform_data = &flashlight_data, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+static struct msm_pm_sleep_status_data msm_pm_slp_sts_data = { | |
+ .base_addr = MSM_ACC0_BASE + 0x08, | |
+ .cpu_offset = MSM_ACC1_BASE - MSM_ACC0_BASE, | |
+ .mask = 1UL << 13, | |
+}; | |
+ | |
+static void __init impression_j_init_buses(void) | |
+{ | |
+ msm_bus_rpm_set_mt_mask(); | |
+ msm_bus_8064_apps_fabric_pdata.rpm_enabled = 1; | |
+ msm_bus_8064_sys_fabric_pdata.rpm_enabled = 1; | |
+ msm_bus_8064_mm_fabric_pdata.rpm_enabled = 1; | |
+ msm_bus_8064_apps_fabric.dev.platform_data = | |
+ &msm_bus_8064_apps_fabric_pdata; | |
+ msm_bus_8064_sys_fabric.dev.platform_data = | |
+ &msm_bus_8064_sys_fabric_pdata; | |
+ msm_bus_8064_mm_fabric.dev.platform_data = | |
+ &msm_bus_8064_mm_fabric_pdata; | |
+ msm_bus_8064_sys_fpb.dev.platform_data = &msm_bus_8064_sys_fpb_pdata; | |
+ msm_bus_8064_cpss_fpb.dev.platform_data = &msm_bus_8064_cpss_fpb_pdata; | |
+} | |
+ | |
+static struct platform_device impression_j_device_ext_5v_vreg __devinitdata = { | |
+ .name = GPIO_REGULATOR_DEV_NAME, | |
+ .id = PM8921_MPP_PM_TO_SYS(7), | |
+ .dev = { | |
+ .platform_data | |
+ = &impression_j_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V], | |
+ }, | |
+}; | |
+ | |
+static struct platform_device impression_j_device_ext_mpp8_vreg __devinitdata = { | |
+ .name = GPIO_REGULATOR_DEV_NAME, | |
+ .id = PM8921_MPP_PM_TO_SYS(8), | |
+ .dev = { | |
+ .platform_data | |
+ = &impression_j_gpio_regulator_pdata[GPIO_VREG_ID_EXT_MPP8], | |
+ }, | |
+}; | |
+ | |
+static struct platform_device impression_j_device_ext_ts_sw_vreg __devinitdata = { | |
+ .name = GPIO_REGULATOR_DEV_NAME, | |
+ .id = PM8921_GPIO_PM_TO_SYS(23), | |
+ .dev = { | |
+ .platform_data | |
+ = &impression_j_gpio_regulator_pdata[GPIO_VREG_ID_EXT_TS_SW], | |
+ }, | |
+}; | |
+ | |
+static struct platform_device impression_j_device_rpm_regulator __devinitdata = { | |
+ .name = "rpm-regulator", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &impression_j_rpm_regulator_pdata, | |
+ }, | |
+}; | |
+ | |
+#define MSM_RAM_CONSOLE_BASE MSM_HTC_RAM_CONSOLE_PHYS | |
+#define MSM_RAM_CONSOLE_SIZE MSM_HTC_RAM_CONSOLE_SIZE | |
+ | |
+static struct resource ram_console_resources[] = { | |
+ { | |
+ .start = MSM_RAM_CONSOLE_BASE, | |
+ .end = MSM_RAM_CONSOLE_BASE + MSM_RAM_CONSOLE_SIZE - 1, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+}; | |
+ | |
+static struct platform_device ram_console_device = { | |
+ .name = "ram_console", | |
+ .id = -1, | |
+ .num_resources = ARRAY_SIZE(ram_console_resources), | |
+ .resource = ram_console_resources, | |
+}; | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL | |
+static struct resource hdmi_msm_resources[] = { | |
+ { | |
+ .name = "hdmi_msm_qfprom_addr", | |
+ .start = 0x00700000, | |
+ .end = 0x007060FF, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ { | |
+ .name = "hdmi_msm_hdmi_addr", | |
+ .start = 0x04A00000, | |
+ .end = 0x04A00FFF, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ { | |
+ .name = "hdmi_msm_irq", | |
+ .start = HDMI_IRQ, | |
+ .end = HDMI_IRQ, | |
+ .flags = IORESOURCE_IRQ, | |
+ }, | |
+}; | |
+ | |
+static int hdmi_enable_5v(int on); | |
+static int hdmi_core_power(int on, int show); | |
+#if 0 | |
+static mhl_driving_params impression_j_driving_params[] = { | |
+ {.format = HDMI_VFRMT_640x480p60_4_3, .reg_a3=0xFD, .reg_a6=0x0C}, | |
+ {.format = HDMI_VFRMT_720x480p60_16_9, .reg_a3=0xFD, .reg_a6=0x0C}, | |
+ {.format = HDMI_VFRMT_1280x720p60_16_9, .reg_a3=0xFD, .reg_a6=0x0C}, | |
+ {.format = HDMI_VFRMT_720x576p50_16_9, .reg_a3=0xFD, .reg_a6=0x0C}, | |
+ {.format = HDMI_VFRMT_1920x1080p24_16_9, .reg_a3=0xFD, .reg_a6=0x0C}, | |
+ {.format = HDMI_VFRMT_1920x1080p30_16_9, .reg_a3=0xFD, .reg_a6=0x0C}, | |
+}; | |
+#endif | |
+static struct msm_hdmi_platform_data hdmi_msm_data = { | |
+ .irq = HDMI_IRQ, | |
+ .enable_5v = hdmi_enable_5v, | |
+ .core_power = hdmi_core_power, | |
+#if 0 | |
+ .driving_params = impression_j_driving_params, | |
+ .dirving_params_count = ARRAY_SIZE(impression_j_driving_params), | |
+#endif | |
+}; | |
+ | |
+static struct platform_device hdmi_msm_device = { | |
+ .name = "hdmi_msm", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(hdmi_msm_resources), | |
+ .resource = hdmi_msm_resources, | |
+ .dev.platform_data = &hdmi_msm_data, | |
+}; | |
+ | |
+ | |
+static int hdmi_enable_5v(int on) | |
+{ | |
+#if 0 | |
+ static int prev_on = 0; | |
+ | |
+ int rc; | |
+ | |
+ if (on == prev_on) | |
+ return 0; | |
+ | |
+ if (!reg_boost_5v) | |
+ _GET_REGULATOR(reg_boost_5v, BOOST_5V); | |
+ | |
+ if (on) { | |
+ rc = regulator_enable(reg_boost_5v); | |
+ if (rc) { | |
+ pr_err("'%s' regulator enable failed, rc=%d\n", | |
+ BOOST_5V, rc); | |
+ return rc; | |
+ } | |
+ } else { | |
+ rc = regulator_disable(reg_boost_5v); | |
+ if (rc) | |
+ pr_warning("'%s' regulator disable failed, rc=%d\n", | |
+ BOOST_5V, rc); | |
+ } | |
+ | |
+ pr_info("%s(%s): success\n", __func__, on?"on":"off"); | |
+ | |
+ prev_on = on; | |
+#endif | |
+ | |
+ return 0; | |
+} | |
+ | |
+ | |
+#define REG_CORE_POWER "8921_lvs7" | |
+static int hdmi_core_power(int on, int show) | |
+{ | |
+ static struct regulator *reg; | |
+ static int prev_on; | |
+ int rc; | |
+ | |
+ if (on == prev_on) | |
+ return 0; | |
+ | |
+ if (!reg) { | |
+ reg = regulator_get(&hdmi_msm_device.dev, REG_CORE_POWER); | |
+ if (IS_ERR(reg)) { | |
+ pr_err("could not get %s, rc = %ld\n", | |
+ REG_CORE_POWER, PTR_ERR(reg)); | |
+ return -ENODEV; | |
+ } | |
+ } | |
+ if (on) { | |
+ rc = regulator_enable(reg); | |
+ if (rc) { | |
+ pr_err("'%s' regulator enable failed, rc=%d\n", | |
+ REG_CORE_POWER, rc); | |
+ return rc; | |
+ } | |
+ | |
+ pr_info("%s(on): success\n", __func__); | |
+ } else { | |
+ rc = regulator_disable(reg); | |
+ if (rc) { | |
+ pr_err("disable %s failed, rc=%d\n", REG_CORE_POWER, rc); | |
+ return -ENODEV; | |
+ } | |
+ pr_info("%s(off): success\n", __func__); | |
+ } | |
+ prev_on = on; | |
+ return rc; | |
+} | |
+#endif | |
+ | |
+static struct ramdump_platform_data ramdump_data_1G = { | |
+ .count = 1, | |
+ .region = { | |
+ { | |
+ .start = 0x90000000, | |
+ .size = 0x30000000, | |
+ }, | |
+ } | |
+}; | |
+ | |
+struct platform_device device_htc_ramdump = { | |
+ .name = "htc_ramdump", | |
+ .id = 0, | |
+ .dev = {.platform_data = &ramdump_data_1G}, | |
+}; | |
+ | |
+static struct platform_device *common_devices[] __initdata = { | |
+ &msm8960_device_acpuclk, | |
+ &ram_console_device, | |
+ &apq8064_device_dmov, | |
+ &apq8064_device_qup_i2c_gsbi1, | |
+ &apq8064_device_qup_i2c_gsbi2, | |
+ &apq8064_device_qup_i2c_gsbi3, | |
+ &apq8064_device_qup_i2c_gsbi4, | |
+ &apq8064_device_qup_spi_gsbi5, | |
+#ifdef CONFIG_GSBI4_UARTDM | |
+ &msm_device_uart_dm4, | |
+#endif | |
+ &impression_j_device_ext_5v_vreg, | |
+ &impression_j_device_ext_mpp8_vreg, | |
+ &impression_j_device_ext_ts_sw_vreg, | |
+ &apq8064_device_ssbi_pmic1, | |
+ &apq8064_device_ssbi_pmic2, | |
+ &msm_device_smd_apq8064, | |
+ &apq8064_device_otg, | |
+ &apq8064_device_hsusb_host, | |
+ &msm_device_wcnss_wlan, | |
+ &apq8064_fmem_device, | |
+#ifdef CONFIG_ANDROID_PMEM | |
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION | |
+ &impression_j_android_pmem_device, | |
+ &impression_j_android_pmem_adsp_device, | |
+ &impression_j_android_pmem_audio_device, | |
+#endif | |
+#endif | |
+#ifdef CONFIG_ION_MSM | |
+ &impression_j_ion_dev, | |
+#endif | |
+#ifdef CONFIG_QSEECOM | |
+ &qseecom_device, | |
+#endif | |
+ &msm8064_device_watchdog, | |
+ &msm8064_device_saw_regulator_core0, | |
+ &msm8064_device_saw_regulator_core1, | |
+ &msm8064_device_saw_regulator_core2, | |
+ &msm8064_device_saw_regulator_core3, | |
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) | |
+ &qcrypto_device, | |
+#endif | |
+ | |
+#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \ | |
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE) | |
+ &qcedev_device, | |
+#endif | |
+ | |
+#ifdef CONFIG_HW_RANDOM_MSM | |
+ &apq8064_device_rng, | |
+#endif | |
+#ifdef CONFIG_MSM_CAMERA | |
+#ifdef CONFIG_RAWCHIP | |
+#if 1 | |
+ &impression_j_msm_rawchip_device, | |
+#endif | |
+#endif | |
+#endif | |
+ &apq_pcm, | |
+ &apq_pcm_routing, | |
+ &apq_cpudai0, | |
+ &apq_cpudai1, | |
+ &apq_cpudai_hdmi_rx, | |
+ &apq_cpudai_bt_rx, | |
+ &apq_cpudai_bt_tx, | |
+ &apq_cpudai_fm_rx, | |
+ &apq_cpudai_fm_tx, | |
+ &apq_cpu_fe, | |
+ &apq_stub_codec, | |
+ &apq_voice, | |
+ &apq_voip, | |
+ &apq_lpa_pcm, | |
+ &apq_pcm_hostless, | |
+ &apq_cpudai_afe_01_rx, | |
+ &apq_cpudai_afe_01_tx, | |
+ &apq_cpudai_afe_02_rx, | |
+ &apq_cpudai_afe_02_tx, | |
+ &apq_pcm_afe, | |
+ &apq_cpudai_pri_i2s_rx, | |
+ &apq_cpudai_pri_i2s_tx, | |
+#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL | |
+ &hdmi_msm_device, | |
+#endif | |
+ &apq_cpudai_auxpcm_rx, | |
+ &apq_cpudai_auxpcm_tx, | |
+ &apq_cpudai_stub, | |
+ &apq_cpudai_slimbus_1_rx, | |
+ &apq_cpudai_slimbus_1_tx, | |
+ &apq_cpudai_slimbus_2_tx, | |
+ &apq_cpudai_slimbus_3_rx, | |
+ &apq_cpudai_slim_4_rx, | |
+ &apq_cpudai_slim_4_tx, | |
+ &apq8064_rpm_device, | |
+ &apq8064_rpm_log_device, | |
+ &apq8064_rpm_stat_device, | |
+ &msm_bus_8064_apps_fabric, | |
+ &msm_bus_8064_sys_fabric, | |
+ &msm_bus_8064_mm_fabric, | |
+ &msm_bus_8064_sys_fpb, | |
+ &msm_bus_8064_cpss_fpb, | |
+ &apq8064_msm_device_vidc, | |
+ &msm_8960_riva, | |
+ &msm_8960_q6_lpass, | |
+ &msm_pil_vidc, | |
+ &msm_gss, | |
+#ifdef CONFIG_MSM_RTB | |
+ &impression_j_rtb_device, | |
+#endif | |
+#ifdef CONFIG_BT | |
+ &msm_device_uart_dm6, | |
+ &impression_j_rfkill, | |
+#endif | |
+ &msm8960_gemini_device, | |
+#ifdef CONFIG_HTC_BATT_8960 | |
+ &htc_battery_pdev, | |
+#endif | |
+#ifdef CONFIG_MSM_ROTATOR | |
+ &msm_rotator_device, | |
+#endif | |
+ &msm8960_cpu_idle_device, | |
+ &msm8960_msm_gov_device, | |
+ &msm_tsens_device, | |
+ &msm_device_tz_log, | |
+ &apq8064_iommu_domain_device, | |
+#ifdef CONFIG_MSM_CACHE_ERP | |
+ &apq8064_device_cache_erp, | |
+#endif | |
+#ifdef CONFIG_PERFLOCK | |
+ &msm8064_device_perf_lock, | |
+#endif | |
+#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) | |
+ &msm_device_tsif[1], | |
+#endif | |
+ &apq_compr_dsp, | |
+ &apq_multi_ch_pcm, | |
+}; | |
+ | |
+static struct platform_device *cdp_devices[] __initdata = { | |
+ &apq8064_device_uart_gsbi1, | |
+ &apq8064_device_uart_gsbi2, | |
+#ifdef CONFIG_SERIAL_IRDA | |
+ &apq8064_device_uart_gsbi3, | |
+#endif | |
+ &apq8064_device_uart_gsbi7, | |
+ &msm_cpudai_mi2s, | |
+ &msm_device_sps_apq8064, | |
+}; | |
+ | |
+static struct msm_spi_platform_data impression_j_qup_spi_gsbi5_pdata = { | |
+ .max_clock_speed = 1100000, | |
+}; | |
+ | |
+#define KS8851_IRQ_GPIO 43 | |
+ | |
+#if 0 | |
+static struct spi_board_info spi_board_info[] __initdata = { | |
+ { | |
+ .modalias = "ks8851", | |
+ .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO), | |
+ .max_speed_hz = 19200000, | |
+ .bus_num = 0, | |
+ .chip_select = 2, | |
+ .mode = SPI_MODE_0, | |
+ }, | |
+}; | |
+#endif | |
+ | |
+#ifdef CONFIG_MSM_CAMERA | |
+#ifdef CONFIG_RAWCHIP | |
+static struct spi_board_info rawchip_spi_board_info[] __initdata = { | |
+ { | |
+ .modalias = "spi_rawchip", | |
+ .max_speed_hz = 27000000, | |
+ .bus_num = 0, | |
+ .chip_select = 0, | |
+ .mode = SPI_MODE_0, | |
+ }, | |
+}; | |
+#endif | |
+#endif | |
+ | |
+static struct slim_boardinfo impression_j_slim_devices[] = { | |
+ { | |
+ .bus_num = 1, | |
+ .slim_slave = &impression_j_slim_tabla, | |
+ }, | |
+ { | |
+ .bus_num = 1, | |
+ .slim_slave = &impression_j_slim_tabla20, | |
+ }, | |
+ | |
+}; | |
+ | |
+static struct msm_i2c_platform_data impression_j_i2c_qup_gsbi1_pdata = { | |
+ .clk_freq = 400000, | |
+ .src_clk_rate = 24000000, | |
+}; | |
+ | |
+static struct msm_i2c_platform_data apq8064_i2c_qup_gsbi2_pdata = { | |
+ .clk_freq = 400000, | |
+ .src_clk_rate = 24000000, | |
+ | |
+}; | |
+ | |
+ | |
+static struct msm_i2c_platform_data impression_j_i2c_qup_gsbi3_pdata = { | |
+ .clk_freq = 400000, | |
+ .src_clk_rate = 24000000, | |
+ | |
+#ifdef CONFIG_SERIAL_IRDA | |
+ .share_uart_flag = 1, | |
+#endif | |
+}; | |
+ | |
+static struct msm_i2c_platform_data impression_j_i2c_qup_gsbi4_pdata = { | |
+ .clk_freq = 400000, | |
+ .src_clk_rate = 24000000, | |
+ .share_uart_flag = 1, | |
+}; | |
+ | |
+#ifdef CONFIG_SERIAL_IRDA | |
+int impression_irda_enable(int ebl) | |
+{ | |
+ int rc = 0; | |
+ | |
+ pr_info("[IRDA] %s, ebl: %d\n", __func__, ebl); | |
+ if (ebl) { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_11, 0); | |
+ } else { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_11, 1); | |
+ } | |
+ | |
+ return rc; | |
+} | |
+ | |
+static struct irda_platform_data impression_j_irda_gsbi3_pdata = { | |
+ .irda_enable = impression_irda_enable, | |
+ }; | |
+#endif | |
+ | |
+#define GSBI_DUAL_MODE_CODE 0x60 | |
+#define MSM_GSBI1_PHYS 0x12440000 | |
+static void __init impression_j_i2c_init(void) | |
+{ | |
+ void __iomem *gsbi_mem; | |
+ | |
+ apq8064_device_qup_i2c_gsbi1.dev.platform_data = | |
+ &impression_j_i2c_qup_gsbi1_pdata; | |
+ gsbi_mem = ioremap_nocache(MSM_GSBI1_PHYS, 4); | |
+ writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem); | |
+ | |
+ wmb(); | |
+ iounmap(gsbi_mem); | |
+ impression_j_i2c_qup_gsbi1_pdata.use_gsbi_shared_mode = 1; | |
+ | |
+ apq8064_device_qup_i2c_gsbi2.dev.platform_data = | |
+ &apq8064_i2c_qup_gsbi2_pdata; | |
+ apq8064_device_qup_i2c_gsbi3.dev.platform_data = | |
+ &impression_j_i2c_qup_gsbi3_pdata; | |
+ apq8064_device_qup_i2c_gsbi4.dev.platform_data = | |
+ &impression_j_i2c_qup_gsbi4_pdata; | |
+} | |
+ | |
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) | |
+static int ethernet_init(void) | |
+{ | |
+ int ret; | |
+#if 0 | |
+ ret = gpio_request(KS8851_IRQ_GPIO, "ks8851_irq"); | |
+#else | |
+ ret = 0; | |
+#endif | |
+ if (ret) { | |
+ pr_err("ks8851 gpio_request failed: %d\n", ret); | |
+ goto fail; | |
+ } | |
+ | |
+ return 0; | |
+fail: | |
+ return ret; | |
+} | |
+#else | |
+static int ethernet_init(void) | |
+{ | |
+ return 0; | |
+} | |
+#endif | |
+ | |
+#define GPIO_KEY_HOME PM8921_GPIO_PM_TO_SYS(27) | |
+#define GPIO_KEY_VOLUME_UP PM8921_GPIO_PM_TO_SYS(35) | |
+#define GPIO_KEY_VOLUME_DOWN PM8921_GPIO_PM_TO_SYS(38) | |
+#define GPIO_KEY_CAM_FOCUS PM8921_GPIO_PM_TO_SYS(3) | |
+#define GPIO_KEY_CAM_SNAP PM8921_GPIO_PM_TO_SYS(4) | |
+#define GPIO_KEY_ROTATION 46 | |
+ | |
+static struct gpio_keys_button cdp_keys[] = { | |
+ { | |
+ .code = KEY_HOME, | |
+ .gpio = GPIO_KEY_HOME, | |
+ .desc = "home_key", | |
+ .active_low = 1, | |
+ .type = EV_KEY, | |
+ .wakeup = 1, | |
+ .debounce_interval = 15, | |
+ }, | |
+ { | |
+ .code = KEY_VOLUMEUP, | |
+ .gpio = GPIO_KEY_VOLUME_UP, | |
+ .desc = "volume_up_key", | |
+ .active_low = 1, | |
+ .type = EV_KEY, | |
+ .wakeup = 1, | |
+ .debounce_interval = 15, | |
+ }, | |
+ { | |
+ .code = KEY_VOLUMEDOWN, | |
+ .gpio = GPIO_KEY_VOLUME_DOWN, | |
+ .desc = "volume_down_key", | |
+ .active_low = 1, | |
+ .type = EV_KEY, | |
+ .wakeup = 1, | |
+ .debounce_interval = 15, | |
+ }, | |
+ { | |
+ .code = SW_ROTATE_LOCK, | |
+ .gpio = GPIO_KEY_ROTATION, | |
+ .desc = "rotate_key", | |
+ .active_low = 1, | |
+ .type = EV_SW, | |
+ .debounce_interval = 15, | |
+ }, | |
+}; | |
+ | |
+static struct gpio_keys_platform_data cdp_keys_data = { | |
+ .buttons = cdp_keys, | |
+ .nbuttons = ARRAY_SIZE(cdp_keys), | |
+}; | |
+ | |
+static struct platform_device cdp_kp_pdev = { | |
+ .name = "gpio-keys", | |
+ .id = -1, | |
+ .dev = { | |
+ .platform_data = &cdp_keys_data, | |
+ }, | |
+}; | |
+ | |
+#define DSPS_PIL_GENERIC_NAME "dsps" | |
+static void __init impression_j_init_dsps(void) | |
+{ | |
+ struct msm_dsps_platform_data *pdata = | |
+ msm_dsps_device_8064.dev.platform_data; | |
+ pdata->pil_name = DSPS_PIL_GENERIC_NAME; | |
+ pdata->gpios = NULL; | |
+ pdata->gpios_num = 0; | |
+ | |
+ platform_device_register(&msm_dsps_device_8064); | |
+} | |
+ | |
+#define I2C_SURF 1 | |
+#define I2C_FFA (1 << 1) | |
+#define I2C_RUMI (1 << 2) | |
+#define I2C_SIM (1 << 3) | |
+#define I2C_LIQUID (1 << 4) | |
+ | |
+struct i2c_registry { | |
+ u8 machs; | |
+ int bus; | |
+ struct i2c_board_info *info; | |
+ int len; | |
+}; | |
+ | |
+static struct bma250_platform_data gsensor_bma250_platform_data = { | |
+ .chip_layout = 1, | |
+ .axis_map_x = 0, | |
+ .axis_map_y = 1, | |
+ .axis_map_z = 2, | |
+ .negate_x = 0, | |
+ .negate_y = 0, | |
+ .negate_z = 0, | |
+}; | |
+ | |
+static struct akm8963_platform_data compass_platform_data = { | |
+ .layout = 1, | |
+ .outbit = 1, | |
+ .gpio_DRDY = PM8921_GPIO_PM_TO_SYS(COMPASS_AKM_INT), | |
+ .gpio_RST = 0, | |
+}; | |
+ | |
+static struct r3gd20_gyr_platform_data gyro_platform_data = { | |
+ .fs_range = R3GD20_GYR_FS_2000DPS, | |
+ .axis_map_x = 0, | |
+ .axis_map_y = 1, | |
+ .axis_map_z = 2, | |
+ .negate_x = 0, | |
+ .negate_y = 0, | |
+ .negate_z = 0, | |
+ | |
+ .poll_interval = 50, | |
+ .min_interval = R3GD20_MIN_POLL_PERIOD_MS, | |
+ | |
+ | |
+ | |
+ | |
+ .watermark = 0, | |
+ .fifomode = 0, | |
+}; | |
+ | |
+static struct i2c_board_info motion_sensor_gsbi_2_info[] = { | |
+ { | |
+ I2C_BOARD_INFO(BMA250_I2C_NAME, 0x30 >> 1), | |
+ .platform_data = &gsensor_bma250_platform_data, | |
+ | |
+ }, | |
+ { | |
+ I2C_BOARD_INFO(AKM8963_I2C_NAME, 0x1A >> 1), | |
+ .platform_data = &compass_platform_data, | |
+ .irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, COMPASS_AKM_INT), | |
+ }, | |
+ { | |
+ I2C_BOARD_INFO(R3GD20_GYR_DEV_NAME, 0xD0 >> 1), | |
+ .platform_data = &gyro_platform_data, | |
+ | |
+ }, | |
+}; | |
+ | |
+static struct mpu3050_platform_data mpu3050_data = { | |
+ .int_config = 0x10, | |
+ .orientation = { 1, 0, 0, | |
+ 0, 1, 0, | |
+ 0, 0, 1 }, | |
+ .level_shifter = 0, | |
+ | |
+ .accel = { | |
+ .get_slave_descr = get_accel_slave_descr, | |
+ .adapt_num = MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ .bus = EXT_SLAVE_BUS_SECONDARY, | |
+ .address = 0x30 >> 1, | |
+ .orientation = { 1, 0, 0, | |
+ 0, 1, 0, | |
+ 0, 0, 1 }, | |
+ | |
+ }, | |
+ .compass = { | |
+ .get_slave_descr = get_compass_slave_descr, | |
+ .adapt_num = MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ .bus = EXT_SLAVE_BUS_PRIMARY, | |
+ .address = 0x1A >> 1, | |
+ .orientation = { 1, 0, 0, | |
+ 0, 1, 0, | |
+ 0, 0, 1 }, | |
+ }, | |
+}; | |
+ | |
+static struct i2c_board_info __initdata mpu3050_GSBI12_boardinfo[] = { | |
+ { | |
+ I2C_BOARD_INFO("mpu3050", 0xD0 >> 1), | |
+ .irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, GYRO_INT), | |
+ .platform_data = &mpu3050_data, | |
+ }, | |
+}; | |
+static struct i2c_board_info pwm_i2c_devices[] = { | |
+ { | |
+ I2C_BOARD_INFO("pwm_i2c", 0x70 >> 1), | |
+ }, | |
+}; | |
+ | |
+static struct i2c_registry impression_j_i2c_devices[] __initdata = { | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ APQ_8064_GSBI3_QUP_I2C_BUS_ID, | |
+ msm_i2c_gsbi3_info, | |
+ ARRAY_SIZE(msm_i2c_gsbi3_info), | |
+ }, | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ APQ_8064_GSBI1_QUP_I2C_BUS_ID, | |
+ msm_smb_349_boardinfo, | |
+ ARRAY_SIZE(msm_smb_349_boardinfo), | |
+ }, | |
+#endif | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ APQ_8064_GSBI1_QUP_I2C_BUS_ID, | |
+ msm_i2c_gsbi1_tfa9887_info, | |
+ ARRAY_SIZE(msm_i2c_gsbi1_tfa9887_info), | |
+ }, | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ APQ_8064_GSBI1_QUP_I2C_BUS_ID, | |
+ msm_i2c_gsbi1_tpa6185_info, | |
+ ARRAY_SIZE(msm_i2c_gsbi1_tpa6185_info), | |
+ }, | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ APQ_8064_GSBI1_QUP_I2C_BUS_ID, | |
+ msm_i2c_gsbi1_rt5501_info, | |
+ ARRAY_SIZE(msm_i2c_gsbi1_rt5501_info), | |
+ }, | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ i2c_CM36282_devices, | |
+ ARRAY_SIZE(i2c_CM36282_devices), | |
+ }, | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ i2c_ioext_devices, | |
+ ARRAY_SIZE(i2c_ioext_devices), | |
+ }, | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ pwm_i2c_devices, | |
+ ARRAY_SIZE(pwm_i2c_devices), | |
+ }, | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ i2c_led_devices, | |
+ ARRAY_SIZE(i2c_led_devices), | |
+ }, | |
+#ifdef CONFIG_FLASHLIGHT_TPS61310 | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ i2c_tps61310_flashlight, | |
+ ARRAY_SIZE(i2c_tps61310_flashlight), | |
+ }, | |
+#endif | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL_SII9234 | |
+ { | |
+ I2C_SURF | I2C_FFA, | |
+ APQ_8064_GSBI1_QUP_I2C_BUS_ID, | |
+ msm_i2c_mhl_sii9234_info, | |
+ ARRAY_SIZE(msm_i2c_mhl_sii9234_info), | |
+ }, | |
+#endif | |
+#endif | |
+ | |
+#ifdef CONFIG_VIDEO_NMI | |
+ { | |
+ I2C_SURF | I2C_FFA , | |
+ MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ nmi625_i2c_info, | |
+ ARRAY_SIZE(nmi625_i2c_info), | |
+ }, | |
+#endif | |
+ | |
+}; | |
+ | |
+#ifdef CONFIG_RESET_BY_CABLE_IN | |
+static uint32_t ac_reset_gpio_table[] = { | |
+ GPIO_CFG(AC_WDT_RST, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), | |
+}; | |
+ | |
+void reset_dflipflop(void) | |
+{ | |
+ gpio_tlmm_config(ac_reset_gpio_table[0], GPIO_CFG_ENABLE); | |
+ gpio_set_value(AC_WDT_RST, 0); | |
+ pr_info("[CABLE] Clear D Flip-Flop\n"); | |
+ udelay(100); | |
+ gpio_set_value(AC_WDT_RST, 1); | |
+ pr_info("[CABLE] Restore D Flip-Flop\n"); | |
+} | |
+ | |
+#endif | |
+ | |
+static void __init register_i2c_devices(void) | |
+{ | |
+ u8 mach_mask = 0; | |
+ int i; | |
+ | |
+ | |
+ mach_mask = I2C_SURF; | |
+ | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL | |
+#ifdef CONFIG_FB_MSM_HDMI_MHL_SII9234 | |
+ | |
+ mhl_sii9234_device_data.gpio_reset = PM8921_GPIO_PM_TO_SYS(MHL_RSTz); | |
+#endif | |
+#endif | |
+ | |
+ for (i = 0; i < ARRAY_SIZE(impression_j_i2c_devices); ++i) { | |
+ if (impression_j_i2c_devices[i].machs & mach_mask) | |
+ i2c_register_board_info(impression_j_i2c_devices[i].bus, | |
+ impression_j_i2c_devices[i].info, | |
+ impression_j_i2c_devices[i].len); | |
+ } | |
+ | |
+ printk(KERN_ERR "gy_type = %d\n", gy_type); | |
+ if (gy_type == 2) { | |
+ i2c_register_board_info(MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ motion_sensor_gsbi_2_info, | |
+ ARRAY_SIZE(motion_sensor_gsbi_2_info)); | |
+ } else { | |
+ i2c_register_board_info(MSM8064_GSBI2_QUP_I2C_BUS_ID, | |
+ mpu3050_GSBI12_boardinfo, | |
+ ARRAY_SIZE(mpu3050_GSBI12_boardinfo)); | |
+ } | |
+} | |
+ | |
+#ifdef CONFIG_VIDEO_NMI | |
+ | |
+#define GPO_7_DATA_MASK 0x01 | |
+#define GPO_8_DATA_MASK 0x02 | |
+#define GPO_9_DATA_MASK 0x04 | |
+#define GPO_10_DATA_MASK 0x08 | |
+ | |
+#define ONESEG_RST IOEXT_GPIO_1 | |
+#define ONESEG_EN IOEXT_GPIO_3 | |
+ | |
+static struct regulator *reg_8921_l15; | |
+static struct regulator *reg_8921_l28; | |
+ | |
+static int oneseg_antenna_matrix_power_enable(char *power, unsigned volt, struct regulator **matrix_power) | |
+{ | |
+ int rc; | |
+ | |
+ if (power == NULL) | |
+ return -ENODEV; | |
+ | |
+ *matrix_power = regulator_get(NULL, power); | |
+ | |
+ if (IS_ERR(*matrix_power)) { | |
+ printk(KERN_ERR "[1SEG] %s: Unable to get %s\n", __func__, power); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ if (volt == 2850000) { | |
+ rc = regulator_set_voltage(*matrix_power, volt, volt); | |
+ if (rc < 0) { | |
+ printk(KERN_ERR "[1SEG] %s: unable to set %s voltage to %d rc:%d\n", __func__, power, volt, rc); | |
+ regulator_put(*matrix_power); | |
+ *matrix_power = NULL; | |
+ return -ENODEV; | |
+ } | |
+ } | |
+ else | |
+ { | |
+ printk(KERN_ERR "[1SEG] %s: Volt is not set 2V8, set volt is %d\n", __func__, volt); | |
+ } | |
+ | |
+ rc = regulator_enable(*matrix_power); | |
+ if (rc < 0) { | |
+ printk(KERN_ERR "[1SEG] %s: Enable regulator %s failed\n", __func__, power); | |
+ regulator_put(*matrix_power); | |
+ *matrix_power = NULL; | |
+ return -ENODEV; | |
+ } | |
+ | |
+ return rc; | |
+} | |
+ | |
+static int oneseg_antenna_matrix_power_disable(struct regulator *matrix_power) | |
+{ | |
+ int rc; | |
+ if (matrix_power == NULL) | |
+ return -ENODEV; | |
+ | |
+ if (IS_ERR(matrix_power)) { | |
+ printk(KERN_ERR "[1SEG] %s: Invalid requlator ptr\n", __func__); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_disable(matrix_power); | |
+ if (rc < 0) | |
+ printk(KERN_ERR "[1SEG] %s: disable regulator failed\n", __func__); | |
+ | |
+ regulator_put(matrix_power); | |
+ matrix_power = NULL; | |
+ return rc; | |
+} | |
+ | |
+static int oneseg_1v2_en_enable(char *power, unsigned volt, struct regulator **matrix_power) | |
+{ | |
+ int rc; | |
+ | |
+ if (power == NULL) | |
+ return -ENODEV; | |
+ | |
+ *matrix_power = regulator_get(NULL, power); | |
+ | |
+ if (IS_ERR(*matrix_power)) { | |
+ printk(KERN_ERR "[1SEG] %s: Unable to get %s\n", __func__, power); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ if (volt == 1200000) { | |
+ rc = regulator_set_voltage(*matrix_power, volt, volt); | |
+ if (rc < 0) { | |
+ printk(KERN_ERR "[1SEG] %s: unable to set %s voltage to %d rc:%d\n", __func__, power, volt, rc); | |
+ regulator_put(*matrix_power); | |
+ *matrix_power = NULL; | |
+ return -ENODEV; | |
+ } | |
+ } | |
+ else | |
+ { | |
+ printk(KERN_ERR "[1SEG] %s: Volt is not set 2V8, set volt is %d\n", __func__, volt); | |
+ } | |
+ | |
+ rc = regulator_enable(*matrix_power); | |
+ if (rc < 0) { | |
+ printk(KERN_ERR "[1SEG] %s: Enable regulator %s failed\n", __func__, power); | |
+ regulator_put(*matrix_power); | |
+ *matrix_power = NULL; | |
+ return -ENODEV; | |
+ } | |
+ | |
+ return rc; | |
+} | |
+ | |
+static int oneseg_1v2_en_disable(struct regulator *matrix_power) | |
+{ | |
+ int rc; | |
+ if (matrix_power == NULL) | |
+ return -ENODEV; | |
+ | |
+ if (IS_ERR(matrix_power)) { | |
+ printk(KERN_ERR "[1SEG] %s: Invalid requlator ptr\n", __func__); | |
+ return -ENODEV; | |
+ } | |
+ | |
+ rc = regulator_disable(matrix_power); | |
+ if (rc < 0) | |
+ printk(KERN_ERR "[1SEG] %s: disable regulator failed\n", __func__); | |
+ | |
+ regulator_put(matrix_power); | |
+ matrix_power = NULL; | |
+ return rc; | |
+} | |
+ | |
+int oneseg_select_antenna(unsigned char data) | |
+{ | |
+ int rc = 0; | |
+ | |
+ if (data & GPO_7_DATA_MASK) | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_7, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_7 to 1, rc = %d \n", __func__, rc); | |
+ } | |
+ else | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_7, 0); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_7 to 0, rc = %d \n", __func__, rc); | |
+ } | |
+ | |
+ if (data & GPO_8_DATA_MASK) | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_8, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_8 to 1, rc = %d \n", __func__, rc); | |
+ } | |
+ else | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_8, 0); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_8 to 0, rc = %d \n", __func__, rc); | |
+ } | |
+ | |
+ if (data & GPO_9_DATA_MASK) | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_9, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_9 to 1, rc = %d \n", __func__, rc); | |
+ } | |
+ else | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_9, 0); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_9 to 0, rc = %d \n", __func__, rc); | |
+ } | |
+ | |
+ if (data & GPO_10_DATA_MASK) | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_10, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_10 to 1, rc = %d \n", __func__, rc); | |
+ } | |
+ else | |
+ { | |
+ rc = ioext_gpio_set_value(IOEXT_GPIO_10, 0); | |
+ printk(KERN_INFO "[1SEG] %s: set IOEXT_GPIO_10 to 0, rc = %d \n", __func__, rc); | |
+ } | |
+ | |
+ return rc; | |
+} | |
+ | |
+int oneseg_power(int on) | |
+{ | |
+ int rc = 0; | |
+ | |
+ if (on) | |
+ { | |
+ printk(KERN_INFO "[1SEG] %s: on \n", __func__); | |
+ | |
+ | |
+ rc = ioext_gpio_set_value(ONESEG_RST, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set ONESEG_RST to 1, rc=%d \n", __func__, rc); | |
+ | |
+ msleep(1); | |
+ | |
+ | |
+ oneseg_1v2_en_enable("8921_l28", 1200000, ®_8921_l28); | |
+ printk(KERN_INFO "[1SEG] %s: set ONESEG_1V2_EN to 1, rc=%d \n", __func__, rc); | |
+ | |
+ msleep(10); | |
+ | |
+ | |
+ rc = ioext_gpio_set_value(ONESEG_EN, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set ONESEG_EN to 1, rc=%d \n", __func__, rc); | |
+ | |
+ msleep(10); | |
+ | |
+ | |
+ rc = ioext_gpio_set_value(ONESEG_RST, 0); | |
+ printk(KERN_INFO "[1SEG] %s: set ONESEG_RST to 0, rc=%d \n", __func__, rc); | |
+ | |
+ msleep(1); | |
+ | |
+ | |
+ rc = ioext_gpio_set_value(ONESEG_RST, 1); | |
+ printk(KERN_INFO "[1SEG] %s: set ONESEG_RST to 1, rc=%d \n", __func__, rc); | |
+ | |
+ msleep(10); | |
+ | |
+ | |
+ oneseg_antenna_matrix_power_enable("8921_l15", 2850000, ®_8921_l15); | |
+ | |
+ msleep(1); | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ } | |
+ else | |
+ { | |
+ | |
+ printk(KERN_INFO "[1SEG] %s: off \n", __func__); | |
+ | |
+ | |
+ oneseg_antenna_matrix_power_disable(reg_8921_l15); | |
+ | |
+ msleep(1); | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ | |
+ rc = ioext_gpio_set_value(ONESEG_EN, 0); | |
+ printk(KERN_INFO "[1SEG] %s: unset ONESEG_EN to 0, rc=%d \n", __func__, rc); | |
+ | |
+ msleep(10); | |
+ | |
+ | |
+ oneseg_1v2_en_disable(reg_8921_l28); | |
+ printk(KERN_INFO "[1SEG] %s: unset ONESEG_1V2_EN to 0, rc=%d \n", __func__, rc); | |
+ | |
+ } | |
+ return rc; | |
+} | |
+EXPORT_SYMBOL(oneseg_power); | |
+ | |
+ | |
+static void impression_j_init_1seg(void) | |
+{ | |
+ printk(KERN_INFO "impression_j: %s\n", __func__); | |
+ platform_device_register(&nm32x_62x_tsi_device); | |
+} | |
+#endif | |
+ | |
+#ifdef CONFIG_SERIAL_IRDA | |
+static uint32_t msm_uart_gsbi3_gpio[] = { | |
+ GPIO_CFG(SIR_TX, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+ GPIO_CFG(SIR_RX, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), | |
+}; | |
+static void msm_uart_gsbi3_gpio_init(void) | |
+{ | |
+ gpio_tlmm_config(msm_uart_gsbi3_gpio[0], GPIO_CFG_ENABLE); | |
+ gpio_tlmm_config(msm_uart_gsbi3_gpio[1], GPIO_CFG_ENABLE); | |
+ pr_info("%s ok!\n", __func__); | |
+} | |
+ | |
+static void __init impression_j_irda_init(void) | |
+{ | |
+ msm_uart_gsbi3_gpio_init(); | |
+ apq8064_device_uart_gsbi3.dev.platform_data = | |
+ &impression_j_irda_gsbi3_pdata; | |
+} | |
+#endif | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ static struct pm8xxx_gpio_init smb349_pmic_gpio[] = { | |
+ PM8XXX_GPIO_INIT(CHARGER_STAT, PM_GPIO_DIR_IN, | |
+ PM_GPIO_OUT_BUF_CMOS, 0, PM_GPIO_PULL_UP_1P5, | |
+ PM_GPIO_VIN_S4, PM_GPIO_STRENGTH_LOW, | |
+ PM_GPIO_FUNC_NORMAL, 0, 0), | |
+}; | |
+ | |
+ | |
+static struct pm8xxx_mpp_config_data smb349_susp = { | |
+ .type = PM8XXX_MPP_TYPE_D_OUTPUT, | |
+ .level = PM8921_MPP_DIG_LEVEL_S4, | |
+}; | |
+ | |
+int smb349_mpp_init(int mpp) | |
+{ | |
+ int ret = 0; | |
+ | |
+ pr_info("[%s]\n", __func__); | |
+ | |
+ | |
+ smb349_susp.control = PM8XXX_MPP_DOUT_CTRL_HIGH; | |
+ ret = pm8xxx_mpp_config(PM8921_MPP_PM_TO_SYS(7), &smb349_susp); | |
+ if (ret < 0) | |
+ pr_err("%s: SUSP configuration failed\n", __func__); | |
+ | |
+ | |
+ | |
+ ret = pm8xxx_gpio_config(smb349_pmic_gpio[0].gpio, &smb349_pmic_gpio[0].config); | |
+ if (ret < 0) | |
+ pr_err("[USB BOARD] %s: Config ERROR: GPIO=%u, rc=%d\n", __func__, smb349_pmic_gpio[0].gpio, ret); | |
+ | |
+ return ret; | |
+} | |
+ | |
+static void __init impression_j_smb349_mpp_init(void) | |
+{ | |
+ | |
+ smb349_mpp_init(smb349_data.chg_susp_gpio); | |
+ | |
+} | |
+#endif | |
+ | |
+static void __init impression_j_common_init(void) | |
+{ | |
+ int rc = 0; | |
+ struct kobject *properties_kobj; | |
+ | |
+ msm_thermal_init(&msm_thermal_pdata); | |
+ | |
+ if (socinfo_init() < 0) | |
+ pr_err("socinfo_init() failed!\n"); | |
+ | |
+ pr_info("%s: platform_subtype = %d\r\n", __func__, | |
+ socinfo_get_platform_subtype()); | |
+ pr_info("%s: socinf version = %u.%u\r\n", __func__, | |
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()), | |
+ SOCINFO_VERSION_MINOR(socinfo_get_version())); | |
+ | |
+ BUG_ON(msm_rpm_init(&apq8064_rpm_data)); | |
+ BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data)); | |
+ msm_rpmrs_lpm_init(1, 1, 1, 1); | |
+ regulator_suppress_info_printing(); | |
+ platform_device_register(&impression_j_device_rpm_regulator); | |
+ if (msm_xo_init()) | |
+ pr_err("Failed to initialize XO votes\n"); | |
+ | |
+ clk_ignor_list_add("msm_sdcc.4", "core_clk", &apq8064_clock_init_data); | |
+ | |
+ msm_clock_init(&apq8064_clock_init_data); | |
+ impression_j_init_gpiomux(); | |
+#ifdef CONFIG_RESET_BY_CABLE_IN | |
+ pr_info("[CABLE] Enable Ac Reset Function.(%d) \n", system_rev); | |
+ gpio_tlmm_config(ac_reset_gpio_table[0], GPIO_CFG_ENABLE); | |
+ gpio_set_value(AC_WDT_RST, 1); | |
+#endif | |
+ | |
+ impression_j_i2c_init(); | |
+ | |
+#ifdef CONFIG_SERIAL_IRDA | |
+ impression_j_irda_init(); | |
+#endif | |
+ | |
+#ifdef CONFIG_BT | |
+ | |
+ bt_export_bd_address(); | |
+ msm_uart_dm6_pdata.wakeup_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, BT_HOST_WAKE); | |
+ msm_device_uart_dm6.name = "msm_serial_hs_brcm"; | |
+ msm_device_uart_dm6.dev.platform_data = &msm_uart_dm6_pdata; | |
+#endif | |
+ if (system_rev >= XB) { | |
+ for (rc = 0; rc < ARRAY_SIZE(msm_i2c_gsbi3_info); rc++) { | |
+ if (!strcmp(msm_i2c_gsbi3_info[rc].type, SYNAPTICS_3200_NAME)) | |
+ msm_i2c_gsbi3_info[rc].platform_data = &syn_ts_3k_xb_data; | |
+ } | |
+ if (board_build_flag() == 1) { | |
+ for (rc = 0; rc < ARRAY_SIZE(syn_ts_3k_xb_data); rc++) | |
+ syn_ts_3k_xb_data[rc].mfg_flag = 1; | |
+ } | |
+ } else { | |
+ if (board_build_flag() == 1) { | |
+ for (rc = 0; rc < ARRAY_SIZE(syn_ts_3k_data); rc++) | |
+ syn_ts_3k_data[rc].mfg_flag = 1; | |
+ } | |
+ } | |
+ | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ if(system_rev < XC) | |
+ smb349_data.chip_rev = SMB_349; | |
+ else | |
+ smb349_data.chip_rev = SMB_340; | |
+ | |
+ smb349_data.aicl_result_threshold = AICL_RESULT_1600MA; | |
+ smb349_data.dc_input_max = DC_INPUT_1700MA; | |
+ smb349_data.aicl_on = AICL_ENABLE; | |
+#endif | |
+ | |
+ register_i2c_devices(); | |
+ | |
+ apq8064_device_qup_spi_gsbi5.dev.platform_data = | |
+ &impression_j_qup_spi_gsbi5_pdata; | |
+ impression_j_init_pmic(); | |
+ | |
+ android_usb_pdata.swfi_latency = | |
+ msm_rpmrs_levels[0].latency_us; | |
+ | |
+ apq8064_device_otg.dev.platform_data = &msm_otg_pdata; | |
+ apq8064_ehci_host_init(); | |
+ impression_j_init_buses(); | |
+#ifdef CONFIG_HTC_BATT_8960 | |
+ htc_battery_cell_init(htc_battery_cells, ARRAY_SIZE(htc_battery_cells)); | |
+#endif | |
+ | |
+ platform_add_devices(common_devices, ARRAY_SIZE(common_devices)); | |
+ | |
+ if(board_mfg_mode() == 9) { | |
+ if (board_fullramdump_flag()) | |
+ device_htc_ramdump.dev.platform_data = &ramdump_data_1G; | |
+ platform_device_register(&device_htc_ramdump); | |
+ } | |
+ | |
+ apq8064_device_hsic_host.dev.platform_data = &msm_hsic_pdata; | |
+ msm_hsic_pdata.swfi_latency = msm_rpmrs_levels[0].latency_us; | |
+ device_initialize(&apq8064_device_hsic_host.dev); | |
+ impression_j_pm8xxx_gpio_mpp_init(); | |
+ impression_j_init_mmc(); | |
+ | |
+ impression_j_wifi_init(); | |
+ | |
+ | |
+#ifdef CONFIG_SMB349_CHARGER | |
+ impression_j_smb349_mpp_init(); | |
+#endif | |
+ | |
+ pr_info("%s: Add MDM2 device\n", __func__); | |
+ mdm_8064_device.dev.platform_data = &mdm_platform_data; | |
+ platform_device_register(&mdm_8064_device); | |
+ | |
+ platform_device_register(&apq8064_slim_ctrl); | |
+ slim_register_board_info(impression_j_slim_devices, | |
+ ARRAY_SIZE(impression_j_slim_devices)); | |
+ impression_j_init_dsps(); | |
+ msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data)); | |
+ msm_spm_l2_init(msm_spm_l2_data); | |
+#if 0 | |
+ msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data)); | |
+ msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates), | |
+ msm_pm_data); | |
+#endif | |
+ BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata)); | |
+ msm_pm_init_sleep_status_data(&msm_pm_slp_sts_data); | |
+ properties_kobj = kobject_create_and_add("board_properties", NULL); | |
+ if (properties_kobj) { | |
+ rc = sysfs_create_group(properties_kobj, &properties_attr_group); | |
+ if(rc) { | |
+ if (system_rev >= XB) { | |
+ for (rc = 0; rc < ARRAY_SIZE(msm_i2c_gsbi3_info); rc++) { | |
+ if (!strcmp(msm_i2c_gsbi3_info[rc].type, SYNAPTICS_3200_NAME)){ | |
+ syn_ts_3k_xb_data[rc].vk_obj = properties_kobj; | |
+ syn_ts_3k_xb_data[rc].vk2Use = &syn_virtual_keys_attr; | |
+ } | |
+ } | |
+ } else { | |
+ syn_ts_3k_data[rc].vk_obj = properties_kobj; | |
+ syn_ts_3k_data[rc].vk2Use = &syn_virtual_keys_attr; | |
+ } | |
+ } | |
+ } | |
+ | |
+#ifdef CONFIG_FELICA_CXD2235_DD | |
+ impression_j_init_felica(); | |
+#endif | |
+ | |
+ headset_device_register(); | |
+ impression_j_init_keypad(); | |
+#ifdef CONFIG_VIDEO_NMI | |
+ impression_j_init_1seg(); | |
+#endif | |
+#ifdef CONFIG_SUPPORT_USB_SPEAKER | |
+ pm_qos_add_request(&pm_qos_req_dma, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE); | |
+#endif | |
+ if ((get_kernel_flag() & KERNEL_FLAG_PM_MONITOR) || | |
+ (!(get_kernel_flag() & KERNEL_FLAG_TEST_PWR_SUPPLY) && (!get_tamper_sf()))) { | |
+ htc_monitor_init(); | |
+ htc_pm_monitor_init(); | |
+ } | |
+ impression_j_L18_LPM(); | |
+} | |
+ | |
+unsigned long ion_kgsl_heap_vaddr = 0; | |
+unsigned long ion_kgsl_heap_paddr = 0; | |
+ | |
+static void __init impression_j_allocate_memory_regions(void) | |
+{ | |
+#ifdef CONFIG_FB_MSM | |
+ impression_j_allocate_fb_region(); | |
+#endif | |
+ | |
+ | |
+} | |
+ | |
+static void __init impression_j_cdp_init(void) | |
+{ | |
+ pr_info("%s: init starts\r\n", __func__); | |
+ msm_tsens_early_init(&apq_tsens_pdata); | |
+ impression_j_common_init(); | |
+ ethernet_init(); | |
+ msm_rotator_set_split_iommu_domain(); | |
+ platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices)); | |
+ | |
+#if 1 | |
+#ifdef CONFIG_MSM_CAMERA | |
+#ifdef CONFIG_RAWCHIP | |
+ spi_register_board_info(rawchip_spi_board_info, ARRAY_SIZE(rawchip_spi_board_info)); | |
+#endif | |
+#endif | |
+#else | |
+ spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | |
+#endif | |
+ | |
+#ifdef CONFIG_FB_MSM | |
+ msm_rotator_update_bus_vectors(1920, 1080); | |
+ impression_j_init_fb(); | |
+ impression_j_init_gpu(); | |
+#endif | |
+ platform_add_devices(apq8064_footswitch, apq8064_num_footswitch); | |
+#ifdef CONFIG_MSM_CAMERA | |
+ impression_j_init_cam(); | |
+#endif | |
+ platform_device_register(&cdp_kp_pdev); | |
+ | |
+#ifdef CONFIG_CPU_FREQ_GOV_ONDEMAND_2_PHASE | |
+ if(!cpu_is_krait_v1()) | |
+ set_two_phase_freq(1134000); | |
+#endif | |
+ | |
+ | |
+ | |
+ if (!(board_mfg_mode() == 6 || board_mfg_mode() == 7)) | |
+ impression_j_add_usb_devices(); | |
+} | |
+ | |
+#define PHY_BASE_ADDR1 0x80600000 | |
+#define SIZE_ADDR1 (136 * 1024 * 1024) | |
+ | |
+#define PHY_BASE_ADDR2 0x89000000 | |
+#define SIZE_ADDR2 (63 * 1024 * 1024) | |
+ | |
+#define PHY_BASE_ADDR3 0x90000000 | |
+#define SIZE_ADDR3 (768 * 1024 * 1024) | |
+ | |
+#define DDR_1GB_SIZE (1024 * 1024 * 1024) | |
+ | |
+ | |
+ | |
+static void __init impression_j_fixup(struct tag *tags, char **cmdline, struct meminfo *mi) | |
+{ | |
+ mem_size_mb = parse_tag_memsize((const struct tag *)tags); | |
+ printk(KERN_DEBUG "%s: mem_size_mb=%u\n, mfg_mode = %d", __func__, mem_size_mb, board_mfg_mode()); | |
+ | |
+ mi->nr_banks = 3; | |
+ mi->bank[0].start = PHY_BASE_ADDR1; | |
+ mi->bank[0].size = SIZE_ADDR1; | |
+ mi->bank[1].start = PHY_BASE_ADDR2; | |
+ mi->bank[1].size = SIZE_ADDR2; | |
+ mi->bank[2].start = PHY_BASE_ADDR3; | |
+ mi->bank[2].size = SIZE_ADDR3; | |
+ | |
+ if (mem_size_mb == 2048) | |
+ mi->bank[2].size += DDR_1GB_SIZE; | |
+ | |
+ if (mem_size_mb == 64) { | |
+ mi->nr_banks = 2; | |
+ mi->bank[0].start = PHY_BASE_ADDR1; | |
+ mi->bank[0].size = SIZE_ADDR1; | |
+ mi->bank[1].start = PHY_BASE_ADDR2; | |
+ mi->bank[1].size = SIZE_ADDR2; | |
+ } | |
+} | |
+ | |
+MACHINE_START(IMPRESSION_J, "UNKNOWN") | |
+ .fixup = impression_j_fixup, | |
+ .map_io = impression_j_map_io, | |
+ .reserve = impression_j_reserve, | |
+ .init_irq = impression_j_init_irq, | |
+ .handle_irq = gic_handle_irq, | |
+ .timer = &msm_timer, | |
+ .init_machine = impression_j_cdp_init, | |
+ .init_early = impression_j_allocate_memory_regions, | |
+ .init_very_early = impression_j_early_reserve, | |
+ .restart = msm_restart, | |
+MACHINE_END | |
+ | |
diff --git arch/arm/mach-msm/board-impression_j.h arch/arm/mach-msm/board-impression_j.h | |
new file mode 100644 | |
index 0000000..693d2ff | |
--- /dev/null | |
+++ arch/arm/mach-msm/board-impression_j.h | |
@@ -0,0 +1,253 @@ | |
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 and | |
+ * only version 2 as published by the Free Software Foundation. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ */ | |
+ | |
+#ifndef __ARCH_ARM_MACH_MSM_BOARD_IMPRESSION_J_H | |
+#define __ARCH_ARM_MACH_MSM_BOARD_IMPRESSION_J_H | |
+ | |
+#include <linux/regulator/msm-gpio-regulator.h> | |
+#include <linux/mfd/pm8xxx/pm8921.h> | |
+#include <linux/mfd/pm8xxx/pm8821.h> | |
+#include <mach/msm_memtypes.h> | |
+#include <mach/irqs.h> | |
+#include <mach/rpm-regulator.h> | |
+ | |
+#define EVM 0x99 | |
+#define EVM1 99 | |
+#define XA 0 | |
+#define XB 1 | |
+#define XC 2 | |
+#define XD 3 | |
+#define PVT 0x80 | |
+ | |
+#define GPIO(x) (x) | |
+#define PMGPIO(x) (x) | |
+ | |
+int __init impression_j_init_keypad(void); | |
+ | |
+ | |
+ | |
+#define LCD_TE GPIO(0) | |
+#define RAW_RST GPIO(1) | |
+#define CAM2_RSTz GPIO(2) | |
+#define MAIN_CAM_ID GPIO(3) | |
+#define CAM_SEL GPIO(4) | |
+#define CAM_MCLK0 GPIO(5) | |
+#define SIR_TX GPIO(6) | |
+#define SIR_RX GPIO(7) | |
+#define I2C3_DATA_TS GPIO(8) | |
+#define I2C3_CLK_TS GPIO(9) | |
+ | |
+#define FEL_RX GPIO(10) | |
+#define FEL_TX GPIO(11) | |
+#define I2C4_DATA_CAM GPIO(12) | |
+#define I2C4_CLK_CAM GPIO(13) | |
+#define BT_UART_TX GPIO(14) | |
+#define BT_UART_RX GPIO(15) | |
+#define BT_UART_CTSz GPIO(16) | |
+#define BT_UART_RTSz GPIO(17) | |
+#define AP2MDM_ERR_FATAL GPIO(18) | |
+#define MDM2AP_ERR_FATAL GPIO(19) | |
+ | |
+#define I2C1_DATA_APPS GPIO(20) | |
+#define I2C1_CLK_APPS GPIO(21) | |
+#define CPU_1WIRE_TX GPIO(22) | |
+#define CPU_1WIRE_RX GPIO(23) | |
+#define I2C2_DATA_SENS GPIO(24) | |
+#define I2C2_CLK_SENS GPIO(25) | |
+#define PWR_KEY_MSMz GPIO(26) | |
+#define WS GPIO(27) | |
+#define SCLK GPIO(28) | |
+#define DOUT GPIO(29) | |
+ | |
+#define AP2MDM_VDDMIN GPIO(30) | |
+#define APQ2MDM_IPC3 GPIO(31) | |
+#define AUD_CPU_RX_I2S_SD1 GPIO(32) | |
+#define APQ2MDM_IPC2 GPIO(33) | |
+#define TP_ATTz GPIO(34) | |
+#define AUD_FM_I2S_BCLK GPIO(35) | |
+#define AUD_FM_I2S_SYNC GPIO(36) | |
+#define AUD_FM_I2S_DIN GPIO(37) | |
+#define MHL_INT GPIO(38) | |
+#define AUD_CPU_MCLK GPIO(39) | |
+ | |
+#define SLIMBUS1_CLK GPIO(40) | |
+#define SLIMBUS1_DATA GPIO(41) | |
+#define AUD_WCD_INTR_OUT GPIO(42) | |
+#define AUD_BTPCM_DIN GPIO(43) | |
+#define AUD_BTPCM_DOUT GPIO(44) | |
+#define AUD_BTPCM_SYNC GPIO(45) | |
+#define AUD_BTPCM_CLK GPIO(46) | |
+#define AP2MDM_SOFT_RESET GPIO(47) | |
+#define AP2MDM_STATUS GPIO(48) | |
+#define MDM2AP_STATUS GPIO(49) | |
+ | |
+#define VOL_UPz GPIO(50) | |
+#define MCAM_SPI_DO GPIO(51) | |
+#define MCAM_SPI_DI GPIO(52) | |
+#define MCAM_SPI_CS0 GPIO(53) | |
+#define MCAM_SPI_CLK GPIO(54) | |
+#define V_CAMIO_D1V8_EN GPIO(55) | |
+#define V_CAM_D1V2_EN GPIO(56) | |
+#define V_RAW_1V2_EN GPIO(57) | |
+#define TS_SYNC GPIO(58) | |
+#define TS_CLK GPIO(59) | |
+ | |
+#define TS_EN GPIO(60) | |
+#define TS_DATA GPIO(61) | |
+#define AP2MDM_PON_RESET_N GPIO(62) | |
+#define WIFI_SD_D3 GPIO(63) | |
+#define WIFI_SD_D2 GPIO(64) | |
+#define WIFI_SD_D1 GPIO(65) | |
+#define WIFI_SD_D0 GPIO(66) | |
+#define WIFI_SD_CMD GPIO(67) | |
+#define WIFI_SD_CLK GPIO(68) | |
+#define IO_EXT_INTz GPIO(69) | |
+ | |
+#define HDMI_DDC_CLK GPIO(70) | |
+#define HDMI_DDC_DATA GPIO(71) | |
+#define HDMI_HPLG_DET GPIO(72) | |
+#define PM8921_APC_SEC_IRQ_N GPIO(73) | |
+#define PM8921_APC_USR_IRQ_N GPIO(74) | |
+#define PM8921_MDM_IRQ_N GPIO(75) | |
+#define PM8821_APC_SEC_IRQ_N GPIO(76) | |
+#define VOL_DOWNz GPIO(77) | |
+#define PS_HOLD_APQ GPIO(78) | |
+#define SSBI_PM8821 GPIO(79) | |
+ | |
+#define MDM2AP_VDDMIN GPIO(80) | |
+#define APQ2MDM_IPC1 GPIO(81) | |
+#define UART_TX GPIO(82) | |
+#define UART_RX GPIO(83) | |
+#define MDM2AP_HSIC_READY GPIO(84) | |
+#define TP_RSTz GPIO(85) | |
+#define AP2MDM_WAKEUP GPIO(86) | |
+#define RESET_EN_CLRz GPIO(87) | |
+#define HSIC_STROBE GPIO(88) | |
+#define HSIC_DATA GPIO(89) | |
+ | |
+#define CAM_VCM_PD PMGPIO(1) | |
+#define MHL_RSTz PMGPIO(2) | |
+#define GYRO_INT PMGPIO(3) | |
+#define NC_PMGPIO_4 PMGPIO(4) | |
+#define V_RAW_1V8_EN PMGPIO(5) | |
+#define COMPASS_AKM_INT PMGPIO(6) | |
+#define USB1_HS_ID_GPIO PMGPIO(7) | |
+#define BT_REG_ON PMGPIO(8) | |
+#define V_AUD_HSMIC_2V85_EN PMGPIO(9) | |
+ | |
+#define AUD_HP_EN PMGPIO(10) | |
+#define LCD_RSTz PMGPIO(11) | |
+#define MBAT_IN PMGPIO(12) | |
+#define FEL_INT PMGPIO(13) | |
+#define FEL_INTU PMGPIO(14) | |
+#define USBz_AUDIO_SW PMGPIO(15) | |
+#define WL_REG_ON PMGPIO(16) | |
+#define PROXIMITY_INT PMGPIO(17) | |
+#define TORCH_FLASHz PMGPIO(18) | |
+#define DRIVER_EN PMGPIO(19) | |
+ | |
+#define EARPHONE_DETz PMGPIO(20) | |
+#define LCD_ID0 PMGPIO(21) | |
+#define OneSEG_INTz PMGPIO(22) | |
+#define BT_WAKE PMGPIO(23) | |
+#define POGO_ID PMGPIO(24) | |
+#define SDC3_CDz PMGPIO(25) | |
+#define MODEz PMGPIO(26) | |
+#define CHARGER_STAT PMGPIO(27) | |
+#define FEL_PON PMGPIO(28) | |
+#define FEL_CENz PMGPIO(29) | |
+ | |
+#define FEL_RFS PMGPIO(30) | |
+#define FEL_CEN PMGPIO(31) | |
+#define FEL_LOCK PMGPIO(32) | |
+#define BT_HOST_WAKE PMGPIO(33) | |
+#define AUD_WCD_RESET_N PMGPIO(34) | |
+#define WL_DEV_WAKE PMGPIO(35) | |
+#define RAW_INT0 PMGPIO(36) | |
+#define RAW_INT1 PMGPIO(37) | |
+#define WL_HOST_WAKE PMGPIO(38) | |
+#define SSBI_PMIC_FWD_CLK PMGPIO(39) | |
+ | |
+#define REGIONAL_ID PMGPIO(40) | |
+#define AUD_UART_OEz PMGPIO(41) | |
+#define CAM1_PWDN PMGPIO(42) | |
+#define BCM4330_SLEEP_CLK PMGPIO(43) | |
+#define LCD_ID1 PMGPIO(44) | |
+ | |
+#define PM8921_GPIO_BASE NR_GPIO_IRQS | |
+#define PM8921_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_GPIO_BASE) | |
+#define PM8921_MPP_BASE (PM8921_GPIO_BASE + PM8921_NR_GPIOS) | |
+#define PM8921_MPP_PM_TO_SYS(pm_mpp) (pm_mpp - 1 + PM8921_MPP_BASE) | |
+#define PM8921_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS) | |
+ | |
+#define PM8821_MPP_BASE (PM8921_MPP_BASE + PM8921_NR_MPPS) | |
+#define PM8821_MPP_PM_TO_SYS(pm_mpp) (pm_mpp - 1 + PM8821_MPP_BASE) | |
+#define PM8821_IRQ_BASE (PM8921_IRQ_BASE + PM8921_NR_IRQS) | |
+ | |
+#ifdef CONFIG_RESET_BY_CABLE_IN | |
+#define AC_WDT_EN GPIO(3) | |
+#define AC_WDT_RST GPIO(87) | |
+#endif | |
+ | |
+extern struct pm8xxx_regulator_platform_data | |
+ impression_j_pm8921_regulator_pdata[] __devinitdata; | |
+ | |
+extern int impression_j_pm8921_regulator_pdata_len __devinitdata; | |
+ | |
+#define GPIO_VREG_ID_EXT_5V 0 | |
+#define GPIO_VREG_ID_EXT_3P3V 1 | |
+#define GPIO_VREG_ID_EXT_TS_SW 2 | |
+#define GPIO_VREG_ID_EXT_MPP8 3 | |
+ | |
+extern struct gpio_regulator_platform_data | |
+ impression_j_gpio_regulator_pdata[] __devinitdata; | |
+ | |
+extern struct rpm_regulator_platform_data | |
+ impression_j_rpm_regulator_pdata __devinitdata; | |
+ | |
+extern struct regulator_init_data impression_j_saw_regulator_pdata_8921_s5; | |
+extern struct regulator_init_data impression_j_saw_regulator_pdata_8921_s6; | |
+extern struct regulator_init_data impression_j_saw_regulator_pdata_8821_s0; | |
+extern struct regulator_init_data impression_j_saw_regulator_pdata_8821_s1; | |
+ | |
+struct mmc_platform_data; | |
+int __init apq8064_add_sdcc(unsigned int controller, | |
+ struct mmc_platform_data *plat); | |
+int __init apq8064_add_uio(void); | |
+ | |
+void impression_j_init_mmc(void); | |
+int impression_j_wifi_init(void); | |
+void impression_j_init_gpiomux(void); | |
+void impression_j_init_pmic(void); | |
+ | |
+#if 1 | |
+extern struct platform_device impression_j_msm_rawchip_device; | |
+#endif | |
+void impression_j_init_cam(void); | |
+ | |
+#define APQ_8064_GSBI1_QUP_I2C_BUS_ID 0 | |
+#define APQ_8064_GSBI3_QUP_I2C_BUS_ID 3 | |
+#define APQ_8064_GSBI4_QUP_I2C_BUS_ID 4 | |
+ | |
+void impression_j_init_fb(void); | |
+void impression_j_allocate_fb_region(void); | |
+void impression_j_mdp_writeback(struct memtype_reserve *reserve_table); | |
+ | |
+void impression_j_init_gpu(void); | |
+void impression_j_pm8xxx_gpio_mpp_init(void); | |
+void impression_j_usb_uart_switch(int nvbus); | |
+ | |
+#ifdef CONFIG_RESET_BY_CABLE_IN | |
+void reset_dflipflop(void); | |
+#endif | |
+ | |
+#endif | |
diff --git arch/arm/mach-msm/include/mach/htc_usb.h arch/arm/mach-msm/include/mach/htc_usb.h | |
index 60b720c..c9a1598 100644 | |
--- arch/arm/mach-msm/include/mach/htc_usb.h | |
+++ arch/arm/mach-msm/include/mach/htc_usb.h | |
@@ -1997,7 +1997,7 @@ static struct android_usb_product usb_products[] = { | |
.num_functions = ARRAY_SIZE(usb_functions_accessory_adb), | |
.functions = usb_functions_accessory_adb, | |
}, | |
-/* | |
+#ifndef CONFIG_MACH_IMPRESSION_J | |
{ | |
.vendor_id = USB_ACCESSORY_VENDOR_ID, | |
.product_id = USB_AUDIO_PRODUCT_ID, | |
@@ -2022,7 +2022,7 @@ static struct android_usb_product usb_products[] = { | |
.num_functions = ARRAY_SIZE(usb_functions_accessory_audio_adb), | |
.functions = usb_functions_accessory_audio_adb, | |
}, | |
-*/ | |
+#endif | |
#ifdef CONFIG_USB_ANDROID_MDM9K_DIAG | |
{ | |
.product_id = 0x0fd2, | |
diff --git drivers/input/touchscreen/max11871.c drivers/input/touchscreen/max11871.c | |
new file mode 100644 | |
index 0000000..b7fa511 | |
--- /dev/null | |
+++ drivers/input/touchscreen/max11871.c | |
@@ -0,0 +1,2604 @@ | |
+/* drivers/input/touchscreen/max11871.c | |
+ * | |
+ * Copyright (c)2012 Maxim Integrated Products, Inc. | |
+ * | |
+ * Driver Version: 3.0.4.3 | |
+ * Release Date: Nov 29, 2012 | |
+ * | |
+ * This software is licensed under the terms of the GNU General Public | |
+ * License version 2, as published by the Free Software Foundation, and | |
+ * may be copied, distributed, and modified under those terms. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+ | |
+#include <linux/slab.h> | |
+#include <linux/module.h> | |
+#include <linux/delay.h> | |
+#ifdef CONFIG_HAS_EARLYSUSPEND | |
+#include <linux/earlysuspend.h> | |
+#else | |
+#include <linux/suspend.h> | |
+#endif | |
+#include <linux/i2c.h> | |
+#include <linux/input.h> | |
+#include <linux/interrupt.h> | |
+#include <linux/io.h> | |
+#include <linux/max11871.h> | |
+#include <linux/kthread.h> | |
+#include <linux/firmware.h> | |
+#include <linux/crc16.h> | |
+#include <linux/input/mt.h> | |
+#include <asm/byteorder.h> | |
+ | |
+#define DEBUG_LOG(level, fmt, args...) do{ if( ((1 << level)&debug_mask)>0 ) \ | |
+ printk( KERN_INFO MAX11871_LOG_NAME fmt "\n", ## args); } while(0) | |
+#define WARNING(d, e...) printk(KERN_ERR MAX11871_LOG_NAME "[W](%s:%d): " d "\n", \ | |
+ __func__, __LINE__, ##e) | |
+#define CHECKWI(a, d, e...) do {if (a) WARNING(d, ##e); } while (0) | |
+#define CHECKW(a, b, c, d, e...) do {if (a) {b; WARNING(d, ##e); return c; }; } \ | |
+ while (0) | |
+#define ERROR(d, e...) printk(KERN_ERR MAX11871_LOG_NAME "TOUCH_ERR:(%s:%d): " d "\n", \ | |
+ __func__, __LINE__, ##e) | |
+#define CHECKI(a, d, e...) do {if (a) ERROR(d, ##e); } while (0) | |
+#define CHECK(a, b, c, d, e...) do {if (a) {b; ERROR(d, ##e); return c; }; } \ | |
+ while (0) | |
+#define CHECKB(a, b, d, e...) do {if (a) {b; ERROR(d, ##e); break; }; } \ | |
+ while (0) | |
+ | |
+#define PRINT(d, e...) printk(KERN_INFO MAX11871_LOG_NAME d "\n", ##e) | |
+#define DEBUGL(a) ((1 << (a + 15)) & debug_mask) | |
+#define DEBUG(a, d, e...) do {if DEBUGL(a) \ | |
+ printk(KERN_INFO MAX11871_LOG_NAME d "\n", ##e); } while (0) | |
+#define DEBUGHD(a, d, e...) do {if DEBUGL(a) \ | |
+ printk(KERN_INFO MAX11871_LOG_NAME d, ##e); } while (0) | |
+#define DEBUGNF(a, d, e...) do {if DEBUGL(a) printk(d, ##e); } while (0) | |
+ | |
+#define DEVFCA(n, imode, ishow, istore, a) \ | |
+do { \ | |
+ int ii; \ | |
+ for (ii = 0; ii < n; ii++) { \ | |
+ snprintf(dev_attr_##a##_name[ii], \ | |
+ sizeof(dev_attr_##a##_name[ii]), __stringify(a) \ | |
+ "%d", ii + 1); \ | |
+ dev_attr_##a[ii].attr.name = dev_attr_##a##_name[ii]; \ | |
+ dev_attr_##a[ii].attr.mode = imode; \ | |
+ dev_attr_##a[ii].show = ishow; \ | |
+ dev_attr_##a[ii].store = istore; \ | |
+ CHECK(device_create_file(&client->dev, \ | |
+ &dev_attr_##a[ii]) < 0, , 0, \ | |
+ "failed to create sysfs file [%s]", \ | |
+ dev_attr_##a##_name[ii]); \ | |
+ ts->sysfs_created++; \ | |
+ } \ | |
+} while (0) | |
+#define DEVFRA(n, a) \ | |
+do { \ | |
+ int ii; \ | |
+ for (ii = 0; ii < n; ii++) \ | |
+ if (ts->sysfs_created && ts->sysfs_created--) \ | |
+ device_remove_file(&client->dev, &dev_attr_##a[ii]); \ | |
+} while (0) | |
+ | |
+#define ENABLE_IRQ() \ | |
+do { \ | |
+ mutex_lock(&ts->irq_mutex); \ | |
+ if (ts->irq_disabled) { \ | |
+ enable_irq(ts->client->irq); \ | |
+ ts->irq_disabled = 0; \ | |
+ } \ | |
+ mutex_unlock(&ts->irq_mutex); \ | |
+} while (0) | |
+ | |
+#define DISABLE_IRQ() \ | |
+do { \ | |
+ mutex_lock(&ts->irq_mutex); \ | |
+ if (ts->irq_disabled == 0) { \ | |
+ disable_irq(ts->client->irq); \ | |
+ ts->irq_disabled = 1; \ | |
+ } \ | |
+ mutex_unlock(&ts->irq_mutex); \ | |
+} while (0) | |
+ | |
+#define NWORDS(a) (sizeof(a) / sizeof(u16)) | |
+#define BYTE_SIZE(a) ((a) * sizeof(u16)) | |
+#define BYTEH(a) ((a) >> 8) | |
+#define BYTEL(a) ((a) & 0xFF) | |
+ | |
+#define CONFIG(a) (ts->config->a) | |
+#define COORDINATES(a) ts->fw_config->coordinates.a | |
+#define BUTTONXY(i, a) COORDINATES(button_xy[i]).a | |
+ | |
+#define MAXIM_TOUCH_REPORT_MODE 0x0001 | |
+#define MAX_REPORT_READERS 5 | |
+#define RETRY_TIMES 3 | |
+#define SHIFT_BITS 10 | |
+ | |
+#if !MAX11871_BOARD_CONFIG | |
+struct max11871_config local_config = {}; | |
+#endif | |
+ | |
+struct report_reader { | |
+ u16 report_id; | |
+ u16 reports_passed; | |
+ struct semaphore sem; | |
+ int status; | |
+}; | |
+ | |
+struct report_point { | |
+ u8 state; | |
+ int x; | |
+ int y; | |
+ int z; | |
+}; | |
+ | |
+struct data { | |
+ struct max11871_config *config; | |
+ struct max11871_board_config *fw_config; | |
+ struct i2c_client *client; | |
+ struct input_dev *input_dev; | |
+ struct input_dev *key_input_dev; | |
+#ifdef CONFIG_HAS_EARLYSUSPEND | |
+ struct early_suspend early_suspend; | |
+ u8 early_suspend_registered; | |
+#endif | |
+ struct mutex irq_mutex; | |
+ struct mutex i2c_mutex; | |
+ struct mutex report_mutex; | |
+ struct semaphore report_sem; | |
+ struct report_reader report_readers[MAX_REPORT_READERS]; | |
+ u8 irq_disabled; | |
+ u16 nbuttons_original; | |
+ u8 report_readers_outstanding; | |
+ u16 report[MAX_WORDS_REPORT + 1]; | |
+ u16 rx_report[MAX_WORDS_REPORT + 1]; | |
+ u32 irq_counter; | |
+ u8 got_report; | |
+ int fw_index; | |
+ u16 fw_crc16; | |
+ u16 fw_version[MAX_WORDS_REPORT]; | |
+ u16 vendor_pin; | |
+ u16 touch_config[MAX_WORDS_COMMAND_ALL]; | |
+ char fw_ver[10]; | |
+ int buttondown; | |
+ int nobutton; | |
+ char phys[32]; | |
+ char key_phys[32]; | |
+ | |
+ u8 fw_responsive; | |
+ u8 have_fw; | |
+ u8 have_touchcfg; | |
+ u16 config_id; | |
+ u16 controller_id; | |
+ u8 sysfs_created; | |
+ u8 is_raw_mode; | |
+ u16 max11871_Touch_Configuration_Data[44]; | |
+ u16 max11871_Calibration_Table_Data[52]; | |
+ u16 max11871_Private_Configuration_Data[25]; | |
+ u16 max11871_Lookup_Table_X_Data[11]; | |
+ u16 max11871_Lookup_Table_Y_Data[11]; | |
+ u16 max11871_Image_Factor_Table[460]; | |
+ struct report_point report_points[10]; | |
+ u32 width_factor; | |
+ u32 height_factor; | |
+ u16 x_channel; | |
+ u16 y_channel; | |
+ u16 frame_rate[2]; | |
+ u16 frame_count; | |
+ u8 noise_level; | |
+ u8 baseline_mode; | |
+ u8 protocol_ver; | |
+}; | |
+ | |
+#ifdef CONFIG_HAS_EARLYSUSPEND | |
+static void early_suspend(struct early_suspend *h); | |
+static void late_resume(struct early_suspend *h); | |
+#endif | |
+ | |
+static int device_init(struct i2c_client *client); | |
+static int device_deinit(struct i2c_client *client); | |
+ | |
+static int bootloader_enter(struct data *ts); | |
+static int bootloader_exit(struct data *ts); | |
+static int bootloader_get_crc(struct data *ts, u16 *crc16, u16 len); | |
+static int bootloader_set_byte_mode(struct data *ts); | |
+static int bootloader_erase_flash(struct data *ts); | |
+static int bootloader_write_flash(struct data *ts, u8 *image); | |
+ | |
+static int set_touch_frame(struct i2c_client *client, | |
+ u16 idle_frame, u16 active_frame); | |
+static int set_baseline_mode(struct i2c_client *client, u16 mode); | |
+static int change_touch_rpt(struct i2c_client *client, u16 to); | |
+static int sreset(struct i2c_client *client); | |
+static int get_touch_config(struct i2c_client *client); | |
+static int get_fw_version(struct i2c_client *client); | |
+static void propagate_report(struct data *ts, int status, u16 *report); | |
+static int get_report(struct data *ts, u16 report_id, ulong timeout); | |
+static void release_report(struct data *ts); | |
+ | |
+extern unsigned int get_tamper_sf(void); | |
+ | |
+static u32 debug_mask = 0x00100000; | |
+static u8 bootloader; | |
+static u8 init_state; | |
+static struct kobject *android_touch_kobj; | |
+static struct data *gl_ts; | |
+ | |
+static int i2c_rx_bytes(struct data *ts, u8 *buf, u16 len) | |
+{ | |
+ int i, ret, level = (!bootloader && len == 2) ? 3 : 1; | |
+ | |
+ do {ret = i2c_master_recv(ts->client, (char *)buf, (int)len); | |
+ } while (ret == -EAGAIN); | |
+ CHECK(ret < 0, , ret, "I2C RX fail (%d)", ret); | |
+ | |
+ if (DEBUGL(1)) { | |
+ DEBUGHD(level, "(RX): "); | |
+ for (i = 0; i < len; i++) | |
+ DEBUGNF(level, "%02X ", buf[i]); | |
+ DEBUGNF(level, "\n"); | |
+ } | |
+ | |
+ return ret; | |
+} | |
+ | |
+static int i2c_rx_words(struct data *ts, u16 *buf, u16 len) | |
+{ | |
+ int i, ret, level = (!bootloader && len == 1) ? 3 : 1; | |
+ | |
+ do {ret = i2c_master_recv(ts->client, (char *)buf, (int)(len * 2)); | |
+ } while (ret == -EAGAIN); | |
+ CHECK(ret < 0, , ret, "I2C RX fail (%d)", ret); | |
+ CHECK((ret % 2) != 0, , -1, "I2C words RX fail: odd number of bytes " | |
+ "(%d)", ret); | |
+ | |
+#ifdef __BIG_ENDIAN | |
+ for (i = 0; i < len; i++) | |
+ buf[i] = (buf[i] << 8) | (buf[i] >> 8); | |
+#endif | |
+ if (DEBUGL(1)) { | |
+ DEBUGHD(level, "(RX): "); | |
+ for (i = 0; i < len; i++) | |
+ DEBUGNF(level, "%04X ", buf[i]); | |
+ DEBUGNF(level, "\n"); | |
+ } | |
+ | |
+ return ret / 2; | |
+} | |
+ | |
+static int i2c_tx_bytes(struct data *ts, u8 *buf, u16 len) | |
+{ | |
+ int i, ret, level = (!bootloader && len == 2) ? 3 : 2; | |
+ | |
+ do {ret = i2c_master_send(ts->client, (char *)buf, (int)len); | |
+ } while (ret == -EAGAIN); | |
+ CHECK(ret < 0, , ret, "I2C TX fail (%d)", ret); | |
+ | |
+ if (DEBUGL(2)) { | |
+ DEBUGHD(level, "(TX): "); | |
+ if (len >= 1) | |
+ DEBUGNF(bootloader ? 2 : 3, "%02X ", buf[0]); | |
+ if (len >= 2) | |
+ DEBUGNF(bootloader ? 2 : 3, "%02X ", buf[1]); | |
+ for (i = 2; i < len; i++) | |
+ DEBUGNF(level, "%02X ", buf[i]); | |
+ DEBUGNF(level, "\n"); | |
+ } | |
+ | |
+ return ret; | |
+} | |
+ | |
+static int i2c_tx_words(struct data *ts, u16 *buf, u16 len) | |
+{ | |
+ int i, ret, level = (!bootloader && len == 1) ? 3 : 2; | |
+ | |
+#ifdef __BIG_ENDIAN | |
+ for (i = 0; i < len; i++) | |
+ buf[i] = (buf[i] << 8) | (buf[i] >> 8); | |
+#endif | |
+ do {ret = i2c_master_send(ts->client, (char *)buf, (int)(len * 2)); | |
+ } while (ret == -EAGAIN); | |
+ CHECK(ret < 0, , ret, "I2C TX fail (%d)", ret); | |
+ CHECK((ret % 2) != 0, , -1, "I2C words TX fail: odd number of bytes " | |
+ "(%d)", ret); | |
+ | |
+ if (DEBUGL(2)) { | |
+ DEBUGHD(level, "(TX): "); | |
+ if (len >= 1) | |
+ DEBUGNF(bootloader ? 2 : 3, "%04X ", buf[0]); | |
+ for (i = 1; i < len; i++) | |
+ DEBUGNF(level, "%04X ", buf[i]); | |
+ DEBUGNF(level, "\n"); | |
+ } | |
+ | |
+ return ret / 2; | |
+} | |
+ | |
+static int read_mtp_report(struct data *ts, u16 *buf) | |
+{ | |
+ int words = 1, words_rx, i, ret = 0, recover = 0, remainder = 0; | |
+ u16 address = 0x000A; | |
+ | |
+ mutex_lock(&ts->i2c_mutex); | |
+ | |
+ for (i = 1; i <= 2; i++) { | |
+ if (!ts->got_report) { | |
+ words = i2c_tx_words(ts, &address, 1); | |
+ CHECK(words != 1, mutex_unlock(&ts->i2c_mutex), -1, | |
+ "Report RX fail: failed to set address"); | |
+ ts->got_report = 1; | |
+ } | |
+ | |
+ words_rx = i2c_rx_words(ts, buf, words); | |
+ if (words_rx != words || BYTEH(buf[0]) != 0x11 || | |
+ BYTEL(buf[0]) > MAX_WORDS_REPORT || | |
+ (i == 2 && buf[1] < 0x0100)) { | |
+ if (recover == 0) { | |
+ ts->got_report = 0; | |
+ i = 0; | |
+ recover = 1; | |
+ continue; | |
+ } | |
+ ret = -1; | |
+ ERROR("Report RX fail: received (%d) expected (%d) " | |
+ "words, header (%04X)", words_rx, words, | |
+ buf[0]); | |
+ break; | |
+ } | |
+ words = BYTEL(buf[0]) + 1; | |
+ if (words > CONFIG(i2c_words)) | |
+ remainder = words - CONFIG(i2c_words); | |
+ if (remainder > 0) | |
+ words = CONFIG(i2c_words); | |
+ if (i == 2 && remainder > 0) { | |
+ ts->got_report = 0; | |
+ address += CONFIG(i2c_words); | |
+ words = i2c_tx_words(ts, &address, 1); | |
+ CHECK(words != 1, mutex_unlock(&ts->i2c_mutex), -1, | |
+ "Report RX fail: failed to set address 0x%X", | |
+ address); | |
+ words_rx = i2c_rx_words(ts, &buf[CONFIG(i2c_words)], | |
+ remainder); | |
+ CHECK(words_rx != remainder, | |
+ mutex_unlock(&ts->i2c_mutex), | |
+ -1, "Report RX fail 0x%X: received (%d) " | |
+ "expected (%d) words", address, words_rx, | |
+ remainder); | |
+ } | |
+ } | |
+ mutex_unlock(&ts->i2c_mutex); | |
+ return ret; | |
+} | |
+ | |
+static int send_mtp_command(struct data *ts, u16 *buf, u16 len) | |
+{ | |
+ u16 tx_buf[MAX_WORDS_COMMAND + 2]; | |
+ u16 packets, words, words_tx, csum = 0; | |
+ int i, ret = 0; | |
+ | |
+ | |
+ CHECKW(len < 2, , -1, "Command too short (%d); 2 words minimum", len); | |
+ CHECKW((buf[1] + 2) != len, , -1, "Inconsistent command length: " | |
+ "expected (%d) given (%d)", (buf[1] + 2), len); | |
+ CHECKW(len > MAX_WORDS_COMMAND_ALL, , -1, "Command too long (%d); " | |
+ "maximum (%d) words", len, MAX_WORDS_COMMAND_ALL); | |
+ | |
+ | |
+ if (buf[0] == 0x0001 || buf[0] == 0x0010 || buf[0] == 0x0003 || | |
+ buf[0] == 0x0030) { | |
+ for (i = (buf[0] == 0x0030) ? 3 : 2; i < (len - 1); i++) | |
+ csum += buf[i]; | |
+ buf[len - 1] = csum; | |
+ } | |
+ | |
+ | |
+ packets = len / MAX_WORDS_COMMAND; | |
+ if (len % MAX_WORDS_COMMAND) | |
+ packets++; | |
+ tx_buf[0] = 0x0000; | |
+ | |
+ mutex_lock(&ts->i2c_mutex); | |
+ for (i = 0; i < packets; i++) { | |
+ words = (i == (packets - 1)) ? len : MAX_WORDS_COMMAND; | |
+ tx_buf[1] = (packets << 12) | ((i + 1) << 8) | words; | |
+ memcpy(&tx_buf[2], &buf[i * MAX_WORDS_COMMAND], | |
+ BYTE_SIZE(words)); | |
+ words_tx = i2c_tx_words(ts, tx_buf, words + 2); | |
+ CHECKB(words_tx != (words + 2), ret = -1, "Command TX fail: " | |
+ "transmitted (%d) expected (%d) words, packet (%d)", | |
+ words_tx, words + 2, i); | |
+ len -= MAX_WORDS_COMMAND; | |
+ } | |
+ ts->got_report = 0; | |
+ mutex_unlock(&ts->i2c_mutex); | |
+ return ret; | |
+} | |
+ | |
+static int report_button_xy(const struct data *ts, u16 x, u16 y) | |
+{ | |
+ u16 i; | |
+ | |
+ if (!ts->key_input_dev) | |
+ return -1; | |
+ | |
+ for (i = 0; i < CONFIG(buttons); i++) { | |
+ if (x >= (BUTTONXY(i, x) - BUTTONXY(i, size_x) / 2) && | |
+ x <= (BUTTONXY(i, x) + BUTTONXY(i, size_x) / 2) && | |
+ y >= (BUTTONXY(i, y) - BUTTONXY(i, size_y) / 2) && | |
+ y <= (BUTTONXY(i, y) + BUTTONXY(i, size_y) / 2)) { | |
+ input_report_key(ts->key_input_dev, | |
+ CONFIG(button_code[i]), 1); | |
+ input_sync(ts->key_input_dev); | |
+ return CONFIG(button_code[i]); | |
+ } | |
+ } | |
+ | |
+ return -1; | |
+} | |
+ | |
+static void process_touch_report(struct data *ts, u16 *buf) | |
+{ | |
+ int touch_count = 0; | |
+ int i = 0; | |
+ int x = 0, y = 0, z = 0, finger_id = 0; | |
+ int data_size, swap; | |
+ int state[10] = {0}; | |
+ u16 frame_count, noise_level; | |
+ | |
+ if (!ts->input_dev) | |
+ return; | |
+ | |
+ switch (buf[1]) { | |
+ case 0x0801: | |
+ data_size = 4; break; | |
+ case 0x0802: | |
+ data_size = 12; break; | |
+ default: | |
+ return; | |
+ } | |
+ | |
+ DEBUG_LOG(0, "Touch:"); | |
+ for (i = 0; i < (buf[0]&0x00FF); i++) | |
+ DEBUG_LOG(0, " %04x", buf[i]); | |
+ DEBUG_LOG(0, "\n"); | |
+ | |
+ touch_count = buf[3] & 0x000F; | |
+ CHECK(touch_count < 0 || touch_count > 10, , , "Touch count == %i, " | |
+ "out of bounds [0,10]!", touch_count); | |
+ | |
+ frame_count = buf[5]; | |
+ CHECKW(frame_count == ts->frame_count, , , | |
+ "Same frame count %d, Drop!", frame_count); | |
+ ts->frame_count = frame_count; | |
+ | |
+ noise_level = (BYTEL(buf[3]) >> 4) & 0x000F; | |
+ if(noise_level != ts->noise_level) { | |
+ PRINT("Noise level %d -> %d", ts->noise_level, noise_level); | |
+ ts->noise_level = (u8)noise_level; | |
+ } | |
+ | |
+ if (!DEBUGL(1)) | |
+ DEBUG(4, "(TOUCH): -------------------------------"); | |
+ if (touch_count == 0) { | |
+ if (ts->buttondown != -1) { | |
+ input_report_key(ts->key_input_dev, ts->buttondown, | |
+ 0); | |
+ input_sync(ts->key_input_dev); | |
+ ts->buttondown = -1; | |
+ } | |
+ ts->nobutton = 0; | |
+ for(i=0;i<CONFIG(max_touches);i++) { | |
+ if(ts->report_points[i].state==1 && state[i]==0) { | |
+ if(CONFIG(input_protocol) == MAX11871_PROTOCOL_B) { | |
+ input_mt_slot(ts->input_dev, i); | |
+ input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, 0); | |
+ } | |
+ ts->report_points[i].state = 0; | |
+ if (debug_mask & BIT(3)) { | |
+ if(ts->width_factor && ts->height_factor) { | |
+ DEBUG_LOG(3, "Screen:F[%02d]:Up, X=%d, Y=%d, Z=%d", | |
+ i+1, (ts->report_points[i].x*ts->width_factor)>>SHIFT_BITS, | |
+ (ts->report_points[i].y*ts->height_factor)>>SHIFT_BITS, | |
+ ts->report_points[i].z); | |
+ } | |
+ else { | |
+ DEBUG_LOG(3, "Raw:F[%02d]:Down, X=%d, Y=%d, Z=%d", | |
+ i+1, ts->report_points[i].x, ts->report_points[i].y, | |
+ ts->report_points[i].z); | |
+ } | |
+ } | |
+ } | |
+ } | |
+ switch (CONFIG(input_protocol)) { | |
+ case MAX11871_PROTOCOL_A: | |
+ case MAX11871_PROTOCOL_A_TRACK: | |
+ input_mt_sync(ts->input_dev); | |
+ case MAX11871_PROTOCOL_B: | |
+ input_sync(ts->input_dev); | |
+ break; | |
+ case MAX11871_PROTOCOL_CUSTOM1: | |
+#if defined(ABS_MT_AMPLITUDE) && defined(ABS_MT_POSITION) | |
+ input_report_abs(ts->input_dev, ABS_MT_AMPLITUDE, 0); | |
+ input_report_abs(ts->input_dev, ABS_MT_POSITION, | |
+ 1 << 31); | |
+#endif | |
+ break; | |
+ default: | |
+ break; | |
+ } | |
+ DEBUG(4, "(TOUCH): Fingers up, Frame(%d) Noise(%d)", | |
+ frame_count, noise_level); | |
+ DEBUG_LOG(1, "Finger leave, Noise:%d", noise_level); | |
+ } else { | |
+ for (i = 0; i < touch_count; i++) { | |
+ x = buf[6 + i * data_size + 1] & 0x0FFF; | |
+ y = buf[6 + i * data_size + 2] & 0x0FFF; | |
+ if (ts->fw_config->coordinate_settings & MAX11871_SWAP_XY) { | |
+ swap = x; | |
+ x = y; | |
+ y = swap; | |
+ } | |
+ z = BYTEH(buf[6 + i * data_size + 3]); | |
+ if (z == 0) | |
+ z++; | |
+ finger_id = buf[6 + i * data_size] & 0x000F; | |
+ | |
+ DEBUG(4, "(TOUCH): Finger %d: X(%.3d) Y(%.3d) " | |
+ "Z(%.3d) Frame(%d) Noise(%d)", | |
+ finger_id, x, y, z, frame_count, noise_level); | |
+ DEBUG_LOG(1, "Finger %d=> X:%d, Y:%d, Z:%d, Noise:%d", | |
+ finger_id+1, x, y, z, noise_level); | |
+ | |
+ if (ts->nobutton == 0 && ts->buttondown == -1) | |
+ ts->buttondown = report_button_xy(ts, x, y); | |
+ if (ts->buttondown == -1) { | |
+ ts->nobutton = 1; | |
+ switch (CONFIG(input_protocol)) { | |
+ case MAX11871_PROTOCOL_A_TRACK: | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_TRACKING_ID, | |
+ finger_id); | |
+ case MAX11871_PROTOCOL_A: | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_POSITION_X, x); | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_POSITION_Y, y); | |
+ input_report_abs(ts->input_dev, | |
+#ifdef ABS_MT_PRESSURE | |
+ ABS_MT_PRESSURE, | |
+#else | |
+ ABS_MT_TOUCH_MAJOR, | |
+#endif | |
+ z); | |
+ input_mt_sync(ts->input_dev); | |
+ break; | |
+ case MAX11871_PROTOCOL_B: | |
+ input_mt_slot(ts->input_dev, finger_id); | |
+ input_mt_report_slot_state(ts->input_dev, | |
+ MT_TOOL_FINGER, 1); | |
+ input_report_abs(ts->input_dev, | |
+#ifdef ABS_MT_PRESSURE | |
+ ABS_MT_PRESSURE, | |
+#else | |
+ ABS_MT_TOUCH_MAJOR, | |
+#endif | |
+ z); | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_POSITION_X, x); | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_POSITION_Y, y); | |
+ break; | |
+ case MAX11871_PROTOCOL_CUSTOM1: | |
+#if defined(ABS_MT_AMPLITUDE) && defined(ABS_MT_POSITION) | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_AMPLITUDE, | |
+ (z << 16) | 0x0A); | |
+ input_report_abs(ts->input_dev, | |
+ ABS_MT_POSITION, | |
+ ((i == (touch_count - | |
+ 1)) << 31) | | |
+ (x << 16) | y); | |
+#endif | |
+ break; | |
+ } | |
+ ts->report_points[finger_id].x = x; | |
+ ts->report_points[finger_id].y = y; | |
+ ts->report_points[finger_id].z = z; | |
+ state[finger_id] = 1; | |
+ } | |
+ } | |
+ for(i=0;i<CONFIG(max_touches);i++) { | |
+ if(ts->report_points[i].state==1 && state[i]==0) { | |
+ if(CONFIG(input_protocol) == MAX11871_PROTOCOL_B) { | |
+ input_mt_slot(ts->input_dev, i); | |
+ input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, 0); | |
+ } | |
+ ts->report_points[i].state = 0; | |
+ if (debug_mask & BIT(3)) { | |
+ if(ts->width_factor && ts->height_factor) { | |
+ DEBUG_LOG(3, "Screen:F[%02d]:Up, X=%d, Y=%d, Z=%d", | |
+ i+1, (ts->report_points[i].x*ts->width_factor)>>SHIFT_BITS, | |
+ (ts->report_points[i].y*ts->height_factor)>>SHIFT_BITS, | |
+ ts->report_points[i].z); | |
+ } | |
+ else { | |
+ DEBUG_LOG(3, "Raw:F[%02d]:Up, X=%d, Y=%d, Z=%d", | |
+ i+1, ts->report_points[i].x, ts->report_points[i].y, | |
+ ts->report_points[i].z); | |
+ } | |
+ } | |
+ } | |
+ else if(ts->report_points[i].state ==0 && state[i]==1) { | |
+ ts->report_points[i].state = 1; | |
+ if(ts->width_factor && ts->height_factor) { | |
+ DEBUG_LOG(3, "Screen:F[%02d]:Down, X=%d, Y=%d, Z=%d", | |
+ i+1, (ts->report_points[i].x*ts->width_factor)>>SHIFT_BITS, | |
+ (ts->report_points[i].y*ts->height_factor)>>SHIFT_BITS, | |
+ ts->report_points[i].z); | |
+ } | |
+ else { | |
+ DEBUG_LOG(3, "Raw:F[%02d]:Down, X=%d, Y=%d, Z=%d", | |
+ i+1, ts->report_points[i].x, ts->report_points[i].y, | |
+ ts->report_points[i].z); | |
+ } | |
+ } | |
+ } | |
+ switch (CONFIG(input_protocol)) { | |
+ case MAX11871_PROTOCOL_A: | |
+ case MAX11871_PROTOCOL_A_TRACK: | |
+ case MAX11871_PROTOCOL_B: | |
+ input_sync(ts->input_dev); | |
+ break; | |
+ case MAX11871_PROTOCOL_CUSTOM1: | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static irqreturn_t irq_handler(int irq, void *context) | |
+{ | |
+ struct data *ts = (struct data *)context; | |
+ struct timespec timeStart, timeEnd, timeDelta; | |
+ | |
+ if (debug_mask & BIT(2)) { | |
+ getnstimeofday(&timeStart); | |
+ } | |
+ | |
+ if (read_mtp_report(ts, ts->rx_report) == 0) { | |
+ process_touch_report(ts, ts->rx_report); | |
+ if (debug_mask & BIT(2)) { | |
+ getnstimeofday(&timeEnd); | |
+ timeDelta.tv_nsec = (timeEnd.tv_sec*1000000000+timeEnd.tv_nsec) | |
+ -(timeStart.tv_sec*1000000000+timeStart.tv_nsec); | |
+ DEBUG_LOG(2, "Touch latency = %ld us", timeDelta.tv_nsec/1000); | |
+ } | |
+ propagate_report(ts, 0, ts->rx_report); | |
+ } | |
+ ts->irq_counter++; | |
+ | |
+ return IRQ_HANDLED; | |
+} | |
+ | |
+static ssize_t init_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ return snprintf(buf, PAGE_SIZE, "%d\n", init_state); | |
+} | |
+ | |
+static ssize_t init_store(struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ int value, ret; | |
+ | |
+ CHECK(sscanf(buf, "%d", &value) != 1, , -EINVAL, "bad parameter"); | |
+ switch (value) { | |
+ case 0: | |
+ if (init_state == 0) | |
+ break; | |
+ ret = device_deinit(to_i2c_client(dev)); | |
+ CHECK(ret != 0, , ret, "deinit error (%d)", ret); | |
+ break; | |
+ case 1: | |
+ if (init_state == 1) | |
+ break; | |
+ ret = device_init(to_i2c_client(dev)); | |
+ CHECK(ret != 0, , ret, "init error (%d)", ret); | |
+ break; | |
+ case 2: | |
+ if (init_state == 1) { | |
+ ret = device_deinit(to_i2c_client(dev)); | |
+ CHECK(ret != 0, , ret, "deinit error (%d)", ret); | |
+ } | |
+ ret = device_init(to_i2c_client(dev)); | |
+ CHECK(ret != 0, , ret, "init error (%d)", ret); | |
+ break; | |
+ default: | |
+ ERROR("bad value"); | |
+ return -EINVAL; | |
+ } | |
+ | |
+ return count; | |
+} | |
+ | |
+static ssize_t hreset_store(struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ struct max11871_pdata *pdata = client->dev.platform_data; | |
+ | |
+ if (!pdata->reset) | |
+ return count; | |
+ | |
+ DISABLE_IRQ(); | |
+ mutex_lock(&ts->i2c_mutex); | |
+ pdata->reset(pdata, 0); | |
+ usleep_range(10000, 11000); | |
+ pdata->reset(pdata, 1); | |
+ bootloader = 0; | |
+ ts->got_report = 0; | |
+ mutex_unlock(&ts->i2c_mutex); | |
+ CHECK(get_report(ts, 0x01A0, 3000) != 0, , count, "Failed to receive " | |
+ "system status report"); | |
+ release_report(ts); | |
+ | |
+ return count; | |
+} | |
+ | |
+static ssize_t sreset_store(struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ DISABLE_IRQ(); | |
+ CHECK(sreset(client) != 0, , count, "Failed to do soft reset."); | |
+ CHECK(get_report(ts, 0x01A0, 3000) != 0, , count, "Failed to receive " | |
+ "system status report"); | |
+ release_report(ts); | |
+ return count; | |
+} | |
+ | |
+static ssize_t irq_count_show(struct device *dev, | |
+ struct device_attribute *attr, char *buf) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ return snprintf(buf, PAGE_SIZE, "%u\n", ts->irq_counter); | |
+} | |
+ | |
+static ssize_t irq_count_store(struct device *dev, | |
+ struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ ts->irq_counter = 0; | |
+ return count; | |
+} | |
+ | |
+static ssize_t dflt_cfg_show(struct device *dev, | |
+ struct device_attribute *attr, char *buf) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ return snprintf(buf, PAGE_SIZE, "%u %u %u\n", CONFIG(defaults_allow), | |
+ CONFIG(default_chip_config), CONFIG(default_chip_id)); | |
+} | |
+ | |
+static ssize_t dflt_cfg_store(struct device *dev, | |
+ struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ (void)sscanf(buf, "%hu %hu %hu", &CONFIG(defaults_allow), | |
+ &CONFIG(default_chip_config), | |
+ &CONFIG(default_chip_id)); | |
+ return count; | |
+} | |
+ | |
+static ssize_t panel_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ return snprintf(buf, PAGE_SIZE, "%u %u %u %u\n", | |
+ COORDINATES(panel_min_x), COORDINATES(panel_max_x), | |
+ COORDINATES(panel_min_y), COORDINATES(panel_max_y)); | |
+} | |
+ | |
+static ssize_t panel_store(struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ (void)sscanf(buf, "%hu %hu %hu %hu", | |
+ &COORDINATES(panel_min_x), &COORDINATES(panel_max_x), | |
+ &COORDINATES(panel_min_y), &COORDINATES(panel_max_y)); | |
+ return count; | |
+} | |
+ | |
+static ssize_t buttons_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ return snprintf(buf, PAGE_SIZE, "%u %u %u\n", CONFIG(buttons_enabled), | |
+ CONFIG(buttons_type), CONFIG(buttons)); | |
+} | |
+ | |
+static ssize_t buttons_store(struct device *dev, | |
+ struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ (void)sscanf(buf, "%hu %hu %hu", &CONFIG(buttons_enabled), | |
+ &CONFIG(buttons_type), &CONFIG(buttons)); | |
+ CONFIG(buttons_enabled) = !!CONFIG(buttons_enabled); | |
+ if (CONFIG(buttons_type) != MAX11871_BUTTONS_XY && | |
+ CONFIG(buttons_type) != MAX11871_BUTTONS_SENSE) | |
+ CONFIG(buttons_type) = MAX11871_BUTTONS_XY; | |
+ if (CONFIG(buttons) > MAX11871_MAX_BUTTONS) | |
+ CONFIG(buttons) = MAX11871_MAX_BUTTONS; | |
+ return count; | |
+} | |
+ | |
+static ssize_t button_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 index; | |
+ | |
+ sscanf(attr->attr.name, "button%hu", &index); | |
+ index--; | |
+ if (CONFIG(buttons_type) == MAX11871_BUTTONS_SENSE) | |
+ return snprintf(buf, PAGE_SIZE, "%u\n", | |
+ CONFIG(button_code[index])); | |
+ else | |
+ return snprintf(buf, PAGE_SIZE, "%u %u %u %u %u\n", | |
+ BUTTONXY(index, x), BUTTONXY(index, y), | |
+ BUTTONXY(index, size_x), | |
+ BUTTONXY(index, size_y), | |
+ CONFIG(button_code[index])); | |
+} | |
+ | |
+static ssize_t button_store(struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 index; | |
+ | |
+ sscanf(attr->attr.name, "button%hu", &index); | |
+ index--; | |
+ if (CONFIG(buttons_type) == MAX11871_BUTTONS_SENSE) | |
+ (void)sscanf(buf, "%u", &CONFIG(button_code[index])); | |
+ else | |
+ (void)sscanf(buf, "%hu %hu %hu %hu %u", | |
+ &BUTTONXY(index, x), &BUTTONXY(index, y), | |
+ &BUTTONXY(index, size_x), | |
+ &BUTTONXY(index, size_y), | |
+ &CONFIG(button_code[index])); | |
+ return count; | |
+} | |
+ | |
+static ssize_t fw_ver_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 build_number = 0; | |
+ u8 branch = BYTEL(ts->fw_version[3]) >> 6; | |
+ | |
+ if (ts->fw_version[1] >= 3) | |
+ build_number = ts->fw_version[4]; | |
+ return snprintf(buf, PAGE_SIZE, "%u.%u.%u p%u%c " | |
+ "(CRC16 0x%04X=>0x%04X) Chip ID 0x%02X\n", | |
+ BYTEH(ts->fw_version[2]), BYTEL(ts->fw_version[2]), | |
+ build_number, BYTEL(ts->fw_version[3]) & 0x3F, | |
+ (branch == 0) ? ' ' : (branch - 1 + 'a'), (ts->fw_index != -1) | |
+ ? CONFIG(fw_image[ts->fw_index]).config_boundary : 0, | |
+ ts->fw_crc16, BYTEH(ts->fw_version[3])); | |
+} | |
+ | |
+static ssize_t driver_ver_show(struct device *dev, | |
+ struct device_attribute *attr, char *buf) | |
+{ | |
+ return snprintf(buf, PAGE_SIZE, "3.0.2: June 18, 2012\n"); | |
+} | |
+ | |
+static ssize_t debug_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ return snprintf(buf, PAGE_SIZE, "%08X\n", debug_mask); | |
+} | |
+ | |
+static ssize_t debug_store(struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ CHECK(sscanf(buf, "%ix", &debug_mask) != 1, , -EINVAL, | |
+ "bad parameter"); | |
+ return count; | |
+} | |
+ | |
+static ssize_t command_store(struct device *dev, | |
+ struct device_attribute *attr, | |
+ const char *buf, size_t count) | |
+{ | |
+ struct i2c_client *client = to_i2c_client(dev); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 buffer[MAX_WORDS_COMMAND_ALL]; | |
+ char scan_buf[5]; | |
+ int i; | |
+ | |
+ count--; | |
+ CHECKW((count % 4) != 0, , -EINVAL, "words not properly defined"); | |
+ scan_buf[4] = '\0'; | |
+ for (i = 0; i < count; i += 4) { | |
+ memcpy(scan_buf, &buf[i], 4); | |
+ CHECK(sscanf(scan_buf, "%hx", &buffer[i / 4]) != 1, , -EINVAL, | |
+ "bad word (%s)", scan_buf); | |
+ } | |
+ CHECKWI(send_mtp_command(ts, buffer, count / 4), "MTP command failed"); | |
+ return ++count; | |
+} | |
+ | |
+static ssize_t report_read(struct file *file, struct kobject *kobj, | |
+ struct bin_attribute *attr, char *buf, loff_t off, | |
+ size_t count) | |
+{ | |
+ struct i2c_client *client = kobj_to_i2c_client(kobj); | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ int printed, i, offset = 0, payload; | |
+ | |
+ if (get_report(ts, 0xFFFF, 0xFFFFFFFF)) | |
+ return 0; | |
+ | |
+ payload = BYTEL(ts->report[0]); | |
+ if (count < (4 * payload + 1)) | |
+ return -EIO; | |
+ if (count > (4 * payload + 1)) | |
+ count = 4 * payload + 1; | |
+ | |
+ for (i = 1; i <= payload; i++) { | |
+ printed = snprintf(&buf[offset], PAGE_SIZE, "%04X\n", | |
+ ts->report[i]); | |
+ if (printed <= 0) | |
+ return -EIO; | |
+ offset += printed - 1; | |
+ } | |
+ snprintf(&buf[offset], PAGE_SIZE, "\n"); | |
+ release_report(ts); | |
+ | |
+ return count; | |
+} | |
+ | |
+static ssize_t touch_vendor_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ struct data *ts = gl_ts; | |
+ | |
+ return snprintf(buf, PAGE_SIZE, "Maxim-%s_p%u_chipID-0x%02X_twID-%02X\n", | |
+ ts->fw_ver, ts->protocol_ver, BYTEH(ts->fw_version[3]), ts->vendor_pin); | |
+} | |
+ | |
+static ssize_t config_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+{ | |
+ struct data *ts = gl_ts; | |
+ int i, ret; | |
+ size_t count = 0; | |
+ u16 mtpdata[]={0x0000, 0x0000, 0x0000}; | |
+ | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ ret = get_touch_config(ts->client); | |
+ CHECKI(ret < 0, "Failed to retrieve touch config"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0102, 150); | |
+ CHECKWI(ret != 0, "Get touch config time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "Touch config:\n"); | |
+ for (i = 3; i < 45; i++) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "%04X ", ts->report[i]); | |
+ if (((i-3) % 16) == (16 - 1)) | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ } | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive touch config report"); | |
+ | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0011; | |
+ mtpdata[1]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 2); | |
+ CHECKI(ret < 0, "Failed to retrieve calibration table"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0111, 150); | |
+ CHECKWI(ret != 0, "Get calibration table time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "Calibration Table:\n"); | |
+ for (i = 3; i < 53; i++) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "%04X ", ts->report[i]); | |
+ if (((i-3) % 16) == (16 - 1)) | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ } | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive calibration table report"); | |
+ | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0004; | |
+ mtpdata[1]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 2); | |
+ CHECKI(ret < 0, "Failed to retrieve private config"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0104, 150); | |
+ CHECKWI(ret != 0, "Get private config time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "Private Config:\n"); | |
+ for (i = 3; i < 26; i++) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "%04X ", ts->report[i]); | |
+ if (((i-3) % 16) == (16 - 1)) | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ } | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive private config report"); | |
+ | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0031; | |
+ mtpdata[1]=0x0001; | |
+ mtpdata[2]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 3); | |
+ CHECKI(ret < 0, "Failed to retrieve Lookup table X"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0131, 150); | |
+ CHECKWI(ret != 0, "Get Lookup table X time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "Lookup Table X:\n"); | |
+ for (i = 3; i < 11; i++) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "%04X ", ts->report[i]); | |
+ if (((i-3) % 16) == (16 - 1)) | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ } | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive Lookup table X report"); | |
+ | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0031; | |
+ mtpdata[1]=0x0001; | |
+ mtpdata[2]=0x0001; | |
+ ret = send_mtp_command(ts, mtpdata, 3); | |
+ CHECKI(ret < 0, "Failed to retrieve Lookup table Y"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0131, 150); | |
+ CHECKWI(ret != 0, "Get Lookup table Y time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "Lookup Table Y:\n"); | |
+ for (i = 3; i < 11; i++) { | |
+ count += snprintf(buf + count, PAGE_SIZE, "%04X ", ts->report[i]); | |
+ if (((i-3) % 16) == (16 - 1)) | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ } | |
+ count += snprintf(buf + count, PAGE_SIZE, "\n"); | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive Lookup table Y report"); | |
+ | |
+ return count; | |
+} | |
+ | |
+static ssize_t diag_show(struct device *dev, | |
+ struct device_attribute *attr, char *buf) | |
+{ | |
+ struct data *ts = gl_ts; | |
+ size_t count = 0; | |
+ uint16_t i, j; | |
+ int ret; | |
+ int16_t report[MAX_WORDS_REPORT + 1]; | |
+ | |
+ if(ts->baseline_mode != MAX11871_AUTO_BASELINE) | |
+ CHECK(set_baseline_mode(ts->client, ts->baseline_mode) < 0, , -1, | |
+ "Failed to set up baseline mode"); | |
+ CHECK(set_touch_frame(ts->client, ts->frame_rate[1], 0x0A) < 0, , -1, | |
+ "Failed to set up frame rate"); | |
+ | |
+ DISABLE_IRQ(); | |
+ CHECK(change_touch_rpt(ts->client, 0) < 0, , -1, | |
+ "Failed to set up raw data report"); | |
+ ret = get_report(ts, 0x0800, 500); | |
+ CHECKI(ret != 0, "Failed to receive raw data report"); | |
+ memcpy(report, &ts->report[5], BYTE_SIZE(ts->report[2] - 2)); | |
+ | |
+ if(ret==0) { | |
+ count += sprintf(buf + count, "Channel: %dx%d\n", ts->x_channel, ts->y_channel); | |
+ for (i = 0; i < ts->y_channel; i++) { | |
+ for (j = 0; j < ts->x_channel; j++) { | |
+ count += sprintf(buf + count, "%6d", report[i*ts->x_channel + j]); | |
+ } | |
+ count += sprintf(buf + count, "\n"); | |
+ } | |
+ release_report(ts); | |
+ } | |
+ | |
+ DISABLE_IRQ(); | |
+ CHECK(change_touch_rpt(ts->client, 1) < 0, , -1, | |
+ "Failed to set up raw data report"); | |
+ CHECK(set_touch_frame(ts->client, ts->frame_rate[1], ts->frame_rate[0]) < 0, , -1, | |
+ "Failed to set up frame rate"); | |
+ if(ts->baseline_mode != MAX11871_AUTO_BASELINE) | |
+ CHECK(set_baseline_mode(ts->client, 2) < 0, , -1, | |
+ "Failed to set up baseline mode"); | |
+ ENABLE_IRQ(); | |
+ | |
+ return count; | |
+} | |
+ | |
+static ssize_t diag_store(struct device *dev, | |
+ struct device_attribute *attr, const char *buf, size_t count) | |
+{ | |
+ struct data *ts = gl_ts; | |
+ if (buf[0] == '1') | |
+ ts->baseline_mode = MAX11871_AUTO_BASELINE; | |
+ else if (buf[0] == '2') | |
+ ts->baseline_mode = MAX11871_NO_BASELINE; | |
+ else if (buf[0] == '3') | |
+ ts->baseline_mode = MAX11871_FIX_BASELINE; | |
+ | |
+ return count; | |
+} | |
+ | |
+static ssize_t gpio_show(struct device *dev, | |
+ struct device_attribute *attr, char *buf) | |
+{ | |
+ int ret = 0; | |
+ struct data *ts = gl_ts; | |
+ struct max11871_pdata *pdata = ts->client->dev.platform_data; | |
+ | |
+ if (!pdata->tirq) | |
+ return ret; | |
+ | |
+ ret = pdata->tirq(pdata); | |
+ printk(KERN_DEBUG "[TP] GPIO_TP_INT_N=%d\n", ret); | |
+ sprintf(buf, "GPIO_TP_INT_N=%d\n", ret); | |
+ ret = strlen(buf) + 1; | |
+ | |
+ return ret; | |
+} | |
+ | |
+static DEVICE_ATTR(init, (S_IWUSR|S_IRUGO), init_show, init_store); | |
+static DEVICE_ATTR(hreset, S_IWUSR, NULL, hreset_store); | |
+static DEVICE_ATTR(sreset, S_IWUSR, NULL, sreset_store); | |
+static DEVICE_ATTR(irq_count, (S_IWUSR|S_IRUGO), irq_count_show, irq_count_store); | |
+static DEVICE_ATTR(dflt_cfg, (S_IWUSR|S_IRUGO), dflt_cfg_show, dflt_cfg_store); | |
+static DEVICE_ATTR(panel, (S_IWUSR|S_IRUGO), panel_show, panel_store); | |
+static DEVICE_ATTR(buttons, (S_IWUSR|S_IRUGO), buttons_show, buttons_store); | |
+static DEVICE_ATTR(fw_ver, S_IRUGO, fw_ver_show, NULL); | |
+static DEVICE_ATTR(driver_ver, S_IRUGO, driver_ver_show, NULL); | |
+static DEVICE_ATTR(debug, (S_IWUSR|S_IRUGO), debug_show, debug_store); | |
+static DEVICE_ATTR(command, S_IWUSR, NULL, command_store); | |
+static struct bin_attribute dev_attr_report = { | |
+ .attr = {.name = "report", .mode = S_IRUGO}, .read = report_read}; | |
+static struct device_attribute dev_attr_button[MAX11871_MAX_BUTTONS]; | |
+static char dev_attr_button_name[MAX11871_MAX_BUTTONS][10]; | |
+ | |
+static struct device_attribute *dev_attrs[] = { | |
+ &dev_attr_hreset, | |
+ &dev_attr_sreset, | |
+ &dev_attr_irq_count, | |
+ &dev_attr_dflt_cfg, | |
+ &dev_attr_panel, | |
+ &dev_attr_buttons, | |
+ &dev_attr_fw_ver, | |
+ &dev_attr_driver_ver, | |
+ &dev_attr_debug, | |
+ &dev_attr_command, | |
+ NULL | |
+}; | |
+ | |
+static DEVICE_ATTR(debug_level, (S_IWUSR|S_IRUGO), debug_show, debug_store); | |
+static DEVICE_ATTR(vendor, S_IRUGO, touch_vendor_show, NULL); | |
+static DEVICE_ATTR(config, S_IRUGO, config_show, NULL); | |
+static DEVICE_ATTR(diag, (S_IWUSR|S_IRUGO), diag_show, diag_store); | |
+static DEVICE_ATTR(gpio, S_IRUGO, gpio_show, NULL); | |
+ | |
+static void collect_chip_data(struct data *ts) | |
+{ | |
+ int ret, i, build_number = 0; | |
+ | |
+ ret = get_report(ts, 0x01A0, 3000); | |
+ if (ret != 0) { | |
+ ERROR("Failed to receive system status report"); | |
+ if (CONFIG(defaults_allow) == 0) | |
+ msleep(5000); | |
+ } else { | |
+ ts->vendor_pin = BYTEH(ts->report[3]) & CONFIG(tw_mask); | |
+ DEBUG(5, "(INIT): vendor_pin=%x", ts->vendor_pin); | |
+ release_report(ts); | |
+ ts->fw_responsive = 1; | |
+ } | |
+ for(i=0;i<RETRY_TIMES;i++) { | |
+ DISABLE_IRQ(); | |
+ DEBUG(5, "(INIT): collect_chip_data: Get FW version"); | |
+ ret = get_fw_version(ts->client); | |
+ CHECKI(ret < 0, "Failed to retrieve firmware version"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0140, 150); | |
+ CHECKWI(ret != 0, "Get firmware version time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ memcpy(ts->fw_version, &ts->report[1], | |
+ BYTE_SIZE(ts->report[2] + 2)); | |
+ release_report(ts); | |
+ ts->have_fw = 1; | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive firmware version report"); | |
+ for(i=0;i<RETRY_TIMES;i++) { | |
+ DISABLE_IRQ(); | |
+ DEBUG(5, "(INIT): collect_chip_data: Get touch config"); | |
+ ret = get_touch_config(ts->client); | |
+ CHECKI(ret < 0, "Failed to retrieve touch config"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0102, 150); | |
+ CHECKWI(ret != 0, "Get touch config time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ memcpy(ts->touch_config, &ts->report[1], | |
+ BYTE_SIZE(ts->report[2] + 2)); | |
+ release_report(ts); | |
+ ts->have_touchcfg = 1; | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive touch config report"); | |
+ ENABLE_IRQ(); | |
+ DEBUG(5, "(INIT): firmware responsive: (%u)", ts->fw_responsive); | |
+ if (ts->fw_responsive) { | |
+ if (ts->have_fw) { | |
+ if (ts->fw_version[1] >= 3) | |
+ build_number = ts->fw_version[4]; | |
+ sprintf(ts->fw_ver, "%u.%u.%u", BYTEH(ts->fw_version[2]), | |
+ BYTEL(ts->fw_version[2]), build_number); | |
+ ts->protocol_ver = BYTEL(ts->fw_version[3]) & 0x3F; | |
+ DEBUG(5, "(INIT): firmware version: %u.%u.%u_p%u Chip ID: " | |
+ "0x%02X", BYTEH(ts->fw_version[2]), | |
+ BYTEL(ts->fw_version[2]), | |
+ build_number, | |
+ BYTEL(ts->fw_version[3]) & 0x3F, | |
+ BYTEH(ts->fw_version[3])); | |
+ } | |
+ else | |
+ sprintf(ts->fw_ver, "Bootloader"); | |
+ if (ts->have_touchcfg) { | |
+ DEBUG(5, "(INIT): configuration ID: 0x%04X", | |
+ ts->touch_config[2]); | |
+ ts->x_channel = BYTEH(ts->touch_config[3]); | |
+ ts->y_channel = BYTEL(ts->touch_config[3]); | |
+ DEBUG(5, "(INIT): Channel=(%d,%d)", ts->x_channel, ts->y_channel); | |
+ ts->frame_rate[0] = ts->touch_config[4]; | |
+ ts->frame_rate[1] = ts->touch_config[5]; | |
+ DEBUG(5, "(INIT): Frame Rate=(%d,%d)", ts->frame_rate[0], ts->frame_rate[1]); | |
+ } | |
+ } | |
+ else | |
+ sprintf(ts->fw_ver, "Failed"); | |
+} | |
+ | |
+static int device_fw_load(struct data *ts, const struct firmware *fw, | |
+ u16 fw_index, int tagLen) | |
+{ | |
+ u16 fw_crc16, chip_crc16; | |
+ int retry=0, ret, retry_times=5; | |
+ | |
+ fw_crc16 = crc16(0, fw->data+tagLen, | |
+ CONFIG(fw_image[fw_index]).config_boundary); | |
+ DEBUG(5, "(INIT): firmware size (%d) CRC16(0x%04X)", fw->size-tagLen, | |
+ fw_crc16); | |
+ ret = bootloader_enter(ts); | |
+ CHECKI(ret!=0, "Failed to enter bootloader"); | |
+ if (ret==0) { | |
+ ret = bootloader_get_crc(ts, &chip_crc16, | |
+ CONFIG(fw_image[fw_index]).config_boundary); | |
+ CHECKI(ret!=0, "Failed to get CRC16 from the chip"); | |
+ DEBUG(5, "(INIT): chip CRC16(0x%04X)", chip_crc16); | |
+ ts->fw_index = fw_index; | |
+ ts->fw_crc16 = chip_crc16; | |
+ CHECKI(bootloader_exit(ts), "Failed to exit bootloader"); | |
+ } | |
+ | |
+ if (fw_crc16 != chip_crc16) { | |
+ for (retry=0; retry<retry_times; retry++) { | |
+ ret = bootloader_enter(ts); | |
+ CHECKI(ret!=0, "Failed to enter bootloader"); | |
+ if (ret==0) { | |
+ DEBUG(5, "(INIT): will reprogram chip"); | |
+ ret = bootloader_erase_flash(ts); | |
+ CHECKI(ret!=0, "Failed to erase chip flash"); | |
+ } | |
+ if (ret==0) { | |
+ DEBUG(5, "(INIT): flash erase OK"); | |
+ ret = bootloader_set_byte_mode(ts); | |
+ CHECKI(ret!=0, "Failed to set byte mode"); | |
+ } | |
+ if (ret==0) { | |
+ DEBUG(5, "(INIT): byte mode OK"); | |
+ ret = bootloader_write_flash(ts, (u8 *)fw->data+tagLen); | |
+ CHECKI(ret!=0, "Failed to write flash"); | |
+ } | |
+ if (ret==0) { | |
+ DEBUG(5, "(INIT): flash write OK"); | |
+ fw_crc16 = crc16(0, fw->data+tagLen, | |
+ CONFIG(fw_image[fw_index]).length); | |
+ ret = bootloader_get_crc(ts, &chip_crc16, | |
+ CONFIG(fw_image[fw_index]).length); | |
+ CHECKI(ret!=0, "Failed to get CRC16 from the chip"); | |
+ if (fw_crc16 != chip_crc16) { | |
+ ERROR("Failed to verify programming! (0x%04X)", chip_crc16); | |
+ ret = -1; | |
+ } else { | |
+ DEBUG(5, "(INIT): chip programmed successfully"); | |
+ CHECKI(bootloader_get_crc(ts, &chip_crc16, | |
+ CONFIG(fw_image[fw_index]).config_boundary), | |
+ "Failed to get CRC16 from the chip"); | |
+ DEBUG(5, "(INIT): new chip CRC16(0x%04X)", chip_crc16); | |
+ ts->fw_crc16 = chip_crc16; | |
+ ret = 0; | |
+ } | |
+ } | |
+ CHECKI(bootloader_exit(ts), "Failed to exit bootloader"); | |
+ if (ret==0) | |
+ break; | |
+ } | |
+ } | |
+ | |
+ CHECK(retry==retry_times, , -1, "Failed to update firmware"); | |
+ | |
+ collect_chip_data(ts); | |
+ CHECK(ts->have_fw == 0 || ts->have_touchcfg == 0, , -1, "firmware is " | |
+ "unresponsive or inconsistent and no valid configuration is " | |
+ "present"); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int is_booting(void) | |
+{ | |
+ unsigned long long t; | |
+ unsigned long nanosec_rem; | |
+ | |
+ t = cpu_clock(smp_processor_id()); | |
+ nanosec_rem = do_div(t, 1000000000); | |
+ return (t < 30) ? 1 : 0; | |
+} | |
+ | |
+static int compare_u16_arrays(u16 *buf1, u16 *buf2, u16 n) | |
+{ | |
+ int i; | |
+ for (i=0; i<n;i++) | |
+ { | |
+ if (buf1[i]!=buf2[i]) return -1; | |
+ } | |
+ return 0; | |
+} | |
+ | |
+u16 calculate_checksum(u16 *buf, u16 n) | |
+{ | |
+ u16 i, cs=0; | |
+ for (i=0;i<n;i++) | |
+ { | |
+ cs += buf[i]; | |
+ } | |
+ return cs; | |
+} | |
+ | |
+static void update_config(struct data *ts) | |
+{ | |
+ int i, ret; | |
+ u16 reload_touch_config=0, reload_calib_table=0, reload_private_config=0; | |
+ u16 reload_lookup_x=0, reload_lookup_y=0, reload_imagefactor_table=0; | |
+ u16 mtpdata[]={0x0000, 0x0000, 0x0000}; | |
+ u16 imagefactor_data[104]; | |
+ | |
+ | |
+ if(ts->max11871_Touch_Configuration_Data) { | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ ret = get_touch_config(ts->client); | |
+ CHECKI(ret < 0, "Failed to retrieve touch config"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0102, 150); | |
+ CHECKWI(ret != 0, "Get touch config time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ if (compare_u16_arrays(&ts->report[2], | |
+ &ts->max11871_Touch_Configuration_Data[1], 43)!=0) { | |
+ DEBUG(5, "(Config): Touch Configuration Data mismatch"); | |
+ reload_touch_config = 1; | |
+ } else { | |
+ DEBUG(5, "(Config): Touch Configuration Data okay"); | |
+ } | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive touch config report"); | |
+ } | |
+ | |
+ if(ts->max11871_Calibration_Table_Data) { | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0011; | |
+ mtpdata[1]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 2); | |
+ CHECKI(ret < 0, "Failed to retrieve calibration table"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0111, 150); | |
+ CHECKWI(ret != 0, "Get calibration table time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ if (compare_u16_arrays(&ts->report[2], | |
+ &ts->max11871_Calibration_Table_Data[1], 51)!=0) { | |
+ DEBUG(5, "(Config): Calibration Table Data mismatch"); | |
+ reload_calib_table = 1; | |
+ } else { | |
+ DEBUG(5, "(Config): Calibration Table Data okay"); | |
+ } | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive calibration table report"); | |
+ } | |
+ | |
+ if(ts->max11871_Private_Configuration_Data) { | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0004; | |
+ mtpdata[1]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 2); | |
+ CHECKI(ret < 0, "Failed to retrieve private config"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0104, 150); | |
+ CHECKWI(ret != 0, "Get private config time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ if (compare_u16_arrays(&ts->report[2], | |
+ &ts->max11871_Private_Configuration_Data[1], 24)!=0) { | |
+ DEBUG(5, "(Config): Private Configuration Data mismatch"); | |
+ reload_private_config = 1; | |
+ } else { | |
+ DEBUG(5, "(Config): Private Configuration Data okay"); | |
+ } | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive private config report"); | |
+ } | |
+ | |
+ if(ts->max11871_Lookup_Table_X_Data) { | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0031; | |
+ mtpdata[1]=0x0001; | |
+ mtpdata[2]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 3); | |
+ CHECKI(ret < 0, "Failed to retrieve Lookup table X"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0131, 150); | |
+ CHECKWI(ret != 0, "Get Lookup table X time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ if (compare_u16_arrays(&ts->report[3], | |
+ &ts->max11871_Lookup_Table_X_Data[3], 8)!=0) { | |
+ DEBUG(5, "(Config): Lookup Table X Data mismatch"); | |
+ reload_lookup_x = 1; | |
+ } else { | |
+ DEBUG(5, "(Config): Lookup Table X Data okay"); | |
+ } | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive Lookup table X report"); | |
+ } | |
+ | |
+ if(ts->max11871_Lookup_Table_Y_Data) { | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0031; | |
+ mtpdata[1]=0x0001; | |
+ mtpdata[2]=0x0001; | |
+ ret = send_mtp_command(ts, mtpdata, 3); | |
+ CHECKI(ret < 0, "Failed to retrieve Lookup table Y"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0131, 150); | |
+ CHECKWI(ret != 0, "Get Lookup table Y time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ if (compare_u16_arrays(&ts->report[3], | |
+ &ts->max11871_Lookup_Table_Y_Data[3], 8)!=0) { | |
+ DEBUG(5, "(Config): Lookup Table Y Data mismatch"); | |
+ reload_lookup_y = 1; | |
+ } else { | |
+ DEBUG(5, "(Config): Lookup Table Y Data okay"); | |
+ } | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive Lookup table Y report"); | |
+ } | |
+ | |
+ if(ts->max11871_Image_Factor_Table) { | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ DISABLE_IRQ(); | |
+ | |
+ mtpdata[0]=0x0047; | |
+ mtpdata[1]=0x0000; | |
+ ret = send_mtp_command(ts, mtpdata, 2); | |
+ CHECKI(ret < 0, "Failed to retrieve Image Factor Table"); | |
+ if (ret == 0) { | |
+ ret = get_report(ts, 0x0147, 150); | |
+ CHECKWI(ret != 0, "Get Image Factor Table time out-%d, retry", i); | |
+ if (ret == 0) { | |
+ if (ts->report[3] != | |
+ calculate_checksum(ts->max11871_Image_Factor_Table, 460)) { | |
+ DEBUG(5, "(Config): Image Factor Table mismatch"); | |
+ reload_imagefactor_table = 1; | |
+ } else { | |
+ DEBUG(5, "(Config): Image Factor Table okay"); | |
+ } | |
+ release_report(ts); | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ CHECKI(i==RETRY_TIMES && ret!=0, "Failed to receive Image Factor Table report"); | |
+ } | |
+ | |
+ | |
+ | |
+ if (reload_touch_config) { | |
+ DEBUG(5, "(Config): Update Configuration Table"); | |
+ DISABLE_IRQ(); | |
+ ret = send_mtp_command(ts, ts->max11871_Touch_Configuration_Data, 44); | |
+ CHECKI(ret < 0, "Failed to send Touch Config"); | |
+ msleep(100); | |
+ ENABLE_IRQ(); | |
+ } | |
+ if (reload_calib_table) { | |
+ DEBUG(5, "(Config): Update Calibration Table"); | |
+ DISABLE_IRQ(); | |
+ ret = send_mtp_command(ts, ts->max11871_Calibration_Table_Data, 52); | |
+ CHECKI(ret < 0, "Failed to send Calib Table"); | |
+ msleep(100); | |
+ ENABLE_IRQ(); | |
+ } | |
+ if (reload_private_config) { | |
+ DEBUG(5, "(Config): Update Private Configuration Table"); | |
+ DISABLE_IRQ(); | |
+ ret = send_mtp_command(ts, ts->max11871_Private_Configuration_Data, 25); | |
+ CHECKI(ret < 0, "Failed to send Private Config"); | |
+ msleep(100); | |
+ ENABLE_IRQ(); | |
+ } | |
+ if (reload_lookup_x) { | |
+ DEBUG(5, "(Config): Update Lookup Table X"); | |
+ DISABLE_IRQ(); | |
+ ret = send_mtp_command(ts, ts->max11871_Lookup_Table_X_Data, 11); | |
+ CHECKI(ret < 0, "Failed to send Lookup Table X"); | |
+ msleep(100); | |
+ ENABLE_IRQ(); | |
+ } | |
+ if (reload_lookup_y) { | |
+ DEBUG(5, "(Config): Update Lookup Table Y"); | |
+ DISABLE_IRQ(); | |
+ ret = send_mtp_command(ts, ts->max11871_Lookup_Table_Y_Data, 11); | |
+ CHECKI(ret < 0, "Failed to send Lookup Table Y"); | |
+ msleep(100); | |
+ ENABLE_IRQ(); | |
+ } | |
+ if (reload_imagefactor_table) { | |
+ DEBUG(5, "(Config): Update Image Factor Table"); | |
+ DISABLE_IRQ(); | |
+ | |
+ imagefactor_data[0] = 0x0046; | |
+ imagefactor_data[1] = 0x003E; | |
+ imagefactor_data[2] = 0x0000; | |
+ memcpy(imagefactor_data+3, ts->max11871_Image_Factor_Table, 60 << 1); | |
+ imagefactor_data[63] = calculate_checksum(imagefactor_data+2,61); | |
+ send_mtp_command(ts, imagefactor_data, 64); | |
+ msleep(100); | |
+ | |
+ imagefactor_data[0] = 0x0046; | |
+ imagefactor_data[1] = 0x0066; | |
+ imagefactor_data[2] = 0x003C; | |
+ memcpy(imagefactor_data+3, ts->max11871_Image_Factor_Table+60, 100 << 1); | |
+ imagefactor_data[103] = calculate_checksum(imagefactor_data+2,101); | |
+ send_mtp_command(ts, imagefactor_data, 104); | |
+ msleep(100); | |
+ | |
+ imagefactor_data[0] = 0x0046; | |
+ imagefactor_data[1] = 0x0066; | |
+ imagefactor_data[2] = 0x00A0; | |
+ memcpy(imagefactor_data+3, ts->max11871_Image_Factor_Table+160, 100 << 1); | |
+ imagefactor_data[103] = calculate_checksum(imagefactor_data+2,101); | |
+ send_mtp_command(ts, imagefactor_data, 104); | |
+ msleep(100); | |
+ | |
+ imagefactor_data[0] = 0x0046; | |
+ imagefactor_data[1] = 0x0066; | |
+ imagefactor_data[2] = 0x0104; | |
+ memcpy(imagefactor_data+3, ts->max11871_Image_Factor_Table+260, 100 << 1); | |
+ imagefactor_data[103] = calculate_checksum(imagefactor_data+2,101); | |
+ send_mtp_command(ts, imagefactor_data, 104); | |
+ msleep(100); | |
+ | |
+ imagefactor_data[0] = 0x0046; | |
+ imagefactor_data[1] = 0x0066; | |
+ imagefactor_data[2] = 0x8168; | |
+ memcpy(imagefactor_data+3, ts->max11871_Image_Factor_Table+360, 100 << 1); | |
+ imagefactor_data[103] = calculate_checksum(imagefactor_data+2,101); | |
+ send_mtp_command(ts, imagefactor_data, 104); | |
+ msleep(100); | |
+ ENABLE_IRQ(); | |
+ } | |
+ if (reload_touch_config || reload_calib_table || reload_private_config || | |
+ reload_lookup_x || reload_lookup_y || reload_imagefactor_table) { | |
+ DISABLE_IRQ(); | |
+ CHECK(sreset(ts->client) != 0, , , "Failed to do soft reset."); | |
+ collect_chip_data(ts); | |
+ CHECK(ts->have_fw == 0 || ts->have_touchcfg == 0, , , "firmware is " | |
+ "unresponsive or inconsistent and no valid configuration is " | |
+ "present"); | |
+ DEBUG(5, "(INIT): Update config complete"); | |
+ } | |
+} | |
+ | |
+static int check_bin_version(const struct firmware *fw, int *tagLen, char *fw_ver) | |
+{ | |
+ char tag[40]; | |
+ int i = 0; | |
+ | |
+ if (fw->data[0] == 'T' && fw->data[1] == 'P') { | |
+ while ((tag[i] = fw->data[i]) != '\n') | |
+ i++; | |
+ tag[i] = '\0'; | |
+ *tagLen = i+1; | |
+ DEBUG(5, "(INIT): tag=%s", tag); | |
+ if (strstr(tag, fw_ver) != NULL) { | |
+ DEBUG(5, "(INIT): Update Bypass"); | |
+ return 0; | |
+ } | |
+ } | |
+ | |
+ DEBUG(5, "(INIT): Need Update"); | |
+ return 1; | |
+} | |
+ | |
+static void check_fw_and_config(struct data *ts, u16 request_slept) | |
+{ | |
+ u16 config_id, chip_id; | |
+ int i, j, ret; | |
+ const struct firmware *fw; | |
+ int tagLen = 0; | |
+ | |
+ DEBUG(5, "(INIT): Chip Reset"); | |
+ sreset(ts->client); | |
+ collect_chip_data(ts); | |
+ if (ts->fw_responsive == 0 || ts->have_fw == 0 || ts->have_touchcfg == 0) { | |
+ ERROR("firmware is unresponsive."); | |
+ CONFIG(update_feature) |= MAX11871_UPDATE_BIN; | |
+ } | |
+ config_id = ts->have_touchcfg ? ts->touch_config[2] : | |
+ CONFIG(default_chip_config); | |
+ chip_id = ts->have_fw ? BYTEH(ts->fw_version[3]) : | |
+ CONFIG(default_chip_id); | |
+ | |
+ if(CONFIG(update_feature)&MAX11871_UPDATE_BIN) { | |
+ for (i = 0; i < CONFIG(fw_mappings); i++) | |
+ if (CONFIG(fw_mapping[i]).chip_id == chip_id) | |
+ break; | |
+ CHECK(i == CONFIG(fw_mappings), , , "firmware image is" | |
+ " not found for configuration 0x%04X and chip 0x%02X", | |
+ config_id, chip_id); | |
+ j = CONFIG(fw_mapping[i]).fw_index; | |
+ if (request_slept == 0 && is_booting() && | |
+ CONFIG(cfgfw_request_delay) > 0) | |
+ msleep(CONFIG(cfgfw_request_delay)); | |
+ DEBUG(5, "(INIT): firmware file (%s)", CONFIG(fw_image[j]).file_name); | |
+ ret = request_firmware(&fw, CONFIG(fw_image[j]).file_name, | |
+ &ts->client->dev); | |
+ CHECK(ret || fw == NULL, , , "firmware request failed (%d,%p)", ret, | |
+ fw); | |
+ CHECK(fw->size < CONFIG(fw_image[j]).length, release_firmware(fw), , | |
+ "firmware size %d is different from expected %d", fw->size, | |
+ CONFIG(fw_image[j]).length); | |
+ if(check_bin_version(fw, &tagLen, ts->fw_ver)) | |
+ CHECK(device_fw_load(ts, fw, j, tagLen), release_firmware(fw), , | |
+ "firmware download failed"); | |
+ release_firmware(fw); | |
+ DEBUG(5, "(INIT): firmware download OK"); | |
+ } | |
+ | |
+ if(CONFIG(update_feature)&MAX11871_UPDATE_CONFIG) { | |
+ while(ts->fw_config->config_id != 0) { | |
+ if(ts->fw_config->protocol_ver != ts->protocol_ver) { | |
+ ts->fw_config++; | |
+ continue; | |
+ } | |
+ if(ts->fw_config->major_ver > BYTEH(ts->fw_version[2])) { | |
+ ts->fw_config++; | |
+ continue; | |
+ } | |
+ if(ts->fw_config->minor_ver > BYTEL(ts->fw_version[2])) { | |
+ ts->fw_config++; | |
+ continue; | |
+ } | |
+ if(ts->fw_config->vendor_pin != ts->vendor_pin) { | |
+ ts->fw_config++; | |
+ continue; | |
+ } | |
+ if(ts->fw_config->config_touch) { | |
+ ts->max11871_Touch_Configuration_Data[0] = 0x0001; | |
+ ts->max11871_Touch_Configuration_Data[1] = 0x002A; | |
+ memcpy(ts->max11871_Touch_Configuration_Data+2, | |
+ ts->fw_config->config_touch, BYTE_SIZE(42)); | |
+ } | |
+ if(ts->fw_config->config_cal) { | |
+ ts->max11871_Calibration_Table_Data[0] = 0x0010; | |
+ ts->max11871_Calibration_Table_Data[1] = 0x0032; | |
+ memcpy(ts->max11871_Calibration_Table_Data+2, | |
+ ts->fw_config->config_cal, BYTE_SIZE(50)); | |
+ } | |
+ if(ts->fw_config->config_private) { | |
+ ts->max11871_Private_Configuration_Data[0] = 0x0003; | |
+ ts->max11871_Private_Configuration_Data[1] = 0x0017; | |
+ memcpy(ts->max11871_Private_Configuration_Data+2, | |
+ ts->fw_config->config_private, BYTE_SIZE(23)); | |
+ } | |
+ if(ts->fw_config->config_lin_x) { | |
+ ts->max11871_Lookup_Table_X_Data[0] = 0x0030; | |
+ ts->max11871_Lookup_Table_X_Data[1] = 0x0009; | |
+ ts->max11871_Lookup_Table_X_Data[2] = 0x0000; | |
+ memcpy(ts->max11871_Lookup_Table_X_Data+3, | |
+ ts->fw_config->config_lin_x, BYTE_SIZE(8)); | |
+ } | |
+ if(ts->fw_config->config_lin_y) { | |
+ ts->max11871_Lookup_Table_Y_Data[0] = 0x0030; | |
+ ts->max11871_Lookup_Table_Y_Data[1] = 0x0009; | |
+ ts->max11871_Lookup_Table_Y_Data[2] = 0x0001; | |
+ memcpy(ts->max11871_Lookup_Table_Y_Data+3, | |
+ ts->fw_config->config_lin_y, BYTE_SIZE(8)); | |
+ } | |
+ if(ts->fw_config->config_ifactor) { | |
+ memcpy(ts->max11871_Image_Factor_Table, | |
+ ts->fw_config->config_ifactor, BYTE_SIZE(460)); | |
+ } | |
+ break; | |
+ } | |
+ if(ts->fw_config->config_id != 0) { | |
+ update_config(ts); | |
+ DEBUG(5, "(INIT): Check config finish"); | |
+ } | |
+ } | |
+ | |
+ ENABLE_IRQ(); | |
+ CHECK(change_touch_rpt(ts->client, MAXIM_TOUCH_REPORT_MODE) < 0, , , | |
+ "Failed to set up touch report mode"); | |
+} | |
+ | |
+static int device_init_thread(void *arg) | |
+{ | |
+ return device_init((struct i2c_client *)arg); | |
+} | |
+ | |
+static int device_init(struct i2c_client *client) | |
+{ | |
+ struct data *ts = NULL; | |
+ struct max11871_pdata *pdata = client->dev.platform_data; | |
+ struct device_attribute **dev_attr = dev_attrs; | |
+ const struct firmware *fw; | |
+ u16 request_slept = 0, panel_x = 0, panel_y = 0; | |
+ int ret; | |
+ | |
+ init_state = 1; | |
+ PRINT("(INIT): Start"); | |
+ | |
+ | |
+ | |
+ | |
+ CHECK(!pdata, , 0, "Platform data is missing"); | |
+ DEBUG(5, "(INIT): platform data OK"); | |
+ | |
+ | |
+ ts = kzalloc(sizeof(*ts), GFP_KERNEL); | |
+ CHECK(!ts, , 0, "Failed to allocate control block memory"); | |
+#if 1 | |
+ ts->config = pdata->config; | |
+ ts->fw_config = pdata->fw_config; | |
+ DEBUG(5, "(INIT): use platform data"); | |
+ CHECK(!ts->config, , 0, "Configuration data is missing"); | |
+#else | |
+ ts->config = &local_config; | |
+ DEBUG(5, "(INIT): use local config"); | |
+#endif | |
+ ts->client = client; | |
+ i2c_set_clientdata(client, ts); | |
+ mutex_init(&ts->irq_mutex); | |
+ mutex_init(&ts->i2c_mutex); | |
+ mutex_init(&ts->report_mutex); | |
+ sema_init(&ts->report_sem, 1); | |
+ ts->nbuttons_original = CONFIG(buttons); | |
+ ts->fw_index = -1; | |
+ ts->buttondown = -1; | |
+ ts->noise_level = 0; | |
+ ts->frame_count = -1; | |
+ ts->baseline_mode = MAX11871_AUTO_BASELINE; | |
+ DEBUG(5, "(INIT): memory allocation OK"); | |
+ | |
+ | |
+ if (CONFIG(cfg_request) && CONFIG(cfg_file_name)) { | |
+ if (is_booting() && CONFIG(cfgfw_request_delay) > 0) { | |
+ msleep(CONFIG(cfgfw_request_delay)); | |
+ request_slept = 1; | |
+ } | |
+ ret = request_firmware(&fw, CONFIG(cfg_file_name), | |
+ &ts->client->dev); | |
+ if (ret || fw == NULL) { | |
+ ERROR("configuration file [%s] cannot be acquired, " | |
+ "%d %p", CONFIG(cfg_file_name), ret, fw); | |
+ } else { | |
+ if (fw->size >= 10) { | |
+ | |
+ DEBUG(5, "(INIT): configuration parsed OK"); | |
+ } else | |
+ DEBUG(5, "configuration file size is small " | |
+ "(%d bytes)", fw->size); | |
+ release_firmware(fw); | |
+ } | |
+ } | |
+ | |
+ | |
+ if(get_tamper_sf()==0) { | |
+ debug_mask |= BIT(3); | |
+ DEBUG_LOG(20, "(INIT): Debug level=0x%08X", debug_mask); | |
+ } | |
+ | |
+ | |
+ if (pdata->init) | |
+ CHECK(pdata->init(pdata, 1) < 0, , 0, "GPIO init failed"); | |
+ DEBUG(5, "(INIT): chip init OK"); | |
+ | |
+ CHECK(request_threaded_irq(client->irq, NULL, irq_handler, | |
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT, client->name, ts) != 0, , | |
+ 0, "Failed to set up IRQ"); | |
+ DEBUG(5, "(INIT): IRQ handler OK"); | |
+ | |
+ | |
+ | |
+ while(ts->fw_config->config_id != 0) { | |
+ if(CONFIG(default_chip_config) == ts->fw_config->config_id) { | |
+ panel_x = COORDINATES(panel_max_x) - COORDINATES(panel_min_x); | |
+ panel_y = COORDINATES(panel_max_y) - COORDINATES(panel_min_y); | |
+ ts->x_channel = BYTEH(ts->fw_config->config_touch[1]); | |
+ ts->y_channel = BYTEH(ts->fw_config->config_touch[1]); | |
+ ts->frame_rate[0] = ts->fw_config->config_touch[2]; | |
+ ts->frame_rate[1] = ts->fw_config->config_touch[3]; | |
+ break; | |
+ } | |
+ else | |
+ ts->fw_config++; | |
+ } | |
+ if(ts->fw_config->config_id == 0) { | |
+ panel_x = 719; | |
+ panel_y = 1279; | |
+ ts->x_channel = 12; | |
+ ts->x_channel = 20; | |
+ ts->frame_rate[0] = 0x78; | |
+ ts->frame_rate[1] = 0x1E; | |
+ } | |
+ | |
+ | |
+ check_fw_and_config(ts, request_slept); | |
+ | |
+ | |
+ ts->input_dev = input_allocate_device(); | |
+ CHECK(!ts->input_dev, , 0, "Failed to allocate touch input device"); | |
+ snprintf(ts->phys, sizeof(ts->phys), "%s/input0", | |
+ dev_name(&ts->client->dev)); | |
+ ts->input_dev->name = MAX11871_TOUCH; | |
+ ts->input_dev->phys = ts->phys; | |
+ ts->input_dev->id.bustype = BUS_I2C; | |
+ __set_bit(EV_SYN, ts->input_dev->evbit); | |
+ __set_bit(EV_ABS, ts->input_dev->evbit); | |
+ input_set_abs_params(ts->input_dev, ABS_MT_POSITION_X, | |
+ COORDINATES(panel_min_x), | |
+ COORDINATES(panel_max_x), 0, 0); | |
+ input_set_abs_params(ts->input_dev, ABS_MT_POSITION_Y, | |
+ COORDINATES(panel_min_y), | |
+ COORDINATES(panel_max_y), 0, 0); | |
+#ifdef ABS_MT_PRESSURE | |
+ input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 0xFF, 0, | |
+#else | |
+ input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 0xFF, 0, | |
+#endif | |
+ 0); | |
+ if (CONFIG(input_protocol) == MAX11871_PROTOCOL_B) { | |
+ input_mt_init_slots(ts->input_dev, CONFIG(max_touches)); | |
+ } else { | |
+ ts->input_dev->mtsize = 10; | |
+ input_set_abs_params(ts->input_dev, ABS_MT_TRACKING_ID, 0, | |
+ CONFIG(max_touches), 0, 0); | |
+ } | |
+ if (CONFIG(input_protocol) == MAX11871_PROTOCOL_CUSTOM1) { | |
+#if defined(ABS_MT_AMPLITUDE) && defined(ABS_MT_POSITION) | |
+ input_set_abs_params(ts->input_dev, ABS_MT_AMPLITUDE, 0, | |
+ 0xFF14, 0, 0); | |
+ input_set_abs_params(ts->input_dev, ABS_MT_POSITION, 0, | |
+ ((1 << 31) | (999 << 16) | 1003), 0, | |
+ 0); | |
+#endif | |
+ } | |
+ CHECK(input_register_device(ts->input_dev), | |
+ {input_free_device(ts->input_dev); ts->input_dev = NULL; }, 0, | |
+ "Failed to register touch input device"); | |
+ DEBUG(5, "(INIT): input touch device OK"); | |
+ | |
+ | |
+ if (CONFIG(buttons_enabled)) { | |
+ ts->key_input_dev = input_allocate_device(); | |
+ CHECK(!ts->key_input_dev, , 0, "Failed to allocate key input " | |
+ "device"); | |
+ snprintf(ts->key_phys, sizeof(ts->phys), "%s/input1", | |
+ dev_name(&client->dev)); | |
+ ts->key_input_dev->name = MAX11871_KEY; | |
+ ts->key_input_dev->phys = ts->key_phys; | |
+ ts->key_input_dev->id.bustype = BUS_I2C; | |
+ __set_bit(EV_KEY, ts->key_input_dev->evbit); | |
+ set_bit(KEY_HOME, ts->key_input_dev->keybit); | |
+ set_bit(KEY_MENU, ts->key_input_dev->keybit); | |
+ set_bit(KEY_BACK, ts->key_input_dev->keybit); | |
+ set_bit(KEY_SEARCH, ts->key_input_dev->keybit); | |
+ CHECK(input_register_device(ts->key_input_dev), | |
+ {input_free_device(ts->key_input_dev); | |
+ ts->key_input_dev = NULL; }, 0, | |
+ "Failed to register key input device"); | |
+ DEBUG(5, "(INIT): input key device OK"); | |
+ } | |
+ | |
+ if(panel_x!=0 && panel_y!=0) { | |
+ ts->width_factor = (CONFIG(lcd_x)<<SHIFT_BITS) / panel_x; | |
+ ts->height_factor = (CONFIG(lcd_y)<<SHIFT_BITS) / panel_y; | |
+ } | |
+ | |
+#ifdef CONFIG_HAS_EARLYSUSPEND | |
+ | |
+ ts->early_suspend.level = EARLY_SUSPEND_LEVEL_STOP_DRAWING - 1; | |
+ ts->early_suspend.suspend = early_suspend; | |
+ ts->early_suspend.resume = late_resume; | |
+ register_early_suspend(&ts->early_suspend); | |
+ ts->early_suspend_registered = 1; | |
+ DEBUG(5, "(INIT): suspend/resume registration OK"); | |
+#endif | |
+ | |
+ gl_ts = ts; | |
+ | |
+ CHECK(sysfs_create_file(android_touch_kobj, &dev_attr_debug_level.attr) < 0, , | |
+ 0, "failed to create sysfs file [debug_level]"); | |
+ CHECK(sysfs_create_file(android_touch_kobj, &dev_attr_vendor.attr) < 0, , | |
+ 0, "failed to create sysfs file [vendor]"); | |
+ CHECK(sysfs_create_file(android_touch_kobj, &dev_attr_config.attr) < 0, , | |
+ 0, "failed to create sysfs file [config]"); | |
+ CHECK(sysfs_create_file(android_touch_kobj, &dev_attr_diag.attr) < 0, , | |
+ 0, "failed to create sysfs file [diag]"); | |
+ CHECK(sysfs_create_file(android_touch_kobj, &dev_attr_gpio.attr) < 0, , | |
+ 0, "failed to create sysfs file [gpio]"); | |
+ while (*dev_attr) { | |
+ CHECK(device_create_file(&client->dev, *dev_attr) < 0, | |
+ , 0, "failed to create sysfs file [hreset]"); | |
+ ts->sysfs_created++; | |
+ dev_attr++; | |
+ } | |
+ DEVFCA(CONFIG(buttons), (S_IWUSR|S_IRUGO), button_show, button_store, button); | |
+ CHECK(device_create_bin_file(&client->dev, &dev_attr_report) < 0, , 0, | |
+ "failed to create sysfs file [report]"); | |
+ ts->sysfs_created++; | |
+ | |
+ PRINT("(INIT): Done"); | |
+ return 0; | |
+} | |
+ | |
+static int device_deinit(struct i2c_client *client) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ struct max11871_pdata *pdata = client->dev.platform_data; | |
+ struct device_attribute **dev_attr = dev_attrs; | |
+ | |
+ if (ts == NULL) | |
+ return 0; | |
+ | |
+ propagate_report(ts, -1, NULL); | |
+ | |
+ init_state = 0; | |
+ sysfs_remove_file(android_touch_kobj, &dev_attr_debug_level.attr); | |
+ sysfs_remove_file(android_touch_kobj, &dev_attr_vendor.attr); | |
+ sysfs_remove_file(android_touch_kobj, &dev_attr_config.attr); | |
+ sysfs_remove_file(android_touch_kobj, &dev_attr_diag.attr); | |
+ sysfs_remove_file(android_touch_kobj, &dev_attr_gpio.attr); | |
+ while (*dev_attr) { | |
+ if (ts->sysfs_created && ts->sysfs_created--) | |
+ device_remove_file(&client->dev, *dev_attr); | |
+ dev_attr++; | |
+ } | |
+ DEVFRA(ts->nbuttons_original, button); | |
+ if (ts->sysfs_created && ts->sysfs_created--) | |
+ device_remove_bin_file(&client->dev, &dev_attr_report); | |
+ | |
+#ifdef CONFIG_HAS_EARLYSUSPEND | |
+ if (ts->early_suspend_registered) | |
+ unregister_early_suspend(&ts->early_suspend); | |
+#endif | |
+ if (ts->input_dev) | |
+ input_unregister_device(ts->input_dev); | |
+ if (ts->key_input_dev) | |
+ input_unregister_device(ts->key_input_dev); | |
+ | |
+ if (client->irq) | |
+ free_irq(client->irq, ts); | |
+ kfree(ts); | |
+ if (pdata && pdata->init) | |
+ (void)pdata->init(pdata, 0); | |
+ | |
+ PRINT("(INIT): Deinitialized"); | |
+ return 0; | |
+} | |
+ | |
+static int check_chip_exist(struct i2c_client *client) | |
+{ | |
+ char buf[32]; | |
+ int read_len = 0, i; | |
+ | |
+ CHECK(!i2c_check_functionality(client->adapter, I2C_FUNC_I2C), , -1, | |
+ "I2C core driver does not support I2C functionality"); | |
+ | |
+ for(i=0; i<RETRY_TIMES; i++) { | |
+ if(i!=0) | |
+ msleep(20); | |
+ buf[0] = 0x0A; | |
+ buf[1] = 0x00; | |
+ if(i2c_master_send(client, buf, 2) <=0) | |
+ continue; | |
+ if(i2c_master_recv(client, buf, 2) <= 0) | |
+ continue; | |
+ read_len = (buf[0] + 1) << 1; | |
+ if(read_len>10) | |
+ read_len = 10; | |
+ if(i2c_master_recv(client, buf, read_len) <= 0) | |
+ continue; | |
+ break; | |
+ } | |
+ if(i == RETRY_TIMES) { | |
+ PRINT("(PROBE) No Maxim chip"); | |
+ return -1; | |
+ } | |
+ | |
+ PRINT("(INIT): I2C functionality OK"); | |
+ PRINT("(INIT): Chip exist"); | |
+ return 0; | |
+} | |
+ | |
+static int probe(struct i2c_client *client, | |
+ const struct i2c_device_id *id) | |
+{ | |
+ PRINT("(PROBE): max11871_%s Enter", __func__); | |
+ if(check_chip_exist(client)<0) | |
+ return -1; | |
+ | |
+ android_touch_kobj = kobject_create_and_add("android_touch", NULL); | |
+ CHECK(android_touch_kobj == NULL, | |
+ , 0, "failed to create kobj"); | |
+ CHECK(device_create_file(&client->dev, &dev_attr_init) < 0, , 0, | |
+ "failed to create sysfs file [init]"); | |
+ CHECK(sysfs_create_link(android_touch_kobj, | |
+ &client->dev.kobj, "maxim11871") < 0, | |
+ , 0, "failed to create link"); | |
+ if (!is_booting()) | |
+ return device_init(client); | |
+ CHECK(IS_ERR(kthread_run(device_init_thread, (void *)client, | |
+ MAX11871_NAME)), , -1, "failed to start kernel thread"); | |
+ return 0; | |
+} | |
+ | |
+static int remove(struct i2c_client *client) | |
+{ | |
+ int ret = device_deinit(client); | |
+ | |
+ sysfs_remove_link(android_touch_kobj, "maxim11871"); | |
+ device_remove_file(&client->dev, &dev_attr_init); | |
+ kobject_del(android_touch_kobj); | |
+ return ret; | |
+} | |
+ | |
+static int sreset(struct i2c_client *client) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 data[] = {0x00E9, 0x0000}; | |
+ return send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static int get_touch_config(struct i2c_client *client) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 data[] = {0x0002, 0x0000}; | |
+ return send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static int get_fw_version(struct i2c_client *client) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 data[] = {0x0040, 0x0000}; | |
+ return send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static int change_touch_rpt(struct i2c_client *client, u16 to) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 data[] = {0x0018, 0x0001, to & 0x0003}; | |
+ return send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static int set_touch_frame(struct i2c_client *client, | |
+ u16 idle_frame, u16 active_frame) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 data[] = {0x0026, 0x0001, | |
+ (((idle_frame & 0xFF) << 8) | (active_frame & 0xFF))}; | |
+ return send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static int set_baseline_mode(struct i2c_client *client, u16 mode) | |
+{ | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ u16 data[] = {0x0028, 0x0001, mode & 0x0003}; | |
+ return send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static void propagate_report(struct data *ts, int status, u16 *report) | |
+{ | |
+ int i; | |
+ | |
+ down(&ts->report_sem); | |
+ if (report) | |
+ memcpy(ts->report, report, BYTE_SIZE(BYTEL(report[0]) + 1)); | |
+ | |
+ mutex_lock(&ts->report_mutex); | |
+ for (i = 0; i < MAX_REPORT_READERS; i++) { | |
+ if (status == 0) { | |
+ if (ts->report_readers[i].report_id == 0xFFFF || | |
+ ts->report_readers[i].report_id == | |
+ ts->report[1]) { | |
+ up(&ts->report_readers[i].sem); | |
+ ts->report_readers[i].reports_passed++; | |
+ ts->report_readers_outstanding++; | |
+ } | |
+ } else { | |
+ if (ts->report_readers[i].report_id != 0) { | |
+ ts->report_readers[i].status = status; | |
+ up(&ts->report_readers[i].sem); | |
+ } | |
+ } | |
+ } | |
+ if (ts->report_readers_outstanding == 0) | |
+ up(&ts->report_sem); | |
+ mutex_unlock(&ts->report_mutex); | |
+} | |
+ | |
+static int get_report(struct data *ts, u16 report_id, ulong timeout) | |
+{ | |
+ int i, ret, status; | |
+ | |
+ mutex_lock(&ts->report_mutex); | |
+ for (i = 0; i < MAX_REPORT_READERS; i++) | |
+ if (ts->report_readers[i].report_id == 0) | |
+ break; | |
+ CHECK(i == MAX_REPORT_READERS, {mutex_unlock(&ts->report_mutex); | |
+ ENABLE_IRQ(); }, -1, "maximum readers reached"); | |
+ | |
+ ts->report_readers[i].report_id = report_id; | |
+ sema_init(&ts->report_readers[i].sem, 1); | |
+ down(&ts->report_readers[i].sem); | |
+ | |
+ ts->report_readers[i].status = 0; | |
+ ts->report_readers[i].reports_passed = 0; | |
+ mutex_unlock(&ts->report_mutex); | |
+ ENABLE_IRQ(); | |
+ | |
+ if (timeout == 0xFFFFFFFF) | |
+ ret = down_interruptible(&ts->report_readers[i].sem); | |
+ else | |
+ ret = down_timeout(&ts->report_readers[i].sem, | |
+ (timeout * HZ) / 1000); | |
+ mutex_lock(&ts->report_mutex); | |
+ | |
+ if (ret && ts->report_readers[i].reports_passed > 0) | |
+ if (--ts->report_readers_outstanding == 0) | |
+ up(&ts->report_sem); | |
+ status = ts->report_readers[i].status; | |
+ ts->report_readers[i].report_id = 0; | |
+ mutex_unlock(&ts->report_mutex); | |
+ return (status == 0) ? ret : status; | |
+} | |
+ | |
+static void release_report(struct data *ts) | |
+{ | |
+ mutex_lock(&ts->report_mutex); | |
+ if (--ts->report_readers_outstanding == 0) | |
+ up(&ts->report_sem); | |
+ mutex_unlock(&ts->report_mutex); | |
+} | |
+ | |
+static void suspend(struct i2c_client *client, pm_message_t mesg) | |
+{ | |
+ u16 data[] = {0x0020, 0x0001, 0x0000}; | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ PRINT("max11871_%s", __func__); | |
+ DISABLE_IRQ(); | |
+ (void)send_mtp_command(ts, data, NWORDS(data)); | |
+} | |
+ | |
+static void resume(struct i2c_client *client) | |
+{ | |
+ u16 data[] = {0x0020, 0x0001, 0x0002}; | |
+ struct data *ts = i2c_get_clientdata(client); | |
+ | |
+ PRINT("max11871_%s", __func__); | |
+ | |
+ (void)send_mtp_command(ts, data, NWORDS(data)); | |
+ ENABLE_IRQ(); | |
+ | |
+ (void)change_touch_rpt(ts->client, MAXIM_TOUCH_REPORT_MODE); | |
+} | |
+ | |
+#ifdef CONFIG_HAS_EARLYSUSPEND | |
+static void early_suspend(struct early_suspend *h) | |
+{ | |
+ struct data *ts; | |
+ ts = container_of(h, struct data, early_suspend); | |
+ | |
+ suspend(ts->client, PMSG_SUSPEND); | |
+} | |
+ | |
+static void late_resume(struct early_suspend *h) | |
+{ | |
+ struct data *ts; | |
+ ts = container_of(h, struct data, early_suspend); | |
+ | |
+ resume(ts->client); | |
+} | |
+#endif | |
+ | |
+#define STATUS_ADDR_H 0x00 | |
+#define STATUS_ADDR_L 0xFF | |
+#define DATA_ADDR_H 0x00 | |
+#define DATA_ADDR_L 0xFE | |
+#define STATUS_READY_H 0xAB | |
+#define STATUS_READY_L 0xCC | |
+#define RXTX_COMPLETE_H 0x54 | |
+#define RXTX_COMPLETE_L 0x32 | |
+static int bootloader_read_status_reg(struct data *ts, const u8 byteL, | |
+ const u8 byteH) | |
+{ | |
+ u8 buffer[] = {STATUS_ADDR_L, STATUS_ADDR_H}, i; | |
+ | |
+ for (i = 0; i < 3; i++) { | |
+ CHECK(i2c_tx_bytes(ts, buffer, 2) != 2, , -1, "TX fail"); | |
+ CHECK(i2c_rx_bytes(ts, buffer, 2) != 2, , -1, "RX fail"); | |
+ if (buffer[0] == byteL && buffer[1] == byteH) | |
+ break; | |
+ } | |
+ CHECK(i == 3, , -1, "Unexpected status => %02X%02X vs %02X%02X", | |
+ buffer[0], buffer[1], byteL, byteH); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_write_status_reg(struct data *ts, const u8 byteL, | |
+ const u8 byteH) | |
+{ | |
+ u8 buffer[] = {STATUS_ADDR_L, STATUS_ADDR_H, byteL, byteH}; | |
+ | |
+ CHECK(i2c_tx_bytes(ts, buffer, 4) != 4, , -1, "TX fail"); | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_rxtx_complete(struct data *ts) | |
+{ | |
+ return bootloader_write_status_reg(ts, RXTX_COMPLETE_L, | |
+ RXTX_COMPLETE_H); | |
+} | |
+ | |
+static int bootloader_read_data_reg(struct data *ts, u8* byteL, u8* byteH) | |
+{ | |
+ u8 buffer[] = {DATA_ADDR_L, DATA_ADDR_H, 0x00, 0x00}; | |
+ | |
+ CHECK(i2c_tx_bytes(ts, buffer, 2) != 2, , -1, "TX fail"); | |
+ CHECK(i2c_rx_bytes(ts, buffer, 4) != 4, , -1, "RX fail"); | |
+ CHECK(buffer[2] != 0xCC && buffer[3] != 0xAB, , -1, | |
+ "Status is not ready"); | |
+ | |
+ *byteL = buffer[0]; | |
+ *byteH = buffer[1]; | |
+ return bootloader_rxtx_complete(ts); | |
+} | |
+ | |
+static int bootloader_write_data_reg(struct data *ts, const u8 byteL, | |
+ const u8 byteH) | |
+{ | |
+ u8 buffer[6] = {DATA_ADDR_L, DATA_ADDR_H, byteL, byteH, | |
+ RXTX_COMPLETE_L, RXTX_COMPLETE_H}; | |
+ | |
+ CHECK(bootloader_read_status_reg(ts, STATUS_READY_L, | |
+ STATUS_READY_H) < 0, , -1, "read status register fail"); | |
+ CHECK(i2c_tx_bytes(ts, buffer, 6) != 6, , -1, "TX fail"); | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_rxtx(struct data *ts, u8* byteL, u8* byteH, const int tx) | |
+{ | |
+ if (tx > 0) { | |
+ CHECK(bootloader_write_data_reg(ts, *byteL, *byteH) < 0, , -1, | |
+ "write data register fail"); | |
+ return 0; | |
+ } | |
+ | |
+ CHECK(bootloader_read_data_reg(ts, byteL, byteH) < 0, , -1, "read " | |
+ "data register fail"); | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_get_cmd_conf(struct data *ts, int retries) | |
+{ | |
+ u8 byteL, byteH; | |
+ | |
+ do { | |
+ if (bootloader_read_data_reg(ts, &byteL, &byteH) >= 0) { | |
+ if (byteH == 0x00 && byteL == 0x3E) | |
+ return 0; | |
+ } | |
+ retries--; | |
+ } while (retries > 0); | |
+ | |
+ return -1; | |
+} | |
+ | |
+static int bootloader_write_buffer(struct data *ts, u8* buffer, int size) | |
+{ | |
+ u8 byteH = 0x00; | |
+ int k; | |
+ | |
+ for (k = 0; k < size; k++) { | |
+ CHECK(bootloader_rxtx(ts, &buffer[k], &byteH, 1) < 0, , -1, | |
+ "bootloader RX-TX fail"); | |
+ } | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_enter(struct data *ts) | |
+{ | |
+ int i; | |
+ u16 enter[3][2] = {{0x7F00, 0x0047}, {0x7F00, 0x00C7}, | |
+ {0x7F00, 0x0007} }; | |
+ | |
+ DISABLE_IRQ(); | |
+ mutex_lock(&ts->i2c_mutex); | |
+ for (i = 0; i < 3; i++) { | |
+ CHECK(i2c_tx_words(ts, enter[i], 2) != 2, | |
+ {mutex_unlock(&ts->i2c_mutex); ENABLE_IRQ(); }, -1, | |
+ "Failed to enter bootloader"); | |
+ } | |
+ | |
+ CHECK(bootloader_get_cmd_conf(ts, 5) < 0, | |
+ {mutex_unlock(&ts->i2c_mutex); ENABLE_IRQ(); }, -1, | |
+ "Failed to enter bootloader mode"); | |
+ bootloader = 1; | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_exit(struct data *ts) | |
+{ | |
+ u16 exit[] = {0x00FE, 0x0001, 0x5432}; | |
+ | |
+ bootloader = 0; | |
+ ts->got_report = 0; | |
+ CHECK(i2c_tx_words(ts, exit, NWORDS(exit)) != NWORDS(exit), | |
+ mutex_unlock(&ts->i2c_mutex), -1, | |
+ "Failed to exit bootloader"); | |
+ mutex_unlock(&ts->i2c_mutex); | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_get_crc(struct data *ts, u16 *crc16, u16 len) | |
+{ | |
+ u8 crc_command[] = {0x30, 0x02, 0x00, 0x00, BYTEL(len), BYTEH(len)}; | |
+ u8 byteL = 0, byteH = 0; | |
+ u16 rx_crc16 = 0; | |
+ | |
+ CHECK(bootloader_write_buffer(ts, crc_command, 6) < 0, , -1, | |
+ "write buffer fail"); | |
+ msleep(200); | |
+ | |
+ | |
+ CHECK(bootloader_rxtx(ts, &byteL, &byteH, 0) < 0, , -1, | |
+ "Failed to read low byte of crc response!"); | |
+ rx_crc16 = (u16)byteL; | |
+ | |
+ | |
+ CHECK(bootloader_rxtx(ts, &byteL, &byteH, 0) < 0, , -1, | |
+ "Failed to read high byte of crc response!"); | |
+ rx_crc16 = (u16)(byteL << 8) | rx_crc16; | |
+ | |
+ CHECK(bootloader_get_cmd_conf(ts, 5) < 0, , -1, "CRC get failed"); | |
+ *crc16 = rx_crc16; | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_set_byte_mode(struct data *ts) | |
+{ | |
+ u8 buffer[2] = {0x0A, 0x00}; | |
+ | |
+ CHECK(bootloader_write_buffer(ts, buffer, 2) < 0, , -1, | |
+ "write buffer fail"); | |
+ CHECK(bootloader_get_cmd_conf(ts, 10) < 0, , -1, | |
+ "command confirm fail"); | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_erase_flash(struct data *ts) | |
+{ | |
+ u8 byteL = 0x02, byteH = 0x00; | |
+ int i, verify = 0; | |
+ | |
+ CHECK(bootloader_rxtx(ts, &byteL, &byteH, 1) < 0, , -1, | |
+ "bootloader RX-TX fail"); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ msleep(60); | |
+ | |
+ if (bootloader_get_cmd_conf(ts, 0) < 0) | |
+ continue; | |
+ | |
+ verify = 1; | |
+ break; | |
+ } | |
+ | |
+ CHECK(verify != 1, , -1, "Flash Erase failed"); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int bootloader_write_flash(struct data *ts, u8 *image) | |
+{ | |
+ u8 command[] = {0xF0, 0x00, 0x80, 0x00, 0x00}, buffer[130]; | |
+ int i, j; | |
+ | |
+ CHECK(bootloader_write_buffer(ts, command, 5) < 0, , -1, | |
+ "write buffer fail"); | |
+ | |
+ for (i = 0; i < 256; i++) { | |
+ for (j = 0; j < 100; j++) { | |
+ usleep_range(1500, 2000); | |
+ if (bootloader_read_status_reg(ts, STATUS_READY_L, | |
+ STATUS_READY_H) == 0) | |
+ break; | |
+ } | |
+ CHECK(j == 100, , -1, "Failed to read Status register!"); | |
+ | |
+ buffer[0] = ((i % 2) == 0) ? 0x00 : 0x40; | |
+ buffer[1] = 0x00; | |
+ memcpy(buffer + 2, image + i * 128, 128); | |
+ | |
+ CHECK(i2c_tx_bytes(ts, buffer, 130) != 130, , -1, | |
+ "Failed to write data (%d)", i); | |
+ CHECK(bootloader_rxtx_complete(ts) < 0, , -1, | |
+ "Transfer failure (%d)", i); | |
+ } | |
+ | |
+ usleep_range(10000, 11000); | |
+ CHECK(bootloader_get_cmd_conf(ts, 5) < 0, , -1, | |
+ "Flash programming failed"); | |
+ return 0; | |
+} | |
+ | |
+static const struct i2c_device_id id[] = { | |
+ { MAX11871_NAME, 0 }, | |
+ { } | |
+}; | |
+ | |
+MODULE_DEVICE_TABLE(i2c, id); | |
+ | |
+static struct i2c_driver driver = { | |
+ .probe = probe, | |
+ .remove = remove, | |
+#ifndef CONFIG_HAS_EARLYSUSPEND | |
+ .suspend = suspend, | |
+ .resume = resume, | |
+#endif | |
+ .id_table = id, | |
+ .driver = { | |
+ .name = MAX11871_NAME, | |
+ }, | |
+}; | |
+ | |
+static int __devinit max11871_init(void) | |
+{ | |
+ return i2c_add_driver(&driver); | |
+} | |
+ | |
+static void __exit max11871_exit(void) | |
+{ | |
+ i2c_del_driver(&driver); | |
+} | |
+ | |
+module_init(max11871_init); | |
+module_exit(max11871_exit); | |
+ | |
+MODULE_AUTHOR("Maxim Integrated Products, Inc."); | |
+MODULE_DESCRIPTION("MAX11871 Touchscreen Driver"); | |
+MODULE_LICENSE("GPL v2"); | |
+MODULE_VERSION("3.0.4.3"); | |
+ | |
diff --git drivers/input/touchscreen/synaptics_3200.c drivers/input/touchscreen/synaptics_3200.c | |
index f1b94d1..0545ea5 100644 | |
--- drivers/input/touchscreen/synaptics_3200.c | |
+++ drivers/input/touchscreen/synaptics_3200.c | |
@@ -3275,6 +3275,9 @@ static irqreturn_t synaptics_irq_thread(int irq, void *ptr) | |
} | |
} | |
if (buf & get_address_base(ts, 0x1A, INTR_SOURCE)) { | |
+#ifndef CONFIG_TOUCHSCREEN_SYNAPTICS_SWEEP2WAKE | |
+ int s2w_switch = 0; | |
+#endif | |
if (s2w_switch == 0) { | |
if (!ts->finger_count) | |
synaptics_ts_button_func(ts); | |
diff --git drivers/media/video/msm/actuators/msm_actuator.c drivers/media/video/msm/actuators/msm_actuator.c | |
index 78eccd8..597687e 100644 | |
--- drivers/media/video/msm/actuators/msm_actuator.c | |
+++ drivers/media/video/msm/actuators/msm_actuator.c | |
@@ -248,7 +248,7 @@ int32_t msm_actuator_config( | |
case CFG_GET_ACTUATOR_INFO: | |
cdata.is_af_supported = 1; | |
cdata.is_ois_supported = a_ctrl->actuator_ext_ctrl.is_ois_supported; | |
-#ifndef CONFIG_MACH_DELUXE_J | |
+#if !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
cdata.is_af_infinity_supported = a_ctrl->actuator_ext_ctrl.is_af_infinity_supported; | |
#endif | |
cdata.cfg.get_info = a_ctrl->get_info; | |
@@ -259,7 +259,7 @@ int32_t msm_actuator_config( | |
break; | |
case CFG_SET_ACTUATOR_INFO: | |
a_ctrl->set_info = cdata.cfg.set_info; | |
-#ifndef CONFIG_MACH_DELUXE_J | |
+#if !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
a_ctrl->enable_focus_step_log = cdata.enable_focus_step_log; | |
#endif | |
rc = a_ctrl->func_tbl.actuator_init_table(a_ctrl); | |
diff --git drivers/media/video/msm/msm_mctl.c drivers/media/video/msm/msm_mctl.c | |
index 66038a6..896cb0b 100644 | |
--- drivers/media/video/msm/msm_mctl.c | |
+++ drivers/media/video/msm/msm_mctl.c | |
@@ -306,7 +306,7 @@ static int msm_mctl_cmd(struct msm_cam_media_controller *p_mctl, | |
cdata.is_af_supported = 0; | |
cdata.is_ois_supported = 0; | |
cdata.is_cal_supported = 0; | |
-#ifndef CONFIG_MACH_DELUXE_J | |
+#if !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
cdata.small_step_damping = 0; | |
cdata.medium_step_damping = 0; | |
cdata.big_step_damping = 0; | |
@@ -324,7 +324,7 @@ static int msm_mctl_cmd(struct msm_cam_media_controller *p_mctl, | |
cdata.is_af_supported = 1; | |
cdata.is_ois_supported = p_mctl->actctrl->is_ois_supported; | |
cdata.is_cal_supported = p_mctl->actctrl->is_cal_supported; | |
-#ifndef CONFIG_MACH_DELUXE_J | |
+#if !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
cdata.small_step_damping = p_mctl->actctrl->small_step_damping; | |
cdata.medium_step_damping = p_mctl->actctrl->medium_step_damping; | |
cdata.big_step_damping = p_mctl->actctrl->big_step_damping; | |
diff --git drivers/video/msm/msm_fb.c drivers/video/msm/msm_fb.c | |
index 5875e74..730bc11 100644 | |
--- drivers/video/msm/msm_fb.c | |
+++ drivers/video/msm/msm_fb.c | |
@@ -1692,7 +1692,7 @@ static int msm_fb_register(struct msm_fb_data_type *mfd) | |
var->grayscale = 0, /* No graylevels */ | |
var->nonstd = 0, /* standard pixel format */ | |
var->activate = FB_ACTIVATE_VBL, /* activate it at vsync */ | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
var->height = panel_info->height, | |
var->width = panel_info->width, | |
#else | |
diff --git include/linux/i2c/isa1200.h include/linux/i2c/isa1200.h | |
new file mode 100644 | |
index 0000000..21075e4 | |
--- /dev/null | |
+++ include/linux/i2c/isa1200.h | |
@@ -0,0 +1,62 @@ | |
+/* | |
+ * isa1200.h - ISA1200 Haptic Motor driver | |
+ * | |
+ * Copyright (C) 2009 Samsung Electronics | |
+ * Kyungmin Park <kyungmin.park@samsung.com> | |
+ * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved. | |
+ * | |
+ * This program is free software; you can redistribute it and/or modify | |
+ * it under the terms of the GNU General Public License version 2 as | |
+ * published by the Free Software Foundation. | |
+ */ | |
+ | |
+#ifndef __LINUX_ISA1200_H | |
+#define __LINUX_ISA1200_H | |
+ | |
+#define ISA_I2C_VTG_MAX_UV 1800000 | |
+#define ISA_I2C_VTG_MIN_UV 1800000 | |
+#define ISA_I2C_CURR_UA 9630 | |
+ | |
+struct isa1200_regulator { | |
+ const char *name; | |
+ u32 min_uV; | |
+ u32 max_uV; | |
+ u32 load_uA; | |
+}; | |
+ | |
+enum mode_control { | |
+ POWER_DOWN_MODE = 0, | |
+ PWM_INPUT_MODE, | |
+ PWM_GEN_MODE, | |
+ WAVE_GEN_MODE | |
+}; | |
+ | |
+union pwm_div_freq { | |
+ unsigned int pwm_div; | |
+ unsigned int pwm_freq; | |
+}; | |
+ | |
+struct isa1200_platform_data { | |
+ const char *name; | |
+ unsigned int pwm_ch_id; | |
+ unsigned int max_timeout; | |
+ unsigned int hap_en_gpio; | |
+ unsigned int hap_len_gpio; | |
+ bool overdrive_high; | |
+ bool overdrive_en; | |
+ enum mode_control mode_ctrl; | |
+ union pwm_div_freq pwm_fd; | |
+ bool smart_en; | |
+ bool is_erm; | |
+ bool ext_clk_en; | |
+ bool need_pwm_clk; | |
+ unsigned int chip_en; | |
+ unsigned int duty; | |
+ struct isa1200_regulator *regulator_info; | |
+ u8 num_regulators; | |
+ int (*power_on)(int on); | |
+ int (*dev_setup)(bool on); | |
+ int (*clk_enable)(bool on); | |
+}; | |
+ | |
+#endif | |
diff --git include/linux/max11871.h include/linux/max11871.h | |
new file mode 100644 | |
index 0000000..1f2de49 | |
--- /dev/null | |
+++ include/linux/max11871.h | |
@@ -0,0 +1,156 @@ | |
+/* include/linux/max11871.h | |
+ * | |
+ * Copyright (c)2012 Maxim Integrated Products, Inc. | |
+ * | |
+ * Driver Version: 3.0.2 | |
+ * Release Date: June 18, 2012 | |
+ * | |
+ * This software is licensed under the terms of the GNU General Public | |
+ * License version 2, as published by the Free Software Foundation, and | |
+ * may be copied, distributed, and modified under those terms. | |
+ * | |
+ * This program is distributed in the hope that it will be useful, | |
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
+ * GNU General Public License for more details. | |
+ * | |
+ */ | |
+ | |
+#ifndef __MAX11871_H | |
+#define __MAX11871_H | |
+ | |
+#define MAX11871_NAME "max11871" | |
+#define MAX11871_TOUCH MAX11871_NAME "_touchscreen_0" | |
+#define MAX11871_KEY MAX11871_NAME "_key_0" | |
+#define MAX11871_LOG_NAME "[TP] " | |
+ | |
+#define MAX11871_BOARD_CONFIG 1 | |
+ | |
+#define MAX_WORDS_COMMAND 9 | |
+#define MAX_WORDS_REPORT 245 | |
+#define MAX_WORDS_COMMAND_ALL (15 * MAX_WORDS_COMMAND) | |
+ | |
+#define MAX11871_MAX_BUTTONS 10 | |
+#define MAX11871_FNAME_LENGTH 255 | |
+#define MAX11871_FWTABLE_LENGTH 10 | |
+#define MAX11871_CFGTABLE_LENGTH 20 | |
+ | |
+#define MAX11871_NO_BASELINE 0 | |
+#define MAX11871_FIX_BASELINE 1 | |
+#define MAX11871_AUTO_BASELINE 2 | |
+ | |
+struct max11871_fw_image { | |
+ char *file_name; | |
+ char fname_buf[MAX11871_FNAME_LENGTH + 1]; | |
+ u16 length; | |
+ u16 crc16; | |
+ u16 config_boundary; | |
+}; | |
+ | |
+struct max11871_fw_mapping { | |
+ u16 chip_id; | |
+ u16 fw_index; | |
+}; | |
+ | |
+struct max11871_chip_config { | |
+ u16 config_id; | |
+ #define MAX11871_CONFIG_TOUCH 0x0001 | |
+ #define MAX11871_CONFIG_PRIVATE 0x0002 | |
+ #define MAX11871_CONFIG_CALIBRATION 0x0004 | |
+ #define MAX11871_CONFIG_LINEARITY_X 0x0008 | |
+ #define MAX11871_CONFIG_LINEARITY_Y 0x0010 | |
+ #define MAX11871_CONFIG_IFACTOR 0x0020 | |
+ u16 config_tables; | |
+ u16 config_touch[MAX_WORDS_COMMAND_ALL]; | |
+ u16 config_private[MAX_WORDS_COMMAND_ALL]; | |
+ u16 config_cal[MAX_WORDS_COMMAND_ALL]; | |
+ u16 config_lin_x[MAX_WORDS_COMMAND_ALL]; | |
+ u16 config_lin_y[MAX_WORDS_COMMAND_ALL]; | |
+ u16 config_ifactor[MAX_WORDS_COMMAND_ALL * 5]; | |
+ u16 fw_mappings; | |
+ struct max11871_fw_mapping fw_mapping[MAX11871_FWTABLE_LENGTH]; | |
+}; | |
+ | |
+struct max11871_button_xy { | |
+ u16 x; | |
+ u16 y; | |
+ u16 size_x; | |
+ u16 size_y; | |
+}; | |
+ | |
+struct max11871_coordinates { | |
+ u16 panel_min_x; | |
+ u16 panel_max_x; | |
+ u16 panel_min_y; | |
+ u16 panel_max_y; | |
+ struct max11871_button_xy button_xy[MAX11871_MAX_BUTTONS]; | |
+}; | |
+ | |
+struct max11871_board_config { | |
+ u16 config_id; | |
+ u16 chip_id; | |
+ u8 major_ver; | |
+ u8 minor_ver; | |
+ u8 protocol_ver; | |
+ u16 vendor_pin; | |
+ u16 coordinate_settings; | |
+ struct max11871_coordinates coordinates; | |
+ u16 config_touch[42]; | |
+ u16 config_cal[50]; | |
+ u16 config_private[23]; | |
+ u16 config_lin_x[8]; | |
+ u16 config_lin_y[8]; | |
+ u16 config_ifactor[460]; | |
+}; | |
+ | |
+struct max11871_config { | |
+ u16 cfg_request; | |
+ char *cfg_file_name; | |
+ char cfg_fname_buf[MAX11871_FNAME_LENGTH + 1]; | |
+ u16 chip_configs; | |
+ u16 fw_mappings; | |
+ struct max11871_fw_mapping fw_mapping[MAX11871_FWTABLE_LENGTH]; | |
+ struct max11871_fw_image fw_image[MAX11871_FWTABLE_LENGTH]; | |
+ u16 defaults_allow; | |
+ u16 default_chip_config; | |
+ u16 default_chip_id; | |
+ u16 cfgfw_request_delay; | |
+ u16 i2c_words; | |
+ u16 max_touches; | |
+ u16 events_per_sec; | |
+ #define MAX11871_REVERSE_X 0x0001 | |
+ #define MAX11871_REVERSE_Y 0x0002 | |
+ #define MAX11871_SWAP_XY 0x0004 | |
+ u16 lcd_x; | |
+ u16 lcd_y; | |
+ u16 buttons_enabled; | |
+ #define MAX11871_BUTTONS_XY 0 | |
+ #define MAX11871_BUTTONS_SENSE 1 | |
+ u16 buttons_type; | |
+ u16 buttons; | |
+ unsigned int button_code[MAX11871_MAX_BUTTONS]; | |
+ #define MAX11871_PROTOCOL_A 0 | |
+ #define MAX11871_PROTOCOL_A_TRACK 1 | |
+ #define MAX11871_PROTOCOL_B 2 | |
+ #define MAX11871_PROTOCOL_CUSTOM1 3 | |
+ u16 input_protocol; | |
+ #define MAX11871_UPDATE_NONE 0 | |
+ #define MAX11871_UPDATE_BIN 1 | |
+ #define MAX11871_UPDATE_CONFIG 2 | |
+ #define MAX11871_UPDATE_BOTH 3 | |
+ u8 update_feature; | |
+ u16 tw_mask; | |
+}; | |
+ | |
+struct max11871_pdata { | |
+ struct max11871_config *config; | |
+ struct max11871_board_config *fw_config; | |
+ unsigned gpio_reset; | |
+ unsigned gpio_tirq; | |
+ int (*init)(struct max11871_pdata *pdata, int value); | |
+ int (*reset)(struct max11871_pdata *pdata, int value); | |
+ int (*tirq)(struct max11871_pdata *pdata); | |
+}; | |
+ | |
+#endif | |
+ | |
diff --git include/linux/usb/msm_hsusb.h include/linux/usb/msm_hsusb.h | |
index b29bd6e..1d17d58 100644 | |
--- include/linux/usb/msm_hsusb.h | |
+++ include/linux/usb/msm_hsusb.h | |
@@ -23,7 +23,7 @@ | |
#include <linux/usb/gadget.h> | |
#include <linux/usb/otg.h> | |
#include <linux/wakelock.h> | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
#include <mach/board.h> | |
#endif | |
#include <linux/pm_qos.h> | |
@@ -219,7 +219,7 @@ struct msm_otg_platform_data { | |
unsigned int mpm_otgsessvld_int; | |
bool mhl_enable; | |
bool disable_reset_on_disconnect; | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
char *ldo_3v3_name; | |
char *ldo_1v8_name; | |
bool enable_dcd; | |
@@ -228,7 +228,7 @@ struct msm_otg_platform_data { | |
bool enable_lpm_on_dev_suspend; | |
bool core_clk_always_on_workaround; | |
struct msm_bus_scale_pdata *bus_scale_table; | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
int reset_phy_before_lpm; | |
void (*usb_uart_switch)(int uart); | |
int ldo_power_collapse; | |
@@ -313,7 +313,7 @@ struct msm_otg { | |
struct usb_phy phy; | |
struct msm_otg_platform_data *pdata; | |
int irq; | |
-#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) | |
+#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
int async_irq; | |
#endif | |
struct clk *clk; | |
@@ -338,7 +338,7 @@ struct msm_otg { | |
#define A_BUS_SUSPEND 14 | |
#define A_CONN 15 | |
#define B_BUS_REQ 16 | |
-#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) | |
+#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
#define MHL 17 | |
#endif | |
unsigned long inputs; | |
@@ -350,18 +350,18 @@ struct msm_otg { | |
unsigned cur_power; | |
struct delayed_work chg_work; | |
struct delayed_work pmic_id_status_work; | |
-#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) | |
+#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
struct delayed_work check_ta_work; | |
#endif | |
enum usb_chg_state chg_state; | |
enum usb_chg_type chg_type; | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
u8 dcd_retries; | |
#else | |
unsigned dcd_time; | |
#endif | |
struct wake_lock wlock; | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
struct wake_lock usb_otg_wlock; | |
struct wake_lock cable_detect_wlock; | |
#endif | |
@@ -371,7 +371,7 @@ struct msm_otg { | |
unsigned long caps; | |
struct msm_xo_voter *xo_handle; | |
uint32_t bus_perf_client; | |
-#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) | |
+#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
bool mhl_enabled; | |
#endif | |
/* | |
@@ -396,10 +396,10 @@ struct msm_otg { | |
#define PHY_PWR_COLLAPSED BIT(0) | |
#define PHY_RETENTIONED BIT(1) | |
#define XO_SHUTDOWN BIT(2) | |
-#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) | |
+#if !defined(CONFIG_MACH_M7_WLJ) && !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
#define CLOCKS_DOWN BIT(3) | |
#endif | |
-#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) | |
+#if defined(CONFIG_MACH_M7_WLJ) || defined(CONFIG_MACH_DELUXE_J) || defined(CONFIG_MACH_IMPRESSION_J) | |
struct work_struct notifier_work; | |
enum usb_connect_type connect_type; | |
int connect_type_ready; | |
diff --git include/media/msm_camera.h include/media/msm_camera.h | |
index 383a64c..3e68a88 100644 | |
--- include/media/msm_camera.h | |
+++ include/media/msm_camera.h | |
@@ -1604,7 +1604,7 @@ struct msm_actuator_cfg_data { | |
uint8_t is_af_supported; | |
uint8_t is_ois_supported; | |
uint8_t is_cal_supported; | |
-#ifndef CONFIG_MACH_DELUXE_J | |
+#if !defined(CONFIG_MACH_MONARUDO) && !defined(CONFIG_MACH_IMPRESSION_J) && !defined(CONFIG_MACH_DELUXE_J) && !defined(CONFIG_MACH_IMPRESSION_J) | |
int8_t enable_focus_step_log; | |
uint8_t small_step_damping; | |
uint8_t medium_step_damping; |
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