efm32.cfg

interface ftdi
ftdi_vid_pid 0x0403 0x6014

# 0x000f -> TMS, TCK, TDI, TDO
# 0x4000 -> ^LED
# 0x0010 -> GPIOL0 (grey)
# 0x0020 -> GPIOL1 (purpe)
# 0x0040 -> GPIOL2 (white)
# 0x0080 -> GPIOL3 (blue)

ftdi_layout_init 0x0008 0x400b

ftdi_layout_signal LED -ndata 0x4000

# We could use GPIOL0 and GPIOL1 for SRST resp. TRST.
# This is a guess how to do it:
# ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010
# ftdi_layout_signal nTRST -data 0x0020 -oe 0x0020

ftdi_layout_signal GPIOL0 -data 0x0010 -oe 0x0010
ftdi_layout_signal GPIOL1 -data 0x0020 -oe 0x0020
ftdi_layout_signal GPIOL2 -data 0x0040 -oe 0x0040
ftdi_layout_signal GPIOL3 -data 0x0080 -oe 0x0080
adapter_khz 1000

transport select jtag 


if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME efm32
}

# Work-area is a space in RAM used for flash programming
# By default use 2kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x800
}

if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4ba00477
}

jtag newtap efm32 cpu -irlen 4 -expected-id 0x4ba00477
jtag newtap auto1 tap -irlen 6 -expected-id 0x23727093
jtag newtap auto2 tap -irlen 4 -expected-id 0x4ba00477


dap create mychip.dap -chain-position efm32.cpu
target create MyTarget cortex_m -dap mychip.dap

MyTarget configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME efm32 0 0 0 0 MyTarget


init
flash info 0
flash probe 0
flash write_image ncp-empty-target.hex 0 ihex
shutdown