Generic Makefile

Makefile

# Generic makefile for a C project
# Written by Keefer Rourke <mail@krourke.org>
#
# This file is Public Domain or, in places where public domain works
# are not recognized, licensed as CC0. Legal text:
# <https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt>
#
# This Makefile should not rely and any GNU-specific functionality,
# though it is based on the GNU make documentation which is available
# at: <https://www.gnu.org/software/make/manual/make.html>

# specify the shell, in case the SHELL variable is not set or is not
# inherited from the environment
SHELL = /bin/bash

# set suffix list, to prevent confusion between different make programs
# line 17 clears an implied suffix list, and line 18 sets a new one
.SUFFIXES:
.SUFFIXES: .c .h .o

# project set up and directories
CC	= gcc
INCLDIR	= include/
BINDIR	= bin/
OBJDIR	= obj/
SRCDIR	= src/

# final executable name
_BIN	= a.out
BIN	= $(addprefix $(BINDIR), $(_BIN))

# files; here all object files will be stored in $(OBJDIR), with the
# same base names as corresponding c files from SRCDIR
SRC	= $(wildcard src/*.c)
_OBJS	= $(patsubst src/%.c, %.o, $(SRC))
OBJS	= $(addprefix $(OBJDIR), $(_OBJS))

# compilation flags
CFLAGS = -Wall -std=c99 -pedantic -g -I$(INCLDIR)
OFLAGS =


# compile binary and object files
.PHONY: all
all: $(BIN) docs

$(BIN): $(BINDIR) $(OBJS)
	$(CC) $(OFLAGS) $(OBJS) -o $(BIN)

$(BINDIR):
	mkdir -p $(BINDIR)

$(OBJS): $(OBJDIR) $(SRC)
	$(CC) $(CFLAGS) -c $(SRC) -o $(OBJS)

$(OBJDIR):
	mkdir -p $(OBJDIR)


# generate docs with doxygen
# this is intended to be used with a Doxyfile that specifies LaTeX
# output; modify as required for different documentation formats
#
# DOCDIR and TEXDIR must match the appropriate directories specified in
# Doxyfile
DOCDIR = docs/
TEXDIR = latex/

.PHONY: docs docs-clean
docs: Doxyfile
	doxygen
#	generate PDF from LaTeX sources
	cd $(DOCDIR)$(TEXDIR) && $(MAKE)
	mv $(DOCDIR)$(TEXDIR)refman.pdf $(DOCDIR)

docs-clean:
	cd $(DOCDIR)$(TEXDIR) && $(MAKE) clean


# clean entire project directory
.PHONY: clean
clean:
	- rm -rf $(BINDIR) $(OBJDIR) $(DOCDIR)


# check code quality
.PHONY: cppcheck memcheck
cppcheck:
	cppcheck --enable=all --language=c --std=c99 --inconclusive \
	--suppress=missingInclude $(SRC) -i $(INCLDIR)

memcheck: all
	valgrind -v --show-leak-kinds=all --leak-check=full --track-origins=yes \
	./$(BIN)

# debugging make
print-% :
	@echo $* = $($*)

Github annoyingly seems to be setting tab chars to 8 spaces wide; viewing this in a sane editor may appear messy — sorry.

The good news: you shouldn't really have to edit this for any normal small or medium sized C projects!

The print-% target is very helpful for debugging your Makefile itself, or for doing some tricks with the shell. You can call this target to print make variables to the console.

Try running

make print-SRC print-OBJS print-OUT

You should get something like:

SRC = src/one.c src/two.c src/three.c
OBJS = obj/one.o obj/two.o obj/three.o
OUT = bin/a.out

How do we check the cpp check for whole source code?

@ixnisarg It does by default, as long as all your source code is kept in the $(SRCDIR) directory. I also haven't updated this in over 2 years, so it's possible cppcheck's options have changed?

When I am trying to maintain the same structure as above, this makefile is not generating the executable file.

@Ramya2099, yeah this might just be a good starting point. It worked for my use cases during school, but probably isn't great for much else!