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keio / gist:10519117
Last active July 22, 2022 12:30
VHDL Snippets
-- VHDL BIT OPERATIONS
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity bitops is
Port( A : in std_logic_vector(3 downto 0);
B : in std_logic_vector(3 downto 0);