kiram9

//
// SEC Functionality
//
#define SEC_SYSTEM_POWER_ON                   0x01        // CPU power on and switch to Protected mode
#define SEC_BEFORE_MICROCODE_PATCH            0x02        // Patching CPU microcode
#define SEC_AFTER_MICROCODE_PATCH             0x03        // Setup Cache as RAM
#define SEC_ACCESS_CSR                        0x04        // PCIE MMIO Base Address initial
#define SEC_GENERIC_MSRINIT                   0x05        // CPU Generic MSR initial
#define SEC_CPU_SPEEDCFG                      0x06        // Setup CPU speed
#define SEC_SETUP_CAR_OK                      0x07        // Cache as RAM test