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klardotsh/gist:c6bf064f99628d81a3a5b0a476390b68

Created November 11, 2017 09:18
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CAROLINE cbmem, attempt 3
Raw
gistfile1.txt
coreboot-4a0650d-dirty Thu Jan 26 15:37:34 UTC 2017 verstage starting...
FSP TempRamInit successful
bist: 0x00000000
tsc: 0x0000000000d82d02
CPU: Intel(R) Core(TM) m3-6Y30 CPU @ 0.90GHz
CPU: ID 406e3, Skylake D0, ucode: 00000089
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 190c (rev 08) is Skylake-Y
PCH: device id 9d46 (rev 21) is Skylake-Y Premium
IGD: device id 191e (rev 07) is Skylake ULX GT2
CPU: frequency set to 900 MHz
Found TPM SLB9670 TT 1.2 by Infineon
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
setup_tpm():320: TPM: SetupTPM() succeeded
TPM: tlcl_read(0x1007, 10)
TPM: command 0xcf returned 0x0
Phase 1
FMAP: Found "FMAP" version 1.0 at c10000.
FMAP: base = 0 size = 1000000 #areas = 29
FMAP: area GBB found @ c11000 (978944 bytes)
VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
Phase 2
Phase 3
FMAP: area GBB found @ c11000 (978944 bytes)
FMAP: area VBLOCK_B found @ 5f0000 (65536 bytes)
FMAP: area VBLOCK_B found @ 5f0000 (65536 bytes)
VB2:vb2_verify_keyblock() Checking key block signature...
FMAP: area VBLOCK_B found @ 5f0000 (65536 bytes)
FMAP: area VBLOCK_B found @ 5f0000 (65536 bytes)
VB2:vb2_verify_fw_preamble() Verifying preamble.
Phase 4
FMAP: area FW_MAIN_B found @ 600000 (4063168 bytes)
VB2:vb2api_init_hash() HW crypto for hash_alg 3 not supported, using SW
Saving vboot hash.
TPM: command 0x14 returned 0x0
TPM: command 0x14 returned 0x0
TPM: Set global lock
TPM: tlcl_write(0x0, 0)
TPM: command 0xcd returned 0x0
Slot B is selected
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'fallback/romstage'
CBFS: Found @ offset e0000 size a83c
coreboot-80e1841-dirty Thu Jun 8 02:40:06 UTC 2017 romstage starting...
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'fsp.bin'
CBFS: Found @ offset 65fc0 size 7a000
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 1bac0 size 18000
microcode: sig=0x406e3 pf=0x80 revision=0x89
microcode: updated to revision 0x89 date=2017-04-09
CONFIG_MMCONF_BASE_ADDRESS: 0xe0000000
Using FSP 1.1
FSP_INFO_HEADER: ff666094
FSP Signature: $SKLFSP$
FSP Header Version: 2
FSP Revision: 1.9.0.0
FSP Entry Points:
0xff666000: Image Base
0xff6dee83: TempRamInit
0xff6defcc: FspInit
0xff6defe0: MemoryInit
0xff6defea: TempRamExit
0xff6deff4: SiliconInit
0xff6defd6: NotifyPhase
0xff6e0000: Image End
PM1_STS: 0000
PM1_EN: 0000
PM1_CNT: 00000000
TCO_STS: 0000 0000
GPE0_STS: 00000000 00000000 00000000 00000840
GPE0_EN: 00000000 00000000 00000000 00000000
GEN_PMCON: e0a00200 00001a08
GBLRST_CAUSE: 00000000 00000000
Previous Sleep State: S0
MLB: board version 5
SPD index 0
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'spd.bin'
CBFS: Found @ offset 3180 size 300
SPD: module type is LPDD
*** Log truncated, 758 characters dropped. ***
External stage cache:
IMD: root @ 7b3ff000 254 entries.
IMD: root @ 7b3fec00 62 entries.
creating vboot_handoff structure
Copying FW preamble
Chrome EC: clear events_b mask to 0x00004000
FSP_SMBIOS_MEMORY_INFO HOB: 0x7ad294a0
0x7acfe000: fsp_reserved_memory_area
memcfg DDR3 clock 1600 MHz
memcfg channel assignment: A: 2, B 0, C 0
memcfg channel[0] config (00000110):
enhanced interleave mode off
rank interleave off
DIMMA 4096 MB width x8 or x32 single rank, selected
DIMMB 256 MB width x8 or x32 single rank
memcfg channel[1] config (00000110):
enhanced interleave mode off
rank interleave off
DIMMA 4096 MB width x8 or x32 single rank, selected
DIMMB 256 MB width x8 or x32 single rank
MRC data at 7ad29548 6256 bytes
Relocate MRC DATA from 7ad29548 to 7acda000 (6256 bytes)
CBMEM entry for DIMM info: 0x7aefe860
WEAK: src/drivers/intel/fsp1_1/romstage.c/mainboard_add_dimm_info called
WEAK: src/drivers/intel/fsp1_1/romstage.c/mainboard_add_dimm_info called
2 DIMMs found
Calling FspTempRamExit API
FspTempRamExit returned successfully
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 5240 size 16848
Decompressing stage fallback/ramstage @ 0x7ac14fc0 (784656 bytes)
Loading module at 7ac15000 with entry 7ac15000. filesize: 0x32a50 memsize: 0xbf8d0
Processing 2753 relocs. Offset value of 0x7ab15000
coreboot-80e1841-dirty Thu Jun 8 02:40:06 UTC 2017 ramstage starting...
FMAP: Found "FMAP" version 1.0 at c10000.
FMAP: base = 0 size = 1000000 #areas = 29
FMAP: area RO_VPD found @ c00000 (16384 bytes)
FMAP: area RW_VPD found @ 9f8000 (8192 bytes)
FMAP: area RO_VPD found @ c00000 (16384 bytes)
FMAP: area RW_VPD found @ 9f8000 (8192 bytes)
Moving GDT to 7aefe640...ok
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 2987 run 30 exit 1
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'fsp.bin'
CBFS: Found @ offset 65fc0 size 7a000
Ignoring FSPP entry: 12345678
FSP: Saving binary in cache
FSP_INFO_HEADER: 7ab99094
FSP Signature: $SKLFSP$
FSP Header Version: 2
FSP Revision: 1.9.0.0
FSP Entry Points:
0x7ab99000: Image Base
0x7ac11e83: TempRamInit
0x7ac11fcc: FspInit
0x7ac11fe0: MemoryInit
0x7ac11fea: TempRamExit
0x7ac11ff4: SiliconInit
0x7ac11fd6: NotifyPhase
0x7ac13000: Image End
0x7abbb15c: VPD Data
0x7abbb198: UPD Data
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'vbt.bin'
CBFS: Found @ offset 1f40 size 1200
FSP_INFO: VBT found at ff601f78, 0x00001200 bytes
Passing VBT to GOP
Calling FspSiliconInit
Calling FspSiliconInit(0x7ac4fd26) at 0x7ac11ff4
FspSiliconInit returned 0x00000000
WEAK: src/drivers/intel/fsp1_1/ramstage.c/soc_after_silicon_init called
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 328142 exit 1
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:16.4: enabled 0
PCI: 00:17.0: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 0
PCI: 00:19.2: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 0
PCI: 00:1d.1: enabled 0
PCI: 00:1d.2: enabled 0
PCI: 00:1d.3: enabled 0
PCI: 00:1e.0: enabled 1
PCI: 00:1e.1: enabled 0
PCI: 00:1e.2: enabled 0
PCI: 00:1e.3: enabled 0
PCI: 00:1e.4: enabled 1
PCI: 00:1e.5: enabled 0
PCI: 00:1e.6: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 0c31.0: enabled 1
PNP: 0c09.0: enabled 1
PCI: 00:1f.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:16.4: enabled 0
PCI: 00:17.0: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 0
PCI: 00:19.2: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 0
PCI: 00:1d.1: enabled 0
PCI: 00:1d.2: enabled 0
PCI: 00:1d.3: enabled 0
PCI: 00:1e.0: enabled 1
PCI: 00:1e.1: enabled 0
PCI: 00:1e.2: enabled 0
PCI: 00:1e.3: enabled 0
PCI: 00:1e.4: enabled 1
PCI: 00:1e.5: enabled 0
PCI: 00:1e.6: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 0c31.0: enabled 1
PNP: 0c09.0: enabled 1
PCI: 00:1f.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0000] ops
Normal boot.
PCI: 00:00.0 [8086/190c] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/191e] enabled
PCI: 00:04.0 [8086/1903] enabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/9d2f] enabled
PCI: 00:14.1: Disabling device
PCI: 00:14.2 [8086/9d31] enabled
PCI: 00:15.0 [8086/9d60] enabled
PCI: 00:15.1 [8086/9d61] enabled
PCI: 00:15.2 [8086/9d62] enabled
PCI: 00:15.3: Disabling device
PCI: 00:16.0 [8086/9d3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:16.4: Disabling device
PCI: 00:17.0: Disabling device
PCI: 00:19.0 [8086/0000] ops
PCI: 00:19.0 [8086/9d66] enabled
PCI: 00:19.1: Disabling device
PCI: 00:19.2 [8086/9d64] enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/9d10] enabled
PCI: 00:1d.0: Disabling device
PCI: 00:1d.1: Disabling device
PCI: 00:1d.2: Disabling device
PCI: 00:1d.3: Disabling device
PCI: 00:1e.0 [8086/0000] ops
PCI: 00:1e.0 [8086/9d27] enabled
PCI: 00:1e.1: Disabling device
PCI: 00:1e.2: Disabling device
PCI: 00:1e.3: Disabling device
PCI: 00:1e.4 [8086/9d2b] enabled
PCI: 00:1e.5: Disabling device
PCI: 00:1e.6 [8086/9d2d] enabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/9d46] enabled
PCI: Static device PCI: 00:1f.1 not found, disabling it.
PCI: 00:1f.2 [8086/0000] bus ops
PCI: 00:1f.2 [8086/9d21] enabled
PCI: 00:1f.3 [8086/9d70] enabled
PCI: 00:1f.4 [8086/0000] bus ops
PCI: 00:1f.4 [8086/9d23] enabled
PCI: 00:1f.5 [8086/9d24] enabled
PCI: 00:1f.6: Disabling device
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [8086/095a] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0x40
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
L1 Sub-State supported from root port 28
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x1e, Power On Scale = 0x0
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0x40
ASPM: Enabled L1
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 0c31.0 enabled
PNP: 0c09.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
PCI: 00:1f.2 scanning...
scan_lpc_bus for PCI: 00:1f.2
scan_lpc_bus for PCI: 00:1f.2 done
PCI: 00:1f.4 scanning...
scan_smbus for PCI: 00:1f.4
scan_smbus for PCI: 00:1f.4 done
root_dev_scan_bus for Root Device done
done
BS: BS_DEV_ENUMERATE times (us): entry 1 run 2550 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 missing read_resources
DOMAIN: 0000 read_resources bus 0 link: 0
mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xe0000000-0xefffffff.
mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
MC MAP: TOM: 0x100000000
MC MAP: TOUUD: 0x17f000000
MC MAP: MESEG_BASE: 0xff000000
MC MAP: MESEG_LIMIT: 0x7fff0fffff
MC MAP: REMAP_BASE: 0x100000000
MC MAP: REMAP_LIMIT: 0x17effffff
MC MAP: TOLUD: 0x80000000
MC MAP: BGSM: 0x7b800000
MC MAP: BDSM: 0x7c000000
MC MAP: TESGMB: 0x7b000000
MC MAP: GGC: 0x2c1
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48
PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68
PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40
PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420
PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408
PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
PCI: 00:00.0 resource base c0000 size 7ae40000 align 0 gran 0 limit 0 flags e0004200 index 1
PCI: 00:00.0 resource base 7af00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 2
PCI: 00:00.0 resource base 7b000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 3
PCI: 00:00.0 resource base 7b800000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index 4
PCI: 00:00.0 resource base 100000000 size 7f000000 align 0 gran 0 limit 0 flags e0004200 index 5
PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 6
PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 7
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:15.0
PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:15.1
PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:15.2
PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:16.4
PCI: 00:17.0
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.1
PCI: 00:1c.2
PCI: 00:1c.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.1
PCI: 00:1d.2
PCI: 00:1d.3
PCI: 00:1e.0
PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:1e.1
PCI: 00:1e.2
PCI: 00:1e.3
PCI: 00:1e.4
PCI: 00:1e.4 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:1e.5
PCI: 00:1e.6
PCI: 00:1e.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.0 child on link 0 PNP: 0c31.0
PCI: 00:1f.0 resource base fd000000 size 3000000 align 0 gran 0 limit 0 flags d0000200 index 10
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PNP: 0c09.0
PCI: 00:1f.1
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 48
PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 40
PCI: 00:1f.3
PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.3 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 20
PCI: 00:1f.4
PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
PCI: 00:1f.4 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.5
PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 20 * [0x0 - 0x3f] io
DOMAIN: 0000 io: base: 40 size: 40 align: 6 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0x1fff] mem
PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
PCI: 00:14.0 10 * [0x11100000 - 0x1110ffff] mem
PCI: 00:1f.3 20 * [0x11110000 - 0x1111ffff] mem
PCI: 00:04.0 10 * [0x11120000 - 0x11127fff] mem
PCI: 00:1f.2 10 * [0x11128000 - 0x1112bfff] mem
PCI: 00:1f.3 10 * [0x1112c000 - 0x1112ffff] mem
PCI: 00:14.2 10 * [0x11130000 - 0x11130fff] mem
PCI: 00:15.0 10 * [0x11131000 - 0x11131fff] mem
PCI: 00:15.1 10 * [0x11132000 - 0x11132fff] mem
PCI: 00:15.2 10 * [0x11133000 - 0x11133fff] mem
PCI: 00:16.0 10 * [0x11134000 - 0x11134fff] mem
PCI: 00:19.0 10 * [0x11135000 - 0x11135fff] mem
PCI: 00:19.0 18 * [0x11136000 - 0x11136fff] mem
PCI: 00:19.2 10 * [0x11137000 - 0x11137fff] mem
PCI: 00:1e.0 10 * [0x11138000 - 0x11138fff] mem
PCI: 00:1e.4 10 * [0x11139000 - 0x11139fff] mem
PCI: 00:1e.6 10 * [0x1113a000 - 0x1113afff] mem
PCI: 00:1f.5 10 * [0x1113b000 - 0x1113bfff] mem
PCI: 00:1f.4 10 * [0x1113c000 - 0x1113c0ff] mem
DOMAIN: 0000 mem: base: 1113c100 size: 1113c100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base e0000000 limit efffffff mem (fixed)
constrain_resources: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
constrain_resources: PCI: 00:00.0 01 base 000c0000 limit 7aefffff mem (fixed)
constrain_resources: PCI: 00:00.0 02 base 7af00000 limit 7affffff mem (fixed)
constrain_resources: PCI: 00:00.0 03 base 7b000000 limit 7b7fffff mem (fixed)
constrain_resources: PCI: 00:00.0 04 base 7b800000 limit 7fffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.2 40 base 00001800 limit 000018ff io (fixed)
constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
Setting resources...
DOMAIN: 0000 io: base:1900 size:40 align:6 gran:0 limit:ef9f
PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
DOMAIN: 0000 io: next_base: 1c40 size: 40 align: 6 gran: 0 done
PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:c0000000 size:1113c100 align:28 gran:0 limit:dfffffff
PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
PCI: 00:14.0 10 * [0xd1100000 - 0xd110ffff] mem
PCI: 00:1f.3 20 * [0xd1110000 - 0xd111ffff] mem
PCI: 00:04.0 10 * [0xd1120000 - 0xd1127fff] mem
PCI: 00:1f.2 10 * [0xd1128000 - 0xd112bfff] mem
PCI: 00:1f.3 10 * [0xd112c000 - 0xd112ffff] mem
PCI: 00:14.2 10 * [0xd1130000 - 0xd1130fff] mem
PCI: 00:15.0 10 * [0xd1131000 - 0xd1131fff] mem
PCI: 00:15.1 10 * [0xd1132000 - 0xd1132fff] mem
PCI: 00:15.2 10 * [0xd1133000 - 0xd1133fff] mem
PCI: 00:16.0 10 * [0xd1134000 - 0xd1134fff] mem
PCI: 00:19.0 10 * [0xd1135000 - 0xd1135fff] mem
PCI: 00:19.0 18 * [0xd1136000 - 0xd1136fff] mem
PCI: 00:19.2 10 * [0xd1137000 - 0xd1137fff] mem
PCI: 00:1e.0 10 * [0xd1138000 - 0xd1138fff] mem
PCI: 00:1e.4 10 * [0xd1139000 - 0xd1139fff] mem
PCI: 00:1e.6 10 * [0xd113a000 - 0xd113afff] mem
PCI: 00:1f.5 10 * [0xd113b000 - 0xd113bfff] mem
PCI: 00:1f.4 10 * [0xd113c000 - 0xd113c0ff] mem
DOMAIN: 0000 mem: next_base: d113c100 size: 1113c100 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
PCI: 01:00.0 10 * [0xd1000000 - 0xd1001fff] mem
PCI: 00:1c.0 mem: next_base: d1002000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00d1120000 - 0x00d1127fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x00d1100000 - 0x00d110ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:14.2 10 <- [0x00d1130000 - 0x00d1130fff] size 0x00001000 gran 0x0c mem64
PCI: 00:15.0 10 <- [0x00d1131000 - 0x00d1131fff] size 0x00001000 gran 0x0c mem64
PCI: 00:15.1 10 <- [0x00d1132000 - 0x00d1132fff] size 0x00001000 gran 0x0c mem64
PCI: 00:15.2 10 <- [0x00d1133000 - 0x00d1133fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.0 10 <- [0x00d1134000 - 0x00d1134fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.0 10 <- [0x00d1135000 - 0x00d1135fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.0 18 <- [0x00d1136000 - 0x00d1136fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.2 10 <- [0x00d1137000 - 0x00d1137fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1001fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1e.0 10 <- [0x00d1138000 - 0x00d1138fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1e.4 10 <- [0x00d1139000 - 0x00d1139fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1e.6 10 <- [0x00d113a000 - 0x00d113afff] size 0x00001000 gran 0x0c mem64
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x00d1128000 - 0x00d112bfff] size 0x00004000 gran 0x0e mem
PCI: 00:1f.3 10 <- [0x00d112c000 - 0x00d112ffff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 20 <- [0x00d1110000 - 0x00d111ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:1f.4 10 <- [0x00d113c000 - 0x00d113c0ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.5 10 <- [0x00d113b000 - 0x00d113bfff] size 0x00001000 gran 0x0c mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1900 size 40 align 6 gran 0 limit ef9f flags 40040100 index 10000000
DOMAIN: 0000 resource base c0000000 size 1113c100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48
PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68
PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40
PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420
PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408
PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
PCI: 00:00.0 resource base c0000 size 7ae40000 align 0 gran 0 limit 0 flags e0004200 index 1
PCI: 00:00.0 resource base 7af00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 2
PCI: 00:00.0 resource base 7b000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 3
PCI: 00:00.0 resource base 7b800000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index 4
PCI: 00:00.0 resource base 100000000 size 7f000000 align 0 gran 0 limit 0 flags e0004200 index 5
PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 6
PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 7
PCI: 00:02.0
PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base d1120000 size 8000 align 15 gran 15 limit d1127fff flags 60000201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base d1100000 size 10000 align 16 gran 16 limit d110ffff flags 60000201 index 10
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base d1130000 size 1000 align 12 gran 12 limit d1130fff flags 60000201 index 10
PCI: 00:15.0
PCI: 00:15.0 resource base d1131000 size 1000 align 12 gran 12 limit d1131fff flags 60000201 index 10
PCI: 00:15.1
PCI: 00:15.1 resource base d1132000 size 1000 align 12 gran 12 limit d1132fff flags 60000201 index 10
PCI: 00:15.2
PCI: 00:15.2 resource base d1133000 size 1000 align 12 gran 12 limit d1133fff flags 60000201 index 10
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.0 resource base d1134000 size 1000 align 12 gran 12 limit d1134fff flags 60000201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:16.4
PCI: 00:17.0
PCI: 00:19.0
PCI: 00:19.0 resource base d1135000 size 1000 align 12 gran 12 limit d1135fff flags 60000201 index 10
PCI: 00:19.0 resource base d1136000 size 1000 align 12 gran 12 limit d1136fff flags 60000201 index 18
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:19.2 resource base d1137000 size 1000 align 12 gran 12 limit d1137fff flags 60000201 index 10
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base d1000000 size 2000 align 13 gran 13 limit d1001fff flags 60000201 index 10
PCI: 00:1c.1
PCI: 00:1c.2
PCI: 00:1c.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.1
PCI: 00:1d.2
PCI: 00:1d.3
PCI: 00:1e.0
PCI: 00:1e.0 resource base d1138000 size 1000 align 12 gran 12 limit d1138fff flags 60000201 index 10
PCI: 00:1e.1
PCI: 00:1e.2
PCI: 00:1e.3
PCI: 00:1e.4
PCI: 00:1e.4 resource base d1139000 size 1000 align 12 gran 12 limit d1139fff flags 60000201 index 10
PCI: 00:1e.5
PCI: 00:1e.6
PCI: 00:1e.6 resource base d113a000 size 1000 align 12 gran 12 limit d113afff flags 60000201 index 10
PCI: 00:1f.0 child on link 0 PNP: 0c31.0
PCI: 00:1f.0 resource base fd000000 size 3000000 align 0 gran 0 limit 0 flags d0000200 index 10
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PNP: 0c09.0
PCI: 00:1f.1
PCI: 00:1f.2
PCI: 00:1f.2 resource base d1128000 size 4000 align 14 gran 14 limit d112bfff flags 60000200 index 10
PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 48
PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 40
PCI: 00:1f.3
PCI: 00:1f.3 resource base d112c000 size 4000 align 14 gran 14 limit d112ffff flags 60000201 index 10
PCI: 00:1f.3 resource base d1110000 size 10000 align 16 gran 16 limit d111ffff flags 60000201 index 20
PCI: 00:1f.4
PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
PCI: 00:1f.4 resource base d113c000 size 100 align 8 gran 8 limit d113c0ff flags 60000201 index 10
PCI: 00:1f.5
PCI: 00:1f.5 resource base d113b000 size 1000 align 12 gran 12 limit d113bfff flags 60000200 index 10
PCI: 00:1f.6
Done allocating resources.
Calling FspNotify(0x00000020)
BS: BS_DEV_RESOURCES times (us): entry 1 run 12707 exit 163
Enabling resources...
PCI: 00:00.0 subsystem <- 0000/0000
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 0000/0000
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:14.0 subsystem <- 0000/0000
PCI: 00:14.0 cmd <- 102
PCI: 00:14.2 subsystem <- 0000/0000
PCI: 00:14.2 cmd <- 102
PCI: 00:15.0 subsystem <- 0000/0000
PCI: 00:15.0 cmd <- 106
PCI: 00:15.1 subsystem <- 0000/0000
PCI: 00:15.1 cmd <- 106
PCI: 00:15.2 subsystem <- 0000/0000
PCI: 00:15.2 cmd <- 106
PCI: 00:16.0 subsystem <- 0000/0000
PCI: 00:16.0 cmd <- 06
PCI: 00:19.0 subsystem <- 0000/0000
PCI: 00:19.0 cmd <- 102
PCI: 00:19.2 subsystem <- 0000/0000
PCI: 00:19.2 cmd <- 106
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 cmd <- 06
PCI: 00:1e.0 subsystem <- 0000/0000
PCI: 00:1e.0 cmd <- 106
PCI: 00:1e.4 subsystem <- 0000/0000
PCI: 00:1e.4 cmd <- 106
PCI: 00:1e.6 subsystem <- 0000/0000
PCI: 00:1e.6 cmd <- 106
PCI: 00:1f.0 subsystem <- 0000/0000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 0000/0000
PCI: 00:1f.2 cmd <- 02
PCI: 00:1f.3 subsystem <- 0000/0000
PCI: 00:1f.3 cmd <- 102
PCI: 00:1f.4 subsystem <- 0000/0000
PCI: 00:1f.4 cmd <- 103
PCI: 00:1f.5 subsystem <- 0000/0000
PCI: 00:1f.5 cmd <- 506
PCI: 01:00.0 subsystem <- 0000/0000
PCI: 01:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 1 run 5096 exit 3
SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0x1000000
FMAP: area RW_ELOG found @ 9f0000 (16384 bytes)
ELOG: FLASH @0x7ac553a8 [SPI 0x009f0000]
ELOG: area is 4096 bytes, full threshold 3834, shrink size 1024
SF: Successfully written 13 bytes @ 0x9f0bfb
ELOG: Event(17) added with size 13
SF: Successfully written 9 bytes @ 0x9f0c08
ELOG: Event(9A) added with size 9
Initializing devices...
Root Device init ...
mainboard: EC init
Chrome EC: Set WAKE mask to 0x00818006
Chrome EC: Set WAKE mask to 0x00000000
Chrome EC: Set WAKE mask to 0x00000000
Root Device init finished in 1951 usecs
CPU_CLUSTER: 0 init ...
CPU has 2 cores, 4 threads enabled.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000007af00000 size 0x7ae40000 type 6
0x000000007af00000 - 0x000000007b000000 size 0x00100000 type 0
0x000000007b000000 - 0x000000007b800000 size 0x00800000 type 6
0x000000007b800000 - 0x00000000c0000000 size 0x44800000 type 0
0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
0x0000000100000000 - 0x000000017f000000 size 0x7f000000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: default type WB/UC MTRR counts: 7/12.
MTRR: WB selected as default type.
MTRR: 0 base 0x000000007af00000 mask 0x0000007ffff00000 type 0
MTRR: 1 base 0x000000007b800000 mask 0x0000007fff800000 type 0
MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0
MTRR: 3 base 0x0000000080000000 mask 0x0000007fc0000000 type 0
MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
MTRR: 5 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
MTRR: 6 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 1bac0 size 18000
microcode: sig=0x406e3 pf=0x80 revision=0x8a
Setting up SMI for CPU
IED base = 0x7b400000
IED size = 0x00400000
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7ac1b00d(7ac500a0)
Installing SMM handler to 0x7b000000
Loading module at 7b010000 with entry 7b010399. filesize: 0x3fd0 memsize: 0x8160
Processing 351 relocs. Offset value of 0x7b010000
Loading module at 7b008000 with entry 7b008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x7b008000
SMM Module: placing jmp sequence at 7b007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 7b007800 rel16 0x07fd
SMM Module: placing jmp sequence at 7b007400 rel16 0x0bfd
SMM Module: stub loaded at 7b008000. Will call 7b010399(00000000)
Initializing Southbridge SMI... ... pmbase = 0x1800
TCO_STS: BOOT SECOND_TO
In relocation handler: cpu 0
New SMBASE=0x7b000000 IEDBASE=0x7b400000
Writing SMRR. base = 0x7b000006, mask=0xff800800
Relocation complete.
CPU: Intel(R) Core(TM) m3-6Y30 CPU @ 0.90GHz.
Loading module at 00030000 with entry 00030000. filesize: 0x130 memsize: 0x130
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 3 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 1 apic_id 1.
AP: slot 2 apic_id 3.
AP: slot 3 apic_id 2.
microcode: updated to revision 0xba date=2017-04-09
In relocation handler: cpu 1
New SMBASE=0x7afffc00 IEDBASE=0x7b400000
Writing SMRR. base = 0x7b000006, mask=0xff800800
Relocation complete.
In relocation handler: cpu 2
New SMBASE=0x7afff800 IEDBASE=0x7b400000
Writing SMRR. base = 0x7b000006, mask=0xff800800
Relocation complete.
In relocation handler: cpu 3
New SMBASE=0x7afff400 IEDBASE=0x7b400000
Writing SMRR. base = 0x7b000006, mask=0xff800800
microcode: updated to revision 0xba date=2017-04-09
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 406e3
CPU: family 06, model 4e, stepping 03
Setting up local apic... apic_id: 0x00 done.
Turbo is available but hidden
Turbo has been enabled
CPU #0 initialized
Initializing CPU #1
Initializing CPU #3
Initializing CPU #2
CPU: vendor Intel device 406e3
CPU: family 06, model 4e, stepping 03
Setting up local apic... apic_id: 0x01 done.
CPU: vendor Intel device 406e3
CPU: family 06, model 4e, stepping 03
Setting up local apic... apic_id: 0x03 done.
CPU: vendor Intel device 406e3
CPU: family 06, model 4e, stepping 03
Setting up local apic... apic_id: 0x02 done.
CPU #2 initialized
CPU #3 initialized
CPU #1 initialized
Enabling SMIs.
Locking SMM.
cpu: frequency set to 2200
CPU_CLUSTER: 0 init finished in 45143 usecs
PCI: 00:00.0 init ...
Set BIOS_RESET_CPL
CPU TDP: 4 Watts
PCI: 00:00.0 init finished in 994 usecs
PCI: 00:02.0 init ...
PCI: 00:02.0 init finished in 2 usecs
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 1 usecs
PCI: 00:14.2 init ...
PCI: 00:14.2 init finished in 1 usecs
PCI: 00:15.0 init ...
PCI: 00:15.0 init finished in 0 usecs
PCI: 00:15.1 init ...
PCI: 00:15.1 init finished in 0 usecs
PCI: 00:15.2 init ...
PCI: 00:15.2 init finished in 1 usecs
PCI: 00:16.0 init ...
PCI: 00:16.0 init finished in 1 usecs
PCI: 00:19.2 init ...
PCI: 00:19.2 init finished in 0 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 11 usecs
PCI: 00:1e.4 init ...
PCI: 00:1e.4 init finished in 1 usecs
PCI: 00:1e.6 init ...
PCI: 00:1e.6 init finished in 1 usecs
PCI: 00:1f.0 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00770020
reg 0x0002: 0x00000000
PCI: 00:1f.0 init finished in 370 usecs
PCI: 00:1f.2 init ...
RTC Init
Set power on after power failure.
Disabling ACPI via APMC:
done.
Disabling Deep S3
Enabling Deep S4
Enabling Deep S5
PCI: 00:1f.2 init finished in 2998 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 0 usecs
PCI: 00:1f.4 init ...
PCI: 00:1f.4 init finished in 12 usecs
PCI: 00:1f.5 init ...
PCI: 00:1f.5 init finished in 1 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 0 usecs
PNP: 0c09.0 init ...
Keyboard init...
Google Chrome EC: Initializing keyboard.
Google Chrome EC: Hello got back 11223344 status (0)
Google Chrome EC: version:
ro: caroline_v1.9.357-ac5c7b4
rw: caroline_v1.9.384-71bdb18
running image: 2
PNP: 0c09.0 init finished in 15368 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:16.4: enabled 0
PCI: 00:17.0: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 0
PCI: 00:19.2: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 0
PCI: 00:1d.1: enabled 0
PCI: 00:1d.2: enabled 0
PCI: 00:1d.3: enabled 0
PCI: 00:1e.0: enabled 1
PCI: 00:1e.1: enabled 0
PCI: 00:1e.2: enabled 0
PCI: 00:1e.3: enabled 0
PCI: 00:1e.4: enabled 1
PCI: 00:1e.5: enabled 0
PCI: 00:1e.6: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 0c31.0: enabled 1
PNP: 0c09.0: enabled 1
PCI: 00:1f.1: enabled 0
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
PCI: 00:04.0: enabled 1
APIC: 01: enabled 1
APIC: 03: enabled 1
APIC: 02: enabled 1
BS: BS_DEV_INIT times (us): entry 2593 run 79443 exit 0
Finalize devices...
Devices finalized
FMAP: area RW_NVRAM found @ 9fa000 (24576 bytes)
BS: BS_POST_DEVICE times (us): entry 0 run 62 exit 1037
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 55 exit 0
Updating MRC cache data.
FMAP: area RW_MRC_CACHE found @ 9e0000 (65536 bytes)
MRC cache slot 0 @ ff9e0000
MRC cache up to date.
SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0x1000000
SPI flash protection: WPSW=0 SRP0=0
NOT enabling PRR for RW_MRC_CACHE region
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ab5c000.
ACPI: * FACS
ACPI: * DSDT
SF: Successfully written 9 bytes @ 0x9f0c11
ELOG: Event(A0) added with size 9
Ramoops buffer: 0x100000@0x7aa5c000.
Found 'region'='us' in VPD
ACPI: * FADT
SCI is IRQ9
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 901MHz power 4000 control 0x1600 status 0x1600
PSS: 900MHz power 4000 control 0x900 status 0x900
PSS: 800MHz power 3509 control 0x800 status 0x800
PSS: 600MHz power 2573 control 0x600 status 0x600
PSS: 400MHz power 1674 control 0x400 status 0x400
PSS: 901MHz power 4000 control 0x1600 status 0x1600
PSS: 900MHz power 4000 control 0x900 status 0x900
PSS: 800MHz power 3509 control 0x800 status 0x800
PSS: 600MHz power 2573 control 0x600 status 0x600
PSS: 400MHz power 1674 control 0x400 status 0x400
PSS: 901MHz power 4000 control 0x1600 status 0x1600
PSS: 900MHz power 4000 control 0x900 status 0x900
PSS: 800MHz power 3509 control 0x800 status 0x800
PSS: 600MHz power 2573 control 0x600 status 0x600
PSS: 400MHz power 1674 control 0x400 status 0x400
PSS: 901MHz power 4000 control 0x1600 status 0x1600
PSS: 900MHz power 4000 control 0x900 status 0x900
PSS: 800MHz power 3509 control 0x800 status 0x800
PSS: 600MHz power 2573 control 0x600 status 0x600
PSS: 400MHz power 1674 control 0x400 status 0x400
VPD wifi_sar = 70404030307040403030785858585878585858580000000000000000000000000000000000000000
\_SB.PCI0.RP01.WIFI: Intel WiFi PCI: 01:00.0
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at 7aa4c000
ACPI: added table 4/32, length now 52
ACPI: * MADT
SCI is IRQ9
ACPI: added table 5/32, length now 56
current = 7ab61a90
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'dmic-2ch-48khz-16b.bin'
CBFS: Found @ offset 500 size ba8
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'dmic-2ch-48khz-32b.bin'
CBFS: Found @ offset 1100 size ba8
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'ssm4567-render-2ch-48khz-24b.bin'
CBFS: Found @ offset 1dc0 size 54
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'ssm4567-capture-4ch-48khz-32b.bin'
CBFS: Found @ offset 1e80 size 54
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'nau88l25-2ch-48khz-24b.bin'
CBFS: Found @ offset 1d00 size 54
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'nau88l25-2ch-48khz-24b.bin'
CBFS: Found @ offset 1d00 size 54
ACPI: * NHLT
ACPI: added table 6/32, length now 60
ACPI: * IGD OpRegion
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'vbt.bin'
CBFS: Found @ offset 1f40 size 1200
FSP_INFO: VBT found at ff601f78, 0x00001200 bytes
current = 7ab654e0
ACPI: * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 38176 bytes.
smbios_write_tables: 7aa4b000
Create SMBIOS type 17
Root Device (Google Caroline)
CPU_CLUSTER: 0 (Intel Skylake)
APIC: 00 (Intel Skylake)
DOMAIN: 0000 (Intel Skylake)
PCI: 00:00.0 (Intel Skylake)
PCI: 00:02.0 (Intel Skylake)
PCI: 00:14.0 (Intel Skylake)
PCI: 00:14.1 (Intel Skylake)
PCI: 00:14.2 (Intel Skylake)
PCI: 00:15.0 (Intel Skylake)
PCI: 00:15.1 (Intel Skylake)
PCI: 00:15.2 (Intel Skylake)
PCI: 00:15.3 (Intel Skylake)
PCI: 00:16.0 (Intel Skylake)
PCI: 00:16.1 (Intel Skylake)
PCI: 00:16.2 (Intel Skylake)
PCI: 00:16.3 (Intel Skylake)
PCI: 00:16.4 (Intel Skylake)
PCI: 00:17.0 (Intel Skylake)
PCI: 00:19.0 (Intel Skylake)
PCI: 00:19.1 (Intel Skylake)
PCI: 00:19.2 (Intel Skylake)
PCI: 00:1c.0 (Intel Skylake)
PCI: 01:00.0 (Intel WiFi)
PCI: 00:1c.1 (Intel Skylake)
PCI: 00:1c.2 (Intel Skylake)
PCI: 00:1c.3 (Intel Skylake)
PCI: 00:1c.4 (Intel Skylake)
PCI: 00:1c.5 (Intel Skylake)
PCI: 00:1c.6 (Intel Skylake)
PCI: 00:1c.7 (Intel Skylake)
PCI: 00:1d.0 (Intel Skylake)
PCI: 00:1d.1 (Intel Skylake)
PCI: 00:1d.2 (Intel Skylake)
PCI: 00:1d.3 (Intel Skylake)
PCI: 00:1e.0 (Intel Skylake)
PCI: 00:1e.1 (Intel Skylake)
PCI: 00:1e.2 (Intel Skylake)
PCI: 00:1e.3 (Intel Skylake)
PCI: 00:1e.4 (Intel Skylake)
PCI: 00:1e.5 (Intel Skylake)
PCI: 00:1e.6 (Intel Skylake)
PCI: 00:1f.0 (Intel Skylake)
PNP: 0c31.0 (LPC TPM)
PNP: 0c09.0 (Google Chrome EC)
PCI: 00:1f.1 (Intel Skylake)
PCI: 00:1f.2 (Intel Skylake)
PCI: 00:1f.3 (Intel Skylake)
PCI: 00:1f.4 (Intel Skylake)
PCI: 00:1f.5 (Intel Skylake)
PCI: 00:1f.6 (Intel Skylake)
PCI: 00:04.0 (unknown)
APIC: 01 (unknown)
APIC: 03 (unknown)
APIC: 02 (unknown)
SMBIOS tables: 637 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 8526
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0x7ab80000
rom_table_end = 0x7ab80000
... aligned to 0x7ab80000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-000000007aa4afff: RAM
4. 000000007aa4b000-000000007aefffff: CONFIGURATION TABLES
5. 000000007af00000-000000007fffffff: RESERVED
6. 00000000e0000000-00000000efffffff: RESERVED
7. 00000000fd000000-00000000ffffffff: RESERVED
8. 0000000100000000-000000017effffff: RAM
FSP_DEBUG: Graphics Data HOB present
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
Wrote coreboot table at: 7ab80000, 0x560 bytes, checksum 3a40
coreboot table: 1400 bytes.
IMD ROOT 0. 7aeff000 00001000
IMD SMALL 1. 7aefe000 00001000
FSP MEMORY 2. 7acfe000 00200000
CONSOLE 3. 7acde000 00020000
TIME STAMP 4. 7acdd000 00000400
VBOOT 5. 7acdc000 00000c0c
MRC DATA 6. 7acda000 00001880
ROMSTG STCK 7. 7acd5000 00005000
RAMSTAGE 8. 7ac14000 000c1000
VPD 9. 7ac13000 000002db
REFCODE 10. 7ab99000 0007a000
ACPI GNVS 11. 7ab98000 00001000
SMM BACKUP 12. 7ab88000 00010000
COREBOOT 13. 7ab80000 00008000
ACPI 14. 7ab5c000 00024000
RAMOOPS 15. 7aa5c000 00100000
TCPA LOG 16. 7aa4c000 00010000
SMBIOS 17. 7aa4b000 00000800
IMD small region:
IMD ROOT 0. 7aefec00 00000400
CAR GLOBALS 1. 7aefea40 000001b8
POWER STATE 2. 7aefea00 00000040
VBOOT SEL 3. 7aefe9e0 00000008
FSP RUNTIME 4. 7aefe9c0 00000008
MEM INFO 5. 7aefe860 00000141
ROMSTAGE 6. 7aefe840 00000004
GDT 7. 7aefe640 00000200
GNVS PTR 8. 7aefe620 00000004
BS: BS_WRITE_TABLES times (us): entry 14407 run 6263 exit 1
CBFS: 'VBOOT' located CBFS at [600000:6ea8c0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 33b40 size 12391
Loading segment from rom address 0xff633b78
code (compression=1)
New segment dstaddr 0x2104040 memsize 0x636770 srcaddr 0xff633bb0 filesize 0x12359
Loading segment from rom address 0xff633b94
Entry Point 0x02104040
Loading Segment: addr: 0x0000000002104040 memsz: 0x0000000000636770 filesz: 0x0000000000012359
lb: [0x000000007ac15000, 0x000000007acd48d0)
Post relocation: addr: 0x0000000002104040 memsz: 0x0000000000636770 filesz: 0x0000000000012359
using LZMA
[ 0x02104040, 02128de4, 0x0273a7b0) <- ff633bb0
Clearing Segment: addr: 0x0000000002128de4 memsz: 0x00000000006119cc
dest 02104040, end 0273a7b0, bouncebuffer ffffffff
Loaded segments
Calling FspNotify(0x00000040)
Finalizing chipset.
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: D3 Support : NO
ME: D0i3 Support : YES
ME: Low Power State Enabled : NO
ME: Power Gated : NO
ME: CPU Replaced : NO
ME: CPU Replacement Valid : YES
ME: Current Working State : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode : Normal
ME: Error Code : No Error
ME: Progress Phase : Unknown (4)
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Unknown phase: 0x04 state: 0x00
ME: Power Down Mitigation : NO
Finalizing SMM.
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 37735 exit 161810
Jumping to boot code at 02104040(7ab80000)
CPU0: stack: 7ac4f000 - 7ac50000, lowest used address 7ac4fa8c, stack used: 1396 bytes
Starting depthcharge on caroline...
WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
The GBB signature is at 0x2004040 and is: 24 47 42 42
Wipe memory regions:
[0x00000000001000, 0x000000000a0000)
[0x00000000100200, 0x00000002000000)
[0x0000000273a7b0, 0x0000007aa4b000)
[0x00000100000000, 0x0000017f000000)
Calling VbSelectAndLoadKernel().
VbEcSoftwareSync(devidx=0)
cros_ec_init: CrosEC protocol v3 supported (256, 256)
cros_ec_probe_passthru: devidx=1 supported (128, 128)
Google ChromeOS EC driver ready, id 'caroline_v1.9.384-71bdb18'
Clearing the recovery request.
VbEcSoftwareSync() check for RW update.
EcUpdateImage() - Check for RW update
EC-RW hash:54cba317b427fe67c5fda27b6e8207fd653cfc778cbde6999570541c39c940de
FMAP section too small.
Didn't find precalculated hash subsection 1.
Trying to fetch hash for 'ecrw'
Trying to locate 'ecrw' in CBFS
EC-RW hash address, size are 0xff645f84, 32.
Hash = 54cba317b427fe67c5fda27b6e8207fd653cfc778cbde6999570541c39c940de
Expected hash:54cba317b427fe67c5fda27b6e8207fd653cfc778cbde6999570541c39c940de
EcUpdateImage() in EC-RW and it matches
VbEcSoftwareSync(devidx=1)
VbEcSoftwareSync() check for RW update.
EcUpdateImage() - Check for RW update
EC-RW hash:16edbc79ac51b66f05388bbe8fbac6fff68d5fde182804b90b45139a2b63e9c3
FMAP section too small.
Didn't find precalculated hash subsection 2.
Trying to fetch hash for 'pdrw'
Trying to locate 'pdrw' in CBFS
EC-RW hash address, size are 0xff65f844, 32.
Hash = 16edbc79ac51b66f05388bbe8fbac6fff68d5fde182804b90b45139a2b63e9c3
Expected hash:16edbc79ac51b66f05388bbe8fbac6fff68d5fde182804b90b45139a2b63e9c3
EcUpdateImage() in EC-RW and it matches
TPM: TlclRead(0x1008, 13)
Found TPM SLB9670 TT 1.2 by Infineon
TPM: command 0xcf returned 0x0
TPM: command 0x65 returned 0x0
TPM: RollbackKernelRead 10001
Entering VbBootDeveloper()
vboot_draw_screen: screen=0x101 locale=0
vboot_init_locale: Supported locales: en, es-419, pt-BR, fr, es, pt-PT, ca, it, de, el, nl, da, nb, sv, fi, et, lv, lt, ru, pl, cs, sk, hu, sl, sr, hr, bg, ro, uk, tr, he, ar, fa, hi, th, ms, vi, id, fil, zh-CN, zh-TW, ko, ja, bn, gu, kn, ml, mr, ta, te, (50 locales)
load_archive: loading vbgfx.bin
load_archive: loading font.bin
backlight_update called but not implemented.
CBGFX: cbgfx initialized: screen:width=1920, height=1080, offset=0 canvas:width=1080, height=1080, offset=420
load_archive: loading locale_en.bin
VbAudioOpen() - ticks_per_msec is 1000
VbAudioOpen() - VbExBeep() is limited
VbAudioOpen() - using short dev screen delay
VbGetDevMusicNotes: use_short is 1, hdr is 0x0, maxsize is 0
VbGetDevMusicNotes: using 1 default notes
VbAudioOpen() - note count 1
VbBootDeveloper() - defaulting to legacy
TPM: Lock physical presence
TPM: command 0x4000000a returned 0x0
CODE/DATA: dst=0xec000 dst_len=81920 src=0x24c9e68 src_len=81920 compression=0
Shutting down all USB controllers.
Finalizing Coreboot
Exiting depthcharge with code 8 at timestamp: 3752051
SeaBIOS (version rel-1.10.0-51-g0911ed0-MrChromebox-2017.05.29)
BUILD: gcc: (Ubuntu 6.3.0-12ubuntu2) 6.3.0 20170406 binutils: (GNU Binutils for Ubuntu) 2.28
Found coreboot cbmem console @ 7acde000
Found mainboard Google Caroline
malloc preinit
Relocating init from 0x000ed1e0 to 0x7aa036c0 (size 30880)
malloc init
Found CBFS header at 0xffbfffdc
Add romfile: payload (size=81976)
Add romfile: pci8086,0406.rom (size=65536)
Add romfile: (size=32)
Add romfile: links (size=144)
Add romfile: etc/boot-menu-wait (size=8)
Add romfile: bootorder (size=1476)
Add romfile: (size=1947352)
Copying data 144@0xffa241b8 to 144@0x7aa02fe0
Add romfile: pci8086,1906.rom (size=65536)
Add romfile: pci8086,1916.rom (size=65536)
Add romfile: pci8086,191e.rom (size=65536)
init ivt
init bda
Copying data 1476@0xffa242f8 to 1476@0x7aa02770
boot order:
1: /pci@i0cf8/usb@14/usb-*@0
2: /pci@i0cf8/usb@14/usb-*@1
3: /pci@i0cf8/usb@14/usb-*@2
4: /pci@i0cf8/usb@14/usb-*@3
5: /pci@i0cf8/usb@14/usb-*@4
6: /pci@i0cf8/usb@14/usb-*@5
7: /pci@i0cf8/usb@14/usb-*@6
8: /pci@i0cf8/usb@14/usb-*@7
9: /pci@i0cf8/usb@14/usb-*@8
10: /pci@i0cf8/usb@14/usb-*@9
11: /pci@i0cf8/usb@14/usb-*@a
12: /pci@i0cf8/usb@14/usb-*@b
13: /pci@i0cf8/usb@14/usb-*@c
14: /pci@i0cf8/usb@14/usb-*@d
15: /pci@i0cf8/usb@14/usb-*@e
16: /pci@i0cf8/usb@14/usb-*@f
17: /pci@i0cf8/usb@14/hub@1/usb-*@0
18: /pci@i0cf8/usb@14/hub@1/usb-*@1
19: /pci@i0cf8/usb@14/hub@1/usb-*@2
20: /pci@i0cf8/usb@14/hub@1/usb-*@3
21: /pci@i0cf8/usb@14/hub@1/usb-*@4
22: /pci@i0cf8/usb@14/hub@1/usb-*@5
23: /pci@i0cf8/usb@14/hub@1/usb-*@6
24: /pci@i0cf8/usb@14/hub@1/usb-*@7
25: /pci@i0cf8/usb@14/hub@1/usb-*@8
26: /pci@i0cf8/usb@14/hub@1/usb-*@9
27: /pci@i0cf8/usb@14/hub@1/usb-*@a
28: /pci@i0cf8/usb@14/hub@1/usb-*@b
29: /pci@i0cf8/usb@14/hub@1/usb-*@c
30: /pci@i0cf8/usb@14/hub@1/usb-*@d
31: /pci@i0cf8/usb@14/hub@1/usb-*@e
32: /pci@i0cf8/usb@14/hub@1/usb-*@f
33: /pci@i0cf8/usb@1d/hub@1/*@0
34: /pci@i0cf8/usb@1d/hub@1/*@1
35: /pci@i0cf8/usb@1d/hub@1/*@2
36: /pci@i0cf8/usb@1d/hub@1/*@3
37: /pci@i0cf8/usb@1d/hub@1/*@4
38: /pci@i0cf8/usb@1d/hub@1/*@5
39: /pci@i0cf8/usb@1d/hub@1/*@6
40: /pci@i0cf8/usb@1d/hub@1/*@7
41: /pci@i0cf8/usb@1d/hub@1/usb-*@0
42: /pci@i0cf8/usb@1d/hub@1/usb-*@1
43: /pci@i0cf8/usb@1d/hub@1/usb-*@2
44: /pci@i0cf8/usb@1d/hub@1/usb-*@3
45: /pci@i0cf8/usb@1d/hub@1/usb-*@4
46: /pci@i0cf8/usb@1d/hub@1/usb-*@5
47: /pci@i0cf8/usb@1d/hub@1/usb-*@6
48: /pci@i0cf8/usb@1d/hub@1/usb-*@7
49: /pci@i0cf8/*@1e,4
50: /rom@etc/sdcard2
51: /rom@etc/sdcard4
52: /rom@etc/sdcard6
init bios32
init PMM
init PNPBIOS table
init keyboard
init pic
math cp init
PCI probe
Found 20 PCI devices (max PCI bus is 01)
Relocating coreboot bios tables
Copying SMBIOS entry point from 0x7aa4b000 to 0x000f4a60
Copying ACPI RSDP from 0x7ab5c000 to 0x000f4a30
CPU Mhz=912
init timer
Scan for VGA option rom
Copying data 65536@0xffa140c8 to 65536@0x000c0000
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.10.0-51-g0911ed0-MrChromebox-2017.05.29)
init usb
XHCI init on dev 00:14.0: regs @ 0xd1100000, 18 ports, 64 slots, 32 byte contexts
XHCI protocol USB 2.00, 12 ports (offset 1), def 3011
XHCI protocol USB 3.00, 6 ports (offset 13), def 3000
XHCI extcap 0xc0 @ 0xd1108070
XHCI extcap 0x1 @ 0xd110846c
XHCI extcap 0xc6 @ 0xd11084f4
XHCI extcap 0xc7 @ 0xd1108500
XHCI extcap 0xc2 @ 0xd1108600
XHCI extcap 0xa @ 0xd1108700
XHCI extcap 0xc3 @ 0xd1108740
XHCI extcap 0xc4 @ 0xd1108800
XHCI extcap 0xc5 @ 0xd1108900
/7aa01000\ Start thread
|7aa01000| configure_xhci: resetting
init ps2port
/7a9ff000\ Start thread
|7aa01000| configure_xhci: setup 34 scratch pad buffers
init ahci
/7a9fe000\ Start thread
|7a9fe000| Searching bootorder for: /pci@i0cf8/*@1e,4
|7a9fe000| sdhci@0xd1139000 ver=1002 cap=546ec881 80000807
/7a9fd000\ Start thread
|7a9fd000| Searching bootorder for: /pci@i0cf8/*@1e,6
|7a9fd000| sdhci@0xd113a000 ver=1002 cap=7568c881 807
|7a9fe000| sdcard_set_frequency 200 400 fa00
|7a9fd000| sdcard_set_frequency 200 400 fa00
|7a9fe000| sdcard_pio command stop (code=1)
|7a9fe000| sdcard_pio command stop (code=1)
|7a9ff000| PS2 keyboard initialized
\7a9ff000/ End thread
/7a9ff000\ Start thread
/7a9fc000\ Start thread
/7a9fb000\ Start thread
|7a9fb000| xhci_hub_reset port #3: 0x000206e1, powered, pls 7, speed 1 [Full]
/7a9fa000\ Start thread
/7a9f9000\ Start thread
/7a9f8000\ Start thread
/7a9f7000\ Start thread
/7a9f6000\ Start thread
/7a9f5000\ Start thread
/7a9f4000\ Start thread
/7a9f3000\ Start thread
/7a9f2000\ Start thread
/7a9f1000\ Start thread
/7a9f0000\ Start thread
/7a9ef000\ Start thread
/7a9ee000\ Start thread
/7a9ed000\ Start thread
/7a9ec000\ Start thread
|7a9fb000| XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
|7a9fb000| set_address 0x7aa4afb0
|7a9fe000| sdcard_set_frequency 200 25000 400
|7a9fe000| Found sdcard at 0xd1139000: MMC drive DF4032 29820MiB
|7a9fe000| Registering bootable: MMC drive DF4032 29820MiB (type:2 prio:49 data:f4a00)
\7a9fe000/ End thread
|7a9fb000| xhci_alloc_pipe: usbdev 0x7aa00cf0, ring 0x7aa4a700, slotid 0, epid 1
|7a9fb000| xhci_cmd_enable_slot:
|7a9fb000| xhci_process_events port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
|7a9fb000| xhci_process_events port #7: 0x000206e1, powered, pls 7, speed 1 [Full]
|7a9fb000| xhci_process_events port #3: 0x00000603, powered, enabled, pls 0, speed 1 [Full]
|7a9fb000| xhci_alloc_pipe: enable slot: got slotid 1
|7a9fb000| xhci_cmd_address_device: slotid 1
|7a9fb000| xhci_realloc_pipe: usbdev 0x7aa00cf0, ring 0x7aa4a700, slotid 1, epid 1
|7a9fb000| config_usb: 0x7aa4a820
|7a9f7000| xhci_hub_reset port #7: 0x000006e1, powered, pls 7, speed 1 [Full]
|7a9fb000| device rev=0200 cls=e0 sub=01 proto=01 size=64
|7a9fb000| xhci_realloc_pipe: usbdev 0x7aa00cf0, ring 0x7aa4a700, slotid 1, epid 1
|7a9fb000| xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64
|7a9fb000| xhci_cmd_evaluate_context: slotid 1, add 0x2, del 0x0
\7a9fb000/ End thread
\7a9ff000/ End thread
\7a9fc000/ End thread
\7a9fa000/ End thread
\7a9f9000/ End thread
\7a9f8000/ End thread
\7a9f6000/ End thread
\7a9f5000/ End thread
\7a9f4000/ End thread
\7a9f3000/ End thread
\7a9f2000/ End thread
\7a9f1000/ End thread
\7a9f0000/ End thread
\7a9ef000/ End thread
\7a9ee000/ End thread
\7a9ed000/ End thread
\7a9ec000/ End thread
|7a9f7000| XHCI port #7: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
|7a9f7000| set_address 0x7aa4afb0
|7a9f7000| xhci_alloc_pipe: usbdev 0x7aa00af0, ring 0x7aa4a500, slotid 0, epid 1
|7a9f7000| xhci_cmd_enable_slot:
|7a9f7000| xhci_process_events port #7: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
|7a9f7000| xhci_alloc_pipe: enable slot: got slotid 2
|7a9f7000| xhci_cmd_address_device: slotid 2
|7a9f7000| xhci_realloc_pipe: usbdev 0x7aa00af0, ring 0x7aa4a500, slotid 2, epid 1
|7a9f7000| config_usb: 0x7aa4a620
|7a9f7000| device rev=0200 cls=ef sub=02 proto=01 size=64
|7a9f7000| xhci_realloc_pipe: usbdev 0x7aa00af0, ring 0x7aa4a500, slotid 2, epid 1
|7a9f7000| usb_hid_setup 0x7aa4a620
\7a9f7000/ End thread
|7aa01000| XHCI no devices found
\7aa01000/ End thread
|7a9fd000| sdcard_set_frequency 200 25000 400
|7a9fd000| Found sdcard at 0xd113a000: SD card EC2QT 61056MiB
|7a9fd000| Registering bootable: SD card EC2QT 61056MiB (type:2 prio:103 data:f49d0)
\7a9fd000/ End thread
All threads complete.
Scan for option roms
Press ESC for boot menu.
Copying data 8@0xffa242b8 to 8@0x00006f20
Select boot device:
1. MMC drive DF4032 29820MiB
2. SD card EC2QT 61056MiB
Searching bootorder for: HALT
Mapping hd drive 0x000f49d0 to 0
drive 0x000f49d0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=125042688
Mapping hd drive 0x000f4a00 to 1
drive 0x000f4a00: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=61071360
finalize PMM
malloc finalize
Space available for UMB: d0000-ef000, f0000-f49d0
Returned 114688 bytes of ZoneHigh
e820 map has 8 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007aa27000 = 1 RAM
4: 000000007aa27000 - 0000000080000000 = 2 RESERVED
5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
6: 00000000fd000000 - 0000000100000000 = 2 RESERVED
7: 0000000100000000 - 000000017f000000 = 1 RAM
Jump to int19
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00
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