01_blinky.py

# If the design does not create a "sync" clock domain, it is created by the nMigen build system
# using the platform default clock (and default reset, if any).

from nmigen import *
from nmigen_boards.alchitry_cu import *


class Blinky(Elaboratable):
    def elaborate(self, platform):
        led   = [platform.request("led", i) for i in range(8)]
        timer = Signal(27)

        m = Module()
        m.d.sync += timer.eq(timer + 1)
        for x in led:
            m.d.comb += x.o.eq(timer[-1])
        return m


if __name__ == "__main__":
    platform = AlchitryCuPlatform()
    platform.build(Blinky(), do_program=True)

alchitry_cu.py

import os
import subprocess

from nmigen.build import *
from nmigen.vendor.lattice_ice40 import *
from .resources import *


__all__ = ["AlchitryCuPlatform"]


class AlchitryCuPlatform(LatticeICE40Platform):
    device      = "iCE40HX8K"
    package     = "CB132"
    default_clk = "clk100"
    resources   = [
        Resource("clk100", 0, Pins("P7", dir="i"),
                 Clock(100e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS")),

        *LEDResources(
            pins="J11 K11 K12 K14 L12 L14 M12 N14",
            attrs=Attrs(IO_STANDARD="SB_LVCMOS")
        ),

        #UARTResource(0,
        #    rx="M9", tx="P14",
        #    attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1),
        #    role="dce"
        #),

        #*SPIFlashResources(0,
        #    cs_n="P13", clk="P12", copi="M11", cipo="P11",
        #    attrs=Attrs(IO_STANDARD="SB_LVCMOS")
        #),
    ]
    connectors  = [
        # TODO
    ]

    def toolchain_program(self, products, name):
        iceprog = os.environ.get("ICEPROG", "iceprog")
        with products.extract("{}.bin".format(name)) as bitstream_filename:
            # TODO: this should be factored out and made customizable
            subprocess.check_call([iceprog, "-S", bitstream_filename])


if __name__ == "__main__":
    from .test.blinky import *
    AlchitryCuPlatform().build(Blinky(), do_program=True)