latex stuff

kv-diagram.tex

\usepackage{tikz}
% KV-Diagram
\input kvmacros

\begin{document}

\karnaughmap{3}{}{{$S$}{$R$}{$Q^*$}}
{010011**}
{
   \put(3,1){\color{red}\oval(1.9,1.9)}
   \put(0.5,1){\color{red}\oval(0.9,1.9)}
   \put(2,1.5){\color{red}\oval(1.9,0.9)}
   \put(2,0.5){\color{red}\oval(3.9,0.9)}
}

\end{document}

xnor.tex

\begin{figure}[h!]
    \begin{center}
        \begin{tikzpicture}[ huge circuit symbols,
        %every circuit symbol/.style={logic gate IEC symbol color=black},
        circuit ee IEC,
        circuit logic IEC,
        %circuit logic US,
        %circuit logic CDH,
        circuit symbol lines/.style={draw,thick},
        font=\sffamily\footnotesize,
        >=latex % Voreinstellung für Pfeilspitzen
        ]

            \matrix (L) [
            matrix of nodes, nodes in empty cells,
            inner sep=0pt, outer sep=-.5\pgflinewidth,
            column sep=10mm,
            row sep =4/5*\tikzcircuitssizeunit,
            nodes={minimum width=0pt}
            ]
            {
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            &&&&&  \\
            };


            %Orientierungshilfen
            %            \foreach \j in {1,...,11}
            %            \foreach \k in {1,...,5}{%
            %            \node[text=gray] at (L-\j-\k){\tiny +}; % Orientierungshilfe +
            %            \node[red, left] at (L-\j-1){\tiny \j}; %Orientierungshilfe %Zeilennummer
            %            \node[red, above] at (L-1-\k){\tiny \k}; %Orientierungshilfe %Spaltennummer
            %            };

            %Oberes NAND
            \node [nand gate={}](NAND) at (L-3-2) {};

            \draw[shorten >=1.25\tikzcircuitssizeunit] (L-2-1)node[left]{$\overline{A}$} -- (L-2-2);
            \draw[shorten >=1.25\tikzcircuitssizeunit] (L-4-1)node[left]{$\overline{B}$} -- (L-4-2);
            \draw[shorten <=1.25\tikzcircuitssizeunit] (L-3-2) -- (L-3-3);

            %Unteres NAND
            \node [nand gate={}](NAND) at (L-9-2) {};
            \draw[shorten >=1.25\tikzcircuitssizeunit] (L-8-1)node[left]{A} -- (L-8-2);
            \draw[shorten >=1.25\tikzcircuitssizeunit] (L-10-1)node[left]{B} -- (L-10-2);
            \draw[shorten <=1.25\tikzcircuitssizeunit] (L-9-2) -- (L-9-3);

            %NAND3
            \node [nand gate={}](NAND) at (L-6-4) {};
            \draw[shorten >=1.25\tikzcircuitssizeunit] (L-3-3) -- (L-5-3) -- (L-5-4);
            \draw[shorten >=1.25\tikzcircuitssizeunit] (L-9-3) -- (L-7-3) -- (L-7-4);
            \draw[shorten <=1.25\tikzcircuitssizeunit] (L-6-4) -- (L-6-5) node[right]{$y$};

        \end{tikzpicture}
        \caption{Schaltplan zur $XNOR$-Funktion}
    \end{center}
\end{figure}