Linksys EA9500v2 Stock Devicetree

BCM4908-Linksys-ea9500v2.dts

/dts-v1/;

/memreserve/	0x0000000000000000 0x0000000000010000;
/ {
	model = "Broadcom-v8A";
	compatible = "brcm,brcm-v8A";
	interrupt-parent = <0x1>;
	#address-cells = <0x2>;
	#size-cells = <0x2>;

	cpus {
		#address-cells = <0x2>;
		#size-cells = <0x0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x0>;
			next-level-cache = <0x2>;
			linux,phandle = <0x3>;
			phandle = <0x3>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x1>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xfff8>;
			next-level-cache = <0x2>;
			linux,phandle = <0x4>;
			phandle = <0x4>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x2>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xfff8>;
			next-level-cache = <0x2>;
			linux,phandle = <0x5>;
			phandle = <0x5>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x3>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xfff8>;
			next-level-cache = <0x2>;
			linux,phandle = <0x6>;
			phandle = <0x6>;
		};

		l2-cache0 {
			compatible = "cache";
			linux,phandle = <0x2>;
			phandle = <0x2>;
		};
	};

	memory@00000000 {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x8000000>;
	};

	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		dt_reserved_dhd0 {
			reg = <0x0 0x0 0x0 0xe00000>;
			no-map;
		};

		dt_reserved_dhd1 {
			reg = <0x0 0x0 0x0 0x0>;
			no-map;
		};

		dt_reserved_dhd2 {
			reg = <0x0 0x0 0x0 0x0>;
			no-map;
		};

		dt_reserved_buffer {
			reg = <0x0 0x6000000 0x0 0x2000000>;
		};

		dt_reserved_flow {
			reg = <0x0 0x5200000 0x0 0xe00000>;
			no-map;
		};
	};

	chosen {
		bootargs = "coherent_pool=1M cpuidle_sysfs_switch";
	};

	interrupt-controller@81000000 {
		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <0x3>;
		#address-cells = <0x0>;
		interrupt-controller;
		reg = <0x0 0x81001000 0x0 0x1000 0x0 0x81002000 0x0 0x2000>;
		linux,phandle = <0x1>;
		phandle = <0x1>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <0x0 0x9 0x4 0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
		interrupt-affinity = <0x3 0x4 0x5 0x6>;
	};

	sdhci@ff858000 {
		compatible = "brcm,bcm63xx-sdhci";
		reg = <0x0 0xff858000 0x0 0x100>;
		interrupts = <0x0 0x55 0x4>;
		bus-width = <0x8>;
		non-removable;
		mmc-ddr-1_8v;
	};

	brcm-legacy {
		compatible = "brcm,brcm-legacy";
	};

	ubus@ff800000 {
		compatible = "simple-bus";
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges = <0x0 0x0 0x0 0xff800000 0x0 0x8000>;

		nand@ff801800 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "brcm,nand-bcm63xx", "brcm,brcmnand-v7.1";
			reg = <0x0 0x1800 0x0 0x600 0x0 0x2000 0x0 0x10>;
			reg-names = "nand", "nand-int-base";
			status = "okay";

			nandcs@0 {
				compatible = "brcm,nandcs";
				reg = <0x0>;
				nand-on-flash-bbt;
			};
		};

		watchdog@ff800428 {
			compatible = "brcm,bcm96xxx-wdt";
			reg = <0x0 0x428 0x0 0x10>;
			timeout-sec = <0x50>;
		};
	};

	spu-pdc@0x8001c000 {
		compatible = "brcm,pdc";
		reg = <0x0 0x8001c000 0x0 0x448>;
		interrupts = <0x0 0x5a 0x4>;
	};

	spu-crypto@0x8001d000 {
		compatible = "brcm,spu-crypto";
		reg = <0x0 0x8001d000 0x0 0x64>;
		brcm,num_spu = <0x1>;
		brcm,num_chan = <0x1>;
	};

	brcm-therm {
		compatible = "brcm,therm";
	};
};