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Created January 6, 2023 15:42
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```asm
; Assembly listing for method helloworld:Test(float):System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) float -> zero-ref single-def
; V01 loc0 [V01,T02] ( 4, 4 ) simd16 -> d8 HFA(simd16)
; V02 loc1 [V02,T00] ( 8, 8 ) simd16 -> d0 HFA(simd16)
; V03 loc2 [V03,T03] ( 4, 4 ) simd16 -> d16 HFA(simd16)
; V04 loc3 [V04,T01] ( 5, 5 ) simd16 -> d17 HFA(simd16)
; V05 loc4 [V05,T04] ( 3, 3 ) simd16 -> d18 HFA(simd16)
;# V06 OutArgs [V06 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V07 tmp1 [V07 ] ( 0, 0 ) struct (64) zero-ref ld-addr-op "NewObj constructor temp"
;* V08 tmp2 [V08 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V09 tmp3 [V09 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V10 tmp4 [V10 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V11 tmp5 [V11 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V12 tmp6 [V12 ] ( 0, 0 ) struct (64) zero-ref ld-addr-op "NewObj constructor temp"
;* V13 tmp7 [V13 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V14 tmp8 [V14 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V15 tmp9 [V15 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V16 tmp10 [V16 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V17 tmp11 [V17 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V18 tmp12 [V18 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V19 tmp13 [V19 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V20 tmp14 [V20 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V21 tmp15 [V21 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V22 tmp16 [V22 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V23 tmp17 [V23 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V24 tmp18 [V24 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
; V25 tmp19 [V25,T06] ( 2, 2 ) simd16 -> d17 HFA(simd16) V07.Item1(offs=0x00) P-INDEP "field V07.Item1 (fldOffset=0x0)"
; V26 tmp20 [V26,T05] ( 3, 3 ) simd16 -> d19 HFA(simd16) V07.Item2(offs=0x10) P-INDEP "field V07.Item2 (fldOffset=0x10)"
; V27 tmp21 [V27,T07] ( 2, 2 ) simd16 -> d20 HFA(simd16) V07.Item3(offs=0x20) P-INDEP "field V07.Item3 (fldOffset=0x20)"
; V28 tmp22 [V28,T08] ( 2, 2 ) simd16 -> d21 HFA(simd16) V07.Item4(offs=0x30) P-INDEP "field V07.Item4 (fldOffset=0x30)"
; V29 tmp23 [V29,T09] ( 2, 2 ) simd16 -> d16 HFA(simd16) V12.Item1(offs=0x00) P-INDEP "field V12.Item1 (fldOffset=0x0)"
; V30 tmp24 [V30,T10] ( 2, 2 ) simd16 -> d18 HFA(simd16) V12.Item2(offs=0x10) P-INDEP "field V12.Item2 (fldOffset=0x10)"
; V31 tmp25 [V31,T11] ( 2, 2 ) simd16 -> d19 HFA(simd16) V12.Item3(offs=0x20) P-INDEP "field V12.Item3 (fldOffset=0x20)"
; V32 tmp26 [V32,T12] ( 2, 2 ) simd16 -> d8 HFA(simd16) V12.Item4(offs=0x30) P-INDEP "field V12.Item4 (fldOffset=0x30)"
;
; Lcl frame size = 0
G_M53676_IG01: ;; offset=0000H
A9BE7BFD stp fp, lr, [sp, #-0x20]!
6D0127E8 stp d8, d9, [sp, #0x10]
910003FD mov fp, sp
;; size=12 bbWeight=1 PerfScore 2.50
G_M53676_IG02: ;; offset=000CH
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
4EA01C08 mov v8.16b, v0.16b
D2972C00 movz x0, #0xB960 // code for helloworld:Produce2():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
6E084509 mov v9.d[0], v8.d[1]
D63F0000 blr x0
6E180528 mov v8.d[1], v9.d[0]
4E208510 add v16.16b, v8.16b, v0.16b
4E288611 add v17.16b, v16.16b, v8.16b
4E208632 add v18.16b, v17.16b, v0.16b
4EB21E53 mov v19.16b, v18.16b
4EB31E74 mov v20.16b, v19.16b
4EA01C15 mov v21.16b, v0.16b
4E106231 tbl v17.16b, {v17.16b, v18.16b, v19.16b, v20.16b}, v16.16b
4EA01C13 mov v19.16b, v0.16b
4E006200 tbl v0.16b, {v16.16b, v17.16b, v18.16b, v19.16b}, v0.16b
4E318400 add v0.16b, v0.16b, v17.16b
;; size=92 bbWeight=1 PerfScore 25.50
G_M53676_IG03: ;; offset=0068H
6D4127E8 ldp d8, d9, [sp, #0x10]
A8C27BFD ldp fp, lr, [sp], #0x20
D65F03C0 ret lr
;; size=12 bbWeight=1 PerfScore 3.00
; Total bytes of code 116, prolog size 12, PerfScore 42.60, instruction count 29, allocated bytes for code 116 (MethodHash=8a722e53) for method helloworld:Test(float):System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test():System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
; V00 loc0 [V00,T03] ( 3, 3 ) simd16 -> [fp+20H] HFA(simd16)
; V01 loc1 [V01,T00] ( 6, 6 ) simd16 -> d0 HFA(simd16)
; V02 loc2 [V02,T02] ( 4, 4 ) simd16 -> [fp+10H] HFA(simd16) spill-single-def
; V03 loc3 [V03,T01] ( 5, 5 ) simd16 -> d16 HFA(simd16)
; V04 loc4 [V04,T04] ( 3, 3 ) simd16 -> d18 HFA(simd16)
;# V05 OutArgs [V05 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V06 tmp1 [V06 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V07 tmp2 [V07 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V08 tmp3 [V08 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V09 tmp4 [V09 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V10 tmp5 [V10 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V11 tmp6 [V11 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V12 tmp7 [V12 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V13 tmp8 [V13 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V14 tmp9 [V14 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V15 tmp10 [V15 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
; V16 tmp11 [V16,T05] ( 2, 2 ) simd16 -> d16 HFA(simd16) V06.Item1(offs=0x00) P-INDEP "field V06.Item1 (fldOffset=0x0)"
; V17 tmp12 [V17,T06] ( 2, 2 ) simd16 -> d19 HFA(simd16) V06.Item2(offs=0x10) P-INDEP "field V06.Item2 (fldOffset=0x10)"
;* V18 tmp13 [V18 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V07.Item1(offs=0x00) P-INDEP "field V07.Item1 (fldOffset=0x0)"
;* V19 tmp14 [V19 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V07.Item2(offs=0x10) P-INDEP "field V07.Item2 (fldOffset=0x10)"
;* V20 tmp15 [V20 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item1(offs=0x00) P-INDEP "field V08.Item1 (fldOffset=0x0)"
;* V21 tmp16 [V21 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item2(offs=0x10) P-INDEP "field V08.Item2 (fldOffset=0x10)"
; V22 tmp17 [V22,T07] ( 2, 2 ) simd16 -> d20 HFA(simd16) V09.Item1(offs=0x00) P-INDEP "field V09.Item1 (fldOffset=0x0)"
; V23 tmp18 [V23,T08] ( 2, 2 ) simd16 -> d18 HFA(simd16) V09.Item2(offs=0x10) P-INDEP "field V09.Item2 (fldOffset=0x10)"
;* V24 tmp19 [V24 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item1(offs=0x00) P-INDEP "field V10.Item1 (fldOffset=0x0)"
;* V25 tmp20 [V25 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item2(offs=0x10) P-INDEP "field V10.Item2 (fldOffset=0x10)"
;* V26 tmp21 [V26 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V11.Item1(offs=0x00) P-INDEP "field V11.Item1 (fldOffset=0x0)"
;* V27 tmp22 [V27 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V11.Item2(offs=0x10) P-INDEP "field V11.Item2 (fldOffset=0x10)"
;
; Lcl frame size = 32
G_M31708_IG01: ;; offset=0000H
A9BD7BFD stp fp, lr, [sp, #-0x30]!
910003FD mov fp, sp
;; size=8 bbWeight=1 PerfScore 1.50
G_M31708_IG02: ;; offset=0008H
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
3D800BA0 str q0, [fp, #0x20] // [V00 loc0]
D2972C00 movz x0, #0xB960 // code for helloworld:Produce2():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
3DC00BB0 ldr q16, [fp, #0x20] // [V00 loc0]
4E208611 add v17.16b, v16.16b, v0.16b
3D8007B1 str q17, [fp, #0x10] // [V02 loc2]
4E308630 add v16.16b, v17.16b, v16.16b
4E208612 add v18.16b, v16.16b, v0.16b
4EB21E53 mov v19.16b, v18.16b
4EB31E71 mov v17.16b, v19.16b
3DC007B4 ldr q20, [fp, #0x10] // [V02 loc2]
4E142210 tbl v16.16b, {v16.16b, v17.16b}, v20.16b
4EB21E55 mov v21.16b, v18.16b
4E002280 tbl v0.16b, {v20.16b, v21.16b}, v0.16b
4E308400 add v0.16b, v0.16b, v16.16b
;; size=92 bbWeight=1 PerfScore 24.50
G_M31708_IG03: ;; offset=0064H
A8C37BFD ldp fp, lr, [sp], #0x30
D65F03C0 ret lr
;; size=8 bbWeight=1 PerfScore 2.00
; Total bytes of code 108, prolog size 8, PerfScore 38.80, instruction count 27, allocated bytes for code 108 (MethodHash=01898423) for method helloworld:Test():System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test(System.Runtime.Intrinsics.Vector64`1[ubyte],System.Runtime.Intrinsics.Vector64`1[ubyte]):System.Runtime.Intrinsics.Vector64`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 6 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
; V00 arg0 [V00,T05] ( 3, 3 ) simd8 -> d9 HFA(simd8) single-def
; V01 arg1 [V01,T02] ( 5, 5 ) simd8 -> d8 HFA(simd8) single-def
; V02 loc0 [V02,T06] ( 4, 4 ) simd16 -> d10 HFA(simd16)
; V03 loc1 [V03,T00] ( 7, 7 ) simd16 -> d0 HFA(simd16)
; V04 loc2 [V04,T04] ( 5, 5 ) simd16 -> d16 HFA(simd16)
; V05 loc3 [V05,T01] ( 7, 7 ) simd16 -> [fp+20H] HFA(simd16)
; V06 loc4 [V06,T03] ( 6, 6 ) simd16 -> [fp+10H] HFA(simd16) spill-single-def
; V07 loc5 [V07,T08] ( 2, 2 ) simd8 -> d19 HFA(simd8) single-def
; V08 loc6 [V08,T09] ( 2, 2 ) simd8 -> d22 HFA(simd8) single-def
; V09 loc7 [V09,T10] ( 2, 2 ) simd8 -> d16 HFA(simd8) single-def
;* V10 loc8 [V10 ] ( 0, 0 ) simd8 -> zero-ref HFA(simd8)
;# V11 OutArgs [V11 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V12 tmp1 [V12 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V14 tmp3 [V14 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V15 tmp4 [V15 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V16 tmp5 [V16 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V17 tmp6 [V17 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V18 tmp7 [V18 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V19 tmp8 [V19 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V20 tmp9 [V20 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V21 tmp10 [V21 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V22 tmp11 [V22 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V23 tmp12 [V23 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V24 tmp13 [V24 ] ( 0, 0 ) struct (48) zero-ref ld-addr-op "NewObj constructor temp"
;* V25 tmp14 [V25 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V26 tmp15 [V26 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V27 tmp16 [V27 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V28 tmp17 [V28 ] ( 0, 0 ) struct (64) zero-ref ld-addr-op "NewObj constructor temp"
;* V29 tmp18 [V29 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V30 tmp19 [V30 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V31 tmp20 [V31 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V32 tmp21 [V32 ] ( 0, 0 ) struct (64) zero-ref do-not-enreg[S] "VectorTableLookup"
;* V33 tmp22 [V33 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V34 tmp23 [V34 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V35 tmp24 [V35 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V36 tmp25 [V36 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V37 tmp26 [V37 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V38 tmp27 [V38 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V39 tmp28 [V39 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V40 tmp29 [V40 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V41 tmp30 [V41 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V42 tmp31 [V42 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V43 tmp32 [V43 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V44 tmp33 [V44 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V45 tmp34 [V45 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V46 tmp35 [V46 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V47 tmp36 [V47 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
; V48 tmp37 [V48,T11] ( 2, 2 ) simd16 -> d17 HFA(simd16) V12.Item1(offs=0x00) P-INDEP "field V12.Item1 (fldOffset=0x0)"
; V49 tmp38 [V49,T12] ( 2, 2 ) simd16 -> d19 HFA(simd16) V12.Item2(offs=0x10) P-INDEP "field V12.Item2 (fldOffset=0x10)"
;* V50 tmp39 [V50 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item1(offs=0x00) P-INDEP "field V13.Item1 (fldOffset=0x0)"
;* V51 tmp40 [V51 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item2(offs=0x10) P-INDEP "field V13.Item2 (fldOffset=0x10)"
;* V52 tmp41 [V52 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item1(offs=0x00) P-INDEP "field V14.Item1 (fldOffset=0x0)"
;* V53 tmp42 [V53 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item2(offs=0x10) P-INDEP "field V14.Item2 (fldOffset=0x10)"
; V54 tmp43 [V54,T13] ( 2, 2 ) simd16 -> d18 HFA(simd16) V15.Item1(offs=0x00) P-INDEP "field V15.Item1 (fldOffset=0x0)"
; V55 tmp44 [V55,T14] ( 2, 2 ) simd16 -> d21 HFA(simd16) V15.Item2(offs=0x10) P-INDEP "field V15.Item2 (fldOffset=0x10)"
;* V56 tmp45 [V56 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V16.Item1(offs=0x00) P-INDEP "field V16.Item1 (fldOffset=0x0)"
;* V57 tmp46 [V57 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V16.Item2(offs=0x10) P-INDEP "field V16.Item2 (fldOffset=0x10)"
;* V58 tmp47 [V58 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V17.Item1(offs=0x00) P-INDEP "field V17.Item1 (fldOffset=0x0)"
;* V59 tmp48 [V59 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V17.Item2(offs=0x10) P-INDEP "field V17.Item2 (fldOffset=0x10)"
; V60 tmp49 [V60,T15] ( 2, 2 ) simd16 -> d10 HFA(simd16) V18.Item1(offs=0x00) P-INDEP "field V18.Item1 (fldOffset=0x0)"
; V61 tmp50 [V61,T16] ( 2, 2 ) simd16 -> d18 HFA(simd16) V18.Item2(offs=0x10) P-INDEP "field V18.Item2 (fldOffset=0x10)"
;* V62 tmp51 [V62 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V19.Item1(offs=0x00) P-INDEP "field V19.Item1 (fldOffset=0x0)"
;* V63 tmp52 [V63 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V19.Item2(offs=0x10) P-INDEP "field V19.Item2 (fldOffset=0x10)"
;* V64 tmp53 [V64 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V20.Item1(offs=0x00) P-INDEP "field V20.Item1 (fldOffset=0x0)"
;* V65 tmp54 [V65 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V20.Item2(offs=0x10) P-INDEP "field V20.Item2 (fldOffset=0x10)"
; V66 tmp55 [V66,T17] ( 2, 2 ) simd16 -> d22 HFA(simd16) V21.Item1(offs=0x00) P-INDEP "field V21.Item1 (fldOffset=0x0)"
; V67 tmp56 [V67,T18] ( 2, 2 ) simd16 -> d23 HFA(simd16) V21.Item2(offs=0x10) P-INDEP "field V21.Item2 (fldOffset=0x10)"
;* V68 tmp57 [V68 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V22.Item1(offs=0x00) P-INDEP "field V22.Item1 (fldOffset=0x0)"
;* V69 tmp58 [V69 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V22.Item2(offs=0x10) P-INDEP "field V22.Item2 (fldOffset=0x10)"
;* V70 tmp59 [V70 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V23.Item1(offs=0x00) P-INDEP "field V23.Item1 (fldOffset=0x0)"
;* V71 tmp60 [V71 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V23.Item2(offs=0x10) P-INDEP "field V23.Item2 (fldOffset=0x10)"
; V72 tmp61 [V72,T19] ( 2, 2 ) simd16 -> d16 HFA(simd16) V24.Item1(offs=0x00) P-INDEP "field V24.Item1 (fldOffset=0x0)"
; V73 tmp62 [V73,T20] ( 2, 2 ) simd16 -> d23 HFA(simd16) V24.Item2(offs=0x10) P-INDEP "field V24.Item2 (fldOffset=0x10)"
; V74 tmp63 [V74,T21] ( 2, 2 ) simd16 -> d24 HFA(simd16) V24.Item3(offs=0x20) P-INDEP "field V24.Item3 (fldOffset=0x20)"
;* V75 tmp64 [V75 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V25.Item1(offs=0x00) P-INDEP "field V25.Item1 (fldOffset=0x0)"
;* V76 tmp65 [V76 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V25.Item2(offs=0x10) P-INDEP "field V25.Item2 (fldOffset=0x10)"
;* V77 tmp66 [V77 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V25.Item3(offs=0x20) P-INDEP "field V25.Item3 (fldOffset=0x20)"
;* V78 tmp67 [V78 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V26.Item1(offs=0x00) P-INDEP "field V26.Item1 (fldOffset=0x0)"
;* V79 tmp68 [V79 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V26.Item2(offs=0x10) P-INDEP "field V26.Item2 (fldOffset=0x10)"
;* V80 tmp69 [V80 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V26.Item3(offs=0x20) P-INDEP "field V26.Item3 (fldOffset=0x20)"
;* V81 tmp70 [V81 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V27.Item1(offs=0x00) P-INDEP "field V27.Item1 (fldOffset=0x0)"
;* V82 tmp71 [V82 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V27.Item2(offs=0x10) P-INDEP "field V27.Item2 (fldOffset=0x10)"
;* V83 tmp72 [V83 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V27.Item3(offs=0x20) P-INDEP "field V27.Item3 (fldOffset=0x20)"
; V84 tmp73 [V84,T22] ( 2, 2 ) simd16 -> d17 HFA(simd16) V28.Item1(offs=0x00) P-INDEP "field V28.Item1 (fldOffset=0x0)"
; V85 tmp74 [V85,T07] ( 3, 3 ) simd16 -> d20 HFA(simd16) V28.Item2(offs=0x10) P-INDEP "field V28.Item2 (fldOffset=0x10)"
; V86 tmp75 [V86,T23] ( 2, 2 ) simd16 -> d0 HFA(simd16) V28.Item3(offs=0x20) P-INDEP "field V28.Item3 (fldOffset=0x20)"
; V87 tmp76 [V87,T24] ( 2, 2 ) simd16 -> d18 HFA(simd16) V28.Item4(offs=0x30) P-INDEP "field V28.Item4 (fldOffset=0x30)"
;
; Lcl frame size = 32
G_M38601_IG01: ;; offset=0000H
A9BB7BFD stp fp, lr, [sp, #-0x50]!
6D0327E8 stp d8, d9, [sp, #0x30]
6D042FEA stp d10, d11, [sp, #0x40]
910003FD mov fp, sp
0EA01C09 mov v9.8b, v0.8b
0EA11C28 mov v8.8b, v1.8b
;; size=24 bbWeight=1 PerfScore 4.50
G_M38601_IG02: ;; offset=0018H
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
4EA01C0A mov v10.16b, v0.16b
D2972C00 movz x0, #0xB960 // code for helloworld:Produce2():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
6E08454B mov v11.d[0], v10.d[1]
D63F0000 blr x0
6E18056A mov v10.d[1], v11.d[0]
4E208550 add v16.16b, v10.16b, v0.16b
4E2A8611 add v17.16b, v16.16b, v10.16b
4E208632 add v18.16b, v17.16b, v0.16b
3D8007B2 str q18, [fp, #0x10]
4EB21E53 mov v19.16b, v18.16b
4E102231 tbl v17.16b, {v17.16b, v18.16b}, v16.16b
4EB01E12 mov v18.16b, v16.16b
3DC007B4 ldr q20, [fp, #0x10] // [V06 loc4]
4EB41E95 mov v21.16b, v20.16b
4EB51EB3 mov v19.16b, v21.16b
4E002240 tbl v0.16b, {v18.16b, v19.16b}, v0.16b
4EB11E32 mov v18.16b, v17.16b
4EB21E4B mov v11.16b, v18.16b
0E092153 tbl v19.8b, {v10.16b, v11.16b}, v9.8b
4EA01C16 mov v22.16b, v0.16b
4EB41E97 mov v23.16b, v20.16b
0E0822D6 tbl v22.8b, {v22.16b, v23.16b}, v8.8b
4EB41E97 mov v23.16b, v20.16b
3D800BB1 str q17, [fp, #0x20] // [V05 loc3]
4EB11E38 mov v24.16b, v17.16b
4EB71EF1 mov v17.16b, v23.16b
4EB81F12 mov v18.16b, v24.16b
0E084210 tbl v16.8b, {v16.16b, v17.16b, v18.16b}, v8.8b
3DC00BB1 ldr q17, [fp, #0x20] // [V05 loc3]
4EB41E92 mov v18.16b, v20.16b
0E368673 add v19.8b, v19.8b, v22.8b
0E308670 add v16.8b, v19.8b, v16.8b
0E086220 tbl v0.8b, {v17.16b, v18.16b, v19.16b, v20.16b}, v8.8b
0E208600 add v0.8b, v16.8b, v0.8b
;; size=168 bbWeight=1 PerfScore 41.00
G_M38601_IG03: ;; offset=00C0H
6D442FEA ldp d10, d11, [sp, #0x40]
6D4327E8 ldp d8, d9, [sp, #0x30]
A8C57BFD ldp fp, lr, [sp], #0x50
D65F03C0 ret lr
;; size=16 bbWeight=1 PerfScore 4.00
; Total bytes of code 208, prolog size 16, PerfScore 70.30, instruction count 52, allocated bytes for code 208 (MethodHash=d65b6936) for method helloworld:Test(System.Runtime.Intrinsics.Vector64`1[ubyte],System.Runtime.Intrinsics.Vector64`1[ubyte]):System.Runtime.Intrinsics.Vector64`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test(System.Runtime.Intrinsics.Vector128`1[ubyte]):System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
; V00 arg0 [V00,T00] ( 3, 2.50) simd16 -> [fp+20H] HFA(simd16) single-def
; V01 loc0 [V01,T04] ( 4, 3.50) simd16 -> [fp+10H] HFA(simd16)
; V02 loc1 [V02,T01] ( 5, 4 ) simd16 -> d0 HFA(simd16)
; V03 loc2 [V03,T06] ( 3, 2.50) simd16 -> d17 HFA(simd16)
; V04 loc3 [V04,T03] ( 5, 3.50) simd16 -> d18 HFA(simd16)
; V05 loc4 [V05,T02] ( 5, 4 ) simd16 -> d19 HFA(simd16)
;# V06 OutArgs [V06 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V07 tmp1 [V07 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V08 tmp2 [V08 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V09 tmp3 [V09 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V10 tmp4 [V10 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V11 tmp5 [V11 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V12 tmp6 [V12 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V13 tmp7 [V13 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V14 tmp8 [V14 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V15 tmp9 [V15 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V16 tmp10 [V16 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V17 tmp11 [V17 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V18 tmp12 [V18 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V19 tmp13 [V19 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V20 tmp14 [V20 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V21 tmp15 [V21 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
; V22 tmp16 [V22,T07] ( 2, 1 ) simd16 -> d16 HFA(simd16) V07.Item1(offs=0x00) P-INDEP "field V07.Item1 (fldOffset=0x0)"
; V23 tmp17 [V23,T08] ( 2, 1 ) simd16 -> d17 HFA(simd16) V07.Item2(offs=0x10) P-INDEP "field V07.Item2 (fldOffset=0x10)"
;* V24 tmp18 [V24 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item1(offs=0x00) P-INDEP "field V08.Item1 (fldOffset=0x0)"
;* V25 tmp19 [V25 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item2(offs=0x10) P-INDEP "field V08.Item2 (fldOffset=0x10)"
;* V26 tmp20 [V26 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item1(offs=0x00) P-INDEP "field V09.Item1 (fldOffset=0x0)"
;* V27 tmp21 [V27 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item2(offs=0x10) P-INDEP "field V09.Item2 (fldOffset=0x10)"
; V28 tmp22 [V28,T09] ( 2, 1 ) simd16 -> d17 HFA(simd16) V10.Item1(offs=0x00) P-INDEP "field V10.Item1 (fldOffset=0x0)"
; V29 tmp23 [V29,T10] ( 2, 1 ) simd16 -> d16 HFA(simd16) V10.Item2(offs=0x10) P-INDEP "field V10.Item2 (fldOffset=0x10)"
;* V30 tmp24 [V30 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V11.Item1(offs=0x00) P-INDEP "field V11.Item1 (fldOffset=0x0)"
;* V31 tmp25 [V31 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V11.Item2(offs=0x10) P-INDEP "field V11.Item2 (fldOffset=0x10)"
;* V32 tmp26 [V32 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item1(offs=0x00) P-INDEP "field V12.Item1 (fldOffset=0x0)"
;* V33 tmp27 [V33 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item2(offs=0x10) P-INDEP "field V12.Item2 (fldOffset=0x10)"
; V34 tmp28 [V34,T11] ( 2, 1 ) simd16 -> d18 HFA(simd16) V13.Item1(offs=0x00) P-INDEP "field V13.Item1 (fldOffset=0x0)"
; V35 tmp29 [V35,T12] ( 2, 1 ) simd16 -> d19 HFA(simd16) V13.Item2(offs=0x10) P-INDEP "field V13.Item2 (fldOffset=0x10)"
;* V36 tmp30 [V36 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item1(offs=0x00) P-INDEP "field V14.Item1 (fldOffset=0x0)"
;* V37 tmp31 [V37 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item2(offs=0x10) P-INDEP "field V14.Item2 (fldOffset=0x10)"
;* V38 tmp32 [V38 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V15.Item1(offs=0x00) P-INDEP "field V15.Item1 (fldOffset=0x0)"
;* V39 tmp33 [V39 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V15.Item2(offs=0x10) P-INDEP "field V15.Item2 (fldOffset=0x10)"
; V40 rat0 [V40,T05] ( 3, 3 ) simd16 -> d20 HFA(simd16) "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 32
G_M8141_IG01: ;; offset=0000H
A9BD7BFD stp fp, lr, [sp, #-0x30]!
910003FD mov fp, sp
3D800BA0 str q0, [fp, #0x20] // [V00 arg0]
;; size=12 bbWeight=1 PerfScore 2.50
G_M8141_IG02: ;; offset=000CH
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
3D8007A0 str q0, [fp, #0x10] // [V01 loc0]
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
3DC007B0 ldr q16, [fp, #0x10] // [V01 loc0]
4E208611 add v17.16b, v16.16b, v0.16b
4E308632 add v18.16b, v17.16b, v16.16b
4E208653 add v19.16b, v18.16b, v0.16b
6EB3A674 umaxp v20.4s, v19.4s, v19.4s
4E083E80 umov x0, v20.d[0]
F100001F cmp x0, #0
540000A1 bne G_M8141_IG05
;; size=76 bbWeight=1 PerfScore 20.50
G_M8141_IG03: ;; offset=0058H
3DC00BA0 ldr q0, [fp, #0x20] // [V00 arg0]
4E002240 tbl v0.16b, {v18.16b, v19.16b}, v0.16b
;; size=8 bbWeight=0.50 PerfScore 1.50
G_M8141_IG04: ;; offset=0060H
A8C37BFD ldp fp, lr, [sp], #0x30
D65F03C0 ret lr
;; size=8 bbWeight=0.50 PerfScore 1.00
G_M8141_IG05: ;; offset=0068H
9C000254 ldr q20, [@RWD00]
6E348E54 cmeq v20.16b, v18.16b, v20.16b
6EB4AE94 uminp v20.4s, v20.4s, v20.4s
4E083E80 umov x0, v20.d[0]
B100041F cmn x0, #1
540000C0 beq G_M8141_IG07
4EB31E70 mov v16.16b, v19.16b
4EB01E12 mov v18.16b, v16.16b
4E002220 tbl v0.16b, {v17.16b, v18.16b}, v0.16b
;; size=36 bbWeight=0.50 PerfScore 4.25
G_M8141_IG06: ;; offset=008CH
A8C37BFD ldp fp, lr, [sp], #0x30
D65F03C0 ret lr
;; size=8 bbWeight=0.50 PerfScore 1.00
G_M8141_IG07: ;; offset=0094H
4EB21E51 mov v17.16b, v18.16b
4E002200 tbl v0.16b, {v16.16b, v17.16b}, v0.16b
;; size=8 bbWeight=0.50 PerfScore 0.75
G_M8141_IG08: ;; offset=009CH
A8C37BFD ldp fp, lr, [sp], #0x30
D65F03C0 ret lr
;; size=8 bbWeight=0.50 PerfScore 1.00
RWD00 dq 0101010101010101h, 0101010101010101h
; Total bytes of code 164, prolog size 8, PerfScore 48.90, instruction count 41, allocated bytes for code 164 (MethodHash=302be032) for method helloworld:Test(System.Runtime.Intrinsics.Vector128`1[ubyte]):System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test(System.Runtime.Intrinsics.Vector128`1[ubyte],System.Runtime.Intrinsics.Vector128`1[ubyte]):System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; invoked as altjit
; Final local variable assignments
;
; V00 arg0 [V00,T00] ( 3, 3 ) simd16 -> d0 HFA(simd16) single-def
; V01 arg1 [V01,T01] ( 3, 3 ) simd16 -> d1 HFA(simd16) single-def
;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;
; Lcl frame size = 0
G_M38832_IG01: ;; offset=0000H
A9BF7BFD stp fp, lr, [sp, #-0x10]!
910003FD mov fp, sp
;; size=8 bbWeight=1 PerfScore 1.50
G_M38832_IG02: ;; offset=0008H
4E010000 tbl v0.16b, {v0.16b}, v1.16b
;; size=4 bbWeight=1 PerfScore 0.50
G_M38832_IG03: ;; offset=000CH
A8C17BFD ldp fp, lr, [sp], #0x10
D65F03C0 ret lr
;; size=8 bbWeight=1 PerfScore 2.00
; Total bytes of code 20, prolog size 8, PerfScore 6.00, instruction count 5, allocated bytes for code 20 (MethodHash=d364684f) for method helloworld:Test(System.Runtime.Intrinsics.Vector128`1[ubyte],System.Runtime.Intrinsics.Vector128`1[ubyte]):System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test(int):System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) int -> zero-ref single-def
; V01 loc0 [V01,T00] ( 2, 2 ) simd16 -> [fp+10H] HFA(simd16)
; V02 loc1 [V02,T01] ( 2, 2 ) simd16 -> d0 HFA(simd16)
;* V03 loc2 [V03 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16)
;* V04 loc3 [V04 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16)
;# V05 OutArgs [V05 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V06 tmp1 [V06 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V07 tmp2 [V07 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V08 tmp3 [V08 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V09 tmp4 [V09 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V10 tmp5 [V10 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V11 tmp6 [V11 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V06.Item1(offs=0x00) P-INDEP "field V06.Item1 (fldOffset=0x0)"
;* V12 tmp7 [V12 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V06.Item2(offs=0x10) P-INDEP "field V06.Item2 (fldOffset=0x10)"
;* V13 tmp8 [V13 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V07.Item1(offs=0x00) P-INDEP "field V07.Item1 (fldOffset=0x0)"
;* V14 tmp9 [V14 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V07.Item2(offs=0x10) P-INDEP "field V07.Item2 (fldOffset=0x10)"
;* V15 tmp10 [V15 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item1(offs=0x00) P-INDEP "field V08.Item1 (fldOffset=0x0)"
;* V16 tmp11 [V16 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item2(offs=0x10) P-INDEP "field V08.Item2 (fldOffset=0x10)"
;
; Lcl frame size = 16
G_M41359_IG01: ;; offset=0000H
A9BE7BFD stp fp, lr, [sp, #-0x20]!
910003FD mov fp, sp
;; size=8 bbWeight=1 PerfScore 1.50
G_M41359_IG02: ;; offset=0008H
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
3D8007A0 str q0, [fp, #0x10] // [V01 loc0]
D2972C00 movz x0, #0xB960 // code for helloworld:Produce2():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
3DC007B0 ldr q16, [fp, #0x10] // [V01 loc0]
4E100000 tbl v0.16b, {v0.16b}, v16.16b
;; size=52 bbWeight=1 PerfScore 14.50
G_M41359_IG03: ;; offset=003CH
A8C27BFD ldp fp, lr, [sp], #0x20
D65F03C0 ret lr
;; size=8 bbWeight=1 PerfScore 2.00
; Total bytes of code 68, prolog size 8, PerfScore 24.80, instruction count 17, allocated bytes for code 68 (MethodHash=124b5e70) for method helloworld:Test(int):System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test(int,int):System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 4 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) int -> zero-ref single-def
;* V01 arg1 [V01 ] ( 0, 0 ) int -> zero-ref single-def
; V02 loc0 [V02,T00] ( 7, 7 ) simd16 -> d8 HFA(simd16)
; V03 loc1 [V03,T01] ( 7, 7 ) simd16 -> d0 HFA(simd16)
; V04 loc2 [V04,T04] ( 4, 4 ) simd16 -> d16 HFA(simd16)
; V05 loc3 [V05,T03] ( 6, 6 ) simd16 -> [fp+20H] HFA(simd16)
; V06 loc4 [V06,T02] ( 7, 7 ) simd16 -> [fp+10H] HFA(simd16)
;# V07 OutArgs [V07 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V08 tmp1 [V08 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V09 tmp2 [V09 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V10 tmp3 [V10 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V11 tmp4 [V11 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V12 tmp5 [V12 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V13 tmp6 [V13 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V14 tmp7 [V14 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V15 tmp8 [V15 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V16 tmp9 [V16 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V17 tmp10 [V17 ] ( 0, 0 ) struct (32) zero-ref ld-addr-op "NewObj constructor temp"
;* V18 tmp11 [V18 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V19 tmp12 [V19 ] ( 0, 0 ) struct (32) zero-ref "VectorTableLookup"
;* V20 tmp13 [V20 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V21 tmp14 [V21 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V22 tmp15 [V22 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V23 tmp16 [V23 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V24 tmp17 [V24 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V25 tmp18 [V25 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V26 tmp19 [V26 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V27 tmp20 [V27 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
; V28 tmp21 [V28,T05] ( 2, 2 ) simd16 -> d17 HFA(simd16) V08.Item1(offs=0x00) P-INDEP "field V08.Item1 (fldOffset=0x0)"
; V29 tmp22 [V29,T06] ( 2, 2 ) simd16 -> d19 HFA(simd16) V08.Item2(offs=0x10) P-INDEP "field V08.Item2 (fldOffset=0x10)"
;* V30 tmp23 [V30 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item1(offs=0x00) P-INDEP "field V09.Item1 (fldOffset=0x0)"
;* V31 tmp24 [V31 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item2(offs=0x10) P-INDEP "field V09.Item2 (fldOffset=0x10)"
;* V32 tmp25 [V32 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item1(offs=0x00) P-INDEP "field V10.Item1 (fldOffset=0x0)"
;* V33 tmp26 [V33 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item2(offs=0x10) P-INDEP "field V10.Item2 (fldOffset=0x10)"
; V34 tmp27 [V34,T07] ( 2, 2 ) simd16 -> d16 HFA(simd16) V11.Item1(offs=0x00) P-INDEP "field V11.Item1 (fldOffset=0x0)"
; V35 tmp28 [V35,T08] ( 2, 2 ) simd16 -> d18 HFA(simd16) V11.Item2(offs=0x10) P-INDEP "field V11.Item2 (fldOffset=0x10)"
;* V36 tmp29 [V36 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item1(offs=0x00) P-INDEP "field V12.Item1 (fldOffset=0x0)"
;* V37 tmp30 [V37 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item2(offs=0x10) P-INDEP "field V12.Item2 (fldOffset=0x10)"
;* V38 tmp31 [V38 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item1(offs=0x00) P-INDEP "field V13.Item1 (fldOffset=0x0)"
;* V39 tmp32 [V39 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item2(offs=0x10) P-INDEP "field V13.Item2 (fldOffset=0x10)"
; V40 tmp33 [V40,T09] ( 2, 2 ) simd16 -> d16 HFA(simd16) V14.Item1(offs=0x00) P-INDEP "field V14.Item1 (fldOffset=0x0)"
; V41 tmp34 [V41,T10] ( 2, 2 ) simd16 -> d20 HFA(simd16) V14.Item2(offs=0x10) P-INDEP "field V14.Item2 (fldOffset=0x10)"
;* V42 tmp35 [V42 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V15.Item1(offs=0x00) P-INDEP "field V15.Item1 (fldOffset=0x0)"
;* V43 tmp36 [V43 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V15.Item2(offs=0x10) P-INDEP "field V15.Item2 (fldOffset=0x10)"
;* V44 tmp37 [V44 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V16.Item1(offs=0x00) P-INDEP "field V16.Item1 (fldOffset=0x0)"
;* V45 tmp38 [V45 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V16.Item2(offs=0x10) P-INDEP "field V16.Item2 (fldOffset=0x10)"
; V46 tmp39 [V46,T11] ( 2, 2 ) simd16 -> d8 HFA(simd16) V17.Item1(offs=0x00) P-INDEP "field V17.Item1 (fldOffset=0x0)"
; V47 tmp40 [V47,T12] ( 2, 2 ) simd16 -> d17 HFA(simd16) V17.Item2(offs=0x10) P-INDEP "field V17.Item2 (fldOffset=0x10)"
;* V48 tmp41 [V48 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V18.Item1(offs=0x00) P-INDEP "field V18.Item1 (fldOffset=0x0)"
;* V49 tmp42 [V49 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V18.Item2(offs=0x10) P-INDEP "field V18.Item2 (fldOffset=0x10)"
;* V50 tmp43 [V50 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V19.Item1(offs=0x00) P-INDEP "field V19.Item1 (fldOffset=0x0)"
;* V51 tmp44 [V51 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V19.Item2(offs=0x10) P-INDEP "field V19.Item2 (fldOffset=0x10)"
;
; Lcl frame size = 32
G_M8016_IG01: ;; offset=0000H
A9BC7BFD stp fp, lr, [sp, #-0x40]!
6D0327E8 stp d8, d9, [sp, #0x30]
910003FD mov fp, sp
;; size=12 bbWeight=1 PerfScore 2.50
G_M8016_IG02: ;; offset=000CH
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
4EA01C08 mov v8.16b, v0.16b
D2972C00 movz x0, #0xB960 // code for helloworld:Produce2():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
6E084509 mov v9.d[0], v8.d[1]
D63F0000 blr x0
6E180528 mov v8.d[1], v9.d[0]
4E208510 add v16.16b, v8.16b, v0.16b
4E288611 add v17.16b, v16.16b, v8.16b
4E208632 add v18.16b, v17.16b, v0.16b
3D8007B2 str q18, [fp, #0x10]
4EB21E53 mov v19.16b, v18.16b
4E102231 tbl v17.16b, {v17.16b, v18.16b}, v16.16b
3D800BB1 str q17, [fp, #0x20] // [V05 loc3]
3DC007B2 ldr q18, [fp, #0x10] // [V06 loc4]
4EB21E51 mov v17.16b, v18.16b
4E002200 tbl v0.16b, {v16.16b, v17.16b}, v0.16b
4EA81D10 mov v16.16b, v8.16b
3DC00BB1 ldr q17, [fp, #0x20] // [V05 loc3]
4EB11E34 mov v20.16b, v17.16b
4E002210 tbl v16.16b, {v16.16b, v17.16b}, v0.16b
4EB01E11 mov v17.16b, v16.16b
4EB11E29 mov v9.16b, v17.16b
4E102108 tbl v8.16b, {v8.16b, v9.16b}, v16.16b
3DC00BB5 ldr q21, [fp, #0x20] // [V05 loc3]
4E358400 add v0.16b, v0.16b, v21.16b
4E288400 add v0.16b, v0.16b, v8.16b
4E308400 add v0.16b, v0.16b, v16.16b
;; size=136 bbWeight=1 PerfScore 34.50
G_M8016_IG03: ;; offset=0094H
6D4327E8 ldp d8, d9, [sp, #0x30]
A8C47BFD ldp fp, lr, [sp], #0x40
D65F03C0 ret lr
;; size=12 bbWeight=1 PerfScore 3.00
; Total bytes of code 160, prolog size 12, PerfScore 56.00, instruction count 40, allocated bytes for code 160 (MethodHash=df95e0af) for method helloworld:Test(int,int):System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
; Assembly listing for method helloworld:Test(double):System.Runtime.Intrinsics.Vector128`1[ubyte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data
; invoked as altjit
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) double -> zero-ref single-def
; V01 loc0 [V01,T02] ( 4, 4 ) simd16 -> d8 HFA(simd16)
; V02 loc1 [V02,T00] ( 7, 7 ) simd16 -> d0 HFA(simd16)
; V03 loc2 [V03,T03] ( 4, 4 ) simd16 -> d16 HFA(simd16)
; V04 loc3 [V04,T01] ( 5, 5 ) simd16 -> [fp+20H] HFA(simd16)
; V05 loc4 [V05,T04] ( 3, 3 ) simd16 -> [fp+10H] HFA(simd16) spill-single-def
;# V06 OutArgs [V06 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
;* V07 tmp1 [V07 ] ( 0, 0 ) struct (48) zero-ref ld-addr-op "NewObj constructor temp"
;* V08 tmp2 [V08 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V09 tmp3 [V09 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V10 tmp4 [V10 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V11 tmp5 [V11 ] ( 0, 0 ) struct (48) zero-ref ld-addr-op "NewObj constructor temp"
;* V12 tmp6 [V12 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V13 tmp7 [V13 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V14 tmp8 [V14 ] ( 0, 0 ) struct (48) zero-ref "VectorTableLookup"
;* V15 tmp9 [V15 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V16 tmp10 [V16 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V17 tmp11 [V17 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V18 tmp12 [V18 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V19 tmp13 [V19 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V20 tmp14 [V20 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
; V21 tmp15 [V21,T05] ( 2, 2 ) simd16 -> d17 HFA(simd16) V07.Item1(offs=0x00) P-INDEP "field V07.Item1 (fldOffset=0x0)"
; V22 tmp16 [V22,T06] ( 2, 2 ) simd16 -> d19 HFA(simd16) V07.Item2(offs=0x10) P-INDEP "field V07.Item2 (fldOffset=0x10)"
; V23 tmp17 [V23,T07] ( 2, 2 ) simd16 -> d20 HFA(simd16) V07.Item3(offs=0x20) P-INDEP "field V07.Item3 (fldOffset=0x20)"
;* V24 tmp18 [V24 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item1(offs=0x00) P-INDEP "field V08.Item1 (fldOffset=0x0)"
;* V25 tmp19 [V25 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item2(offs=0x10) P-INDEP "field V08.Item2 (fldOffset=0x10)"
;* V26 tmp20 [V26 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V08.Item3(offs=0x20) P-INDEP "field V08.Item3 (fldOffset=0x20)"
;* V27 tmp21 [V27 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item1(offs=0x00) P-INDEP "field V09.Item1 (fldOffset=0x0)"
;* V28 tmp22 [V28 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item2(offs=0x10) P-INDEP "field V09.Item2 (fldOffset=0x10)"
;* V29 tmp23 [V29 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V09.Item3(offs=0x20) P-INDEP "field V09.Item3 (fldOffset=0x20)"
;* V30 tmp24 [V30 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item1(offs=0x00) P-INDEP "field V10.Item1 (fldOffset=0x0)"
;* V31 tmp25 [V31 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item2(offs=0x10) P-INDEP "field V10.Item2 (fldOffset=0x10)"
;* V32 tmp26 [V32 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V10.Item3(offs=0x20) P-INDEP "field V10.Item3 (fldOffset=0x20)"
; V33 tmp27 [V33,T08] ( 2, 2 ) simd16 -> d16 HFA(simd16) V11.Item1(offs=0x00) P-INDEP "field V11.Item1 (fldOffset=0x0)"
; V34 tmp28 [V34,T09] ( 2, 2 ) simd16 -> d18 HFA(simd16) V11.Item2(offs=0x10) P-INDEP "field V11.Item2 (fldOffset=0x10)"
; V35 tmp29 [V35,T10] ( 2, 2 ) simd16 -> d8 HFA(simd16) V11.Item3(offs=0x20) P-INDEP "field V11.Item3 (fldOffset=0x20)"
;* V36 tmp30 [V36 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item1(offs=0x00) P-INDEP "field V12.Item1 (fldOffset=0x0)"
;* V37 tmp31 [V37 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item2(offs=0x10) P-INDEP "field V12.Item2 (fldOffset=0x10)"
;* V38 tmp32 [V38 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V12.Item3(offs=0x20) P-INDEP "field V12.Item3 (fldOffset=0x20)"
;* V39 tmp33 [V39 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item1(offs=0x00) P-INDEP "field V13.Item1 (fldOffset=0x0)"
;* V40 tmp34 [V40 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item2(offs=0x10) P-INDEP "field V13.Item2 (fldOffset=0x10)"
;* V41 tmp35 [V41 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V13.Item3(offs=0x20) P-INDEP "field V13.Item3 (fldOffset=0x20)"
;* V42 tmp36 [V42 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item1(offs=0x00) P-INDEP "field V14.Item1 (fldOffset=0x0)"
;* V43 tmp37 [V43 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item2(offs=0x10) P-INDEP "field V14.Item2 (fldOffset=0x10)"
;* V44 tmp38 [V44 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) V14.Item3(offs=0x20) P-INDEP "field V14.Item3 (fldOffset=0x20)"
;
; Lcl frame size = 32
G_M52265_IG01: ;; offset=0000H
A9BC7BFD stp fp, lr, [sp, #-0x40]!
6D0327E8 stp d8, d9, [sp, #0x30]
910003FD mov fp, sp
;; size=12 bbWeight=1 PerfScore 2.50
G_M52265_IG02: ;; offset=000CH
D2972900 movz x0, #0xB948 // code for helloworld:Produce1():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
D63F0000 blr x0
4EA01C08 mov v8.16b, v0.16b
D2972C00 movz x0, #0xB960 // code for helloworld:Produce2():System.Runtime.Intrinsics.Vector128`1[ubyte]
F2A2EBE0 movk x0, #0x175F LSL #16
F2CFFF20 movk x0, #0x7FF9 LSL #32
F9400000 ldr x0, [x0]
6E084509 mov v9.d[0], v8.d[1]
D63F0000 blr x0
6E180528 mov v8.d[1], v9.d[0]
4E208510 add v16.16b, v8.16b, v0.16b
4E288611 add v17.16b, v16.16b, v8.16b
4E208632 add v18.16b, v17.16b, v0.16b
3D8007B2 str q18, [fp, #0x10]
4EB21E53 mov v19.16b, v18.16b
4EA01C14 mov v20.16b, v0.16b
4EB31E72 mov v18.16b, v19.16b
4EB41E93 mov v19.16b, v20.16b
4E104231 tbl v17.16b, {v17.16b, v18.16b, v19.16b}, v16.16b
3D800BB1 str q17, [fp, #0x20] // [V04 loc3]
3DC007B2 ldr q18, [fp, #0x10] // [V05 loc4]
4EB21E51 mov v17.16b, v18.16b
4EA81D12 mov v18.16b, v8.16b
4E004200 tbl v0.16b, {v16.16b, v17.16b, v18.16b}, v0.16b
3DC00BB1 ldr q17, [fp, #0x20] // [V04 loc3]
4E318400 add v0.16b, v0.16b, v17.16b
;; size=116 bbWeight=1 PerfScore 30.50
G_M52265_IG03: ;; offset=0080H
6D4327E8 ldp d8, d9, [sp, #0x30]
A8C47BFD ldp fp, lr, [sp], #0x40
D65F03C0 ret lr
;; size=12 bbWeight=1 PerfScore 3.00
; Total bytes of code 140, prolog size 12, PerfScore 50.00, instruction count 35, allocated bytes for code 140 (MethodHash=dfaa33d6) for method helloworld:Test(double):System.Runtime.Intrinsics.Vector128`1[ubyte]
; ============================================================
```
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test(Vector128<byte> x, Vector128<byte> y, Vector128<byte> z)
{
return AdvSimd.Arm64.VectorTableLookup((x,y), z);
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test(int i)
{
var a = Produce1(); // V00
var b = Produce2(); // V01
var d = AdvSimd.Arm64.VectorTableLookup((a, b), a);
var e = AdvSimd.Arm64.VectorTableLookup(b, a);
return e;
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test()
{
var a = Produce1(); // V00
var b = Produce2(); // V01
var c = a + b; // V02
var d = c + a; // V03
var e = d + b; // V04
d = AdvSimd.Arm64.VectorTableLookup((d, e), c); // V06 = (V03, V04)
b = AdvSimd.Arm64.VectorTableLookup((c, e), b);
//e = AdvSimd.Arm64.VectorTableLookup((a, d), b);
//a = AdvSimd.Arm64.VectorTableLookup((a, e), e);
return b + d; // a + b + d + e;
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test(int i, int j)
{
var a = Produce1(); // V00
var b = Produce2(); // V01
var c = a + b; // V02
var d = c + a; // V03
var e = d + b; // V04
d = AdvSimd.Arm64.VectorTableLookup((d, e), c); // V06 = (V03, V04)
b = AdvSimd.Arm64.VectorTableLookup((c, e), b);
e = AdvSimd.Arm64.VectorTableLookup((a, d), b);
a = AdvSimd.Arm64.VectorTableLookup((a, e), e);
return b + d + a + e;
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test(float f)
{
var a = Produce1(); // V00
var b = Produce2(); // V01
var c = a + b; // V02
var d = c + a; // V03
var e = d + b; // V04
d = AdvSimd.Arm64.VectorTableLookup((d, e, e, b), c); // V06 = (V03, V04)
b = AdvSimd.Arm64.VectorTableLookup((c, e, b, a), b);
//e = AdvSimd.Arm64.VectorTableLookup((a, d), b);
//a = AdvSimd.Arm64.VectorTableLookup((a, e), e);
return b + d; // a + b + d + e;
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test(double f)
{
var a = Produce1(); // V00
var b = Produce2(); // V01
var c = a + b; // V02
var d = c + a; // V03
var e = d + b; // V04
d = AdvSimd.Arm64.VectorTableLookup((d, e, b), c); // V06 = (V03, V04)
b = AdvSimd.Arm64.VectorTableLookup((c, e, a), b);
//e = AdvSimd.Arm64.VectorTableLookup((a, d), b);
//a = AdvSimd.Arm64.VectorTableLookup((a, e), e);
return b + d; // a + b + d + e;
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector64<byte> Test(Vector64<byte> f, Vector64<byte> g)
{
var a = Produce1(); // V00
var b = Produce2(); // V01
var c = a + b; // V02
var d = c + a; // V03
var e = d + b; // V04
d = AdvSimd.Arm64.VectorTableLookup((d, e), c); // V06 = (V03, V04)
b = AdvSimd.Arm64.VectorTableLookup((c, e), b);
var i = AdvSimd.VectorTableLookup((a, d), f);
var j = AdvSimd.VectorTableLookup((b, e), g);
var k = AdvSimd.VectorTableLookup((c, e, d), g);
var l = AdvSimd.VectorTableLookup((d, e, b, e), g);
return i + j + k + l;
}
[MethodImpl(MethodImplOptions.NoInlining)]
public static Vector128<byte> Test(Vector128<byte> z)
{
var a = Produce1();
var b = Produce1();
var c = a + b;
var d = c + a;
var e = d + b;
if (e == Vector128<byte>.Zero)
{
return AdvSimd.Arm64.VectorTableLookup((d, e), z);
}
else if (d != Vector128<byte>.One)
{
return AdvSimd.Arm64.VectorTableLookup((c, e), b);
}
else
{
return AdvSimd.Arm64.VectorTableLookup((a, d), b);
}
}
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